Source file src/cmd/compile/internal/ssa/rewriteMIPS64.go

     1  // Code generated from _gen/MIPS64.rules using 'go generate'; DO NOT EDIT.
     2  
     3  package ssa
     4  
     5  import "cmd/compile/internal/types"
     6  
     7  func rewriteValueMIPS64(v *Value) bool {
     8  	switch v.Op {
     9  	case OpAbs:
    10  		v.Op = OpMIPS64ABSD
    11  		return true
    12  	case OpAdd16:
    13  		v.Op = OpMIPS64ADDV
    14  		return true
    15  	case OpAdd32:
    16  		v.Op = OpMIPS64ADDV
    17  		return true
    18  	case OpAdd32F:
    19  		v.Op = OpMIPS64ADDF
    20  		return true
    21  	case OpAdd64:
    22  		v.Op = OpMIPS64ADDV
    23  		return true
    24  	case OpAdd64F:
    25  		v.Op = OpMIPS64ADDD
    26  		return true
    27  	case OpAdd8:
    28  		v.Op = OpMIPS64ADDV
    29  		return true
    30  	case OpAddPtr:
    31  		v.Op = OpMIPS64ADDV
    32  		return true
    33  	case OpAddr:
    34  		return rewriteValueMIPS64_OpAddr(v)
    35  	case OpAnd16:
    36  		v.Op = OpMIPS64AND
    37  		return true
    38  	case OpAnd32:
    39  		v.Op = OpMIPS64AND
    40  		return true
    41  	case OpAnd64:
    42  		v.Op = OpMIPS64AND
    43  		return true
    44  	case OpAnd8:
    45  		v.Op = OpMIPS64AND
    46  		return true
    47  	case OpAndB:
    48  		v.Op = OpMIPS64AND
    49  		return true
    50  	case OpAtomicAdd32:
    51  		v.Op = OpMIPS64LoweredAtomicAdd32
    52  		return true
    53  	case OpAtomicAdd64:
    54  		v.Op = OpMIPS64LoweredAtomicAdd64
    55  		return true
    56  	case OpAtomicAnd32:
    57  		v.Op = OpMIPS64LoweredAtomicAnd32
    58  		return true
    59  	case OpAtomicAnd8:
    60  		return rewriteValueMIPS64_OpAtomicAnd8(v)
    61  	case OpAtomicCompareAndSwap32:
    62  		return rewriteValueMIPS64_OpAtomicCompareAndSwap32(v)
    63  	case OpAtomicCompareAndSwap64:
    64  		v.Op = OpMIPS64LoweredAtomicCas64
    65  		return true
    66  	case OpAtomicExchange32:
    67  		v.Op = OpMIPS64LoweredAtomicExchange32
    68  		return true
    69  	case OpAtomicExchange64:
    70  		v.Op = OpMIPS64LoweredAtomicExchange64
    71  		return true
    72  	case OpAtomicLoad32:
    73  		v.Op = OpMIPS64LoweredAtomicLoad32
    74  		return true
    75  	case OpAtomicLoad64:
    76  		v.Op = OpMIPS64LoweredAtomicLoad64
    77  		return true
    78  	case OpAtomicLoad8:
    79  		v.Op = OpMIPS64LoweredAtomicLoad8
    80  		return true
    81  	case OpAtomicLoadPtr:
    82  		v.Op = OpMIPS64LoweredAtomicLoad64
    83  		return true
    84  	case OpAtomicOr32:
    85  		v.Op = OpMIPS64LoweredAtomicOr32
    86  		return true
    87  	case OpAtomicOr8:
    88  		return rewriteValueMIPS64_OpAtomicOr8(v)
    89  	case OpAtomicStore32:
    90  		v.Op = OpMIPS64LoweredAtomicStore32
    91  		return true
    92  	case OpAtomicStore64:
    93  		v.Op = OpMIPS64LoweredAtomicStore64
    94  		return true
    95  	case OpAtomicStore8:
    96  		v.Op = OpMIPS64LoweredAtomicStore8
    97  		return true
    98  	case OpAtomicStorePtrNoWB:
    99  		v.Op = OpMIPS64LoweredAtomicStore64
   100  		return true
   101  	case OpAvg64u:
   102  		return rewriteValueMIPS64_OpAvg64u(v)
   103  	case OpClosureCall:
   104  		v.Op = OpMIPS64CALLclosure
   105  		return true
   106  	case OpCom16:
   107  		return rewriteValueMIPS64_OpCom16(v)
   108  	case OpCom32:
   109  		return rewriteValueMIPS64_OpCom32(v)
   110  	case OpCom64:
   111  		return rewriteValueMIPS64_OpCom64(v)
   112  	case OpCom8:
   113  		return rewriteValueMIPS64_OpCom8(v)
   114  	case OpConst16:
   115  		return rewriteValueMIPS64_OpConst16(v)
   116  	case OpConst32:
   117  		return rewriteValueMIPS64_OpConst32(v)
   118  	case OpConst32F:
   119  		return rewriteValueMIPS64_OpConst32F(v)
   120  	case OpConst64:
   121  		return rewriteValueMIPS64_OpConst64(v)
   122  	case OpConst64F:
   123  		return rewriteValueMIPS64_OpConst64F(v)
   124  	case OpConst8:
   125  		return rewriteValueMIPS64_OpConst8(v)
   126  	case OpConstBool:
   127  		return rewriteValueMIPS64_OpConstBool(v)
   128  	case OpConstNil:
   129  		return rewriteValueMIPS64_OpConstNil(v)
   130  	case OpCvt32Fto32:
   131  		v.Op = OpMIPS64TRUNCFW
   132  		return true
   133  	case OpCvt32Fto64:
   134  		v.Op = OpMIPS64TRUNCFV
   135  		return true
   136  	case OpCvt32Fto64F:
   137  		v.Op = OpMIPS64MOVFD
   138  		return true
   139  	case OpCvt32to32F:
   140  		v.Op = OpMIPS64MOVWF
   141  		return true
   142  	case OpCvt32to64F:
   143  		v.Op = OpMIPS64MOVWD
   144  		return true
   145  	case OpCvt64Fto32:
   146  		v.Op = OpMIPS64TRUNCDW
   147  		return true
   148  	case OpCvt64Fto32F:
   149  		v.Op = OpMIPS64MOVDF
   150  		return true
   151  	case OpCvt64Fto64:
   152  		v.Op = OpMIPS64TRUNCDV
   153  		return true
   154  	case OpCvt64to32F:
   155  		v.Op = OpMIPS64MOVVF
   156  		return true
   157  	case OpCvt64to64F:
   158  		v.Op = OpMIPS64MOVVD
   159  		return true
   160  	case OpCvtBoolToUint8:
   161  		v.Op = OpCopy
   162  		return true
   163  	case OpDiv16:
   164  		return rewriteValueMIPS64_OpDiv16(v)
   165  	case OpDiv16u:
   166  		return rewriteValueMIPS64_OpDiv16u(v)
   167  	case OpDiv32:
   168  		return rewriteValueMIPS64_OpDiv32(v)
   169  	case OpDiv32F:
   170  		v.Op = OpMIPS64DIVF
   171  		return true
   172  	case OpDiv32u:
   173  		return rewriteValueMIPS64_OpDiv32u(v)
   174  	case OpDiv64:
   175  		return rewriteValueMIPS64_OpDiv64(v)
   176  	case OpDiv64F:
   177  		v.Op = OpMIPS64DIVD
   178  		return true
   179  	case OpDiv64u:
   180  		return rewriteValueMIPS64_OpDiv64u(v)
   181  	case OpDiv8:
   182  		return rewriteValueMIPS64_OpDiv8(v)
   183  	case OpDiv8u:
   184  		return rewriteValueMIPS64_OpDiv8u(v)
   185  	case OpEq16:
   186  		return rewriteValueMIPS64_OpEq16(v)
   187  	case OpEq32:
   188  		return rewriteValueMIPS64_OpEq32(v)
   189  	case OpEq32F:
   190  		return rewriteValueMIPS64_OpEq32F(v)
   191  	case OpEq64:
   192  		return rewriteValueMIPS64_OpEq64(v)
   193  	case OpEq64F:
   194  		return rewriteValueMIPS64_OpEq64F(v)
   195  	case OpEq8:
   196  		return rewriteValueMIPS64_OpEq8(v)
   197  	case OpEqB:
   198  		return rewriteValueMIPS64_OpEqB(v)
   199  	case OpEqPtr:
   200  		return rewriteValueMIPS64_OpEqPtr(v)
   201  	case OpGetCallerPC:
   202  		v.Op = OpMIPS64LoweredGetCallerPC
   203  		return true
   204  	case OpGetCallerSP:
   205  		v.Op = OpMIPS64LoweredGetCallerSP
   206  		return true
   207  	case OpGetClosurePtr:
   208  		v.Op = OpMIPS64LoweredGetClosurePtr
   209  		return true
   210  	case OpHmul32:
   211  		return rewriteValueMIPS64_OpHmul32(v)
   212  	case OpHmul32u:
   213  		return rewriteValueMIPS64_OpHmul32u(v)
   214  	case OpHmul64:
   215  		return rewriteValueMIPS64_OpHmul64(v)
   216  	case OpHmul64u:
   217  		return rewriteValueMIPS64_OpHmul64u(v)
   218  	case OpInterCall:
   219  		v.Op = OpMIPS64CALLinter
   220  		return true
   221  	case OpIsInBounds:
   222  		return rewriteValueMIPS64_OpIsInBounds(v)
   223  	case OpIsNonNil:
   224  		return rewriteValueMIPS64_OpIsNonNil(v)
   225  	case OpIsSliceInBounds:
   226  		return rewriteValueMIPS64_OpIsSliceInBounds(v)
   227  	case OpLeq16:
   228  		return rewriteValueMIPS64_OpLeq16(v)
   229  	case OpLeq16U:
   230  		return rewriteValueMIPS64_OpLeq16U(v)
   231  	case OpLeq32:
   232  		return rewriteValueMIPS64_OpLeq32(v)
   233  	case OpLeq32F:
   234  		return rewriteValueMIPS64_OpLeq32F(v)
   235  	case OpLeq32U:
   236  		return rewriteValueMIPS64_OpLeq32U(v)
   237  	case OpLeq64:
   238  		return rewriteValueMIPS64_OpLeq64(v)
   239  	case OpLeq64F:
   240  		return rewriteValueMIPS64_OpLeq64F(v)
   241  	case OpLeq64U:
   242  		return rewriteValueMIPS64_OpLeq64U(v)
   243  	case OpLeq8:
   244  		return rewriteValueMIPS64_OpLeq8(v)
   245  	case OpLeq8U:
   246  		return rewriteValueMIPS64_OpLeq8U(v)
   247  	case OpLess16:
   248  		return rewriteValueMIPS64_OpLess16(v)
   249  	case OpLess16U:
   250  		return rewriteValueMIPS64_OpLess16U(v)
   251  	case OpLess32:
   252  		return rewriteValueMIPS64_OpLess32(v)
   253  	case OpLess32F:
   254  		return rewriteValueMIPS64_OpLess32F(v)
   255  	case OpLess32U:
   256  		return rewriteValueMIPS64_OpLess32U(v)
   257  	case OpLess64:
   258  		return rewriteValueMIPS64_OpLess64(v)
   259  	case OpLess64F:
   260  		return rewriteValueMIPS64_OpLess64F(v)
   261  	case OpLess64U:
   262  		return rewriteValueMIPS64_OpLess64U(v)
   263  	case OpLess8:
   264  		return rewriteValueMIPS64_OpLess8(v)
   265  	case OpLess8U:
   266  		return rewriteValueMIPS64_OpLess8U(v)
   267  	case OpLoad:
   268  		return rewriteValueMIPS64_OpLoad(v)
   269  	case OpLocalAddr:
   270  		return rewriteValueMIPS64_OpLocalAddr(v)
   271  	case OpLsh16x16:
   272  		return rewriteValueMIPS64_OpLsh16x16(v)
   273  	case OpLsh16x32:
   274  		return rewriteValueMIPS64_OpLsh16x32(v)
   275  	case OpLsh16x64:
   276  		return rewriteValueMIPS64_OpLsh16x64(v)
   277  	case OpLsh16x8:
   278  		return rewriteValueMIPS64_OpLsh16x8(v)
   279  	case OpLsh32x16:
   280  		return rewriteValueMIPS64_OpLsh32x16(v)
   281  	case OpLsh32x32:
   282  		return rewriteValueMIPS64_OpLsh32x32(v)
   283  	case OpLsh32x64:
   284  		return rewriteValueMIPS64_OpLsh32x64(v)
   285  	case OpLsh32x8:
   286  		return rewriteValueMIPS64_OpLsh32x8(v)
   287  	case OpLsh64x16:
   288  		return rewriteValueMIPS64_OpLsh64x16(v)
   289  	case OpLsh64x32:
   290  		return rewriteValueMIPS64_OpLsh64x32(v)
   291  	case OpLsh64x64:
   292  		return rewriteValueMIPS64_OpLsh64x64(v)
   293  	case OpLsh64x8:
   294  		return rewriteValueMIPS64_OpLsh64x8(v)
   295  	case OpLsh8x16:
   296  		return rewriteValueMIPS64_OpLsh8x16(v)
   297  	case OpLsh8x32:
   298  		return rewriteValueMIPS64_OpLsh8x32(v)
   299  	case OpLsh8x64:
   300  		return rewriteValueMIPS64_OpLsh8x64(v)
   301  	case OpLsh8x8:
   302  		return rewriteValueMIPS64_OpLsh8x8(v)
   303  	case OpMIPS64ADDV:
   304  		return rewriteValueMIPS64_OpMIPS64ADDV(v)
   305  	case OpMIPS64ADDVconst:
   306  		return rewriteValueMIPS64_OpMIPS64ADDVconst(v)
   307  	case OpMIPS64AND:
   308  		return rewriteValueMIPS64_OpMIPS64AND(v)
   309  	case OpMIPS64ANDconst:
   310  		return rewriteValueMIPS64_OpMIPS64ANDconst(v)
   311  	case OpMIPS64LoweredAtomicAdd32:
   312  		return rewriteValueMIPS64_OpMIPS64LoweredAtomicAdd32(v)
   313  	case OpMIPS64LoweredAtomicAdd64:
   314  		return rewriteValueMIPS64_OpMIPS64LoweredAtomicAdd64(v)
   315  	case OpMIPS64LoweredAtomicStore32:
   316  		return rewriteValueMIPS64_OpMIPS64LoweredAtomicStore32(v)
   317  	case OpMIPS64LoweredAtomicStore64:
   318  		return rewriteValueMIPS64_OpMIPS64LoweredAtomicStore64(v)
   319  	case OpMIPS64LoweredPanicBoundsCR:
   320  		return rewriteValueMIPS64_OpMIPS64LoweredPanicBoundsCR(v)
   321  	case OpMIPS64LoweredPanicBoundsRC:
   322  		return rewriteValueMIPS64_OpMIPS64LoweredPanicBoundsRC(v)
   323  	case OpMIPS64LoweredPanicBoundsRR:
   324  		return rewriteValueMIPS64_OpMIPS64LoweredPanicBoundsRR(v)
   325  	case OpMIPS64MOVBUload:
   326  		return rewriteValueMIPS64_OpMIPS64MOVBUload(v)
   327  	case OpMIPS64MOVBUreg:
   328  		return rewriteValueMIPS64_OpMIPS64MOVBUreg(v)
   329  	case OpMIPS64MOVBload:
   330  		return rewriteValueMIPS64_OpMIPS64MOVBload(v)
   331  	case OpMIPS64MOVBreg:
   332  		return rewriteValueMIPS64_OpMIPS64MOVBreg(v)
   333  	case OpMIPS64MOVBstore:
   334  		return rewriteValueMIPS64_OpMIPS64MOVBstore(v)
   335  	case OpMIPS64MOVDload:
   336  		return rewriteValueMIPS64_OpMIPS64MOVDload(v)
   337  	case OpMIPS64MOVDstore:
   338  		return rewriteValueMIPS64_OpMIPS64MOVDstore(v)
   339  	case OpMIPS64MOVFload:
   340  		return rewriteValueMIPS64_OpMIPS64MOVFload(v)
   341  	case OpMIPS64MOVFstore:
   342  		return rewriteValueMIPS64_OpMIPS64MOVFstore(v)
   343  	case OpMIPS64MOVHUload:
   344  		return rewriteValueMIPS64_OpMIPS64MOVHUload(v)
   345  	case OpMIPS64MOVHUreg:
   346  		return rewriteValueMIPS64_OpMIPS64MOVHUreg(v)
   347  	case OpMIPS64MOVHload:
   348  		return rewriteValueMIPS64_OpMIPS64MOVHload(v)
   349  	case OpMIPS64MOVHreg:
   350  		return rewriteValueMIPS64_OpMIPS64MOVHreg(v)
   351  	case OpMIPS64MOVHstore:
   352  		return rewriteValueMIPS64_OpMIPS64MOVHstore(v)
   353  	case OpMIPS64MOVVload:
   354  		return rewriteValueMIPS64_OpMIPS64MOVVload(v)
   355  	case OpMIPS64MOVVnop:
   356  		return rewriteValueMIPS64_OpMIPS64MOVVnop(v)
   357  	case OpMIPS64MOVVreg:
   358  		return rewriteValueMIPS64_OpMIPS64MOVVreg(v)
   359  	case OpMIPS64MOVVstore:
   360  		return rewriteValueMIPS64_OpMIPS64MOVVstore(v)
   361  	case OpMIPS64MOVWUload:
   362  		return rewriteValueMIPS64_OpMIPS64MOVWUload(v)
   363  	case OpMIPS64MOVWUreg:
   364  		return rewriteValueMIPS64_OpMIPS64MOVWUreg(v)
   365  	case OpMIPS64MOVWload:
   366  		return rewriteValueMIPS64_OpMIPS64MOVWload(v)
   367  	case OpMIPS64MOVWreg:
   368  		return rewriteValueMIPS64_OpMIPS64MOVWreg(v)
   369  	case OpMIPS64MOVWstore:
   370  		return rewriteValueMIPS64_OpMIPS64MOVWstore(v)
   371  	case OpMIPS64NEGV:
   372  		return rewriteValueMIPS64_OpMIPS64NEGV(v)
   373  	case OpMIPS64OR:
   374  		return rewriteValueMIPS64_OpMIPS64OR(v)
   375  	case OpMIPS64ORconst:
   376  		return rewriteValueMIPS64_OpMIPS64ORconst(v)
   377  	case OpMIPS64SGT:
   378  		return rewriteValueMIPS64_OpMIPS64SGT(v)
   379  	case OpMIPS64SGTU:
   380  		return rewriteValueMIPS64_OpMIPS64SGTU(v)
   381  	case OpMIPS64SGTUconst:
   382  		return rewriteValueMIPS64_OpMIPS64SGTUconst(v)
   383  	case OpMIPS64SGTconst:
   384  		return rewriteValueMIPS64_OpMIPS64SGTconst(v)
   385  	case OpMIPS64SLLV:
   386  		return rewriteValueMIPS64_OpMIPS64SLLV(v)
   387  	case OpMIPS64SLLVconst:
   388  		return rewriteValueMIPS64_OpMIPS64SLLVconst(v)
   389  	case OpMIPS64SRAV:
   390  		return rewriteValueMIPS64_OpMIPS64SRAV(v)
   391  	case OpMIPS64SRAVconst:
   392  		return rewriteValueMIPS64_OpMIPS64SRAVconst(v)
   393  	case OpMIPS64SRLV:
   394  		return rewriteValueMIPS64_OpMIPS64SRLV(v)
   395  	case OpMIPS64SRLVconst:
   396  		return rewriteValueMIPS64_OpMIPS64SRLVconst(v)
   397  	case OpMIPS64SUBV:
   398  		return rewriteValueMIPS64_OpMIPS64SUBV(v)
   399  	case OpMIPS64SUBVconst:
   400  		return rewriteValueMIPS64_OpMIPS64SUBVconst(v)
   401  	case OpMIPS64XOR:
   402  		return rewriteValueMIPS64_OpMIPS64XOR(v)
   403  	case OpMIPS64XORconst:
   404  		return rewriteValueMIPS64_OpMIPS64XORconst(v)
   405  	case OpMod16:
   406  		return rewriteValueMIPS64_OpMod16(v)
   407  	case OpMod16u:
   408  		return rewriteValueMIPS64_OpMod16u(v)
   409  	case OpMod32:
   410  		return rewriteValueMIPS64_OpMod32(v)
   411  	case OpMod32u:
   412  		return rewriteValueMIPS64_OpMod32u(v)
   413  	case OpMod64:
   414  		return rewriteValueMIPS64_OpMod64(v)
   415  	case OpMod64u:
   416  		return rewriteValueMIPS64_OpMod64u(v)
   417  	case OpMod8:
   418  		return rewriteValueMIPS64_OpMod8(v)
   419  	case OpMod8u:
   420  		return rewriteValueMIPS64_OpMod8u(v)
   421  	case OpMove:
   422  		return rewriteValueMIPS64_OpMove(v)
   423  	case OpMul16:
   424  		return rewriteValueMIPS64_OpMul16(v)
   425  	case OpMul32:
   426  		return rewriteValueMIPS64_OpMul32(v)
   427  	case OpMul32F:
   428  		v.Op = OpMIPS64MULF
   429  		return true
   430  	case OpMul64:
   431  		return rewriteValueMIPS64_OpMul64(v)
   432  	case OpMul64F:
   433  		v.Op = OpMIPS64MULD
   434  		return true
   435  	case OpMul64uhilo:
   436  		v.Op = OpMIPS64MULVU
   437  		return true
   438  	case OpMul8:
   439  		return rewriteValueMIPS64_OpMul8(v)
   440  	case OpNeg16:
   441  		v.Op = OpMIPS64NEGV
   442  		return true
   443  	case OpNeg32:
   444  		v.Op = OpMIPS64NEGV
   445  		return true
   446  	case OpNeg32F:
   447  		v.Op = OpMIPS64NEGF
   448  		return true
   449  	case OpNeg64:
   450  		v.Op = OpMIPS64NEGV
   451  		return true
   452  	case OpNeg64F:
   453  		v.Op = OpMIPS64NEGD
   454  		return true
   455  	case OpNeg8:
   456  		v.Op = OpMIPS64NEGV
   457  		return true
   458  	case OpNeq16:
   459  		return rewriteValueMIPS64_OpNeq16(v)
   460  	case OpNeq32:
   461  		return rewriteValueMIPS64_OpNeq32(v)
   462  	case OpNeq32F:
   463  		return rewriteValueMIPS64_OpNeq32F(v)
   464  	case OpNeq64:
   465  		return rewriteValueMIPS64_OpNeq64(v)
   466  	case OpNeq64F:
   467  		return rewriteValueMIPS64_OpNeq64F(v)
   468  	case OpNeq8:
   469  		return rewriteValueMIPS64_OpNeq8(v)
   470  	case OpNeqB:
   471  		v.Op = OpMIPS64XOR
   472  		return true
   473  	case OpNeqPtr:
   474  		return rewriteValueMIPS64_OpNeqPtr(v)
   475  	case OpNilCheck:
   476  		v.Op = OpMIPS64LoweredNilCheck
   477  		return true
   478  	case OpNot:
   479  		return rewriteValueMIPS64_OpNot(v)
   480  	case OpOffPtr:
   481  		return rewriteValueMIPS64_OpOffPtr(v)
   482  	case OpOr16:
   483  		v.Op = OpMIPS64OR
   484  		return true
   485  	case OpOr32:
   486  		v.Op = OpMIPS64OR
   487  		return true
   488  	case OpOr64:
   489  		v.Op = OpMIPS64OR
   490  		return true
   491  	case OpOr8:
   492  		v.Op = OpMIPS64OR
   493  		return true
   494  	case OpOrB:
   495  		v.Op = OpMIPS64OR
   496  		return true
   497  	case OpPanicBounds:
   498  		v.Op = OpMIPS64LoweredPanicBoundsRR
   499  		return true
   500  	case OpPubBarrier:
   501  		v.Op = OpMIPS64LoweredPubBarrier
   502  		return true
   503  	case OpRotateLeft16:
   504  		return rewriteValueMIPS64_OpRotateLeft16(v)
   505  	case OpRotateLeft32:
   506  		return rewriteValueMIPS64_OpRotateLeft32(v)
   507  	case OpRotateLeft64:
   508  		return rewriteValueMIPS64_OpRotateLeft64(v)
   509  	case OpRotateLeft8:
   510  		return rewriteValueMIPS64_OpRotateLeft8(v)
   511  	case OpRound32F:
   512  		v.Op = OpCopy
   513  		return true
   514  	case OpRound64F:
   515  		v.Op = OpCopy
   516  		return true
   517  	case OpRsh16Ux16:
   518  		return rewriteValueMIPS64_OpRsh16Ux16(v)
   519  	case OpRsh16Ux32:
   520  		return rewriteValueMIPS64_OpRsh16Ux32(v)
   521  	case OpRsh16Ux64:
   522  		return rewriteValueMIPS64_OpRsh16Ux64(v)
   523  	case OpRsh16Ux8:
   524  		return rewriteValueMIPS64_OpRsh16Ux8(v)
   525  	case OpRsh16x16:
   526  		return rewriteValueMIPS64_OpRsh16x16(v)
   527  	case OpRsh16x32:
   528  		return rewriteValueMIPS64_OpRsh16x32(v)
   529  	case OpRsh16x64:
   530  		return rewriteValueMIPS64_OpRsh16x64(v)
   531  	case OpRsh16x8:
   532  		return rewriteValueMIPS64_OpRsh16x8(v)
   533  	case OpRsh32Ux16:
   534  		return rewriteValueMIPS64_OpRsh32Ux16(v)
   535  	case OpRsh32Ux32:
   536  		return rewriteValueMIPS64_OpRsh32Ux32(v)
   537  	case OpRsh32Ux64:
   538  		return rewriteValueMIPS64_OpRsh32Ux64(v)
   539  	case OpRsh32Ux8:
   540  		return rewriteValueMIPS64_OpRsh32Ux8(v)
   541  	case OpRsh32x16:
   542  		return rewriteValueMIPS64_OpRsh32x16(v)
   543  	case OpRsh32x32:
   544  		return rewriteValueMIPS64_OpRsh32x32(v)
   545  	case OpRsh32x64:
   546  		return rewriteValueMIPS64_OpRsh32x64(v)
   547  	case OpRsh32x8:
   548  		return rewriteValueMIPS64_OpRsh32x8(v)
   549  	case OpRsh64Ux16:
   550  		return rewriteValueMIPS64_OpRsh64Ux16(v)
   551  	case OpRsh64Ux32:
   552  		return rewriteValueMIPS64_OpRsh64Ux32(v)
   553  	case OpRsh64Ux64:
   554  		return rewriteValueMIPS64_OpRsh64Ux64(v)
   555  	case OpRsh64Ux8:
   556  		return rewriteValueMIPS64_OpRsh64Ux8(v)
   557  	case OpRsh64x16:
   558  		return rewriteValueMIPS64_OpRsh64x16(v)
   559  	case OpRsh64x32:
   560  		return rewriteValueMIPS64_OpRsh64x32(v)
   561  	case OpRsh64x64:
   562  		return rewriteValueMIPS64_OpRsh64x64(v)
   563  	case OpRsh64x8:
   564  		return rewriteValueMIPS64_OpRsh64x8(v)
   565  	case OpRsh8Ux16:
   566  		return rewriteValueMIPS64_OpRsh8Ux16(v)
   567  	case OpRsh8Ux32:
   568  		return rewriteValueMIPS64_OpRsh8Ux32(v)
   569  	case OpRsh8Ux64:
   570  		return rewriteValueMIPS64_OpRsh8Ux64(v)
   571  	case OpRsh8Ux8:
   572  		return rewriteValueMIPS64_OpRsh8Ux8(v)
   573  	case OpRsh8x16:
   574  		return rewriteValueMIPS64_OpRsh8x16(v)
   575  	case OpRsh8x32:
   576  		return rewriteValueMIPS64_OpRsh8x32(v)
   577  	case OpRsh8x64:
   578  		return rewriteValueMIPS64_OpRsh8x64(v)
   579  	case OpRsh8x8:
   580  		return rewriteValueMIPS64_OpRsh8x8(v)
   581  	case OpSelect0:
   582  		return rewriteValueMIPS64_OpSelect0(v)
   583  	case OpSelect1:
   584  		return rewriteValueMIPS64_OpSelect1(v)
   585  	case OpSignExt16to32:
   586  		v.Op = OpMIPS64MOVHreg
   587  		return true
   588  	case OpSignExt16to64:
   589  		v.Op = OpMIPS64MOVHreg
   590  		return true
   591  	case OpSignExt32to64:
   592  		v.Op = OpMIPS64MOVWreg
   593  		return true
   594  	case OpSignExt8to16:
   595  		v.Op = OpMIPS64MOVBreg
   596  		return true
   597  	case OpSignExt8to32:
   598  		v.Op = OpMIPS64MOVBreg
   599  		return true
   600  	case OpSignExt8to64:
   601  		v.Op = OpMIPS64MOVBreg
   602  		return true
   603  	case OpSlicemask:
   604  		return rewriteValueMIPS64_OpSlicemask(v)
   605  	case OpSqrt:
   606  		v.Op = OpMIPS64SQRTD
   607  		return true
   608  	case OpSqrt32:
   609  		v.Op = OpMIPS64SQRTF
   610  		return true
   611  	case OpStaticCall:
   612  		v.Op = OpMIPS64CALLstatic
   613  		return true
   614  	case OpStore:
   615  		return rewriteValueMIPS64_OpStore(v)
   616  	case OpSub16:
   617  		v.Op = OpMIPS64SUBV
   618  		return true
   619  	case OpSub32:
   620  		v.Op = OpMIPS64SUBV
   621  		return true
   622  	case OpSub32F:
   623  		v.Op = OpMIPS64SUBF
   624  		return true
   625  	case OpSub64:
   626  		v.Op = OpMIPS64SUBV
   627  		return true
   628  	case OpSub64F:
   629  		v.Op = OpMIPS64SUBD
   630  		return true
   631  	case OpSub8:
   632  		v.Op = OpMIPS64SUBV
   633  		return true
   634  	case OpSubPtr:
   635  		v.Op = OpMIPS64SUBV
   636  		return true
   637  	case OpTailCall:
   638  		v.Op = OpMIPS64CALLtail
   639  		return true
   640  	case OpTrunc16to8:
   641  		v.Op = OpCopy
   642  		return true
   643  	case OpTrunc32to16:
   644  		v.Op = OpCopy
   645  		return true
   646  	case OpTrunc32to8:
   647  		v.Op = OpCopy
   648  		return true
   649  	case OpTrunc64to16:
   650  		v.Op = OpCopy
   651  		return true
   652  	case OpTrunc64to32:
   653  		v.Op = OpCopy
   654  		return true
   655  	case OpTrunc64to8:
   656  		v.Op = OpCopy
   657  		return true
   658  	case OpWB:
   659  		v.Op = OpMIPS64LoweredWB
   660  		return true
   661  	case OpXor16:
   662  		v.Op = OpMIPS64XOR
   663  		return true
   664  	case OpXor32:
   665  		v.Op = OpMIPS64XOR
   666  		return true
   667  	case OpXor64:
   668  		v.Op = OpMIPS64XOR
   669  		return true
   670  	case OpXor8:
   671  		v.Op = OpMIPS64XOR
   672  		return true
   673  	case OpZero:
   674  		return rewriteValueMIPS64_OpZero(v)
   675  	case OpZeroExt16to32:
   676  		v.Op = OpMIPS64MOVHUreg
   677  		return true
   678  	case OpZeroExt16to64:
   679  		v.Op = OpMIPS64MOVHUreg
   680  		return true
   681  	case OpZeroExt32to64:
   682  		v.Op = OpMIPS64MOVWUreg
   683  		return true
   684  	case OpZeroExt8to16:
   685  		v.Op = OpMIPS64MOVBUreg
   686  		return true
   687  	case OpZeroExt8to32:
   688  		v.Op = OpMIPS64MOVBUreg
   689  		return true
   690  	case OpZeroExt8to64:
   691  		v.Op = OpMIPS64MOVBUreg
   692  		return true
   693  	}
   694  	return false
   695  }
   696  func rewriteValueMIPS64_OpAddr(v *Value) bool {
   697  	v_0 := v.Args[0]
   698  	// match: (Addr {sym} base)
   699  	// result: (MOVVaddr {sym} base)
   700  	for {
   701  		sym := auxToSym(v.Aux)
   702  		base := v_0
   703  		v.reset(OpMIPS64MOVVaddr)
   704  		v.Aux = symToAux(sym)
   705  		v.AddArg(base)
   706  		return true
   707  	}
   708  }
   709  func rewriteValueMIPS64_OpAtomicAnd8(v *Value) bool {
   710  	v_2 := v.Args[2]
   711  	v_1 := v.Args[1]
   712  	v_0 := v.Args[0]
   713  	b := v.Block
   714  	config := b.Func.Config
   715  	typ := &b.Func.Config.Types
   716  	// match: (AtomicAnd8 ptr val mem)
   717  	// cond: !config.BigEndian
   718  	// result: (LoweredAtomicAnd32 (AND <typ.UInt32Ptr> (MOVVconst [^3]) ptr) (OR <typ.UInt64> (SLLV <typ.UInt32> (ZeroExt8to32 val) (SLLVconst <typ.UInt64> [3] (ANDconst <typ.UInt64> [3] ptr))) (NOR (MOVVconst [0]) <typ.UInt64> (SLLV <typ.UInt64> (MOVVconst [0xff]) (SLLVconst <typ.UInt64> [3] (ANDconst <typ.UInt64> [3] ptr))))) mem)
   719  	for {
   720  		ptr := v_0
   721  		val := v_1
   722  		mem := v_2
   723  		if !(!config.BigEndian) {
   724  			break
   725  		}
   726  		v.reset(OpMIPS64LoweredAtomicAnd32)
   727  		v0 := b.NewValue0(v.Pos, OpMIPS64AND, typ.UInt32Ptr)
   728  		v1 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
   729  		v1.AuxInt = int64ToAuxInt(^3)
   730  		v0.AddArg2(v1, ptr)
   731  		v2 := b.NewValue0(v.Pos, OpMIPS64OR, typ.UInt64)
   732  		v3 := b.NewValue0(v.Pos, OpMIPS64SLLV, typ.UInt32)
   733  		v4 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   734  		v4.AddArg(val)
   735  		v5 := b.NewValue0(v.Pos, OpMIPS64SLLVconst, typ.UInt64)
   736  		v5.AuxInt = int64ToAuxInt(3)
   737  		v6 := b.NewValue0(v.Pos, OpMIPS64ANDconst, typ.UInt64)
   738  		v6.AuxInt = int64ToAuxInt(3)
   739  		v6.AddArg(ptr)
   740  		v5.AddArg(v6)
   741  		v3.AddArg2(v4, v5)
   742  		v7 := b.NewValue0(v.Pos, OpMIPS64NOR, typ.UInt64)
   743  		v8 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
   744  		v8.AuxInt = int64ToAuxInt(0)
   745  		v9 := b.NewValue0(v.Pos, OpMIPS64SLLV, typ.UInt64)
   746  		v10 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
   747  		v10.AuxInt = int64ToAuxInt(0xff)
   748  		v9.AddArg2(v10, v5)
   749  		v7.AddArg2(v8, v9)
   750  		v2.AddArg2(v3, v7)
   751  		v.AddArg3(v0, v2, mem)
   752  		return true
   753  	}
   754  	// match: (AtomicAnd8 ptr val mem)
   755  	// cond: config.BigEndian
   756  	// result: (LoweredAtomicAnd32 (AND <typ.UInt32Ptr> (MOVVconst [^3]) ptr) (OR <typ.UInt64> (SLLV <typ.UInt32> (ZeroExt8to32 val) (SLLVconst <typ.UInt64> [3] (ANDconst <typ.UInt64> [3] (XORconst <typ.UInt64> [3] ptr)))) (NOR (MOVVconst [0]) <typ.UInt64> (SLLV <typ.UInt64> (MOVVconst [0xff]) (SLLVconst <typ.UInt64> [3] (ANDconst <typ.UInt64> [3] (XORconst <typ.UInt64> [3] ptr)))))) mem)
   757  	for {
   758  		ptr := v_0
   759  		val := v_1
   760  		mem := v_2
   761  		if !(config.BigEndian) {
   762  			break
   763  		}
   764  		v.reset(OpMIPS64LoweredAtomicAnd32)
   765  		v0 := b.NewValue0(v.Pos, OpMIPS64AND, typ.UInt32Ptr)
   766  		v1 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
   767  		v1.AuxInt = int64ToAuxInt(^3)
   768  		v0.AddArg2(v1, ptr)
   769  		v2 := b.NewValue0(v.Pos, OpMIPS64OR, typ.UInt64)
   770  		v3 := b.NewValue0(v.Pos, OpMIPS64SLLV, typ.UInt32)
   771  		v4 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   772  		v4.AddArg(val)
   773  		v5 := b.NewValue0(v.Pos, OpMIPS64SLLVconst, typ.UInt64)
   774  		v5.AuxInt = int64ToAuxInt(3)
   775  		v6 := b.NewValue0(v.Pos, OpMIPS64ANDconst, typ.UInt64)
   776  		v6.AuxInt = int64ToAuxInt(3)
   777  		v7 := b.NewValue0(v.Pos, OpMIPS64XORconst, typ.UInt64)
   778  		v7.AuxInt = int64ToAuxInt(3)
   779  		v7.AddArg(ptr)
   780  		v6.AddArg(v7)
   781  		v5.AddArg(v6)
   782  		v3.AddArg2(v4, v5)
   783  		v8 := b.NewValue0(v.Pos, OpMIPS64NOR, typ.UInt64)
   784  		v9 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
   785  		v9.AuxInt = int64ToAuxInt(0)
   786  		v10 := b.NewValue0(v.Pos, OpMIPS64SLLV, typ.UInt64)
   787  		v11 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
   788  		v11.AuxInt = int64ToAuxInt(0xff)
   789  		v10.AddArg2(v11, v5)
   790  		v8.AddArg2(v9, v10)
   791  		v2.AddArg2(v3, v8)
   792  		v.AddArg3(v0, v2, mem)
   793  		return true
   794  	}
   795  	return false
   796  }
   797  func rewriteValueMIPS64_OpAtomicCompareAndSwap32(v *Value) bool {
   798  	v_3 := v.Args[3]
   799  	v_2 := v.Args[2]
   800  	v_1 := v.Args[1]
   801  	v_0 := v.Args[0]
   802  	b := v.Block
   803  	typ := &b.Func.Config.Types
   804  	// match: (AtomicCompareAndSwap32 ptr old new mem)
   805  	// result: (LoweredAtomicCas32 ptr (SignExt32to64 old) new mem)
   806  	for {
   807  		ptr := v_0
   808  		old := v_1
   809  		new := v_2
   810  		mem := v_3
   811  		v.reset(OpMIPS64LoweredAtomicCas32)
   812  		v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
   813  		v0.AddArg(old)
   814  		v.AddArg4(ptr, v0, new, mem)
   815  		return true
   816  	}
   817  }
   818  func rewriteValueMIPS64_OpAtomicOr8(v *Value) bool {
   819  	v_2 := v.Args[2]
   820  	v_1 := v.Args[1]
   821  	v_0 := v.Args[0]
   822  	b := v.Block
   823  	config := b.Func.Config
   824  	typ := &b.Func.Config.Types
   825  	// match: (AtomicOr8 ptr val mem)
   826  	// cond: !config.BigEndian
   827  	// result: (LoweredAtomicOr32 (AND <typ.UInt32Ptr> (MOVVconst [^3]) ptr) (SLLV <typ.UInt32> (ZeroExt8to32 val) (SLLVconst <typ.UInt64> [3] (ANDconst <typ.UInt64> [3] ptr))) mem)
   828  	for {
   829  		ptr := v_0
   830  		val := v_1
   831  		mem := v_2
   832  		if !(!config.BigEndian) {
   833  			break
   834  		}
   835  		v.reset(OpMIPS64LoweredAtomicOr32)
   836  		v0 := b.NewValue0(v.Pos, OpMIPS64AND, typ.UInt32Ptr)
   837  		v1 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
   838  		v1.AuxInt = int64ToAuxInt(^3)
   839  		v0.AddArg2(v1, ptr)
   840  		v2 := b.NewValue0(v.Pos, OpMIPS64SLLV, typ.UInt32)
   841  		v3 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   842  		v3.AddArg(val)
   843  		v4 := b.NewValue0(v.Pos, OpMIPS64SLLVconst, typ.UInt64)
   844  		v4.AuxInt = int64ToAuxInt(3)
   845  		v5 := b.NewValue0(v.Pos, OpMIPS64ANDconst, typ.UInt64)
   846  		v5.AuxInt = int64ToAuxInt(3)
   847  		v5.AddArg(ptr)
   848  		v4.AddArg(v5)
   849  		v2.AddArg2(v3, v4)
   850  		v.AddArg3(v0, v2, mem)
   851  		return true
   852  	}
   853  	// match: (AtomicOr8 ptr val mem)
   854  	// cond: config.BigEndian
   855  	// result: (LoweredAtomicOr32 (AND <typ.UInt32Ptr> (MOVVconst [^3]) ptr) (SLLV <typ.UInt32> (ZeroExt8to32 val) (SLLVconst <typ.UInt64> [3] (ANDconst <typ.UInt64> [3] (XORconst <typ.UInt64> [3] ptr)))) mem)
   856  	for {
   857  		ptr := v_0
   858  		val := v_1
   859  		mem := v_2
   860  		if !(config.BigEndian) {
   861  			break
   862  		}
   863  		v.reset(OpMIPS64LoweredAtomicOr32)
   864  		v0 := b.NewValue0(v.Pos, OpMIPS64AND, typ.UInt32Ptr)
   865  		v1 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
   866  		v1.AuxInt = int64ToAuxInt(^3)
   867  		v0.AddArg2(v1, ptr)
   868  		v2 := b.NewValue0(v.Pos, OpMIPS64SLLV, typ.UInt32)
   869  		v3 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   870  		v3.AddArg(val)
   871  		v4 := b.NewValue0(v.Pos, OpMIPS64SLLVconst, typ.UInt64)
   872  		v4.AuxInt = int64ToAuxInt(3)
   873  		v5 := b.NewValue0(v.Pos, OpMIPS64ANDconst, typ.UInt64)
   874  		v5.AuxInt = int64ToAuxInt(3)
   875  		v6 := b.NewValue0(v.Pos, OpMIPS64XORconst, typ.UInt64)
   876  		v6.AuxInt = int64ToAuxInt(3)
   877  		v6.AddArg(ptr)
   878  		v5.AddArg(v6)
   879  		v4.AddArg(v5)
   880  		v2.AddArg2(v3, v4)
   881  		v.AddArg3(v0, v2, mem)
   882  		return true
   883  	}
   884  	return false
   885  }
   886  func rewriteValueMIPS64_OpAvg64u(v *Value) bool {
   887  	v_1 := v.Args[1]
   888  	v_0 := v.Args[0]
   889  	b := v.Block
   890  	// match: (Avg64u <t> x y)
   891  	// result: (ADDV (SRLVconst <t> (SUBV <t> x y) [1]) y)
   892  	for {
   893  		t := v.Type
   894  		x := v_0
   895  		y := v_1
   896  		v.reset(OpMIPS64ADDV)
   897  		v0 := b.NewValue0(v.Pos, OpMIPS64SRLVconst, t)
   898  		v0.AuxInt = int64ToAuxInt(1)
   899  		v1 := b.NewValue0(v.Pos, OpMIPS64SUBV, t)
   900  		v1.AddArg2(x, y)
   901  		v0.AddArg(v1)
   902  		v.AddArg2(v0, y)
   903  		return true
   904  	}
   905  }
   906  func rewriteValueMIPS64_OpCom16(v *Value) bool {
   907  	v_0 := v.Args[0]
   908  	b := v.Block
   909  	typ := &b.Func.Config.Types
   910  	// match: (Com16 x)
   911  	// result: (NOR (MOVVconst [0]) x)
   912  	for {
   913  		x := v_0
   914  		v.reset(OpMIPS64NOR)
   915  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
   916  		v0.AuxInt = int64ToAuxInt(0)
   917  		v.AddArg2(v0, x)
   918  		return true
   919  	}
   920  }
   921  func rewriteValueMIPS64_OpCom32(v *Value) bool {
   922  	v_0 := v.Args[0]
   923  	b := v.Block
   924  	typ := &b.Func.Config.Types
   925  	// match: (Com32 x)
   926  	// result: (NOR (MOVVconst [0]) x)
   927  	for {
   928  		x := v_0
   929  		v.reset(OpMIPS64NOR)
   930  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
   931  		v0.AuxInt = int64ToAuxInt(0)
   932  		v.AddArg2(v0, x)
   933  		return true
   934  	}
   935  }
   936  func rewriteValueMIPS64_OpCom64(v *Value) bool {
   937  	v_0 := v.Args[0]
   938  	b := v.Block
   939  	typ := &b.Func.Config.Types
   940  	// match: (Com64 x)
   941  	// result: (NOR (MOVVconst [0]) x)
   942  	for {
   943  		x := v_0
   944  		v.reset(OpMIPS64NOR)
   945  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
   946  		v0.AuxInt = int64ToAuxInt(0)
   947  		v.AddArg2(v0, x)
   948  		return true
   949  	}
   950  }
   951  func rewriteValueMIPS64_OpCom8(v *Value) bool {
   952  	v_0 := v.Args[0]
   953  	b := v.Block
   954  	typ := &b.Func.Config.Types
   955  	// match: (Com8 x)
   956  	// result: (NOR (MOVVconst [0]) x)
   957  	for {
   958  		x := v_0
   959  		v.reset(OpMIPS64NOR)
   960  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
   961  		v0.AuxInt = int64ToAuxInt(0)
   962  		v.AddArg2(v0, x)
   963  		return true
   964  	}
   965  }
   966  func rewriteValueMIPS64_OpConst16(v *Value) bool {
   967  	// match: (Const16 [val])
   968  	// result: (MOVVconst [int64(val)])
   969  	for {
   970  		val := auxIntToInt16(v.AuxInt)
   971  		v.reset(OpMIPS64MOVVconst)
   972  		v.AuxInt = int64ToAuxInt(int64(val))
   973  		return true
   974  	}
   975  }
   976  func rewriteValueMIPS64_OpConst32(v *Value) bool {
   977  	// match: (Const32 [val])
   978  	// result: (MOVVconst [int64(val)])
   979  	for {
   980  		val := auxIntToInt32(v.AuxInt)
   981  		v.reset(OpMIPS64MOVVconst)
   982  		v.AuxInt = int64ToAuxInt(int64(val))
   983  		return true
   984  	}
   985  }
   986  func rewriteValueMIPS64_OpConst32F(v *Value) bool {
   987  	// match: (Const32F [val])
   988  	// result: (MOVFconst [float64(val)])
   989  	for {
   990  		val := auxIntToFloat32(v.AuxInt)
   991  		v.reset(OpMIPS64MOVFconst)
   992  		v.AuxInt = float64ToAuxInt(float64(val))
   993  		return true
   994  	}
   995  }
   996  func rewriteValueMIPS64_OpConst64(v *Value) bool {
   997  	// match: (Const64 [val])
   998  	// result: (MOVVconst [int64(val)])
   999  	for {
  1000  		val := auxIntToInt64(v.AuxInt)
  1001  		v.reset(OpMIPS64MOVVconst)
  1002  		v.AuxInt = int64ToAuxInt(int64(val))
  1003  		return true
  1004  	}
  1005  }
  1006  func rewriteValueMIPS64_OpConst64F(v *Value) bool {
  1007  	// match: (Const64F [val])
  1008  	// result: (MOVDconst [float64(val)])
  1009  	for {
  1010  		val := auxIntToFloat64(v.AuxInt)
  1011  		v.reset(OpMIPS64MOVDconst)
  1012  		v.AuxInt = float64ToAuxInt(float64(val))
  1013  		return true
  1014  	}
  1015  }
  1016  func rewriteValueMIPS64_OpConst8(v *Value) bool {
  1017  	// match: (Const8 [val])
  1018  	// result: (MOVVconst [int64(val)])
  1019  	for {
  1020  		val := auxIntToInt8(v.AuxInt)
  1021  		v.reset(OpMIPS64MOVVconst)
  1022  		v.AuxInt = int64ToAuxInt(int64(val))
  1023  		return true
  1024  	}
  1025  }
  1026  func rewriteValueMIPS64_OpConstBool(v *Value) bool {
  1027  	// match: (ConstBool [t])
  1028  	// result: (MOVVconst [int64(b2i(t))])
  1029  	for {
  1030  		t := auxIntToBool(v.AuxInt)
  1031  		v.reset(OpMIPS64MOVVconst)
  1032  		v.AuxInt = int64ToAuxInt(int64(b2i(t)))
  1033  		return true
  1034  	}
  1035  }
  1036  func rewriteValueMIPS64_OpConstNil(v *Value) bool {
  1037  	// match: (ConstNil)
  1038  	// result: (MOVVconst [0])
  1039  	for {
  1040  		v.reset(OpMIPS64MOVVconst)
  1041  		v.AuxInt = int64ToAuxInt(0)
  1042  		return true
  1043  	}
  1044  }
  1045  func rewriteValueMIPS64_OpDiv16(v *Value) bool {
  1046  	v_1 := v.Args[1]
  1047  	v_0 := v.Args[0]
  1048  	b := v.Block
  1049  	typ := &b.Func.Config.Types
  1050  	// match: (Div16 x y)
  1051  	// result: (Select1 (DIVV (SignExt16to64 x) (SignExt16to64 y)))
  1052  	for {
  1053  		x := v_0
  1054  		y := v_1
  1055  		v.reset(OpSelect1)
  1056  		v0 := b.NewValue0(v.Pos, OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
  1057  		v1 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
  1058  		v1.AddArg(x)
  1059  		v2 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
  1060  		v2.AddArg(y)
  1061  		v0.AddArg2(v1, v2)
  1062  		v.AddArg(v0)
  1063  		return true
  1064  	}
  1065  }
  1066  func rewriteValueMIPS64_OpDiv16u(v *Value) bool {
  1067  	v_1 := v.Args[1]
  1068  	v_0 := v.Args[0]
  1069  	b := v.Block
  1070  	typ := &b.Func.Config.Types
  1071  	// match: (Div16u x y)
  1072  	// result: (Select1 (DIVVU (ZeroExt16to64 x) (ZeroExt16to64 y)))
  1073  	for {
  1074  		x := v_0
  1075  		y := v_1
  1076  		v.reset(OpSelect1)
  1077  		v0 := b.NewValue0(v.Pos, OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
  1078  		v1 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  1079  		v1.AddArg(x)
  1080  		v2 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  1081  		v2.AddArg(y)
  1082  		v0.AddArg2(v1, v2)
  1083  		v.AddArg(v0)
  1084  		return true
  1085  	}
  1086  }
  1087  func rewriteValueMIPS64_OpDiv32(v *Value) bool {
  1088  	v_1 := v.Args[1]
  1089  	v_0 := v.Args[0]
  1090  	b := v.Block
  1091  	typ := &b.Func.Config.Types
  1092  	// match: (Div32 x y)
  1093  	// result: (Select1 (DIVV (SignExt32to64 x) (SignExt32to64 y)))
  1094  	for {
  1095  		x := v_0
  1096  		y := v_1
  1097  		v.reset(OpSelect1)
  1098  		v0 := b.NewValue0(v.Pos, OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
  1099  		v1 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
  1100  		v1.AddArg(x)
  1101  		v2 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
  1102  		v2.AddArg(y)
  1103  		v0.AddArg2(v1, v2)
  1104  		v.AddArg(v0)
  1105  		return true
  1106  	}
  1107  }
  1108  func rewriteValueMIPS64_OpDiv32u(v *Value) bool {
  1109  	v_1 := v.Args[1]
  1110  	v_0 := v.Args[0]
  1111  	b := v.Block
  1112  	typ := &b.Func.Config.Types
  1113  	// match: (Div32u x y)
  1114  	// result: (Select1 (DIVVU (ZeroExt32to64 x) (ZeroExt32to64 y)))
  1115  	for {
  1116  		x := v_0
  1117  		y := v_1
  1118  		v.reset(OpSelect1)
  1119  		v0 := b.NewValue0(v.Pos, OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
  1120  		v1 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  1121  		v1.AddArg(x)
  1122  		v2 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  1123  		v2.AddArg(y)
  1124  		v0.AddArg2(v1, v2)
  1125  		v.AddArg(v0)
  1126  		return true
  1127  	}
  1128  }
  1129  func rewriteValueMIPS64_OpDiv64(v *Value) bool {
  1130  	v_1 := v.Args[1]
  1131  	v_0 := v.Args[0]
  1132  	b := v.Block
  1133  	typ := &b.Func.Config.Types
  1134  	// match: (Div64 x y)
  1135  	// result: (Select1 (DIVV x y))
  1136  	for {
  1137  		x := v_0
  1138  		y := v_1
  1139  		v.reset(OpSelect1)
  1140  		v0 := b.NewValue0(v.Pos, OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
  1141  		v0.AddArg2(x, y)
  1142  		v.AddArg(v0)
  1143  		return true
  1144  	}
  1145  }
  1146  func rewriteValueMIPS64_OpDiv64u(v *Value) bool {
  1147  	v_1 := v.Args[1]
  1148  	v_0 := v.Args[0]
  1149  	b := v.Block
  1150  	typ := &b.Func.Config.Types
  1151  	// match: (Div64u x y)
  1152  	// result: (Select1 (DIVVU x y))
  1153  	for {
  1154  		x := v_0
  1155  		y := v_1
  1156  		v.reset(OpSelect1)
  1157  		v0 := b.NewValue0(v.Pos, OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
  1158  		v0.AddArg2(x, y)
  1159  		v.AddArg(v0)
  1160  		return true
  1161  	}
  1162  }
  1163  func rewriteValueMIPS64_OpDiv8(v *Value) bool {
  1164  	v_1 := v.Args[1]
  1165  	v_0 := v.Args[0]
  1166  	b := v.Block
  1167  	typ := &b.Func.Config.Types
  1168  	// match: (Div8 x y)
  1169  	// result: (Select1 (DIVV (SignExt8to64 x) (SignExt8to64 y)))
  1170  	for {
  1171  		x := v_0
  1172  		y := v_1
  1173  		v.reset(OpSelect1)
  1174  		v0 := b.NewValue0(v.Pos, OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
  1175  		v1 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
  1176  		v1.AddArg(x)
  1177  		v2 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
  1178  		v2.AddArg(y)
  1179  		v0.AddArg2(v1, v2)
  1180  		v.AddArg(v0)
  1181  		return true
  1182  	}
  1183  }
  1184  func rewriteValueMIPS64_OpDiv8u(v *Value) bool {
  1185  	v_1 := v.Args[1]
  1186  	v_0 := v.Args[0]
  1187  	b := v.Block
  1188  	typ := &b.Func.Config.Types
  1189  	// match: (Div8u x y)
  1190  	// result: (Select1 (DIVVU (ZeroExt8to64 x) (ZeroExt8to64 y)))
  1191  	for {
  1192  		x := v_0
  1193  		y := v_1
  1194  		v.reset(OpSelect1)
  1195  		v0 := b.NewValue0(v.Pos, OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
  1196  		v1 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  1197  		v1.AddArg(x)
  1198  		v2 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  1199  		v2.AddArg(y)
  1200  		v0.AddArg2(v1, v2)
  1201  		v.AddArg(v0)
  1202  		return true
  1203  	}
  1204  }
  1205  func rewriteValueMIPS64_OpEq16(v *Value) bool {
  1206  	v_1 := v.Args[1]
  1207  	v_0 := v.Args[0]
  1208  	b := v.Block
  1209  	typ := &b.Func.Config.Types
  1210  	// match: (Eq16 x y)
  1211  	// result: (SGTU (MOVVconst [1]) (XOR (ZeroExt16to64 x) (ZeroExt16to64 y)))
  1212  	for {
  1213  		x := v_0
  1214  		y := v_1
  1215  		v.reset(OpMIPS64SGTU)
  1216  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  1217  		v0.AuxInt = int64ToAuxInt(1)
  1218  		v1 := b.NewValue0(v.Pos, OpMIPS64XOR, typ.UInt64)
  1219  		v2 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  1220  		v2.AddArg(x)
  1221  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  1222  		v3.AddArg(y)
  1223  		v1.AddArg2(v2, v3)
  1224  		v.AddArg2(v0, v1)
  1225  		return true
  1226  	}
  1227  }
  1228  func rewriteValueMIPS64_OpEq32(v *Value) bool {
  1229  	v_1 := v.Args[1]
  1230  	v_0 := v.Args[0]
  1231  	b := v.Block
  1232  	typ := &b.Func.Config.Types
  1233  	// match: (Eq32 x y)
  1234  	// result: (SGTU (MOVVconst [1]) (XOR (ZeroExt32to64 x) (ZeroExt32to64 y)))
  1235  	for {
  1236  		x := v_0
  1237  		y := v_1
  1238  		v.reset(OpMIPS64SGTU)
  1239  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  1240  		v0.AuxInt = int64ToAuxInt(1)
  1241  		v1 := b.NewValue0(v.Pos, OpMIPS64XOR, typ.UInt64)
  1242  		v2 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  1243  		v2.AddArg(x)
  1244  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  1245  		v3.AddArg(y)
  1246  		v1.AddArg2(v2, v3)
  1247  		v.AddArg2(v0, v1)
  1248  		return true
  1249  	}
  1250  }
  1251  func rewriteValueMIPS64_OpEq32F(v *Value) bool {
  1252  	v_1 := v.Args[1]
  1253  	v_0 := v.Args[0]
  1254  	b := v.Block
  1255  	// match: (Eq32F x y)
  1256  	// result: (FPFlagTrue (CMPEQF x y))
  1257  	for {
  1258  		x := v_0
  1259  		y := v_1
  1260  		v.reset(OpMIPS64FPFlagTrue)
  1261  		v0 := b.NewValue0(v.Pos, OpMIPS64CMPEQF, types.TypeFlags)
  1262  		v0.AddArg2(x, y)
  1263  		v.AddArg(v0)
  1264  		return true
  1265  	}
  1266  }
  1267  func rewriteValueMIPS64_OpEq64(v *Value) bool {
  1268  	v_1 := v.Args[1]
  1269  	v_0 := v.Args[0]
  1270  	b := v.Block
  1271  	typ := &b.Func.Config.Types
  1272  	// match: (Eq64 x y)
  1273  	// result: (SGTU (MOVVconst [1]) (XOR x y))
  1274  	for {
  1275  		x := v_0
  1276  		y := v_1
  1277  		v.reset(OpMIPS64SGTU)
  1278  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  1279  		v0.AuxInt = int64ToAuxInt(1)
  1280  		v1 := b.NewValue0(v.Pos, OpMIPS64XOR, typ.UInt64)
  1281  		v1.AddArg2(x, y)
  1282  		v.AddArg2(v0, v1)
  1283  		return true
  1284  	}
  1285  }
  1286  func rewriteValueMIPS64_OpEq64F(v *Value) bool {
  1287  	v_1 := v.Args[1]
  1288  	v_0 := v.Args[0]
  1289  	b := v.Block
  1290  	// match: (Eq64F x y)
  1291  	// result: (FPFlagTrue (CMPEQD x y))
  1292  	for {
  1293  		x := v_0
  1294  		y := v_1
  1295  		v.reset(OpMIPS64FPFlagTrue)
  1296  		v0 := b.NewValue0(v.Pos, OpMIPS64CMPEQD, types.TypeFlags)
  1297  		v0.AddArg2(x, y)
  1298  		v.AddArg(v0)
  1299  		return true
  1300  	}
  1301  }
  1302  func rewriteValueMIPS64_OpEq8(v *Value) bool {
  1303  	v_1 := v.Args[1]
  1304  	v_0 := v.Args[0]
  1305  	b := v.Block
  1306  	typ := &b.Func.Config.Types
  1307  	// match: (Eq8 x y)
  1308  	// result: (SGTU (MOVVconst [1]) (XOR (ZeroExt8to64 x) (ZeroExt8to64 y)))
  1309  	for {
  1310  		x := v_0
  1311  		y := v_1
  1312  		v.reset(OpMIPS64SGTU)
  1313  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  1314  		v0.AuxInt = int64ToAuxInt(1)
  1315  		v1 := b.NewValue0(v.Pos, OpMIPS64XOR, typ.UInt64)
  1316  		v2 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  1317  		v2.AddArg(x)
  1318  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  1319  		v3.AddArg(y)
  1320  		v1.AddArg2(v2, v3)
  1321  		v.AddArg2(v0, v1)
  1322  		return true
  1323  	}
  1324  }
  1325  func rewriteValueMIPS64_OpEqB(v *Value) bool {
  1326  	v_1 := v.Args[1]
  1327  	v_0 := v.Args[0]
  1328  	b := v.Block
  1329  	typ := &b.Func.Config.Types
  1330  	// match: (EqB x y)
  1331  	// result: (XOR (MOVVconst [1]) (XOR <typ.Bool> x y))
  1332  	for {
  1333  		x := v_0
  1334  		y := v_1
  1335  		v.reset(OpMIPS64XOR)
  1336  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  1337  		v0.AuxInt = int64ToAuxInt(1)
  1338  		v1 := b.NewValue0(v.Pos, OpMIPS64XOR, typ.Bool)
  1339  		v1.AddArg2(x, y)
  1340  		v.AddArg2(v0, v1)
  1341  		return true
  1342  	}
  1343  }
  1344  func rewriteValueMIPS64_OpEqPtr(v *Value) bool {
  1345  	v_1 := v.Args[1]
  1346  	v_0 := v.Args[0]
  1347  	b := v.Block
  1348  	typ := &b.Func.Config.Types
  1349  	// match: (EqPtr x y)
  1350  	// result: (SGTU (MOVVconst [1]) (XOR x y))
  1351  	for {
  1352  		x := v_0
  1353  		y := v_1
  1354  		v.reset(OpMIPS64SGTU)
  1355  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  1356  		v0.AuxInt = int64ToAuxInt(1)
  1357  		v1 := b.NewValue0(v.Pos, OpMIPS64XOR, typ.UInt64)
  1358  		v1.AddArg2(x, y)
  1359  		v.AddArg2(v0, v1)
  1360  		return true
  1361  	}
  1362  }
  1363  func rewriteValueMIPS64_OpHmul32(v *Value) bool {
  1364  	v_1 := v.Args[1]
  1365  	v_0 := v.Args[0]
  1366  	b := v.Block
  1367  	typ := &b.Func.Config.Types
  1368  	// match: (Hmul32 x y)
  1369  	// result: (SRAVconst (Select1 <typ.Int64> (MULV (SignExt32to64 x) (SignExt32to64 y))) [32])
  1370  	for {
  1371  		x := v_0
  1372  		y := v_1
  1373  		v.reset(OpMIPS64SRAVconst)
  1374  		v.AuxInt = int64ToAuxInt(32)
  1375  		v0 := b.NewValue0(v.Pos, OpSelect1, typ.Int64)
  1376  		v1 := b.NewValue0(v.Pos, OpMIPS64MULV, types.NewTuple(typ.Int64, typ.Int64))
  1377  		v2 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
  1378  		v2.AddArg(x)
  1379  		v3 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
  1380  		v3.AddArg(y)
  1381  		v1.AddArg2(v2, v3)
  1382  		v0.AddArg(v1)
  1383  		v.AddArg(v0)
  1384  		return true
  1385  	}
  1386  }
  1387  func rewriteValueMIPS64_OpHmul32u(v *Value) bool {
  1388  	v_1 := v.Args[1]
  1389  	v_0 := v.Args[0]
  1390  	b := v.Block
  1391  	typ := &b.Func.Config.Types
  1392  	// match: (Hmul32u x y)
  1393  	// result: (SRLVconst (Select1 <typ.UInt64> (MULVU (ZeroExt32to64 x) (ZeroExt32to64 y))) [32])
  1394  	for {
  1395  		x := v_0
  1396  		y := v_1
  1397  		v.reset(OpMIPS64SRLVconst)
  1398  		v.AuxInt = int64ToAuxInt(32)
  1399  		v0 := b.NewValue0(v.Pos, OpSelect1, typ.UInt64)
  1400  		v1 := b.NewValue0(v.Pos, OpMIPS64MULVU, types.NewTuple(typ.UInt64, typ.UInt64))
  1401  		v2 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  1402  		v2.AddArg(x)
  1403  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  1404  		v3.AddArg(y)
  1405  		v1.AddArg2(v2, v3)
  1406  		v0.AddArg(v1)
  1407  		v.AddArg(v0)
  1408  		return true
  1409  	}
  1410  }
  1411  func rewriteValueMIPS64_OpHmul64(v *Value) bool {
  1412  	v_1 := v.Args[1]
  1413  	v_0 := v.Args[0]
  1414  	b := v.Block
  1415  	typ := &b.Func.Config.Types
  1416  	// match: (Hmul64 x y)
  1417  	// result: (Select0 (MULV x y))
  1418  	for {
  1419  		x := v_0
  1420  		y := v_1
  1421  		v.reset(OpSelect0)
  1422  		v0 := b.NewValue0(v.Pos, OpMIPS64MULV, types.NewTuple(typ.Int64, typ.Int64))
  1423  		v0.AddArg2(x, y)
  1424  		v.AddArg(v0)
  1425  		return true
  1426  	}
  1427  }
  1428  func rewriteValueMIPS64_OpHmul64u(v *Value) bool {
  1429  	v_1 := v.Args[1]
  1430  	v_0 := v.Args[0]
  1431  	b := v.Block
  1432  	typ := &b.Func.Config.Types
  1433  	// match: (Hmul64u x y)
  1434  	// result: (Select0 (MULVU x y))
  1435  	for {
  1436  		x := v_0
  1437  		y := v_1
  1438  		v.reset(OpSelect0)
  1439  		v0 := b.NewValue0(v.Pos, OpMIPS64MULVU, types.NewTuple(typ.UInt64, typ.UInt64))
  1440  		v0.AddArg2(x, y)
  1441  		v.AddArg(v0)
  1442  		return true
  1443  	}
  1444  }
  1445  func rewriteValueMIPS64_OpIsInBounds(v *Value) bool {
  1446  	v_1 := v.Args[1]
  1447  	v_0 := v.Args[0]
  1448  	// match: (IsInBounds idx len)
  1449  	// result: (SGTU len idx)
  1450  	for {
  1451  		idx := v_0
  1452  		len := v_1
  1453  		v.reset(OpMIPS64SGTU)
  1454  		v.AddArg2(len, idx)
  1455  		return true
  1456  	}
  1457  }
  1458  func rewriteValueMIPS64_OpIsNonNil(v *Value) bool {
  1459  	v_0 := v.Args[0]
  1460  	b := v.Block
  1461  	typ := &b.Func.Config.Types
  1462  	// match: (IsNonNil ptr)
  1463  	// result: (SGTU ptr (MOVVconst [0]))
  1464  	for {
  1465  		ptr := v_0
  1466  		v.reset(OpMIPS64SGTU)
  1467  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  1468  		v0.AuxInt = int64ToAuxInt(0)
  1469  		v.AddArg2(ptr, v0)
  1470  		return true
  1471  	}
  1472  }
  1473  func rewriteValueMIPS64_OpIsSliceInBounds(v *Value) bool {
  1474  	v_1 := v.Args[1]
  1475  	v_0 := v.Args[0]
  1476  	b := v.Block
  1477  	typ := &b.Func.Config.Types
  1478  	// match: (IsSliceInBounds idx len)
  1479  	// result: (XOR (MOVVconst [1]) (SGTU idx len))
  1480  	for {
  1481  		idx := v_0
  1482  		len := v_1
  1483  		v.reset(OpMIPS64XOR)
  1484  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  1485  		v0.AuxInt = int64ToAuxInt(1)
  1486  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  1487  		v1.AddArg2(idx, len)
  1488  		v.AddArg2(v0, v1)
  1489  		return true
  1490  	}
  1491  }
  1492  func rewriteValueMIPS64_OpLeq16(v *Value) bool {
  1493  	v_1 := v.Args[1]
  1494  	v_0 := v.Args[0]
  1495  	b := v.Block
  1496  	typ := &b.Func.Config.Types
  1497  	// match: (Leq16 x y)
  1498  	// result: (XOR (MOVVconst [1]) (SGT (SignExt16to64 x) (SignExt16to64 y)))
  1499  	for {
  1500  		x := v_0
  1501  		y := v_1
  1502  		v.reset(OpMIPS64XOR)
  1503  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  1504  		v0.AuxInt = int64ToAuxInt(1)
  1505  		v1 := b.NewValue0(v.Pos, OpMIPS64SGT, typ.Bool)
  1506  		v2 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
  1507  		v2.AddArg(x)
  1508  		v3 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
  1509  		v3.AddArg(y)
  1510  		v1.AddArg2(v2, v3)
  1511  		v.AddArg2(v0, v1)
  1512  		return true
  1513  	}
  1514  }
  1515  func rewriteValueMIPS64_OpLeq16U(v *Value) bool {
  1516  	v_1 := v.Args[1]
  1517  	v_0 := v.Args[0]
  1518  	b := v.Block
  1519  	typ := &b.Func.Config.Types
  1520  	// match: (Leq16U x y)
  1521  	// result: (XOR (MOVVconst [1]) (SGTU (ZeroExt16to64 x) (ZeroExt16to64 y)))
  1522  	for {
  1523  		x := v_0
  1524  		y := v_1
  1525  		v.reset(OpMIPS64XOR)
  1526  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  1527  		v0.AuxInt = int64ToAuxInt(1)
  1528  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  1529  		v2 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  1530  		v2.AddArg(x)
  1531  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  1532  		v3.AddArg(y)
  1533  		v1.AddArg2(v2, v3)
  1534  		v.AddArg2(v0, v1)
  1535  		return true
  1536  	}
  1537  }
  1538  func rewriteValueMIPS64_OpLeq32(v *Value) bool {
  1539  	v_1 := v.Args[1]
  1540  	v_0 := v.Args[0]
  1541  	b := v.Block
  1542  	typ := &b.Func.Config.Types
  1543  	// match: (Leq32 x y)
  1544  	// result: (XOR (MOVVconst [1]) (SGT (SignExt32to64 x) (SignExt32to64 y)))
  1545  	for {
  1546  		x := v_0
  1547  		y := v_1
  1548  		v.reset(OpMIPS64XOR)
  1549  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  1550  		v0.AuxInt = int64ToAuxInt(1)
  1551  		v1 := b.NewValue0(v.Pos, OpMIPS64SGT, typ.Bool)
  1552  		v2 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
  1553  		v2.AddArg(x)
  1554  		v3 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
  1555  		v3.AddArg(y)
  1556  		v1.AddArg2(v2, v3)
  1557  		v.AddArg2(v0, v1)
  1558  		return true
  1559  	}
  1560  }
  1561  func rewriteValueMIPS64_OpLeq32F(v *Value) bool {
  1562  	v_1 := v.Args[1]
  1563  	v_0 := v.Args[0]
  1564  	b := v.Block
  1565  	// match: (Leq32F x y)
  1566  	// result: (FPFlagTrue (CMPGEF y x))
  1567  	for {
  1568  		x := v_0
  1569  		y := v_1
  1570  		v.reset(OpMIPS64FPFlagTrue)
  1571  		v0 := b.NewValue0(v.Pos, OpMIPS64CMPGEF, types.TypeFlags)
  1572  		v0.AddArg2(y, x)
  1573  		v.AddArg(v0)
  1574  		return true
  1575  	}
  1576  }
  1577  func rewriteValueMIPS64_OpLeq32U(v *Value) bool {
  1578  	v_1 := v.Args[1]
  1579  	v_0 := v.Args[0]
  1580  	b := v.Block
  1581  	typ := &b.Func.Config.Types
  1582  	// match: (Leq32U x y)
  1583  	// result: (XOR (MOVVconst [1]) (SGTU (ZeroExt32to64 x) (ZeroExt32to64 y)))
  1584  	for {
  1585  		x := v_0
  1586  		y := v_1
  1587  		v.reset(OpMIPS64XOR)
  1588  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  1589  		v0.AuxInt = int64ToAuxInt(1)
  1590  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  1591  		v2 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  1592  		v2.AddArg(x)
  1593  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  1594  		v3.AddArg(y)
  1595  		v1.AddArg2(v2, v3)
  1596  		v.AddArg2(v0, v1)
  1597  		return true
  1598  	}
  1599  }
  1600  func rewriteValueMIPS64_OpLeq64(v *Value) bool {
  1601  	v_1 := v.Args[1]
  1602  	v_0 := v.Args[0]
  1603  	b := v.Block
  1604  	typ := &b.Func.Config.Types
  1605  	// match: (Leq64 x y)
  1606  	// result: (XOR (MOVVconst [1]) (SGT x y))
  1607  	for {
  1608  		x := v_0
  1609  		y := v_1
  1610  		v.reset(OpMIPS64XOR)
  1611  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  1612  		v0.AuxInt = int64ToAuxInt(1)
  1613  		v1 := b.NewValue0(v.Pos, OpMIPS64SGT, typ.Bool)
  1614  		v1.AddArg2(x, y)
  1615  		v.AddArg2(v0, v1)
  1616  		return true
  1617  	}
  1618  }
  1619  func rewriteValueMIPS64_OpLeq64F(v *Value) bool {
  1620  	v_1 := v.Args[1]
  1621  	v_0 := v.Args[0]
  1622  	b := v.Block
  1623  	// match: (Leq64F x y)
  1624  	// result: (FPFlagTrue (CMPGED y x))
  1625  	for {
  1626  		x := v_0
  1627  		y := v_1
  1628  		v.reset(OpMIPS64FPFlagTrue)
  1629  		v0 := b.NewValue0(v.Pos, OpMIPS64CMPGED, types.TypeFlags)
  1630  		v0.AddArg2(y, x)
  1631  		v.AddArg(v0)
  1632  		return true
  1633  	}
  1634  }
  1635  func rewriteValueMIPS64_OpLeq64U(v *Value) bool {
  1636  	v_1 := v.Args[1]
  1637  	v_0 := v.Args[0]
  1638  	b := v.Block
  1639  	typ := &b.Func.Config.Types
  1640  	// match: (Leq64U x y)
  1641  	// result: (XOR (MOVVconst [1]) (SGTU x y))
  1642  	for {
  1643  		x := v_0
  1644  		y := v_1
  1645  		v.reset(OpMIPS64XOR)
  1646  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  1647  		v0.AuxInt = int64ToAuxInt(1)
  1648  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  1649  		v1.AddArg2(x, y)
  1650  		v.AddArg2(v0, v1)
  1651  		return true
  1652  	}
  1653  }
  1654  func rewriteValueMIPS64_OpLeq8(v *Value) bool {
  1655  	v_1 := v.Args[1]
  1656  	v_0 := v.Args[0]
  1657  	b := v.Block
  1658  	typ := &b.Func.Config.Types
  1659  	// match: (Leq8 x y)
  1660  	// result: (XOR (MOVVconst [1]) (SGT (SignExt8to64 x) (SignExt8to64 y)))
  1661  	for {
  1662  		x := v_0
  1663  		y := v_1
  1664  		v.reset(OpMIPS64XOR)
  1665  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  1666  		v0.AuxInt = int64ToAuxInt(1)
  1667  		v1 := b.NewValue0(v.Pos, OpMIPS64SGT, typ.Bool)
  1668  		v2 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
  1669  		v2.AddArg(x)
  1670  		v3 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
  1671  		v3.AddArg(y)
  1672  		v1.AddArg2(v2, v3)
  1673  		v.AddArg2(v0, v1)
  1674  		return true
  1675  	}
  1676  }
  1677  func rewriteValueMIPS64_OpLeq8U(v *Value) bool {
  1678  	v_1 := v.Args[1]
  1679  	v_0 := v.Args[0]
  1680  	b := v.Block
  1681  	typ := &b.Func.Config.Types
  1682  	// match: (Leq8U x y)
  1683  	// result: (XOR (MOVVconst [1]) (SGTU (ZeroExt8to64 x) (ZeroExt8to64 y)))
  1684  	for {
  1685  		x := v_0
  1686  		y := v_1
  1687  		v.reset(OpMIPS64XOR)
  1688  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  1689  		v0.AuxInt = int64ToAuxInt(1)
  1690  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  1691  		v2 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  1692  		v2.AddArg(x)
  1693  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  1694  		v3.AddArg(y)
  1695  		v1.AddArg2(v2, v3)
  1696  		v.AddArg2(v0, v1)
  1697  		return true
  1698  	}
  1699  }
  1700  func rewriteValueMIPS64_OpLess16(v *Value) bool {
  1701  	v_1 := v.Args[1]
  1702  	v_0 := v.Args[0]
  1703  	b := v.Block
  1704  	typ := &b.Func.Config.Types
  1705  	// match: (Less16 x y)
  1706  	// result: (SGT (SignExt16to64 y) (SignExt16to64 x))
  1707  	for {
  1708  		x := v_0
  1709  		y := v_1
  1710  		v.reset(OpMIPS64SGT)
  1711  		v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
  1712  		v0.AddArg(y)
  1713  		v1 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
  1714  		v1.AddArg(x)
  1715  		v.AddArg2(v0, v1)
  1716  		return true
  1717  	}
  1718  }
  1719  func rewriteValueMIPS64_OpLess16U(v *Value) bool {
  1720  	v_1 := v.Args[1]
  1721  	v_0 := v.Args[0]
  1722  	b := v.Block
  1723  	typ := &b.Func.Config.Types
  1724  	// match: (Less16U x y)
  1725  	// result: (SGTU (ZeroExt16to64 y) (ZeroExt16to64 x))
  1726  	for {
  1727  		x := v_0
  1728  		y := v_1
  1729  		v.reset(OpMIPS64SGTU)
  1730  		v0 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  1731  		v0.AddArg(y)
  1732  		v1 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  1733  		v1.AddArg(x)
  1734  		v.AddArg2(v0, v1)
  1735  		return true
  1736  	}
  1737  }
  1738  func rewriteValueMIPS64_OpLess32(v *Value) bool {
  1739  	v_1 := v.Args[1]
  1740  	v_0 := v.Args[0]
  1741  	b := v.Block
  1742  	typ := &b.Func.Config.Types
  1743  	// match: (Less32 x y)
  1744  	// result: (SGT (SignExt32to64 y) (SignExt32to64 x))
  1745  	for {
  1746  		x := v_0
  1747  		y := v_1
  1748  		v.reset(OpMIPS64SGT)
  1749  		v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
  1750  		v0.AddArg(y)
  1751  		v1 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
  1752  		v1.AddArg(x)
  1753  		v.AddArg2(v0, v1)
  1754  		return true
  1755  	}
  1756  }
  1757  func rewriteValueMIPS64_OpLess32F(v *Value) bool {
  1758  	v_1 := v.Args[1]
  1759  	v_0 := v.Args[0]
  1760  	b := v.Block
  1761  	// match: (Less32F x y)
  1762  	// result: (FPFlagTrue (CMPGTF y x))
  1763  	for {
  1764  		x := v_0
  1765  		y := v_1
  1766  		v.reset(OpMIPS64FPFlagTrue)
  1767  		v0 := b.NewValue0(v.Pos, OpMIPS64CMPGTF, types.TypeFlags)
  1768  		v0.AddArg2(y, x)
  1769  		v.AddArg(v0)
  1770  		return true
  1771  	}
  1772  }
  1773  func rewriteValueMIPS64_OpLess32U(v *Value) bool {
  1774  	v_1 := v.Args[1]
  1775  	v_0 := v.Args[0]
  1776  	b := v.Block
  1777  	typ := &b.Func.Config.Types
  1778  	// match: (Less32U x y)
  1779  	// result: (SGTU (ZeroExt32to64 y) (ZeroExt32to64 x))
  1780  	for {
  1781  		x := v_0
  1782  		y := v_1
  1783  		v.reset(OpMIPS64SGTU)
  1784  		v0 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  1785  		v0.AddArg(y)
  1786  		v1 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  1787  		v1.AddArg(x)
  1788  		v.AddArg2(v0, v1)
  1789  		return true
  1790  	}
  1791  }
  1792  func rewriteValueMIPS64_OpLess64(v *Value) bool {
  1793  	v_1 := v.Args[1]
  1794  	v_0 := v.Args[0]
  1795  	// match: (Less64 x y)
  1796  	// result: (SGT y x)
  1797  	for {
  1798  		x := v_0
  1799  		y := v_1
  1800  		v.reset(OpMIPS64SGT)
  1801  		v.AddArg2(y, x)
  1802  		return true
  1803  	}
  1804  }
  1805  func rewriteValueMIPS64_OpLess64F(v *Value) bool {
  1806  	v_1 := v.Args[1]
  1807  	v_0 := v.Args[0]
  1808  	b := v.Block
  1809  	// match: (Less64F x y)
  1810  	// result: (FPFlagTrue (CMPGTD y x))
  1811  	for {
  1812  		x := v_0
  1813  		y := v_1
  1814  		v.reset(OpMIPS64FPFlagTrue)
  1815  		v0 := b.NewValue0(v.Pos, OpMIPS64CMPGTD, types.TypeFlags)
  1816  		v0.AddArg2(y, x)
  1817  		v.AddArg(v0)
  1818  		return true
  1819  	}
  1820  }
  1821  func rewriteValueMIPS64_OpLess64U(v *Value) bool {
  1822  	v_1 := v.Args[1]
  1823  	v_0 := v.Args[0]
  1824  	// match: (Less64U x y)
  1825  	// result: (SGTU y x)
  1826  	for {
  1827  		x := v_0
  1828  		y := v_1
  1829  		v.reset(OpMIPS64SGTU)
  1830  		v.AddArg2(y, x)
  1831  		return true
  1832  	}
  1833  }
  1834  func rewriteValueMIPS64_OpLess8(v *Value) bool {
  1835  	v_1 := v.Args[1]
  1836  	v_0 := v.Args[0]
  1837  	b := v.Block
  1838  	typ := &b.Func.Config.Types
  1839  	// match: (Less8 x y)
  1840  	// result: (SGT (SignExt8to64 y) (SignExt8to64 x))
  1841  	for {
  1842  		x := v_0
  1843  		y := v_1
  1844  		v.reset(OpMIPS64SGT)
  1845  		v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
  1846  		v0.AddArg(y)
  1847  		v1 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
  1848  		v1.AddArg(x)
  1849  		v.AddArg2(v0, v1)
  1850  		return true
  1851  	}
  1852  }
  1853  func rewriteValueMIPS64_OpLess8U(v *Value) bool {
  1854  	v_1 := v.Args[1]
  1855  	v_0 := v.Args[0]
  1856  	b := v.Block
  1857  	typ := &b.Func.Config.Types
  1858  	// match: (Less8U x y)
  1859  	// result: (SGTU (ZeroExt8to64 y) (ZeroExt8to64 x))
  1860  	for {
  1861  		x := v_0
  1862  		y := v_1
  1863  		v.reset(OpMIPS64SGTU)
  1864  		v0 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  1865  		v0.AddArg(y)
  1866  		v1 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  1867  		v1.AddArg(x)
  1868  		v.AddArg2(v0, v1)
  1869  		return true
  1870  	}
  1871  }
  1872  func rewriteValueMIPS64_OpLoad(v *Value) bool {
  1873  	v_1 := v.Args[1]
  1874  	v_0 := v.Args[0]
  1875  	// match: (Load <t> ptr mem)
  1876  	// cond: t.IsBoolean()
  1877  	// result: (MOVBUload ptr mem)
  1878  	for {
  1879  		t := v.Type
  1880  		ptr := v_0
  1881  		mem := v_1
  1882  		if !(t.IsBoolean()) {
  1883  			break
  1884  		}
  1885  		v.reset(OpMIPS64MOVBUload)
  1886  		v.AddArg2(ptr, mem)
  1887  		return true
  1888  	}
  1889  	// match: (Load <t> ptr mem)
  1890  	// cond: (is8BitInt(t) && t.IsSigned())
  1891  	// result: (MOVBload ptr mem)
  1892  	for {
  1893  		t := v.Type
  1894  		ptr := v_0
  1895  		mem := v_1
  1896  		if !(is8BitInt(t) && t.IsSigned()) {
  1897  			break
  1898  		}
  1899  		v.reset(OpMIPS64MOVBload)
  1900  		v.AddArg2(ptr, mem)
  1901  		return true
  1902  	}
  1903  	// match: (Load <t> ptr mem)
  1904  	// cond: (is8BitInt(t) && !t.IsSigned())
  1905  	// result: (MOVBUload ptr mem)
  1906  	for {
  1907  		t := v.Type
  1908  		ptr := v_0
  1909  		mem := v_1
  1910  		if !(is8BitInt(t) && !t.IsSigned()) {
  1911  			break
  1912  		}
  1913  		v.reset(OpMIPS64MOVBUload)
  1914  		v.AddArg2(ptr, mem)
  1915  		return true
  1916  	}
  1917  	// match: (Load <t> ptr mem)
  1918  	// cond: (is16BitInt(t) && t.IsSigned())
  1919  	// result: (MOVHload ptr mem)
  1920  	for {
  1921  		t := v.Type
  1922  		ptr := v_0
  1923  		mem := v_1
  1924  		if !(is16BitInt(t) && t.IsSigned()) {
  1925  			break
  1926  		}
  1927  		v.reset(OpMIPS64MOVHload)
  1928  		v.AddArg2(ptr, mem)
  1929  		return true
  1930  	}
  1931  	// match: (Load <t> ptr mem)
  1932  	// cond: (is16BitInt(t) && !t.IsSigned())
  1933  	// result: (MOVHUload ptr mem)
  1934  	for {
  1935  		t := v.Type
  1936  		ptr := v_0
  1937  		mem := v_1
  1938  		if !(is16BitInt(t) && !t.IsSigned()) {
  1939  			break
  1940  		}
  1941  		v.reset(OpMIPS64MOVHUload)
  1942  		v.AddArg2(ptr, mem)
  1943  		return true
  1944  	}
  1945  	// match: (Load <t> ptr mem)
  1946  	// cond: (is32BitInt(t) && t.IsSigned())
  1947  	// result: (MOVWload ptr mem)
  1948  	for {
  1949  		t := v.Type
  1950  		ptr := v_0
  1951  		mem := v_1
  1952  		if !(is32BitInt(t) && t.IsSigned()) {
  1953  			break
  1954  		}
  1955  		v.reset(OpMIPS64MOVWload)
  1956  		v.AddArg2(ptr, mem)
  1957  		return true
  1958  	}
  1959  	// match: (Load <t> ptr mem)
  1960  	// cond: (is32BitInt(t) && !t.IsSigned())
  1961  	// result: (MOVWUload ptr mem)
  1962  	for {
  1963  		t := v.Type
  1964  		ptr := v_0
  1965  		mem := v_1
  1966  		if !(is32BitInt(t) && !t.IsSigned()) {
  1967  			break
  1968  		}
  1969  		v.reset(OpMIPS64MOVWUload)
  1970  		v.AddArg2(ptr, mem)
  1971  		return true
  1972  	}
  1973  	// match: (Load <t> ptr mem)
  1974  	// cond: (is64BitInt(t) || isPtr(t))
  1975  	// result: (MOVVload ptr mem)
  1976  	for {
  1977  		t := v.Type
  1978  		ptr := v_0
  1979  		mem := v_1
  1980  		if !(is64BitInt(t) || isPtr(t)) {
  1981  			break
  1982  		}
  1983  		v.reset(OpMIPS64MOVVload)
  1984  		v.AddArg2(ptr, mem)
  1985  		return true
  1986  	}
  1987  	// match: (Load <t> ptr mem)
  1988  	// cond: is32BitFloat(t)
  1989  	// result: (MOVFload ptr mem)
  1990  	for {
  1991  		t := v.Type
  1992  		ptr := v_0
  1993  		mem := v_1
  1994  		if !(is32BitFloat(t)) {
  1995  			break
  1996  		}
  1997  		v.reset(OpMIPS64MOVFload)
  1998  		v.AddArg2(ptr, mem)
  1999  		return true
  2000  	}
  2001  	// match: (Load <t> ptr mem)
  2002  	// cond: is64BitFloat(t)
  2003  	// result: (MOVDload ptr mem)
  2004  	for {
  2005  		t := v.Type
  2006  		ptr := v_0
  2007  		mem := v_1
  2008  		if !(is64BitFloat(t)) {
  2009  			break
  2010  		}
  2011  		v.reset(OpMIPS64MOVDload)
  2012  		v.AddArg2(ptr, mem)
  2013  		return true
  2014  	}
  2015  	return false
  2016  }
  2017  func rewriteValueMIPS64_OpLocalAddr(v *Value) bool {
  2018  	v_1 := v.Args[1]
  2019  	v_0 := v.Args[0]
  2020  	b := v.Block
  2021  	typ := &b.Func.Config.Types
  2022  	// match: (LocalAddr <t> {sym} base mem)
  2023  	// cond: t.Elem().HasPointers()
  2024  	// result: (MOVVaddr {sym} (SPanchored base mem))
  2025  	for {
  2026  		t := v.Type
  2027  		sym := auxToSym(v.Aux)
  2028  		base := v_0
  2029  		mem := v_1
  2030  		if !(t.Elem().HasPointers()) {
  2031  			break
  2032  		}
  2033  		v.reset(OpMIPS64MOVVaddr)
  2034  		v.Aux = symToAux(sym)
  2035  		v0 := b.NewValue0(v.Pos, OpSPanchored, typ.Uintptr)
  2036  		v0.AddArg2(base, mem)
  2037  		v.AddArg(v0)
  2038  		return true
  2039  	}
  2040  	// match: (LocalAddr <t> {sym} base _)
  2041  	// cond: !t.Elem().HasPointers()
  2042  	// result: (MOVVaddr {sym} base)
  2043  	for {
  2044  		t := v.Type
  2045  		sym := auxToSym(v.Aux)
  2046  		base := v_0
  2047  		if !(!t.Elem().HasPointers()) {
  2048  			break
  2049  		}
  2050  		v.reset(OpMIPS64MOVVaddr)
  2051  		v.Aux = symToAux(sym)
  2052  		v.AddArg(base)
  2053  		return true
  2054  	}
  2055  	return false
  2056  }
  2057  func rewriteValueMIPS64_OpLsh16x16(v *Value) bool {
  2058  	v_1 := v.Args[1]
  2059  	v_0 := v.Args[0]
  2060  	b := v.Block
  2061  	typ := &b.Func.Config.Types
  2062  	// match: (Lsh16x16 <t> x y)
  2063  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SLLV <t> x (ZeroExt16to64 y)))
  2064  	for {
  2065  		t := v.Type
  2066  		x := v_0
  2067  		y := v_1
  2068  		v.reset(OpMIPS64AND)
  2069  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  2070  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  2071  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  2072  		v2.AuxInt = int64ToAuxInt(64)
  2073  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  2074  		v3.AddArg(y)
  2075  		v1.AddArg2(v2, v3)
  2076  		v0.AddArg(v1)
  2077  		v4 := b.NewValue0(v.Pos, OpMIPS64SLLV, t)
  2078  		v4.AddArg2(x, v3)
  2079  		v.AddArg2(v0, v4)
  2080  		return true
  2081  	}
  2082  }
  2083  func rewriteValueMIPS64_OpLsh16x32(v *Value) bool {
  2084  	v_1 := v.Args[1]
  2085  	v_0 := v.Args[0]
  2086  	b := v.Block
  2087  	typ := &b.Func.Config.Types
  2088  	// match: (Lsh16x32 <t> x y)
  2089  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SLLV <t> x (ZeroExt32to64 y)))
  2090  	for {
  2091  		t := v.Type
  2092  		x := v_0
  2093  		y := v_1
  2094  		v.reset(OpMIPS64AND)
  2095  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  2096  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  2097  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  2098  		v2.AuxInt = int64ToAuxInt(64)
  2099  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  2100  		v3.AddArg(y)
  2101  		v1.AddArg2(v2, v3)
  2102  		v0.AddArg(v1)
  2103  		v4 := b.NewValue0(v.Pos, OpMIPS64SLLV, t)
  2104  		v4.AddArg2(x, v3)
  2105  		v.AddArg2(v0, v4)
  2106  		return true
  2107  	}
  2108  }
  2109  func rewriteValueMIPS64_OpLsh16x64(v *Value) bool {
  2110  	v_1 := v.Args[1]
  2111  	v_0 := v.Args[0]
  2112  	b := v.Block
  2113  	typ := &b.Func.Config.Types
  2114  	// match: (Lsh16x64 <t> x y)
  2115  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SLLV <t> x y))
  2116  	for {
  2117  		t := v.Type
  2118  		x := v_0
  2119  		y := v_1
  2120  		v.reset(OpMIPS64AND)
  2121  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  2122  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  2123  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  2124  		v2.AuxInt = int64ToAuxInt(64)
  2125  		v1.AddArg2(v2, y)
  2126  		v0.AddArg(v1)
  2127  		v3 := b.NewValue0(v.Pos, OpMIPS64SLLV, t)
  2128  		v3.AddArg2(x, y)
  2129  		v.AddArg2(v0, v3)
  2130  		return true
  2131  	}
  2132  }
  2133  func rewriteValueMIPS64_OpLsh16x8(v *Value) bool {
  2134  	v_1 := v.Args[1]
  2135  	v_0 := v.Args[0]
  2136  	b := v.Block
  2137  	typ := &b.Func.Config.Types
  2138  	// match: (Lsh16x8 <t> x y)
  2139  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SLLV <t> x (ZeroExt8to64 y)))
  2140  	for {
  2141  		t := v.Type
  2142  		x := v_0
  2143  		y := v_1
  2144  		v.reset(OpMIPS64AND)
  2145  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  2146  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  2147  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  2148  		v2.AuxInt = int64ToAuxInt(64)
  2149  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  2150  		v3.AddArg(y)
  2151  		v1.AddArg2(v2, v3)
  2152  		v0.AddArg(v1)
  2153  		v4 := b.NewValue0(v.Pos, OpMIPS64SLLV, t)
  2154  		v4.AddArg2(x, v3)
  2155  		v.AddArg2(v0, v4)
  2156  		return true
  2157  	}
  2158  }
  2159  func rewriteValueMIPS64_OpLsh32x16(v *Value) bool {
  2160  	v_1 := v.Args[1]
  2161  	v_0 := v.Args[0]
  2162  	b := v.Block
  2163  	typ := &b.Func.Config.Types
  2164  	// match: (Lsh32x16 <t> x y)
  2165  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SLLV <t> x (ZeroExt16to64 y)))
  2166  	for {
  2167  		t := v.Type
  2168  		x := v_0
  2169  		y := v_1
  2170  		v.reset(OpMIPS64AND)
  2171  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  2172  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  2173  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  2174  		v2.AuxInt = int64ToAuxInt(64)
  2175  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  2176  		v3.AddArg(y)
  2177  		v1.AddArg2(v2, v3)
  2178  		v0.AddArg(v1)
  2179  		v4 := b.NewValue0(v.Pos, OpMIPS64SLLV, t)
  2180  		v4.AddArg2(x, v3)
  2181  		v.AddArg2(v0, v4)
  2182  		return true
  2183  	}
  2184  }
  2185  func rewriteValueMIPS64_OpLsh32x32(v *Value) bool {
  2186  	v_1 := v.Args[1]
  2187  	v_0 := v.Args[0]
  2188  	b := v.Block
  2189  	typ := &b.Func.Config.Types
  2190  	// match: (Lsh32x32 <t> x y)
  2191  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SLLV <t> x (ZeroExt32to64 y)))
  2192  	for {
  2193  		t := v.Type
  2194  		x := v_0
  2195  		y := v_1
  2196  		v.reset(OpMIPS64AND)
  2197  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  2198  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  2199  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  2200  		v2.AuxInt = int64ToAuxInt(64)
  2201  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  2202  		v3.AddArg(y)
  2203  		v1.AddArg2(v2, v3)
  2204  		v0.AddArg(v1)
  2205  		v4 := b.NewValue0(v.Pos, OpMIPS64SLLV, t)
  2206  		v4.AddArg2(x, v3)
  2207  		v.AddArg2(v0, v4)
  2208  		return true
  2209  	}
  2210  }
  2211  func rewriteValueMIPS64_OpLsh32x64(v *Value) bool {
  2212  	v_1 := v.Args[1]
  2213  	v_0 := v.Args[0]
  2214  	b := v.Block
  2215  	typ := &b.Func.Config.Types
  2216  	// match: (Lsh32x64 <t> x y)
  2217  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SLLV <t> x y))
  2218  	for {
  2219  		t := v.Type
  2220  		x := v_0
  2221  		y := v_1
  2222  		v.reset(OpMIPS64AND)
  2223  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  2224  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  2225  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  2226  		v2.AuxInt = int64ToAuxInt(64)
  2227  		v1.AddArg2(v2, y)
  2228  		v0.AddArg(v1)
  2229  		v3 := b.NewValue0(v.Pos, OpMIPS64SLLV, t)
  2230  		v3.AddArg2(x, y)
  2231  		v.AddArg2(v0, v3)
  2232  		return true
  2233  	}
  2234  }
  2235  func rewriteValueMIPS64_OpLsh32x8(v *Value) bool {
  2236  	v_1 := v.Args[1]
  2237  	v_0 := v.Args[0]
  2238  	b := v.Block
  2239  	typ := &b.Func.Config.Types
  2240  	// match: (Lsh32x8 <t> x y)
  2241  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SLLV <t> x (ZeroExt8to64 y)))
  2242  	for {
  2243  		t := v.Type
  2244  		x := v_0
  2245  		y := v_1
  2246  		v.reset(OpMIPS64AND)
  2247  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  2248  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  2249  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  2250  		v2.AuxInt = int64ToAuxInt(64)
  2251  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  2252  		v3.AddArg(y)
  2253  		v1.AddArg2(v2, v3)
  2254  		v0.AddArg(v1)
  2255  		v4 := b.NewValue0(v.Pos, OpMIPS64SLLV, t)
  2256  		v4.AddArg2(x, v3)
  2257  		v.AddArg2(v0, v4)
  2258  		return true
  2259  	}
  2260  }
  2261  func rewriteValueMIPS64_OpLsh64x16(v *Value) bool {
  2262  	v_1 := v.Args[1]
  2263  	v_0 := v.Args[0]
  2264  	b := v.Block
  2265  	typ := &b.Func.Config.Types
  2266  	// match: (Lsh64x16 <t> x y)
  2267  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SLLV <t> x (ZeroExt16to64 y)))
  2268  	for {
  2269  		t := v.Type
  2270  		x := v_0
  2271  		y := v_1
  2272  		v.reset(OpMIPS64AND)
  2273  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  2274  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  2275  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  2276  		v2.AuxInt = int64ToAuxInt(64)
  2277  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  2278  		v3.AddArg(y)
  2279  		v1.AddArg2(v2, v3)
  2280  		v0.AddArg(v1)
  2281  		v4 := b.NewValue0(v.Pos, OpMIPS64SLLV, t)
  2282  		v4.AddArg2(x, v3)
  2283  		v.AddArg2(v0, v4)
  2284  		return true
  2285  	}
  2286  }
  2287  func rewriteValueMIPS64_OpLsh64x32(v *Value) bool {
  2288  	v_1 := v.Args[1]
  2289  	v_0 := v.Args[0]
  2290  	b := v.Block
  2291  	typ := &b.Func.Config.Types
  2292  	// match: (Lsh64x32 <t> x y)
  2293  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SLLV <t> x (ZeroExt32to64 y)))
  2294  	for {
  2295  		t := v.Type
  2296  		x := v_0
  2297  		y := v_1
  2298  		v.reset(OpMIPS64AND)
  2299  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  2300  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  2301  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  2302  		v2.AuxInt = int64ToAuxInt(64)
  2303  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  2304  		v3.AddArg(y)
  2305  		v1.AddArg2(v2, v3)
  2306  		v0.AddArg(v1)
  2307  		v4 := b.NewValue0(v.Pos, OpMIPS64SLLV, t)
  2308  		v4.AddArg2(x, v3)
  2309  		v.AddArg2(v0, v4)
  2310  		return true
  2311  	}
  2312  }
  2313  func rewriteValueMIPS64_OpLsh64x64(v *Value) bool {
  2314  	v_1 := v.Args[1]
  2315  	v_0 := v.Args[0]
  2316  	b := v.Block
  2317  	typ := &b.Func.Config.Types
  2318  	// match: (Lsh64x64 <t> x y)
  2319  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SLLV <t> x y))
  2320  	for {
  2321  		t := v.Type
  2322  		x := v_0
  2323  		y := v_1
  2324  		v.reset(OpMIPS64AND)
  2325  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  2326  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  2327  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  2328  		v2.AuxInt = int64ToAuxInt(64)
  2329  		v1.AddArg2(v2, y)
  2330  		v0.AddArg(v1)
  2331  		v3 := b.NewValue0(v.Pos, OpMIPS64SLLV, t)
  2332  		v3.AddArg2(x, y)
  2333  		v.AddArg2(v0, v3)
  2334  		return true
  2335  	}
  2336  }
  2337  func rewriteValueMIPS64_OpLsh64x8(v *Value) bool {
  2338  	v_1 := v.Args[1]
  2339  	v_0 := v.Args[0]
  2340  	b := v.Block
  2341  	typ := &b.Func.Config.Types
  2342  	// match: (Lsh64x8 <t> x y)
  2343  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SLLV <t> x (ZeroExt8to64 y)))
  2344  	for {
  2345  		t := v.Type
  2346  		x := v_0
  2347  		y := v_1
  2348  		v.reset(OpMIPS64AND)
  2349  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  2350  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  2351  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  2352  		v2.AuxInt = int64ToAuxInt(64)
  2353  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  2354  		v3.AddArg(y)
  2355  		v1.AddArg2(v2, v3)
  2356  		v0.AddArg(v1)
  2357  		v4 := b.NewValue0(v.Pos, OpMIPS64SLLV, t)
  2358  		v4.AddArg2(x, v3)
  2359  		v.AddArg2(v0, v4)
  2360  		return true
  2361  	}
  2362  }
  2363  func rewriteValueMIPS64_OpLsh8x16(v *Value) bool {
  2364  	v_1 := v.Args[1]
  2365  	v_0 := v.Args[0]
  2366  	b := v.Block
  2367  	typ := &b.Func.Config.Types
  2368  	// match: (Lsh8x16 <t> x y)
  2369  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SLLV <t> x (ZeroExt16to64 y)))
  2370  	for {
  2371  		t := v.Type
  2372  		x := v_0
  2373  		y := v_1
  2374  		v.reset(OpMIPS64AND)
  2375  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  2376  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  2377  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  2378  		v2.AuxInt = int64ToAuxInt(64)
  2379  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  2380  		v3.AddArg(y)
  2381  		v1.AddArg2(v2, v3)
  2382  		v0.AddArg(v1)
  2383  		v4 := b.NewValue0(v.Pos, OpMIPS64SLLV, t)
  2384  		v4.AddArg2(x, v3)
  2385  		v.AddArg2(v0, v4)
  2386  		return true
  2387  	}
  2388  }
  2389  func rewriteValueMIPS64_OpLsh8x32(v *Value) bool {
  2390  	v_1 := v.Args[1]
  2391  	v_0 := v.Args[0]
  2392  	b := v.Block
  2393  	typ := &b.Func.Config.Types
  2394  	// match: (Lsh8x32 <t> x y)
  2395  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SLLV <t> x (ZeroExt32to64 y)))
  2396  	for {
  2397  		t := v.Type
  2398  		x := v_0
  2399  		y := v_1
  2400  		v.reset(OpMIPS64AND)
  2401  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  2402  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  2403  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  2404  		v2.AuxInt = int64ToAuxInt(64)
  2405  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  2406  		v3.AddArg(y)
  2407  		v1.AddArg2(v2, v3)
  2408  		v0.AddArg(v1)
  2409  		v4 := b.NewValue0(v.Pos, OpMIPS64SLLV, t)
  2410  		v4.AddArg2(x, v3)
  2411  		v.AddArg2(v0, v4)
  2412  		return true
  2413  	}
  2414  }
  2415  func rewriteValueMIPS64_OpLsh8x64(v *Value) bool {
  2416  	v_1 := v.Args[1]
  2417  	v_0 := v.Args[0]
  2418  	b := v.Block
  2419  	typ := &b.Func.Config.Types
  2420  	// match: (Lsh8x64 <t> x y)
  2421  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SLLV <t> x y))
  2422  	for {
  2423  		t := v.Type
  2424  		x := v_0
  2425  		y := v_1
  2426  		v.reset(OpMIPS64AND)
  2427  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  2428  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  2429  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  2430  		v2.AuxInt = int64ToAuxInt(64)
  2431  		v1.AddArg2(v2, y)
  2432  		v0.AddArg(v1)
  2433  		v3 := b.NewValue0(v.Pos, OpMIPS64SLLV, t)
  2434  		v3.AddArg2(x, y)
  2435  		v.AddArg2(v0, v3)
  2436  		return true
  2437  	}
  2438  }
  2439  func rewriteValueMIPS64_OpLsh8x8(v *Value) bool {
  2440  	v_1 := v.Args[1]
  2441  	v_0 := v.Args[0]
  2442  	b := v.Block
  2443  	typ := &b.Func.Config.Types
  2444  	// match: (Lsh8x8 <t> x y)
  2445  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SLLV <t> x (ZeroExt8to64 y)))
  2446  	for {
  2447  		t := v.Type
  2448  		x := v_0
  2449  		y := v_1
  2450  		v.reset(OpMIPS64AND)
  2451  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  2452  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  2453  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  2454  		v2.AuxInt = int64ToAuxInt(64)
  2455  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  2456  		v3.AddArg(y)
  2457  		v1.AddArg2(v2, v3)
  2458  		v0.AddArg(v1)
  2459  		v4 := b.NewValue0(v.Pos, OpMIPS64SLLV, t)
  2460  		v4.AddArg2(x, v3)
  2461  		v.AddArg2(v0, v4)
  2462  		return true
  2463  	}
  2464  }
  2465  func rewriteValueMIPS64_OpMIPS64ADDV(v *Value) bool {
  2466  	v_1 := v.Args[1]
  2467  	v_0 := v.Args[0]
  2468  	// match: (ADDV x (MOVVconst <t> [c]))
  2469  	// cond: is32Bit(c) && !t.IsPtr()
  2470  	// result: (ADDVconst [c] x)
  2471  	for {
  2472  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2473  			x := v_0
  2474  			if v_1.Op != OpMIPS64MOVVconst {
  2475  				continue
  2476  			}
  2477  			t := v_1.Type
  2478  			c := auxIntToInt64(v_1.AuxInt)
  2479  			if !(is32Bit(c) && !t.IsPtr()) {
  2480  				continue
  2481  			}
  2482  			v.reset(OpMIPS64ADDVconst)
  2483  			v.AuxInt = int64ToAuxInt(c)
  2484  			v.AddArg(x)
  2485  			return true
  2486  		}
  2487  		break
  2488  	}
  2489  	// match: (ADDV x (NEGV y))
  2490  	// result: (SUBV x y)
  2491  	for {
  2492  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2493  			x := v_0
  2494  			if v_1.Op != OpMIPS64NEGV {
  2495  				continue
  2496  			}
  2497  			y := v_1.Args[0]
  2498  			v.reset(OpMIPS64SUBV)
  2499  			v.AddArg2(x, y)
  2500  			return true
  2501  		}
  2502  		break
  2503  	}
  2504  	return false
  2505  }
  2506  func rewriteValueMIPS64_OpMIPS64ADDVconst(v *Value) bool {
  2507  	v_0 := v.Args[0]
  2508  	// match: (ADDVconst [off1] (MOVVaddr [off2] {sym} ptr))
  2509  	// cond: is32Bit(off1+int64(off2))
  2510  	// result: (MOVVaddr [int32(off1)+int32(off2)] {sym} ptr)
  2511  	for {
  2512  		off1 := auxIntToInt64(v.AuxInt)
  2513  		if v_0.Op != OpMIPS64MOVVaddr {
  2514  			break
  2515  		}
  2516  		off2 := auxIntToInt32(v_0.AuxInt)
  2517  		sym := auxToSym(v_0.Aux)
  2518  		ptr := v_0.Args[0]
  2519  		if !(is32Bit(off1 + int64(off2))) {
  2520  			break
  2521  		}
  2522  		v.reset(OpMIPS64MOVVaddr)
  2523  		v.AuxInt = int32ToAuxInt(int32(off1) + int32(off2))
  2524  		v.Aux = symToAux(sym)
  2525  		v.AddArg(ptr)
  2526  		return true
  2527  	}
  2528  	// match: (ADDVconst [0] x)
  2529  	// result: x
  2530  	for {
  2531  		if auxIntToInt64(v.AuxInt) != 0 {
  2532  			break
  2533  		}
  2534  		x := v_0
  2535  		v.copyOf(x)
  2536  		return true
  2537  	}
  2538  	// match: (ADDVconst [c] (MOVVconst [d]))
  2539  	// result: (MOVVconst [c+d])
  2540  	for {
  2541  		c := auxIntToInt64(v.AuxInt)
  2542  		if v_0.Op != OpMIPS64MOVVconst {
  2543  			break
  2544  		}
  2545  		d := auxIntToInt64(v_0.AuxInt)
  2546  		v.reset(OpMIPS64MOVVconst)
  2547  		v.AuxInt = int64ToAuxInt(c + d)
  2548  		return true
  2549  	}
  2550  	// match: (ADDVconst [c] (ADDVconst [d] x))
  2551  	// cond: is32Bit(c+d)
  2552  	// result: (ADDVconst [c+d] x)
  2553  	for {
  2554  		c := auxIntToInt64(v.AuxInt)
  2555  		if v_0.Op != OpMIPS64ADDVconst {
  2556  			break
  2557  		}
  2558  		d := auxIntToInt64(v_0.AuxInt)
  2559  		x := v_0.Args[0]
  2560  		if !(is32Bit(c + d)) {
  2561  			break
  2562  		}
  2563  		v.reset(OpMIPS64ADDVconst)
  2564  		v.AuxInt = int64ToAuxInt(c + d)
  2565  		v.AddArg(x)
  2566  		return true
  2567  	}
  2568  	// match: (ADDVconst [c] (SUBVconst [d] x))
  2569  	// cond: is32Bit(c-d)
  2570  	// result: (ADDVconst [c-d] x)
  2571  	for {
  2572  		c := auxIntToInt64(v.AuxInt)
  2573  		if v_0.Op != OpMIPS64SUBVconst {
  2574  			break
  2575  		}
  2576  		d := auxIntToInt64(v_0.AuxInt)
  2577  		x := v_0.Args[0]
  2578  		if !(is32Bit(c - d)) {
  2579  			break
  2580  		}
  2581  		v.reset(OpMIPS64ADDVconst)
  2582  		v.AuxInt = int64ToAuxInt(c - d)
  2583  		v.AddArg(x)
  2584  		return true
  2585  	}
  2586  	return false
  2587  }
  2588  func rewriteValueMIPS64_OpMIPS64AND(v *Value) bool {
  2589  	v_1 := v.Args[1]
  2590  	v_0 := v.Args[0]
  2591  	// match: (AND x (MOVVconst [c]))
  2592  	// cond: is32Bit(c)
  2593  	// result: (ANDconst [c] x)
  2594  	for {
  2595  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2596  			x := v_0
  2597  			if v_1.Op != OpMIPS64MOVVconst {
  2598  				continue
  2599  			}
  2600  			c := auxIntToInt64(v_1.AuxInt)
  2601  			if !(is32Bit(c)) {
  2602  				continue
  2603  			}
  2604  			v.reset(OpMIPS64ANDconst)
  2605  			v.AuxInt = int64ToAuxInt(c)
  2606  			v.AddArg(x)
  2607  			return true
  2608  		}
  2609  		break
  2610  	}
  2611  	// match: (AND x x)
  2612  	// result: x
  2613  	for {
  2614  		x := v_0
  2615  		if x != v_1 {
  2616  			break
  2617  		}
  2618  		v.copyOf(x)
  2619  		return true
  2620  	}
  2621  	return false
  2622  }
  2623  func rewriteValueMIPS64_OpMIPS64ANDconst(v *Value) bool {
  2624  	v_0 := v.Args[0]
  2625  	// match: (ANDconst [0] _)
  2626  	// result: (MOVVconst [0])
  2627  	for {
  2628  		if auxIntToInt64(v.AuxInt) != 0 {
  2629  			break
  2630  		}
  2631  		v.reset(OpMIPS64MOVVconst)
  2632  		v.AuxInt = int64ToAuxInt(0)
  2633  		return true
  2634  	}
  2635  	// match: (ANDconst [-1] x)
  2636  	// result: x
  2637  	for {
  2638  		if auxIntToInt64(v.AuxInt) != -1 {
  2639  			break
  2640  		}
  2641  		x := v_0
  2642  		v.copyOf(x)
  2643  		return true
  2644  	}
  2645  	// match: (ANDconst [c] (MOVVconst [d]))
  2646  	// result: (MOVVconst [c&d])
  2647  	for {
  2648  		c := auxIntToInt64(v.AuxInt)
  2649  		if v_0.Op != OpMIPS64MOVVconst {
  2650  			break
  2651  		}
  2652  		d := auxIntToInt64(v_0.AuxInt)
  2653  		v.reset(OpMIPS64MOVVconst)
  2654  		v.AuxInt = int64ToAuxInt(c & d)
  2655  		return true
  2656  	}
  2657  	// match: (ANDconst [c] (ANDconst [d] x))
  2658  	// result: (ANDconst [c&d] x)
  2659  	for {
  2660  		c := auxIntToInt64(v.AuxInt)
  2661  		if v_0.Op != OpMIPS64ANDconst {
  2662  			break
  2663  		}
  2664  		d := auxIntToInt64(v_0.AuxInt)
  2665  		x := v_0.Args[0]
  2666  		v.reset(OpMIPS64ANDconst)
  2667  		v.AuxInt = int64ToAuxInt(c & d)
  2668  		v.AddArg(x)
  2669  		return true
  2670  	}
  2671  	return false
  2672  }
  2673  func rewriteValueMIPS64_OpMIPS64LoweredAtomicAdd32(v *Value) bool {
  2674  	v_2 := v.Args[2]
  2675  	v_1 := v.Args[1]
  2676  	v_0 := v.Args[0]
  2677  	// match: (LoweredAtomicAdd32 ptr (MOVVconst [c]) mem)
  2678  	// cond: is32Bit(c)
  2679  	// result: (LoweredAtomicAddconst32 [int32(c)] ptr mem)
  2680  	for {
  2681  		ptr := v_0
  2682  		if v_1.Op != OpMIPS64MOVVconst {
  2683  			break
  2684  		}
  2685  		c := auxIntToInt64(v_1.AuxInt)
  2686  		mem := v_2
  2687  		if !(is32Bit(c)) {
  2688  			break
  2689  		}
  2690  		v.reset(OpMIPS64LoweredAtomicAddconst32)
  2691  		v.AuxInt = int32ToAuxInt(int32(c))
  2692  		v.AddArg2(ptr, mem)
  2693  		return true
  2694  	}
  2695  	return false
  2696  }
  2697  func rewriteValueMIPS64_OpMIPS64LoweredAtomicAdd64(v *Value) bool {
  2698  	v_2 := v.Args[2]
  2699  	v_1 := v.Args[1]
  2700  	v_0 := v.Args[0]
  2701  	// match: (LoweredAtomicAdd64 ptr (MOVVconst [c]) mem)
  2702  	// cond: is32Bit(c)
  2703  	// result: (LoweredAtomicAddconst64 [c] ptr mem)
  2704  	for {
  2705  		ptr := v_0
  2706  		if v_1.Op != OpMIPS64MOVVconst {
  2707  			break
  2708  		}
  2709  		c := auxIntToInt64(v_1.AuxInt)
  2710  		mem := v_2
  2711  		if !(is32Bit(c)) {
  2712  			break
  2713  		}
  2714  		v.reset(OpMIPS64LoweredAtomicAddconst64)
  2715  		v.AuxInt = int64ToAuxInt(c)
  2716  		v.AddArg2(ptr, mem)
  2717  		return true
  2718  	}
  2719  	return false
  2720  }
  2721  func rewriteValueMIPS64_OpMIPS64LoweredAtomicStore32(v *Value) bool {
  2722  	v_2 := v.Args[2]
  2723  	v_1 := v.Args[1]
  2724  	v_0 := v.Args[0]
  2725  	// match: (LoweredAtomicStore32 ptr (MOVVconst [0]) mem)
  2726  	// result: (LoweredAtomicStorezero32 ptr mem)
  2727  	for {
  2728  		ptr := v_0
  2729  		if v_1.Op != OpMIPS64MOVVconst || auxIntToInt64(v_1.AuxInt) != 0 {
  2730  			break
  2731  		}
  2732  		mem := v_2
  2733  		v.reset(OpMIPS64LoweredAtomicStorezero32)
  2734  		v.AddArg2(ptr, mem)
  2735  		return true
  2736  	}
  2737  	return false
  2738  }
  2739  func rewriteValueMIPS64_OpMIPS64LoweredAtomicStore64(v *Value) bool {
  2740  	v_2 := v.Args[2]
  2741  	v_1 := v.Args[1]
  2742  	v_0 := v.Args[0]
  2743  	// match: (LoweredAtomicStore64 ptr (MOVVconst [0]) mem)
  2744  	// result: (LoweredAtomicStorezero64 ptr mem)
  2745  	for {
  2746  		ptr := v_0
  2747  		if v_1.Op != OpMIPS64MOVVconst || auxIntToInt64(v_1.AuxInt) != 0 {
  2748  			break
  2749  		}
  2750  		mem := v_2
  2751  		v.reset(OpMIPS64LoweredAtomicStorezero64)
  2752  		v.AddArg2(ptr, mem)
  2753  		return true
  2754  	}
  2755  	return false
  2756  }
  2757  func rewriteValueMIPS64_OpMIPS64LoweredPanicBoundsCR(v *Value) bool {
  2758  	v_1 := v.Args[1]
  2759  	v_0 := v.Args[0]
  2760  	// match: (LoweredPanicBoundsCR [kind] {p} (MOVVconst [c]) mem)
  2761  	// result: (LoweredPanicBoundsCC [kind] {PanicBoundsCC{Cx:p.C, Cy:c}} mem)
  2762  	for {
  2763  		kind := auxIntToInt64(v.AuxInt)
  2764  		p := auxToPanicBoundsC(v.Aux)
  2765  		if v_0.Op != OpMIPS64MOVVconst {
  2766  			break
  2767  		}
  2768  		c := auxIntToInt64(v_0.AuxInt)
  2769  		mem := v_1
  2770  		v.reset(OpMIPS64LoweredPanicBoundsCC)
  2771  		v.AuxInt = int64ToAuxInt(kind)
  2772  		v.Aux = panicBoundsCCToAux(PanicBoundsCC{Cx: p.C, Cy: c})
  2773  		v.AddArg(mem)
  2774  		return true
  2775  	}
  2776  	return false
  2777  }
  2778  func rewriteValueMIPS64_OpMIPS64LoweredPanicBoundsRC(v *Value) bool {
  2779  	v_1 := v.Args[1]
  2780  	v_0 := v.Args[0]
  2781  	// match: (LoweredPanicBoundsRC [kind] {p} (MOVVconst [c]) mem)
  2782  	// result: (LoweredPanicBoundsCC [kind] {PanicBoundsCC{Cx:c, Cy:p.C}} mem)
  2783  	for {
  2784  		kind := auxIntToInt64(v.AuxInt)
  2785  		p := auxToPanicBoundsC(v.Aux)
  2786  		if v_0.Op != OpMIPS64MOVVconst {
  2787  			break
  2788  		}
  2789  		c := auxIntToInt64(v_0.AuxInt)
  2790  		mem := v_1
  2791  		v.reset(OpMIPS64LoweredPanicBoundsCC)
  2792  		v.AuxInt = int64ToAuxInt(kind)
  2793  		v.Aux = panicBoundsCCToAux(PanicBoundsCC{Cx: c, Cy: p.C})
  2794  		v.AddArg(mem)
  2795  		return true
  2796  	}
  2797  	return false
  2798  }
  2799  func rewriteValueMIPS64_OpMIPS64LoweredPanicBoundsRR(v *Value) bool {
  2800  	v_2 := v.Args[2]
  2801  	v_1 := v.Args[1]
  2802  	v_0 := v.Args[0]
  2803  	// match: (LoweredPanicBoundsRR [kind] x (MOVVconst [c]) mem)
  2804  	// result: (LoweredPanicBoundsRC [kind] x {PanicBoundsC{C:c}} mem)
  2805  	for {
  2806  		kind := auxIntToInt64(v.AuxInt)
  2807  		x := v_0
  2808  		if v_1.Op != OpMIPS64MOVVconst {
  2809  			break
  2810  		}
  2811  		c := auxIntToInt64(v_1.AuxInt)
  2812  		mem := v_2
  2813  		v.reset(OpMIPS64LoweredPanicBoundsRC)
  2814  		v.AuxInt = int64ToAuxInt(kind)
  2815  		v.Aux = panicBoundsCToAux(PanicBoundsC{C: c})
  2816  		v.AddArg2(x, mem)
  2817  		return true
  2818  	}
  2819  	// match: (LoweredPanicBoundsRR [kind] (MOVVconst [c]) y mem)
  2820  	// result: (LoweredPanicBoundsCR [kind] {PanicBoundsC{C:c}} y mem)
  2821  	for {
  2822  		kind := auxIntToInt64(v.AuxInt)
  2823  		if v_0.Op != OpMIPS64MOVVconst {
  2824  			break
  2825  		}
  2826  		c := auxIntToInt64(v_0.AuxInt)
  2827  		y := v_1
  2828  		mem := v_2
  2829  		v.reset(OpMIPS64LoweredPanicBoundsCR)
  2830  		v.AuxInt = int64ToAuxInt(kind)
  2831  		v.Aux = panicBoundsCToAux(PanicBoundsC{C: c})
  2832  		v.AddArg2(y, mem)
  2833  		return true
  2834  	}
  2835  	return false
  2836  }
  2837  func rewriteValueMIPS64_OpMIPS64MOVBUload(v *Value) bool {
  2838  	v_1 := v.Args[1]
  2839  	v_0 := v.Args[0]
  2840  	b := v.Block
  2841  	config := b.Func.Config
  2842  	// match: (MOVBUload [off1] {sym} (ADDVconst [off2] ptr) mem)
  2843  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  2844  	// result: (MOVBUload [off1+int32(off2)] {sym} ptr mem)
  2845  	for {
  2846  		off1 := auxIntToInt32(v.AuxInt)
  2847  		sym := auxToSym(v.Aux)
  2848  		if v_0.Op != OpMIPS64ADDVconst {
  2849  			break
  2850  		}
  2851  		off2 := auxIntToInt64(v_0.AuxInt)
  2852  		ptr := v_0.Args[0]
  2853  		mem := v_1
  2854  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  2855  			break
  2856  		}
  2857  		v.reset(OpMIPS64MOVBUload)
  2858  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  2859  		v.Aux = symToAux(sym)
  2860  		v.AddArg2(ptr, mem)
  2861  		return true
  2862  	}
  2863  	// match: (MOVBUload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem)
  2864  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  2865  	// result: (MOVBUload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem)
  2866  	for {
  2867  		off1 := auxIntToInt32(v.AuxInt)
  2868  		sym1 := auxToSym(v.Aux)
  2869  		if v_0.Op != OpMIPS64MOVVaddr {
  2870  			break
  2871  		}
  2872  		off2 := auxIntToInt32(v_0.AuxInt)
  2873  		sym2 := auxToSym(v_0.Aux)
  2874  		ptr := v_0.Args[0]
  2875  		mem := v_1
  2876  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  2877  			break
  2878  		}
  2879  		v.reset(OpMIPS64MOVBUload)
  2880  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  2881  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2882  		v.AddArg2(ptr, mem)
  2883  		return true
  2884  	}
  2885  	// match: (MOVBUload [off] {sym} (SB) _)
  2886  	// cond: symIsRO(sym)
  2887  	// result: (MOVVconst [int64(read8(sym, int64(off)))])
  2888  	for {
  2889  		off := auxIntToInt32(v.AuxInt)
  2890  		sym := auxToSym(v.Aux)
  2891  		if v_0.Op != OpSB || !(symIsRO(sym)) {
  2892  			break
  2893  		}
  2894  		v.reset(OpMIPS64MOVVconst)
  2895  		v.AuxInt = int64ToAuxInt(int64(read8(sym, int64(off))))
  2896  		return true
  2897  	}
  2898  	return false
  2899  }
  2900  func rewriteValueMIPS64_OpMIPS64MOVBUreg(v *Value) bool {
  2901  	v_0 := v.Args[0]
  2902  	// match: (MOVBUreg x:(MOVBUload _ _))
  2903  	// result: (MOVVreg x)
  2904  	for {
  2905  		x := v_0
  2906  		if x.Op != OpMIPS64MOVBUload {
  2907  			break
  2908  		}
  2909  		v.reset(OpMIPS64MOVVreg)
  2910  		v.AddArg(x)
  2911  		return true
  2912  	}
  2913  	// match: (MOVBUreg x:(MOVBUreg _))
  2914  	// result: (MOVVreg x)
  2915  	for {
  2916  		x := v_0
  2917  		if x.Op != OpMIPS64MOVBUreg {
  2918  			break
  2919  		}
  2920  		v.reset(OpMIPS64MOVVreg)
  2921  		v.AddArg(x)
  2922  		return true
  2923  	}
  2924  	// match: (MOVBUreg (MOVVconst [c]))
  2925  	// result: (MOVVconst [int64(uint8(c))])
  2926  	for {
  2927  		if v_0.Op != OpMIPS64MOVVconst {
  2928  			break
  2929  		}
  2930  		c := auxIntToInt64(v_0.AuxInt)
  2931  		v.reset(OpMIPS64MOVVconst)
  2932  		v.AuxInt = int64ToAuxInt(int64(uint8(c)))
  2933  		return true
  2934  	}
  2935  	return false
  2936  }
  2937  func rewriteValueMIPS64_OpMIPS64MOVBload(v *Value) bool {
  2938  	v_1 := v.Args[1]
  2939  	v_0 := v.Args[0]
  2940  	b := v.Block
  2941  	config := b.Func.Config
  2942  	// match: (MOVBload [off1] {sym} (ADDVconst [off2] ptr) mem)
  2943  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  2944  	// result: (MOVBload [off1+int32(off2)] {sym} ptr mem)
  2945  	for {
  2946  		off1 := auxIntToInt32(v.AuxInt)
  2947  		sym := auxToSym(v.Aux)
  2948  		if v_0.Op != OpMIPS64ADDVconst {
  2949  			break
  2950  		}
  2951  		off2 := auxIntToInt64(v_0.AuxInt)
  2952  		ptr := v_0.Args[0]
  2953  		mem := v_1
  2954  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  2955  			break
  2956  		}
  2957  		v.reset(OpMIPS64MOVBload)
  2958  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  2959  		v.Aux = symToAux(sym)
  2960  		v.AddArg2(ptr, mem)
  2961  		return true
  2962  	}
  2963  	// match: (MOVBload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem)
  2964  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  2965  	// result: (MOVBload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem)
  2966  	for {
  2967  		off1 := auxIntToInt32(v.AuxInt)
  2968  		sym1 := auxToSym(v.Aux)
  2969  		if v_0.Op != OpMIPS64MOVVaddr {
  2970  			break
  2971  		}
  2972  		off2 := auxIntToInt32(v_0.AuxInt)
  2973  		sym2 := auxToSym(v_0.Aux)
  2974  		ptr := v_0.Args[0]
  2975  		mem := v_1
  2976  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  2977  			break
  2978  		}
  2979  		v.reset(OpMIPS64MOVBload)
  2980  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  2981  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2982  		v.AddArg2(ptr, mem)
  2983  		return true
  2984  	}
  2985  	// match: (MOVBload [off] {sym} (SB) _)
  2986  	// cond: symIsRO(sym)
  2987  	// result: (MOVVconst [int64(int8(read8(sym, int64(off))))])
  2988  	for {
  2989  		off := auxIntToInt32(v.AuxInt)
  2990  		sym := auxToSym(v.Aux)
  2991  		if v_0.Op != OpSB || !(symIsRO(sym)) {
  2992  			break
  2993  		}
  2994  		v.reset(OpMIPS64MOVVconst)
  2995  		v.AuxInt = int64ToAuxInt(int64(int8(read8(sym, int64(off)))))
  2996  		return true
  2997  	}
  2998  	return false
  2999  }
  3000  func rewriteValueMIPS64_OpMIPS64MOVBreg(v *Value) bool {
  3001  	v_0 := v.Args[0]
  3002  	// match: (MOVBreg x:(MOVBload _ _))
  3003  	// result: (MOVVreg x)
  3004  	for {
  3005  		x := v_0
  3006  		if x.Op != OpMIPS64MOVBload {
  3007  			break
  3008  		}
  3009  		v.reset(OpMIPS64MOVVreg)
  3010  		v.AddArg(x)
  3011  		return true
  3012  	}
  3013  	// match: (MOVBreg x:(MOVBreg _))
  3014  	// result: (MOVVreg x)
  3015  	for {
  3016  		x := v_0
  3017  		if x.Op != OpMIPS64MOVBreg {
  3018  			break
  3019  		}
  3020  		v.reset(OpMIPS64MOVVreg)
  3021  		v.AddArg(x)
  3022  		return true
  3023  	}
  3024  	// match: (MOVBreg (MOVVconst [c]))
  3025  	// result: (MOVVconst [int64(int8(c))])
  3026  	for {
  3027  		if v_0.Op != OpMIPS64MOVVconst {
  3028  			break
  3029  		}
  3030  		c := auxIntToInt64(v_0.AuxInt)
  3031  		v.reset(OpMIPS64MOVVconst)
  3032  		v.AuxInt = int64ToAuxInt(int64(int8(c)))
  3033  		return true
  3034  	}
  3035  	return false
  3036  }
  3037  func rewriteValueMIPS64_OpMIPS64MOVBstore(v *Value) bool {
  3038  	v_2 := v.Args[2]
  3039  	v_1 := v.Args[1]
  3040  	v_0 := v.Args[0]
  3041  	b := v.Block
  3042  	config := b.Func.Config
  3043  	// match: (MOVBstore [off1] {sym} (ADDVconst [off2] ptr) val mem)
  3044  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  3045  	// result: (MOVBstore [off1+int32(off2)] {sym} ptr val mem)
  3046  	for {
  3047  		off1 := auxIntToInt32(v.AuxInt)
  3048  		sym := auxToSym(v.Aux)
  3049  		if v_0.Op != OpMIPS64ADDVconst {
  3050  			break
  3051  		}
  3052  		off2 := auxIntToInt64(v_0.AuxInt)
  3053  		ptr := v_0.Args[0]
  3054  		val := v_1
  3055  		mem := v_2
  3056  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  3057  			break
  3058  		}
  3059  		v.reset(OpMIPS64MOVBstore)
  3060  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  3061  		v.Aux = symToAux(sym)
  3062  		v.AddArg3(ptr, val, mem)
  3063  		return true
  3064  	}
  3065  	// match: (MOVBstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem)
  3066  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  3067  	// result: (MOVBstore [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem)
  3068  	for {
  3069  		off1 := auxIntToInt32(v.AuxInt)
  3070  		sym1 := auxToSym(v.Aux)
  3071  		if v_0.Op != OpMIPS64MOVVaddr {
  3072  			break
  3073  		}
  3074  		off2 := auxIntToInt32(v_0.AuxInt)
  3075  		sym2 := auxToSym(v_0.Aux)
  3076  		ptr := v_0.Args[0]
  3077  		val := v_1
  3078  		mem := v_2
  3079  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  3080  			break
  3081  		}
  3082  		v.reset(OpMIPS64MOVBstore)
  3083  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  3084  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3085  		v.AddArg3(ptr, val, mem)
  3086  		return true
  3087  	}
  3088  	// match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem)
  3089  	// result: (MOVBstore [off] {sym} ptr x mem)
  3090  	for {
  3091  		off := auxIntToInt32(v.AuxInt)
  3092  		sym := auxToSym(v.Aux)
  3093  		ptr := v_0
  3094  		if v_1.Op != OpMIPS64MOVBreg {
  3095  			break
  3096  		}
  3097  		x := v_1.Args[0]
  3098  		mem := v_2
  3099  		v.reset(OpMIPS64MOVBstore)
  3100  		v.AuxInt = int32ToAuxInt(off)
  3101  		v.Aux = symToAux(sym)
  3102  		v.AddArg3(ptr, x, mem)
  3103  		return true
  3104  	}
  3105  	// match: (MOVBstore [off] {sym} ptr (MOVBUreg x) mem)
  3106  	// result: (MOVBstore [off] {sym} ptr x mem)
  3107  	for {
  3108  		off := auxIntToInt32(v.AuxInt)
  3109  		sym := auxToSym(v.Aux)
  3110  		ptr := v_0
  3111  		if v_1.Op != OpMIPS64MOVBUreg {
  3112  			break
  3113  		}
  3114  		x := v_1.Args[0]
  3115  		mem := v_2
  3116  		v.reset(OpMIPS64MOVBstore)
  3117  		v.AuxInt = int32ToAuxInt(off)
  3118  		v.Aux = symToAux(sym)
  3119  		v.AddArg3(ptr, x, mem)
  3120  		return true
  3121  	}
  3122  	// match: (MOVBstore [off] {sym} ptr (MOVHreg x) mem)
  3123  	// result: (MOVBstore [off] {sym} ptr x mem)
  3124  	for {
  3125  		off := auxIntToInt32(v.AuxInt)
  3126  		sym := auxToSym(v.Aux)
  3127  		ptr := v_0
  3128  		if v_1.Op != OpMIPS64MOVHreg {
  3129  			break
  3130  		}
  3131  		x := v_1.Args[0]
  3132  		mem := v_2
  3133  		v.reset(OpMIPS64MOVBstore)
  3134  		v.AuxInt = int32ToAuxInt(off)
  3135  		v.Aux = symToAux(sym)
  3136  		v.AddArg3(ptr, x, mem)
  3137  		return true
  3138  	}
  3139  	// match: (MOVBstore [off] {sym} ptr (MOVHUreg x) mem)
  3140  	// result: (MOVBstore [off] {sym} ptr x mem)
  3141  	for {
  3142  		off := auxIntToInt32(v.AuxInt)
  3143  		sym := auxToSym(v.Aux)
  3144  		ptr := v_0
  3145  		if v_1.Op != OpMIPS64MOVHUreg {
  3146  			break
  3147  		}
  3148  		x := v_1.Args[0]
  3149  		mem := v_2
  3150  		v.reset(OpMIPS64MOVBstore)
  3151  		v.AuxInt = int32ToAuxInt(off)
  3152  		v.Aux = symToAux(sym)
  3153  		v.AddArg3(ptr, x, mem)
  3154  		return true
  3155  	}
  3156  	// match: (MOVBstore [off] {sym} ptr (MOVWreg x) mem)
  3157  	// result: (MOVBstore [off] {sym} ptr x mem)
  3158  	for {
  3159  		off := auxIntToInt32(v.AuxInt)
  3160  		sym := auxToSym(v.Aux)
  3161  		ptr := v_0
  3162  		if v_1.Op != OpMIPS64MOVWreg {
  3163  			break
  3164  		}
  3165  		x := v_1.Args[0]
  3166  		mem := v_2
  3167  		v.reset(OpMIPS64MOVBstore)
  3168  		v.AuxInt = int32ToAuxInt(off)
  3169  		v.Aux = symToAux(sym)
  3170  		v.AddArg3(ptr, x, mem)
  3171  		return true
  3172  	}
  3173  	// match: (MOVBstore [off] {sym} ptr (MOVWUreg x) mem)
  3174  	// result: (MOVBstore [off] {sym} ptr x mem)
  3175  	for {
  3176  		off := auxIntToInt32(v.AuxInt)
  3177  		sym := auxToSym(v.Aux)
  3178  		ptr := v_0
  3179  		if v_1.Op != OpMIPS64MOVWUreg {
  3180  			break
  3181  		}
  3182  		x := v_1.Args[0]
  3183  		mem := v_2
  3184  		v.reset(OpMIPS64MOVBstore)
  3185  		v.AuxInt = int32ToAuxInt(off)
  3186  		v.Aux = symToAux(sym)
  3187  		v.AddArg3(ptr, x, mem)
  3188  		return true
  3189  	}
  3190  	return false
  3191  }
  3192  func rewriteValueMIPS64_OpMIPS64MOVDload(v *Value) bool {
  3193  	v_1 := v.Args[1]
  3194  	v_0 := v.Args[0]
  3195  	b := v.Block
  3196  	config := b.Func.Config
  3197  	// match: (MOVDload [off] {sym} ptr (MOVVstore [off] {sym} ptr val _))
  3198  	// result: (MOVVgpfp val)
  3199  	for {
  3200  		off := auxIntToInt32(v.AuxInt)
  3201  		sym := auxToSym(v.Aux)
  3202  		ptr := v_0
  3203  		if v_1.Op != OpMIPS64MOVVstore || auxIntToInt32(v_1.AuxInt) != off || auxToSym(v_1.Aux) != sym {
  3204  			break
  3205  		}
  3206  		val := v_1.Args[1]
  3207  		if ptr != v_1.Args[0] {
  3208  			break
  3209  		}
  3210  		v.reset(OpMIPS64MOVVgpfp)
  3211  		v.AddArg(val)
  3212  		return true
  3213  	}
  3214  	// match: (MOVDload [off1] {sym} (ADDVconst [off2] ptr) mem)
  3215  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  3216  	// result: (MOVDload [off1+int32(off2)] {sym} ptr mem)
  3217  	for {
  3218  		off1 := auxIntToInt32(v.AuxInt)
  3219  		sym := auxToSym(v.Aux)
  3220  		if v_0.Op != OpMIPS64ADDVconst {
  3221  			break
  3222  		}
  3223  		off2 := auxIntToInt64(v_0.AuxInt)
  3224  		ptr := v_0.Args[0]
  3225  		mem := v_1
  3226  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  3227  			break
  3228  		}
  3229  		v.reset(OpMIPS64MOVDload)
  3230  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  3231  		v.Aux = symToAux(sym)
  3232  		v.AddArg2(ptr, mem)
  3233  		return true
  3234  	}
  3235  	// match: (MOVDload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem)
  3236  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  3237  	// result: (MOVDload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem)
  3238  	for {
  3239  		off1 := auxIntToInt32(v.AuxInt)
  3240  		sym1 := auxToSym(v.Aux)
  3241  		if v_0.Op != OpMIPS64MOVVaddr {
  3242  			break
  3243  		}
  3244  		off2 := auxIntToInt32(v_0.AuxInt)
  3245  		sym2 := auxToSym(v_0.Aux)
  3246  		ptr := v_0.Args[0]
  3247  		mem := v_1
  3248  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  3249  			break
  3250  		}
  3251  		v.reset(OpMIPS64MOVDload)
  3252  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  3253  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3254  		v.AddArg2(ptr, mem)
  3255  		return true
  3256  	}
  3257  	return false
  3258  }
  3259  func rewriteValueMIPS64_OpMIPS64MOVDstore(v *Value) bool {
  3260  	v_2 := v.Args[2]
  3261  	v_1 := v.Args[1]
  3262  	v_0 := v.Args[0]
  3263  	b := v.Block
  3264  	config := b.Func.Config
  3265  	// match: (MOVDstore [off] {sym} ptr (MOVVgpfp val) mem)
  3266  	// result: (MOVVstore [off] {sym} ptr val mem)
  3267  	for {
  3268  		off := auxIntToInt32(v.AuxInt)
  3269  		sym := auxToSym(v.Aux)
  3270  		ptr := v_0
  3271  		if v_1.Op != OpMIPS64MOVVgpfp {
  3272  			break
  3273  		}
  3274  		val := v_1.Args[0]
  3275  		mem := v_2
  3276  		v.reset(OpMIPS64MOVVstore)
  3277  		v.AuxInt = int32ToAuxInt(off)
  3278  		v.Aux = symToAux(sym)
  3279  		v.AddArg3(ptr, val, mem)
  3280  		return true
  3281  	}
  3282  	// match: (MOVDstore [off1] {sym} (ADDVconst [off2] ptr) val mem)
  3283  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  3284  	// result: (MOVDstore [off1+int32(off2)] {sym} ptr val mem)
  3285  	for {
  3286  		off1 := auxIntToInt32(v.AuxInt)
  3287  		sym := auxToSym(v.Aux)
  3288  		if v_0.Op != OpMIPS64ADDVconst {
  3289  			break
  3290  		}
  3291  		off2 := auxIntToInt64(v_0.AuxInt)
  3292  		ptr := v_0.Args[0]
  3293  		val := v_1
  3294  		mem := v_2
  3295  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  3296  			break
  3297  		}
  3298  		v.reset(OpMIPS64MOVDstore)
  3299  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  3300  		v.Aux = symToAux(sym)
  3301  		v.AddArg3(ptr, val, mem)
  3302  		return true
  3303  	}
  3304  	// match: (MOVDstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem)
  3305  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  3306  	// result: (MOVDstore [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem)
  3307  	for {
  3308  		off1 := auxIntToInt32(v.AuxInt)
  3309  		sym1 := auxToSym(v.Aux)
  3310  		if v_0.Op != OpMIPS64MOVVaddr {
  3311  			break
  3312  		}
  3313  		off2 := auxIntToInt32(v_0.AuxInt)
  3314  		sym2 := auxToSym(v_0.Aux)
  3315  		ptr := v_0.Args[0]
  3316  		val := v_1
  3317  		mem := v_2
  3318  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  3319  			break
  3320  		}
  3321  		v.reset(OpMIPS64MOVDstore)
  3322  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  3323  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3324  		v.AddArg3(ptr, val, mem)
  3325  		return true
  3326  	}
  3327  	return false
  3328  }
  3329  func rewriteValueMIPS64_OpMIPS64MOVFload(v *Value) bool {
  3330  	v_1 := v.Args[1]
  3331  	v_0 := v.Args[0]
  3332  	b := v.Block
  3333  	config := b.Func.Config
  3334  	// match: (MOVFload [off] {sym} ptr (MOVWstore [off] {sym} ptr val _))
  3335  	// result: (MOVWgpfp val)
  3336  	for {
  3337  		off := auxIntToInt32(v.AuxInt)
  3338  		sym := auxToSym(v.Aux)
  3339  		ptr := v_0
  3340  		if v_1.Op != OpMIPS64MOVWstore || auxIntToInt32(v_1.AuxInt) != off || auxToSym(v_1.Aux) != sym {
  3341  			break
  3342  		}
  3343  		val := v_1.Args[1]
  3344  		if ptr != v_1.Args[0] {
  3345  			break
  3346  		}
  3347  		v.reset(OpMIPS64MOVWgpfp)
  3348  		v.AddArg(val)
  3349  		return true
  3350  	}
  3351  	// match: (MOVFload [off1] {sym} (ADDVconst [off2] ptr) mem)
  3352  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  3353  	// result: (MOVFload [off1+int32(off2)] {sym} ptr mem)
  3354  	for {
  3355  		off1 := auxIntToInt32(v.AuxInt)
  3356  		sym := auxToSym(v.Aux)
  3357  		if v_0.Op != OpMIPS64ADDVconst {
  3358  			break
  3359  		}
  3360  		off2 := auxIntToInt64(v_0.AuxInt)
  3361  		ptr := v_0.Args[0]
  3362  		mem := v_1
  3363  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  3364  			break
  3365  		}
  3366  		v.reset(OpMIPS64MOVFload)
  3367  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  3368  		v.Aux = symToAux(sym)
  3369  		v.AddArg2(ptr, mem)
  3370  		return true
  3371  	}
  3372  	// match: (MOVFload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem)
  3373  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  3374  	// result: (MOVFload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem)
  3375  	for {
  3376  		off1 := auxIntToInt32(v.AuxInt)
  3377  		sym1 := auxToSym(v.Aux)
  3378  		if v_0.Op != OpMIPS64MOVVaddr {
  3379  			break
  3380  		}
  3381  		off2 := auxIntToInt32(v_0.AuxInt)
  3382  		sym2 := auxToSym(v_0.Aux)
  3383  		ptr := v_0.Args[0]
  3384  		mem := v_1
  3385  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  3386  			break
  3387  		}
  3388  		v.reset(OpMIPS64MOVFload)
  3389  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  3390  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3391  		v.AddArg2(ptr, mem)
  3392  		return true
  3393  	}
  3394  	return false
  3395  }
  3396  func rewriteValueMIPS64_OpMIPS64MOVFstore(v *Value) bool {
  3397  	v_2 := v.Args[2]
  3398  	v_1 := v.Args[1]
  3399  	v_0 := v.Args[0]
  3400  	b := v.Block
  3401  	config := b.Func.Config
  3402  	// match: (MOVFstore [off] {sym} ptr (MOVWgpfp val) mem)
  3403  	// result: (MOVWstore [off] {sym} ptr val mem)
  3404  	for {
  3405  		off := auxIntToInt32(v.AuxInt)
  3406  		sym := auxToSym(v.Aux)
  3407  		ptr := v_0
  3408  		if v_1.Op != OpMIPS64MOVWgpfp {
  3409  			break
  3410  		}
  3411  		val := v_1.Args[0]
  3412  		mem := v_2
  3413  		v.reset(OpMIPS64MOVWstore)
  3414  		v.AuxInt = int32ToAuxInt(off)
  3415  		v.Aux = symToAux(sym)
  3416  		v.AddArg3(ptr, val, mem)
  3417  		return true
  3418  	}
  3419  	// match: (MOVFstore [off1] {sym} (ADDVconst [off2] ptr) val mem)
  3420  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  3421  	// result: (MOVFstore [off1+int32(off2)] {sym} ptr val mem)
  3422  	for {
  3423  		off1 := auxIntToInt32(v.AuxInt)
  3424  		sym := auxToSym(v.Aux)
  3425  		if v_0.Op != OpMIPS64ADDVconst {
  3426  			break
  3427  		}
  3428  		off2 := auxIntToInt64(v_0.AuxInt)
  3429  		ptr := v_0.Args[0]
  3430  		val := v_1
  3431  		mem := v_2
  3432  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  3433  			break
  3434  		}
  3435  		v.reset(OpMIPS64MOVFstore)
  3436  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  3437  		v.Aux = symToAux(sym)
  3438  		v.AddArg3(ptr, val, mem)
  3439  		return true
  3440  	}
  3441  	// match: (MOVFstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem)
  3442  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  3443  	// result: (MOVFstore [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem)
  3444  	for {
  3445  		off1 := auxIntToInt32(v.AuxInt)
  3446  		sym1 := auxToSym(v.Aux)
  3447  		if v_0.Op != OpMIPS64MOVVaddr {
  3448  			break
  3449  		}
  3450  		off2 := auxIntToInt32(v_0.AuxInt)
  3451  		sym2 := auxToSym(v_0.Aux)
  3452  		ptr := v_0.Args[0]
  3453  		val := v_1
  3454  		mem := v_2
  3455  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  3456  			break
  3457  		}
  3458  		v.reset(OpMIPS64MOVFstore)
  3459  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  3460  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3461  		v.AddArg3(ptr, val, mem)
  3462  		return true
  3463  	}
  3464  	return false
  3465  }
  3466  func rewriteValueMIPS64_OpMIPS64MOVHUload(v *Value) bool {
  3467  	v_1 := v.Args[1]
  3468  	v_0 := v.Args[0]
  3469  	b := v.Block
  3470  	config := b.Func.Config
  3471  	// match: (MOVHUload [off1] {sym} (ADDVconst [off2] ptr) mem)
  3472  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  3473  	// result: (MOVHUload [off1+int32(off2)] {sym} ptr mem)
  3474  	for {
  3475  		off1 := auxIntToInt32(v.AuxInt)
  3476  		sym := auxToSym(v.Aux)
  3477  		if v_0.Op != OpMIPS64ADDVconst {
  3478  			break
  3479  		}
  3480  		off2 := auxIntToInt64(v_0.AuxInt)
  3481  		ptr := v_0.Args[0]
  3482  		mem := v_1
  3483  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  3484  			break
  3485  		}
  3486  		v.reset(OpMIPS64MOVHUload)
  3487  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  3488  		v.Aux = symToAux(sym)
  3489  		v.AddArg2(ptr, mem)
  3490  		return true
  3491  	}
  3492  	// match: (MOVHUload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem)
  3493  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  3494  	// result: (MOVHUload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem)
  3495  	for {
  3496  		off1 := auxIntToInt32(v.AuxInt)
  3497  		sym1 := auxToSym(v.Aux)
  3498  		if v_0.Op != OpMIPS64MOVVaddr {
  3499  			break
  3500  		}
  3501  		off2 := auxIntToInt32(v_0.AuxInt)
  3502  		sym2 := auxToSym(v_0.Aux)
  3503  		ptr := v_0.Args[0]
  3504  		mem := v_1
  3505  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  3506  			break
  3507  		}
  3508  		v.reset(OpMIPS64MOVHUload)
  3509  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  3510  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3511  		v.AddArg2(ptr, mem)
  3512  		return true
  3513  	}
  3514  	// match: (MOVHUload [off] {sym} (SB) _)
  3515  	// cond: symIsRO(sym)
  3516  	// result: (MOVVconst [int64(read16(sym, int64(off), config.ctxt.Arch.ByteOrder))])
  3517  	for {
  3518  		off := auxIntToInt32(v.AuxInt)
  3519  		sym := auxToSym(v.Aux)
  3520  		if v_0.Op != OpSB || !(symIsRO(sym)) {
  3521  			break
  3522  		}
  3523  		v.reset(OpMIPS64MOVVconst)
  3524  		v.AuxInt = int64ToAuxInt(int64(read16(sym, int64(off), config.ctxt.Arch.ByteOrder)))
  3525  		return true
  3526  	}
  3527  	return false
  3528  }
  3529  func rewriteValueMIPS64_OpMIPS64MOVHUreg(v *Value) bool {
  3530  	v_0 := v.Args[0]
  3531  	// match: (MOVHUreg x:(MOVBUload _ _))
  3532  	// result: (MOVVreg x)
  3533  	for {
  3534  		x := v_0
  3535  		if x.Op != OpMIPS64MOVBUload {
  3536  			break
  3537  		}
  3538  		v.reset(OpMIPS64MOVVreg)
  3539  		v.AddArg(x)
  3540  		return true
  3541  	}
  3542  	// match: (MOVHUreg x:(MOVHUload _ _))
  3543  	// result: (MOVVreg x)
  3544  	for {
  3545  		x := v_0
  3546  		if x.Op != OpMIPS64MOVHUload {
  3547  			break
  3548  		}
  3549  		v.reset(OpMIPS64MOVVreg)
  3550  		v.AddArg(x)
  3551  		return true
  3552  	}
  3553  	// match: (MOVHUreg x:(MOVBUreg _))
  3554  	// result: (MOVVreg x)
  3555  	for {
  3556  		x := v_0
  3557  		if x.Op != OpMIPS64MOVBUreg {
  3558  			break
  3559  		}
  3560  		v.reset(OpMIPS64MOVVreg)
  3561  		v.AddArg(x)
  3562  		return true
  3563  	}
  3564  	// match: (MOVHUreg x:(MOVHUreg _))
  3565  	// result: (MOVVreg x)
  3566  	for {
  3567  		x := v_0
  3568  		if x.Op != OpMIPS64MOVHUreg {
  3569  			break
  3570  		}
  3571  		v.reset(OpMIPS64MOVVreg)
  3572  		v.AddArg(x)
  3573  		return true
  3574  	}
  3575  	// match: (MOVHUreg (MOVVconst [c]))
  3576  	// result: (MOVVconst [int64(uint16(c))])
  3577  	for {
  3578  		if v_0.Op != OpMIPS64MOVVconst {
  3579  			break
  3580  		}
  3581  		c := auxIntToInt64(v_0.AuxInt)
  3582  		v.reset(OpMIPS64MOVVconst)
  3583  		v.AuxInt = int64ToAuxInt(int64(uint16(c)))
  3584  		return true
  3585  	}
  3586  	return false
  3587  }
  3588  func rewriteValueMIPS64_OpMIPS64MOVHload(v *Value) bool {
  3589  	v_1 := v.Args[1]
  3590  	v_0 := v.Args[0]
  3591  	b := v.Block
  3592  	config := b.Func.Config
  3593  	// match: (MOVHload [off1] {sym} (ADDVconst [off2] ptr) mem)
  3594  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  3595  	// result: (MOVHload [off1+int32(off2)] {sym} ptr mem)
  3596  	for {
  3597  		off1 := auxIntToInt32(v.AuxInt)
  3598  		sym := auxToSym(v.Aux)
  3599  		if v_0.Op != OpMIPS64ADDVconst {
  3600  			break
  3601  		}
  3602  		off2 := auxIntToInt64(v_0.AuxInt)
  3603  		ptr := v_0.Args[0]
  3604  		mem := v_1
  3605  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  3606  			break
  3607  		}
  3608  		v.reset(OpMIPS64MOVHload)
  3609  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  3610  		v.Aux = symToAux(sym)
  3611  		v.AddArg2(ptr, mem)
  3612  		return true
  3613  	}
  3614  	// match: (MOVHload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem)
  3615  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  3616  	// result: (MOVHload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem)
  3617  	for {
  3618  		off1 := auxIntToInt32(v.AuxInt)
  3619  		sym1 := auxToSym(v.Aux)
  3620  		if v_0.Op != OpMIPS64MOVVaddr {
  3621  			break
  3622  		}
  3623  		off2 := auxIntToInt32(v_0.AuxInt)
  3624  		sym2 := auxToSym(v_0.Aux)
  3625  		ptr := v_0.Args[0]
  3626  		mem := v_1
  3627  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  3628  			break
  3629  		}
  3630  		v.reset(OpMIPS64MOVHload)
  3631  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  3632  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3633  		v.AddArg2(ptr, mem)
  3634  		return true
  3635  	}
  3636  	// match: (MOVHload [off] {sym} (SB) _)
  3637  	// cond: symIsRO(sym)
  3638  	// result: (MOVVconst [int64(int16(read16(sym, int64(off), config.ctxt.Arch.ByteOrder)))])
  3639  	for {
  3640  		off := auxIntToInt32(v.AuxInt)
  3641  		sym := auxToSym(v.Aux)
  3642  		if v_0.Op != OpSB || !(symIsRO(sym)) {
  3643  			break
  3644  		}
  3645  		v.reset(OpMIPS64MOVVconst)
  3646  		v.AuxInt = int64ToAuxInt(int64(int16(read16(sym, int64(off), config.ctxt.Arch.ByteOrder))))
  3647  		return true
  3648  	}
  3649  	return false
  3650  }
  3651  func rewriteValueMIPS64_OpMIPS64MOVHreg(v *Value) bool {
  3652  	v_0 := v.Args[0]
  3653  	// match: (MOVHreg x:(MOVBload _ _))
  3654  	// result: (MOVVreg x)
  3655  	for {
  3656  		x := v_0
  3657  		if x.Op != OpMIPS64MOVBload {
  3658  			break
  3659  		}
  3660  		v.reset(OpMIPS64MOVVreg)
  3661  		v.AddArg(x)
  3662  		return true
  3663  	}
  3664  	// match: (MOVHreg x:(MOVBUload _ _))
  3665  	// result: (MOVVreg x)
  3666  	for {
  3667  		x := v_0
  3668  		if x.Op != OpMIPS64MOVBUload {
  3669  			break
  3670  		}
  3671  		v.reset(OpMIPS64MOVVreg)
  3672  		v.AddArg(x)
  3673  		return true
  3674  	}
  3675  	// match: (MOVHreg x:(MOVHload _ _))
  3676  	// result: (MOVVreg x)
  3677  	for {
  3678  		x := v_0
  3679  		if x.Op != OpMIPS64MOVHload {
  3680  			break
  3681  		}
  3682  		v.reset(OpMIPS64MOVVreg)
  3683  		v.AddArg(x)
  3684  		return true
  3685  	}
  3686  	// match: (MOVHreg x:(MOVBreg _))
  3687  	// result: (MOVVreg x)
  3688  	for {
  3689  		x := v_0
  3690  		if x.Op != OpMIPS64MOVBreg {
  3691  			break
  3692  		}
  3693  		v.reset(OpMIPS64MOVVreg)
  3694  		v.AddArg(x)
  3695  		return true
  3696  	}
  3697  	// match: (MOVHreg x:(MOVBUreg _))
  3698  	// result: (MOVVreg x)
  3699  	for {
  3700  		x := v_0
  3701  		if x.Op != OpMIPS64MOVBUreg {
  3702  			break
  3703  		}
  3704  		v.reset(OpMIPS64MOVVreg)
  3705  		v.AddArg(x)
  3706  		return true
  3707  	}
  3708  	// match: (MOVHreg x:(MOVHreg _))
  3709  	// result: (MOVVreg x)
  3710  	for {
  3711  		x := v_0
  3712  		if x.Op != OpMIPS64MOVHreg {
  3713  			break
  3714  		}
  3715  		v.reset(OpMIPS64MOVVreg)
  3716  		v.AddArg(x)
  3717  		return true
  3718  	}
  3719  	// match: (MOVHreg (MOVVconst [c]))
  3720  	// result: (MOVVconst [int64(int16(c))])
  3721  	for {
  3722  		if v_0.Op != OpMIPS64MOVVconst {
  3723  			break
  3724  		}
  3725  		c := auxIntToInt64(v_0.AuxInt)
  3726  		v.reset(OpMIPS64MOVVconst)
  3727  		v.AuxInt = int64ToAuxInt(int64(int16(c)))
  3728  		return true
  3729  	}
  3730  	return false
  3731  }
  3732  func rewriteValueMIPS64_OpMIPS64MOVHstore(v *Value) bool {
  3733  	v_2 := v.Args[2]
  3734  	v_1 := v.Args[1]
  3735  	v_0 := v.Args[0]
  3736  	b := v.Block
  3737  	config := b.Func.Config
  3738  	// match: (MOVHstore [off1] {sym} (ADDVconst [off2] ptr) val mem)
  3739  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  3740  	// result: (MOVHstore [off1+int32(off2)] {sym} ptr val mem)
  3741  	for {
  3742  		off1 := auxIntToInt32(v.AuxInt)
  3743  		sym := auxToSym(v.Aux)
  3744  		if v_0.Op != OpMIPS64ADDVconst {
  3745  			break
  3746  		}
  3747  		off2 := auxIntToInt64(v_0.AuxInt)
  3748  		ptr := v_0.Args[0]
  3749  		val := v_1
  3750  		mem := v_2
  3751  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  3752  			break
  3753  		}
  3754  		v.reset(OpMIPS64MOVHstore)
  3755  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  3756  		v.Aux = symToAux(sym)
  3757  		v.AddArg3(ptr, val, mem)
  3758  		return true
  3759  	}
  3760  	// match: (MOVHstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem)
  3761  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  3762  	// result: (MOVHstore [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem)
  3763  	for {
  3764  		off1 := auxIntToInt32(v.AuxInt)
  3765  		sym1 := auxToSym(v.Aux)
  3766  		if v_0.Op != OpMIPS64MOVVaddr {
  3767  			break
  3768  		}
  3769  		off2 := auxIntToInt32(v_0.AuxInt)
  3770  		sym2 := auxToSym(v_0.Aux)
  3771  		ptr := v_0.Args[0]
  3772  		val := v_1
  3773  		mem := v_2
  3774  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  3775  			break
  3776  		}
  3777  		v.reset(OpMIPS64MOVHstore)
  3778  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  3779  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3780  		v.AddArg3(ptr, val, mem)
  3781  		return true
  3782  	}
  3783  	// match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem)
  3784  	// result: (MOVHstore [off] {sym} ptr x mem)
  3785  	for {
  3786  		off := auxIntToInt32(v.AuxInt)
  3787  		sym := auxToSym(v.Aux)
  3788  		ptr := v_0
  3789  		if v_1.Op != OpMIPS64MOVHreg {
  3790  			break
  3791  		}
  3792  		x := v_1.Args[0]
  3793  		mem := v_2
  3794  		v.reset(OpMIPS64MOVHstore)
  3795  		v.AuxInt = int32ToAuxInt(off)
  3796  		v.Aux = symToAux(sym)
  3797  		v.AddArg3(ptr, x, mem)
  3798  		return true
  3799  	}
  3800  	// match: (MOVHstore [off] {sym} ptr (MOVHUreg x) mem)
  3801  	// result: (MOVHstore [off] {sym} ptr x mem)
  3802  	for {
  3803  		off := auxIntToInt32(v.AuxInt)
  3804  		sym := auxToSym(v.Aux)
  3805  		ptr := v_0
  3806  		if v_1.Op != OpMIPS64MOVHUreg {
  3807  			break
  3808  		}
  3809  		x := v_1.Args[0]
  3810  		mem := v_2
  3811  		v.reset(OpMIPS64MOVHstore)
  3812  		v.AuxInt = int32ToAuxInt(off)
  3813  		v.Aux = symToAux(sym)
  3814  		v.AddArg3(ptr, x, mem)
  3815  		return true
  3816  	}
  3817  	// match: (MOVHstore [off] {sym} ptr (MOVWreg x) mem)
  3818  	// result: (MOVHstore [off] {sym} ptr x mem)
  3819  	for {
  3820  		off := auxIntToInt32(v.AuxInt)
  3821  		sym := auxToSym(v.Aux)
  3822  		ptr := v_0
  3823  		if v_1.Op != OpMIPS64MOVWreg {
  3824  			break
  3825  		}
  3826  		x := v_1.Args[0]
  3827  		mem := v_2
  3828  		v.reset(OpMIPS64MOVHstore)
  3829  		v.AuxInt = int32ToAuxInt(off)
  3830  		v.Aux = symToAux(sym)
  3831  		v.AddArg3(ptr, x, mem)
  3832  		return true
  3833  	}
  3834  	// match: (MOVHstore [off] {sym} ptr (MOVWUreg x) mem)
  3835  	// result: (MOVHstore [off] {sym} ptr x mem)
  3836  	for {
  3837  		off := auxIntToInt32(v.AuxInt)
  3838  		sym := auxToSym(v.Aux)
  3839  		ptr := v_0
  3840  		if v_1.Op != OpMIPS64MOVWUreg {
  3841  			break
  3842  		}
  3843  		x := v_1.Args[0]
  3844  		mem := v_2
  3845  		v.reset(OpMIPS64MOVHstore)
  3846  		v.AuxInt = int32ToAuxInt(off)
  3847  		v.Aux = symToAux(sym)
  3848  		v.AddArg3(ptr, x, mem)
  3849  		return true
  3850  	}
  3851  	return false
  3852  }
  3853  func rewriteValueMIPS64_OpMIPS64MOVVload(v *Value) bool {
  3854  	v_1 := v.Args[1]
  3855  	v_0 := v.Args[0]
  3856  	b := v.Block
  3857  	config := b.Func.Config
  3858  	// match: (MOVVload [off] {sym} ptr (MOVDstore [off] {sym} ptr val _))
  3859  	// result: (MOVVfpgp val)
  3860  	for {
  3861  		off := auxIntToInt32(v.AuxInt)
  3862  		sym := auxToSym(v.Aux)
  3863  		ptr := v_0
  3864  		if v_1.Op != OpMIPS64MOVDstore || auxIntToInt32(v_1.AuxInt) != off || auxToSym(v_1.Aux) != sym {
  3865  			break
  3866  		}
  3867  		val := v_1.Args[1]
  3868  		if ptr != v_1.Args[0] {
  3869  			break
  3870  		}
  3871  		v.reset(OpMIPS64MOVVfpgp)
  3872  		v.AddArg(val)
  3873  		return true
  3874  	}
  3875  	// match: (MOVVload [off1] {sym} (ADDVconst [off2] ptr) mem)
  3876  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  3877  	// result: (MOVVload [off1+int32(off2)] {sym} ptr mem)
  3878  	for {
  3879  		off1 := auxIntToInt32(v.AuxInt)
  3880  		sym := auxToSym(v.Aux)
  3881  		if v_0.Op != OpMIPS64ADDVconst {
  3882  			break
  3883  		}
  3884  		off2 := auxIntToInt64(v_0.AuxInt)
  3885  		ptr := v_0.Args[0]
  3886  		mem := v_1
  3887  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  3888  			break
  3889  		}
  3890  		v.reset(OpMIPS64MOVVload)
  3891  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  3892  		v.Aux = symToAux(sym)
  3893  		v.AddArg2(ptr, mem)
  3894  		return true
  3895  	}
  3896  	// match: (MOVVload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem)
  3897  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  3898  	// result: (MOVVload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem)
  3899  	for {
  3900  		off1 := auxIntToInt32(v.AuxInt)
  3901  		sym1 := auxToSym(v.Aux)
  3902  		if v_0.Op != OpMIPS64MOVVaddr {
  3903  			break
  3904  		}
  3905  		off2 := auxIntToInt32(v_0.AuxInt)
  3906  		sym2 := auxToSym(v_0.Aux)
  3907  		ptr := v_0.Args[0]
  3908  		mem := v_1
  3909  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  3910  			break
  3911  		}
  3912  		v.reset(OpMIPS64MOVVload)
  3913  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  3914  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3915  		v.AddArg2(ptr, mem)
  3916  		return true
  3917  	}
  3918  	// match: (MOVVload [off] {sym} (SB) _)
  3919  	// cond: symIsRO(sym)
  3920  	// result: (MOVVconst [int64(read64(sym, int64(off), config.ctxt.Arch.ByteOrder))])
  3921  	for {
  3922  		off := auxIntToInt32(v.AuxInt)
  3923  		sym := auxToSym(v.Aux)
  3924  		if v_0.Op != OpSB || !(symIsRO(sym)) {
  3925  			break
  3926  		}
  3927  		v.reset(OpMIPS64MOVVconst)
  3928  		v.AuxInt = int64ToAuxInt(int64(read64(sym, int64(off), config.ctxt.Arch.ByteOrder)))
  3929  		return true
  3930  	}
  3931  	return false
  3932  }
  3933  func rewriteValueMIPS64_OpMIPS64MOVVnop(v *Value) bool {
  3934  	v_0 := v.Args[0]
  3935  	// match: (MOVVnop (MOVVconst [c]))
  3936  	// result: (MOVVconst [c])
  3937  	for {
  3938  		if v_0.Op != OpMIPS64MOVVconst {
  3939  			break
  3940  		}
  3941  		c := auxIntToInt64(v_0.AuxInt)
  3942  		v.reset(OpMIPS64MOVVconst)
  3943  		v.AuxInt = int64ToAuxInt(c)
  3944  		return true
  3945  	}
  3946  	return false
  3947  }
  3948  func rewriteValueMIPS64_OpMIPS64MOVVreg(v *Value) bool {
  3949  	v_0 := v.Args[0]
  3950  	// match: (MOVVreg x)
  3951  	// cond: x.Uses == 1
  3952  	// result: (MOVVnop x)
  3953  	for {
  3954  		x := v_0
  3955  		if !(x.Uses == 1) {
  3956  			break
  3957  		}
  3958  		v.reset(OpMIPS64MOVVnop)
  3959  		v.AddArg(x)
  3960  		return true
  3961  	}
  3962  	// match: (MOVVreg (MOVVconst [c]))
  3963  	// result: (MOVVconst [c])
  3964  	for {
  3965  		if v_0.Op != OpMIPS64MOVVconst {
  3966  			break
  3967  		}
  3968  		c := auxIntToInt64(v_0.AuxInt)
  3969  		v.reset(OpMIPS64MOVVconst)
  3970  		v.AuxInt = int64ToAuxInt(c)
  3971  		return true
  3972  	}
  3973  	return false
  3974  }
  3975  func rewriteValueMIPS64_OpMIPS64MOVVstore(v *Value) bool {
  3976  	v_2 := v.Args[2]
  3977  	v_1 := v.Args[1]
  3978  	v_0 := v.Args[0]
  3979  	b := v.Block
  3980  	config := b.Func.Config
  3981  	// match: (MOVVstore [off] {sym} ptr (MOVVfpgp val) mem)
  3982  	// result: (MOVDstore [off] {sym} ptr val mem)
  3983  	for {
  3984  		off := auxIntToInt32(v.AuxInt)
  3985  		sym := auxToSym(v.Aux)
  3986  		ptr := v_0
  3987  		if v_1.Op != OpMIPS64MOVVfpgp {
  3988  			break
  3989  		}
  3990  		val := v_1.Args[0]
  3991  		mem := v_2
  3992  		v.reset(OpMIPS64MOVDstore)
  3993  		v.AuxInt = int32ToAuxInt(off)
  3994  		v.Aux = symToAux(sym)
  3995  		v.AddArg3(ptr, val, mem)
  3996  		return true
  3997  	}
  3998  	// match: (MOVVstore [off1] {sym} (ADDVconst [off2] ptr) val mem)
  3999  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  4000  	// result: (MOVVstore [off1+int32(off2)] {sym} ptr val mem)
  4001  	for {
  4002  		off1 := auxIntToInt32(v.AuxInt)
  4003  		sym := auxToSym(v.Aux)
  4004  		if v_0.Op != OpMIPS64ADDVconst {
  4005  			break
  4006  		}
  4007  		off2 := auxIntToInt64(v_0.AuxInt)
  4008  		ptr := v_0.Args[0]
  4009  		val := v_1
  4010  		mem := v_2
  4011  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  4012  			break
  4013  		}
  4014  		v.reset(OpMIPS64MOVVstore)
  4015  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  4016  		v.Aux = symToAux(sym)
  4017  		v.AddArg3(ptr, val, mem)
  4018  		return true
  4019  	}
  4020  	// match: (MOVVstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem)
  4021  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  4022  	// result: (MOVVstore [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem)
  4023  	for {
  4024  		off1 := auxIntToInt32(v.AuxInt)
  4025  		sym1 := auxToSym(v.Aux)
  4026  		if v_0.Op != OpMIPS64MOVVaddr {
  4027  			break
  4028  		}
  4029  		off2 := auxIntToInt32(v_0.AuxInt)
  4030  		sym2 := auxToSym(v_0.Aux)
  4031  		ptr := v_0.Args[0]
  4032  		val := v_1
  4033  		mem := v_2
  4034  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  4035  			break
  4036  		}
  4037  		v.reset(OpMIPS64MOVVstore)
  4038  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  4039  		v.Aux = symToAux(mergeSym(sym1, sym2))
  4040  		v.AddArg3(ptr, val, mem)
  4041  		return true
  4042  	}
  4043  	return false
  4044  }
  4045  func rewriteValueMIPS64_OpMIPS64MOVWUload(v *Value) bool {
  4046  	v_1 := v.Args[1]
  4047  	v_0 := v.Args[0]
  4048  	b := v.Block
  4049  	config := b.Func.Config
  4050  	typ := &b.Func.Config.Types
  4051  	// match: (MOVWUload [off] {sym} ptr (MOVFstore [off] {sym} ptr val _))
  4052  	// result: (ZeroExt32to64 (MOVWfpgp <typ.Float32> val))
  4053  	for {
  4054  		off := auxIntToInt32(v.AuxInt)
  4055  		sym := auxToSym(v.Aux)
  4056  		ptr := v_0
  4057  		if v_1.Op != OpMIPS64MOVFstore || auxIntToInt32(v_1.AuxInt) != off || auxToSym(v_1.Aux) != sym {
  4058  			break
  4059  		}
  4060  		val := v_1.Args[1]
  4061  		if ptr != v_1.Args[0] {
  4062  			break
  4063  		}
  4064  		v.reset(OpZeroExt32to64)
  4065  		v0 := b.NewValue0(v_1.Pos, OpMIPS64MOVWfpgp, typ.Float32)
  4066  		v0.AddArg(val)
  4067  		v.AddArg(v0)
  4068  		return true
  4069  	}
  4070  	// match: (MOVWUload [off1] {sym} (ADDVconst [off2] ptr) mem)
  4071  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  4072  	// result: (MOVWUload [off1+int32(off2)] {sym} ptr mem)
  4073  	for {
  4074  		off1 := auxIntToInt32(v.AuxInt)
  4075  		sym := auxToSym(v.Aux)
  4076  		if v_0.Op != OpMIPS64ADDVconst {
  4077  			break
  4078  		}
  4079  		off2 := auxIntToInt64(v_0.AuxInt)
  4080  		ptr := v_0.Args[0]
  4081  		mem := v_1
  4082  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  4083  			break
  4084  		}
  4085  		v.reset(OpMIPS64MOVWUload)
  4086  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  4087  		v.Aux = symToAux(sym)
  4088  		v.AddArg2(ptr, mem)
  4089  		return true
  4090  	}
  4091  	// match: (MOVWUload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem)
  4092  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  4093  	// result: (MOVWUload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem)
  4094  	for {
  4095  		off1 := auxIntToInt32(v.AuxInt)
  4096  		sym1 := auxToSym(v.Aux)
  4097  		if v_0.Op != OpMIPS64MOVVaddr {
  4098  			break
  4099  		}
  4100  		off2 := auxIntToInt32(v_0.AuxInt)
  4101  		sym2 := auxToSym(v_0.Aux)
  4102  		ptr := v_0.Args[0]
  4103  		mem := v_1
  4104  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  4105  			break
  4106  		}
  4107  		v.reset(OpMIPS64MOVWUload)
  4108  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  4109  		v.Aux = symToAux(mergeSym(sym1, sym2))
  4110  		v.AddArg2(ptr, mem)
  4111  		return true
  4112  	}
  4113  	// match: (MOVWUload [off] {sym} (SB) _)
  4114  	// cond: symIsRO(sym)
  4115  	// result: (MOVVconst [int64(read32(sym, int64(off), config.ctxt.Arch.ByteOrder))])
  4116  	for {
  4117  		off := auxIntToInt32(v.AuxInt)
  4118  		sym := auxToSym(v.Aux)
  4119  		if v_0.Op != OpSB || !(symIsRO(sym)) {
  4120  			break
  4121  		}
  4122  		v.reset(OpMIPS64MOVVconst)
  4123  		v.AuxInt = int64ToAuxInt(int64(read32(sym, int64(off), config.ctxt.Arch.ByteOrder)))
  4124  		return true
  4125  	}
  4126  	return false
  4127  }
  4128  func rewriteValueMIPS64_OpMIPS64MOVWUreg(v *Value) bool {
  4129  	v_0 := v.Args[0]
  4130  	// match: (MOVWUreg x:(MOVBUload _ _))
  4131  	// result: (MOVVreg x)
  4132  	for {
  4133  		x := v_0
  4134  		if x.Op != OpMIPS64MOVBUload {
  4135  			break
  4136  		}
  4137  		v.reset(OpMIPS64MOVVreg)
  4138  		v.AddArg(x)
  4139  		return true
  4140  	}
  4141  	// match: (MOVWUreg x:(MOVHUload _ _))
  4142  	// result: (MOVVreg x)
  4143  	for {
  4144  		x := v_0
  4145  		if x.Op != OpMIPS64MOVHUload {
  4146  			break
  4147  		}
  4148  		v.reset(OpMIPS64MOVVreg)
  4149  		v.AddArg(x)
  4150  		return true
  4151  	}
  4152  	// match: (MOVWUreg x:(MOVWUload _ _))
  4153  	// result: (MOVVreg x)
  4154  	for {
  4155  		x := v_0
  4156  		if x.Op != OpMIPS64MOVWUload {
  4157  			break
  4158  		}
  4159  		v.reset(OpMIPS64MOVVreg)
  4160  		v.AddArg(x)
  4161  		return true
  4162  	}
  4163  	// match: (MOVWUreg x:(MOVBUreg _))
  4164  	// result: (MOVVreg x)
  4165  	for {
  4166  		x := v_0
  4167  		if x.Op != OpMIPS64MOVBUreg {
  4168  			break
  4169  		}
  4170  		v.reset(OpMIPS64MOVVreg)
  4171  		v.AddArg(x)
  4172  		return true
  4173  	}
  4174  	// match: (MOVWUreg x:(MOVHUreg _))
  4175  	// result: (MOVVreg x)
  4176  	for {
  4177  		x := v_0
  4178  		if x.Op != OpMIPS64MOVHUreg {
  4179  			break
  4180  		}
  4181  		v.reset(OpMIPS64MOVVreg)
  4182  		v.AddArg(x)
  4183  		return true
  4184  	}
  4185  	// match: (MOVWUreg x:(MOVWUreg _))
  4186  	// result: (MOVVreg x)
  4187  	for {
  4188  		x := v_0
  4189  		if x.Op != OpMIPS64MOVWUreg {
  4190  			break
  4191  		}
  4192  		v.reset(OpMIPS64MOVVreg)
  4193  		v.AddArg(x)
  4194  		return true
  4195  	}
  4196  	// match: (MOVWUreg (MOVVconst [c]))
  4197  	// result: (MOVVconst [int64(uint32(c))])
  4198  	for {
  4199  		if v_0.Op != OpMIPS64MOVVconst {
  4200  			break
  4201  		}
  4202  		c := auxIntToInt64(v_0.AuxInt)
  4203  		v.reset(OpMIPS64MOVVconst)
  4204  		v.AuxInt = int64ToAuxInt(int64(uint32(c)))
  4205  		return true
  4206  	}
  4207  	return false
  4208  }
  4209  func rewriteValueMIPS64_OpMIPS64MOVWload(v *Value) bool {
  4210  	v_1 := v.Args[1]
  4211  	v_0 := v.Args[0]
  4212  	b := v.Block
  4213  	config := b.Func.Config
  4214  	// match: (MOVWload [off1] {sym} (ADDVconst [off2] ptr) mem)
  4215  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  4216  	// result: (MOVWload [off1+int32(off2)] {sym} ptr mem)
  4217  	for {
  4218  		off1 := auxIntToInt32(v.AuxInt)
  4219  		sym := auxToSym(v.Aux)
  4220  		if v_0.Op != OpMIPS64ADDVconst {
  4221  			break
  4222  		}
  4223  		off2 := auxIntToInt64(v_0.AuxInt)
  4224  		ptr := v_0.Args[0]
  4225  		mem := v_1
  4226  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  4227  			break
  4228  		}
  4229  		v.reset(OpMIPS64MOVWload)
  4230  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  4231  		v.Aux = symToAux(sym)
  4232  		v.AddArg2(ptr, mem)
  4233  		return true
  4234  	}
  4235  	// match: (MOVWload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem)
  4236  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  4237  	// result: (MOVWload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem)
  4238  	for {
  4239  		off1 := auxIntToInt32(v.AuxInt)
  4240  		sym1 := auxToSym(v.Aux)
  4241  		if v_0.Op != OpMIPS64MOVVaddr {
  4242  			break
  4243  		}
  4244  		off2 := auxIntToInt32(v_0.AuxInt)
  4245  		sym2 := auxToSym(v_0.Aux)
  4246  		ptr := v_0.Args[0]
  4247  		mem := v_1
  4248  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  4249  			break
  4250  		}
  4251  		v.reset(OpMIPS64MOVWload)
  4252  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  4253  		v.Aux = symToAux(mergeSym(sym1, sym2))
  4254  		v.AddArg2(ptr, mem)
  4255  		return true
  4256  	}
  4257  	// match: (MOVWload [off] {sym} (SB) _)
  4258  	// cond: symIsRO(sym)
  4259  	// result: (MOVVconst [int64(int32(read32(sym, int64(off), config.ctxt.Arch.ByteOrder)))])
  4260  	for {
  4261  		off := auxIntToInt32(v.AuxInt)
  4262  		sym := auxToSym(v.Aux)
  4263  		if v_0.Op != OpSB || !(symIsRO(sym)) {
  4264  			break
  4265  		}
  4266  		v.reset(OpMIPS64MOVVconst)
  4267  		v.AuxInt = int64ToAuxInt(int64(int32(read32(sym, int64(off), config.ctxt.Arch.ByteOrder))))
  4268  		return true
  4269  	}
  4270  	return false
  4271  }
  4272  func rewriteValueMIPS64_OpMIPS64MOVWreg(v *Value) bool {
  4273  	v_0 := v.Args[0]
  4274  	// match: (MOVWreg x:(MOVBload _ _))
  4275  	// result: (MOVVreg x)
  4276  	for {
  4277  		x := v_0
  4278  		if x.Op != OpMIPS64MOVBload {
  4279  			break
  4280  		}
  4281  		v.reset(OpMIPS64MOVVreg)
  4282  		v.AddArg(x)
  4283  		return true
  4284  	}
  4285  	// match: (MOVWreg x:(MOVBUload _ _))
  4286  	// result: (MOVVreg x)
  4287  	for {
  4288  		x := v_0
  4289  		if x.Op != OpMIPS64MOVBUload {
  4290  			break
  4291  		}
  4292  		v.reset(OpMIPS64MOVVreg)
  4293  		v.AddArg(x)
  4294  		return true
  4295  	}
  4296  	// match: (MOVWreg x:(MOVHload _ _))
  4297  	// result: (MOVVreg x)
  4298  	for {
  4299  		x := v_0
  4300  		if x.Op != OpMIPS64MOVHload {
  4301  			break
  4302  		}
  4303  		v.reset(OpMIPS64MOVVreg)
  4304  		v.AddArg(x)
  4305  		return true
  4306  	}
  4307  	// match: (MOVWreg x:(MOVHUload _ _))
  4308  	// result: (MOVVreg x)
  4309  	for {
  4310  		x := v_0
  4311  		if x.Op != OpMIPS64MOVHUload {
  4312  			break
  4313  		}
  4314  		v.reset(OpMIPS64MOVVreg)
  4315  		v.AddArg(x)
  4316  		return true
  4317  	}
  4318  	// match: (MOVWreg x:(MOVWload _ _))
  4319  	// result: (MOVVreg x)
  4320  	for {
  4321  		x := v_0
  4322  		if x.Op != OpMIPS64MOVWload {
  4323  			break
  4324  		}
  4325  		v.reset(OpMIPS64MOVVreg)
  4326  		v.AddArg(x)
  4327  		return true
  4328  	}
  4329  	// match: (MOVWreg x:(MOVBreg _))
  4330  	// result: (MOVVreg x)
  4331  	for {
  4332  		x := v_0
  4333  		if x.Op != OpMIPS64MOVBreg {
  4334  			break
  4335  		}
  4336  		v.reset(OpMIPS64MOVVreg)
  4337  		v.AddArg(x)
  4338  		return true
  4339  	}
  4340  	// match: (MOVWreg x:(MOVBUreg _))
  4341  	// result: (MOVVreg x)
  4342  	for {
  4343  		x := v_0
  4344  		if x.Op != OpMIPS64MOVBUreg {
  4345  			break
  4346  		}
  4347  		v.reset(OpMIPS64MOVVreg)
  4348  		v.AddArg(x)
  4349  		return true
  4350  	}
  4351  	// match: (MOVWreg x:(MOVHreg _))
  4352  	// result: (MOVVreg x)
  4353  	for {
  4354  		x := v_0
  4355  		if x.Op != OpMIPS64MOVHreg {
  4356  			break
  4357  		}
  4358  		v.reset(OpMIPS64MOVVreg)
  4359  		v.AddArg(x)
  4360  		return true
  4361  	}
  4362  	// match: (MOVWreg x:(MOVWreg _))
  4363  	// result: (MOVVreg x)
  4364  	for {
  4365  		x := v_0
  4366  		if x.Op != OpMIPS64MOVWreg {
  4367  			break
  4368  		}
  4369  		v.reset(OpMIPS64MOVVreg)
  4370  		v.AddArg(x)
  4371  		return true
  4372  	}
  4373  	// match: (MOVWreg (MOVVconst [c]))
  4374  	// result: (MOVVconst [int64(int32(c))])
  4375  	for {
  4376  		if v_0.Op != OpMIPS64MOVVconst {
  4377  			break
  4378  		}
  4379  		c := auxIntToInt64(v_0.AuxInt)
  4380  		v.reset(OpMIPS64MOVVconst)
  4381  		v.AuxInt = int64ToAuxInt(int64(int32(c)))
  4382  		return true
  4383  	}
  4384  	return false
  4385  }
  4386  func rewriteValueMIPS64_OpMIPS64MOVWstore(v *Value) bool {
  4387  	v_2 := v.Args[2]
  4388  	v_1 := v.Args[1]
  4389  	v_0 := v.Args[0]
  4390  	b := v.Block
  4391  	config := b.Func.Config
  4392  	// match: (MOVWstore [off] {sym} ptr (MOVWfpgp val) mem)
  4393  	// result: (MOVFstore [off] {sym} ptr val mem)
  4394  	for {
  4395  		off := auxIntToInt32(v.AuxInt)
  4396  		sym := auxToSym(v.Aux)
  4397  		ptr := v_0
  4398  		if v_1.Op != OpMIPS64MOVWfpgp {
  4399  			break
  4400  		}
  4401  		val := v_1.Args[0]
  4402  		mem := v_2
  4403  		v.reset(OpMIPS64MOVFstore)
  4404  		v.AuxInt = int32ToAuxInt(off)
  4405  		v.Aux = symToAux(sym)
  4406  		v.AddArg3(ptr, val, mem)
  4407  		return true
  4408  	}
  4409  	// match: (MOVWstore [off1] {sym} (ADDVconst [off2] ptr) val mem)
  4410  	// cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  4411  	// result: (MOVWstore [off1+int32(off2)] {sym} ptr val mem)
  4412  	for {
  4413  		off1 := auxIntToInt32(v.AuxInt)
  4414  		sym := auxToSym(v.Aux)
  4415  		if v_0.Op != OpMIPS64ADDVconst {
  4416  			break
  4417  		}
  4418  		off2 := auxIntToInt64(v_0.AuxInt)
  4419  		ptr := v_0.Args[0]
  4420  		val := v_1
  4421  		mem := v_2
  4422  		if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  4423  			break
  4424  		}
  4425  		v.reset(OpMIPS64MOVWstore)
  4426  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  4427  		v.Aux = symToAux(sym)
  4428  		v.AddArg3(ptr, val, mem)
  4429  		return true
  4430  	}
  4431  	// match: (MOVWstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem)
  4432  	// cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
  4433  	// result: (MOVWstore [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem)
  4434  	for {
  4435  		off1 := auxIntToInt32(v.AuxInt)
  4436  		sym1 := auxToSym(v.Aux)
  4437  		if v_0.Op != OpMIPS64MOVVaddr {
  4438  			break
  4439  		}
  4440  		off2 := auxIntToInt32(v_0.AuxInt)
  4441  		sym2 := auxToSym(v_0.Aux)
  4442  		ptr := v_0.Args[0]
  4443  		val := v_1
  4444  		mem := v_2
  4445  		if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
  4446  			break
  4447  		}
  4448  		v.reset(OpMIPS64MOVWstore)
  4449  		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
  4450  		v.Aux = symToAux(mergeSym(sym1, sym2))
  4451  		v.AddArg3(ptr, val, mem)
  4452  		return true
  4453  	}
  4454  	// match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem)
  4455  	// result: (MOVWstore [off] {sym} ptr x mem)
  4456  	for {
  4457  		off := auxIntToInt32(v.AuxInt)
  4458  		sym := auxToSym(v.Aux)
  4459  		ptr := v_0
  4460  		if v_1.Op != OpMIPS64MOVWreg {
  4461  			break
  4462  		}
  4463  		x := v_1.Args[0]
  4464  		mem := v_2
  4465  		v.reset(OpMIPS64MOVWstore)
  4466  		v.AuxInt = int32ToAuxInt(off)
  4467  		v.Aux = symToAux(sym)
  4468  		v.AddArg3(ptr, x, mem)
  4469  		return true
  4470  	}
  4471  	// match: (MOVWstore [off] {sym} ptr (MOVWUreg x) mem)
  4472  	// result: (MOVWstore [off] {sym} ptr x mem)
  4473  	for {
  4474  		off := auxIntToInt32(v.AuxInt)
  4475  		sym := auxToSym(v.Aux)
  4476  		ptr := v_0
  4477  		if v_1.Op != OpMIPS64MOVWUreg {
  4478  			break
  4479  		}
  4480  		x := v_1.Args[0]
  4481  		mem := v_2
  4482  		v.reset(OpMIPS64MOVWstore)
  4483  		v.AuxInt = int32ToAuxInt(off)
  4484  		v.Aux = symToAux(sym)
  4485  		v.AddArg3(ptr, x, mem)
  4486  		return true
  4487  	}
  4488  	return false
  4489  }
  4490  func rewriteValueMIPS64_OpMIPS64NEGV(v *Value) bool {
  4491  	v_0 := v.Args[0]
  4492  	// match: (NEGV (SUBV x y))
  4493  	// result: (SUBV y x)
  4494  	for {
  4495  		if v_0.Op != OpMIPS64SUBV {
  4496  			break
  4497  		}
  4498  		y := v_0.Args[1]
  4499  		x := v_0.Args[0]
  4500  		v.reset(OpMIPS64SUBV)
  4501  		v.AddArg2(y, x)
  4502  		return true
  4503  	}
  4504  	// match: (NEGV (NEGV x))
  4505  	// result: x
  4506  	for {
  4507  		if v_0.Op != OpMIPS64NEGV {
  4508  			break
  4509  		}
  4510  		x := v_0.Args[0]
  4511  		v.copyOf(x)
  4512  		return true
  4513  	}
  4514  	// match: (NEGV (MOVVconst [c]))
  4515  	// result: (MOVVconst [-c])
  4516  	for {
  4517  		if v_0.Op != OpMIPS64MOVVconst {
  4518  			break
  4519  		}
  4520  		c := auxIntToInt64(v_0.AuxInt)
  4521  		v.reset(OpMIPS64MOVVconst)
  4522  		v.AuxInt = int64ToAuxInt(-c)
  4523  		return true
  4524  	}
  4525  	return false
  4526  }
  4527  func rewriteValueMIPS64_OpMIPS64OR(v *Value) bool {
  4528  	v_1 := v.Args[1]
  4529  	v_0 := v.Args[0]
  4530  	// match: (OR x (MOVVconst [c]))
  4531  	// cond: is32Bit(c)
  4532  	// result: (ORconst [c] x)
  4533  	for {
  4534  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4535  			x := v_0
  4536  			if v_1.Op != OpMIPS64MOVVconst {
  4537  				continue
  4538  			}
  4539  			c := auxIntToInt64(v_1.AuxInt)
  4540  			if !(is32Bit(c)) {
  4541  				continue
  4542  			}
  4543  			v.reset(OpMIPS64ORconst)
  4544  			v.AuxInt = int64ToAuxInt(c)
  4545  			v.AddArg(x)
  4546  			return true
  4547  		}
  4548  		break
  4549  	}
  4550  	// match: (OR x x)
  4551  	// result: x
  4552  	for {
  4553  		x := v_0
  4554  		if x != v_1 {
  4555  			break
  4556  		}
  4557  		v.copyOf(x)
  4558  		return true
  4559  	}
  4560  	return false
  4561  }
  4562  func rewriteValueMIPS64_OpMIPS64ORconst(v *Value) bool {
  4563  	v_0 := v.Args[0]
  4564  	// match: (ORconst [0] x)
  4565  	// result: x
  4566  	for {
  4567  		if auxIntToInt64(v.AuxInt) != 0 {
  4568  			break
  4569  		}
  4570  		x := v_0
  4571  		v.copyOf(x)
  4572  		return true
  4573  	}
  4574  	// match: (ORconst [-1] _)
  4575  	// result: (MOVVconst [-1])
  4576  	for {
  4577  		if auxIntToInt64(v.AuxInt) != -1 {
  4578  			break
  4579  		}
  4580  		v.reset(OpMIPS64MOVVconst)
  4581  		v.AuxInt = int64ToAuxInt(-1)
  4582  		return true
  4583  	}
  4584  	// match: (ORconst [c] (MOVVconst [d]))
  4585  	// result: (MOVVconst [c|d])
  4586  	for {
  4587  		c := auxIntToInt64(v.AuxInt)
  4588  		if v_0.Op != OpMIPS64MOVVconst {
  4589  			break
  4590  		}
  4591  		d := auxIntToInt64(v_0.AuxInt)
  4592  		v.reset(OpMIPS64MOVVconst)
  4593  		v.AuxInt = int64ToAuxInt(c | d)
  4594  		return true
  4595  	}
  4596  	// match: (ORconst [c] (ORconst [d] x))
  4597  	// cond: is32Bit(c|d)
  4598  	// result: (ORconst [c|d] x)
  4599  	for {
  4600  		c := auxIntToInt64(v.AuxInt)
  4601  		if v_0.Op != OpMIPS64ORconst {
  4602  			break
  4603  		}
  4604  		d := auxIntToInt64(v_0.AuxInt)
  4605  		x := v_0.Args[0]
  4606  		if !(is32Bit(c | d)) {
  4607  			break
  4608  		}
  4609  		v.reset(OpMIPS64ORconst)
  4610  		v.AuxInt = int64ToAuxInt(c | d)
  4611  		v.AddArg(x)
  4612  		return true
  4613  	}
  4614  	return false
  4615  }
  4616  func rewriteValueMIPS64_OpMIPS64SGT(v *Value) bool {
  4617  	v_1 := v.Args[1]
  4618  	v_0 := v.Args[0]
  4619  	// match: (SGT (MOVVconst [c]) x)
  4620  	// cond: is32Bit(c)
  4621  	// result: (SGTconst [c] x)
  4622  	for {
  4623  		if v_0.Op != OpMIPS64MOVVconst {
  4624  			break
  4625  		}
  4626  		c := auxIntToInt64(v_0.AuxInt)
  4627  		x := v_1
  4628  		if !(is32Bit(c)) {
  4629  			break
  4630  		}
  4631  		v.reset(OpMIPS64SGTconst)
  4632  		v.AuxInt = int64ToAuxInt(c)
  4633  		v.AddArg(x)
  4634  		return true
  4635  	}
  4636  	// match: (SGT x x)
  4637  	// result: (MOVVconst [0])
  4638  	for {
  4639  		x := v_0
  4640  		if x != v_1 {
  4641  			break
  4642  		}
  4643  		v.reset(OpMIPS64MOVVconst)
  4644  		v.AuxInt = int64ToAuxInt(0)
  4645  		return true
  4646  	}
  4647  	return false
  4648  }
  4649  func rewriteValueMIPS64_OpMIPS64SGTU(v *Value) bool {
  4650  	v_1 := v.Args[1]
  4651  	v_0 := v.Args[0]
  4652  	// match: (SGTU (MOVVconst [c]) x)
  4653  	// cond: is32Bit(c)
  4654  	// result: (SGTUconst [c] x)
  4655  	for {
  4656  		if v_0.Op != OpMIPS64MOVVconst {
  4657  			break
  4658  		}
  4659  		c := auxIntToInt64(v_0.AuxInt)
  4660  		x := v_1
  4661  		if !(is32Bit(c)) {
  4662  			break
  4663  		}
  4664  		v.reset(OpMIPS64SGTUconst)
  4665  		v.AuxInt = int64ToAuxInt(c)
  4666  		v.AddArg(x)
  4667  		return true
  4668  	}
  4669  	// match: (SGTU x x)
  4670  	// result: (MOVVconst [0])
  4671  	for {
  4672  		x := v_0
  4673  		if x != v_1 {
  4674  			break
  4675  		}
  4676  		v.reset(OpMIPS64MOVVconst)
  4677  		v.AuxInt = int64ToAuxInt(0)
  4678  		return true
  4679  	}
  4680  	return false
  4681  }
  4682  func rewriteValueMIPS64_OpMIPS64SGTUconst(v *Value) bool {
  4683  	v_0 := v.Args[0]
  4684  	// match: (SGTUconst [c] (MOVVconst [d]))
  4685  	// cond: uint64(c)>uint64(d)
  4686  	// result: (MOVVconst [1])
  4687  	for {
  4688  		c := auxIntToInt64(v.AuxInt)
  4689  		if v_0.Op != OpMIPS64MOVVconst {
  4690  			break
  4691  		}
  4692  		d := auxIntToInt64(v_0.AuxInt)
  4693  		if !(uint64(c) > uint64(d)) {
  4694  			break
  4695  		}
  4696  		v.reset(OpMIPS64MOVVconst)
  4697  		v.AuxInt = int64ToAuxInt(1)
  4698  		return true
  4699  	}
  4700  	// match: (SGTUconst [c] (MOVVconst [d]))
  4701  	// cond: uint64(c)<=uint64(d)
  4702  	// result: (MOVVconst [0])
  4703  	for {
  4704  		c := auxIntToInt64(v.AuxInt)
  4705  		if v_0.Op != OpMIPS64MOVVconst {
  4706  			break
  4707  		}
  4708  		d := auxIntToInt64(v_0.AuxInt)
  4709  		if !(uint64(c) <= uint64(d)) {
  4710  			break
  4711  		}
  4712  		v.reset(OpMIPS64MOVVconst)
  4713  		v.AuxInt = int64ToAuxInt(0)
  4714  		return true
  4715  	}
  4716  	// match: (SGTUconst [c] (MOVBUreg _))
  4717  	// cond: 0xff < uint64(c)
  4718  	// result: (MOVVconst [1])
  4719  	for {
  4720  		c := auxIntToInt64(v.AuxInt)
  4721  		if v_0.Op != OpMIPS64MOVBUreg || !(0xff < uint64(c)) {
  4722  			break
  4723  		}
  4724  		v.reset(OpMIPS64MOVVconst)
  4725  		v.AuxInt = int64ToAuxInt(1)
  4726  		return true
  4727  	}
  4728  	// match: (SGTUconst [c] (MOVHUreg _))
  4729  	// cond: 0xffff < uint64(c)
  4730  	// result: (MOVVconst [1])
  4731  	for {
  4732  		c := auxIntToInt64(v.AuxInt)
  4733  		if v_0.Op != OpMIPS64MOVHUreg || !(0xffff < uint64(c)) {
  4734  			break
  4735  		}
  4736  		v.reset(OpMIPS64MOVVconst)
  4737  		v.AuxInt = int64ToAuxInt(1)
  4738  		return true
  4739  	}
  4740  	// match: (SGTUconst [c] (ANDconst [m] _))
  4741  	// cond: uint64(m) < uint64(c)
  4742  	// result: (MOVVconst [1])
  4743  	for {
  4744  		c := auxIntToInt64(v.AuxInt)
  4745  		if v_0.Op != OpMIPS64ANDconst {
  4746  			break
  4747  		}
  4748  		m := auxIntToInt64(v_0.AuxInt)
  4749  		if !(uint64(m) < uint64(c)) {
  4750  			break
  4751  		}
  4752  		v.reset(OpMIPS64MOVVconst)
  4753  		v.AuxInt = int64ToAuxInt(1)
  4754  		return true
  4755  	}
  4756  	// match: (SGTUconst [c] (SRLVconst _ [d]))
  4757  	// cond: 0 < d && d <= 63 && 0xffffffffffffffff>>uint64(d) < uint64(c)
  4758  	// result: (MOVVconst [1])
  4759  	for {
  4760  		c := auxIntToInt64(v.AuxInt)
  4761  		if v_0.Op != OpMIPS64SRLVconst {
  4762  			break
  4763  		}
  4764  		d := auxIntToInt64(v_0.AuxInt)
  4765  		if !(0 < d && d <= 63 && 0xffffffffffffffff>>uint64(d) < uint64(c)) {
  4766  			break
  4767  		}
  4768  		v.reset(OpMIPS64MOVVconst)
  4769  		v.AuxInt = int64ToAuxInt(1)
  4770  		return true
  4771  	}
  4772  	return false
  4773  }
  4774  func rewriteValueMIPS64_OpMIPS64SGTconst(v *Value) bool {
  4775  	v_0 := v.Args[0]
  4776  	// match: (SGTconst [c] (MOVVconst [d]))
  4777  	// cond: c>d
  4778  	// result: (MOVVconst [1])
  4779  	for {
  4780  		c := auxIntToInt64(v.AuxInt)
  4781  		if v_0.Op != OpMIPS64MOVVconst {
  4782  			break
  4783  		}
  4784  		d := auxIntToInt64(v_0.AuxInt)
  4785  		if !(c > d) {
  4786  			break
  4787  		}
  4788  		v.reset(OpMIPS64MOVVconst)
  4789  		v.AuxInt = int64ToAuxInt(1)
  4790  		return true
  4791  	}
  4792  	// match: (SGTconst [c] (MOVVconst [d]))
  4793  	// cond: c<=d
  4794  	// result: (MOVVconst [0])
  4795  	for {
  4796  		c := auxIntToInt64(v.AuxInt)
  4797  		if v_0.Op != OpMIPS64MOVVconst {
  4798  			break
  4799  		}
  4800  		d := auxIntToInt64(v_0.AuxInt)
  4801  		if !(c <= d) {
  4802  			break
  4803  		}
  4804  		v.reset(OpMIPS64MOVVconst)
  4805  		v.AuxInt = int64ToAuxInt(0)
  4806  		return true
  4807  	}
  4808  	// match: (SGTconst [c] (MOVBreg _))
  4809  	// cond: 0x7f < c
  4810  	// result: (MOVVconst [1])
  4811  	for {
  4812  		c := auxIntToInt64(v.AuxInt)
  4813  		if v_0.Op != OpMIPS64MOVBreg || !(0x7f < c) {
  4814  			break
  4815  		}
  4816  		v.reset(OpMIPS64MOVVconst)
  4817  		v.AuxInt = int64ToAuxInt(1)
  4818  		return true
  4819  	}
  4820  	// match: (SGTconst [c] (MOVBreg _))
  4821  	// cond: c <= -0x80
  4822  	// result: (MOVVconst [0])
  4823  	for {
  4824  		c := auxIntToInt64(v.AuxInt)
  4825  		if v_0.Op != OpMIPS64MOVBreg || !(c <= -0x80) {
  4826  			break
  4827  		}
  4828  		v.reset(OpMIPS64MOVVconst)
  4829  		v.AuxInt = int64ToAuxInt(0)
  4830  		return true
  4831  	}
  4832  	// match: (SGTconst [c] (MOVBUreg _))
  4833  	// cond: 0xff < c
  4834  	// result: (MOVVconst [1])
  4835  	for {
  4836  		c := auxIntToInt64(v.AuxInt)
  4837  		if v_0.Op != OpMIPS64MOVBUreg || !(0xff < c) {
  4838  			break
  4839  		}
  4840  		v.reset(OpMIPS64MOVVconst)
  4841  		v.AuxInt = int64ToAuxInt(1)
  4842  		return true
  4843  	}
  4844  	// match: (SGTconst [c] (MOVBUreg _))
  4845  	// cond: c < 0
  4846  	// result: (MOVVconst [0])
  4847  	for {
  4848  		c := auxIntToInt64(v.AuxInt)
  4849  		if v_0.Op != OpMIPS64MOVBUreg || !(c < 0) {
  4850  			break
  4851  		}
  4852  		v.reset(OpMIPS64MOVVconst)
  4853  		v.AuxInt = int64ToAuxInt(0)
  4854  		return true
  4855  	}
  4856  	// match: (SGTconst [c] (MOVHreg _))
  4857  	// cond: 0x7fff < c
  4858  	// result: (MOVVconst [1])
  4859  	for {
  4860  		c := auxIntToInt64(v.AuxInt)
  4861  		if v_0.Op != OpMIPS64MOVHreg || !(0x7fff < c) {
  4862  			break
  4863  		}
  4864  		v.reset(OpMIPS64MOVVconst)
  4865  		v.AuxInt = int64ToAuxInt(1)
  4866  		return true
  4867  	}
  4868  	// match: (SGTconst [c] (MOVHreg _))
  4869  	// cond: c <= -0x8000
  4870  	// result: (MOVVconst [0])
  4871  	for {
  4872  		c := auxIntToInt64(v.AuxInt)
  4873  		if v_0.Op != OpMIPS64MOVHreg || !(c <= -0x8000) {
  4874  			break
  4875  		}
  4876  		v.reset(OpMIPS64MOVVconst)
  4877  		v.AuxInt = int64ToAuxInt(0)
  4878  		return true
  4879  	}
  4880  	// match: (SGTconst [c] (MOVHUreg _))
  4881  	// cond: 0xffff < c
  4882  	// result: (MOVVconst [1])
  4883  	for {
  4884  		c := auxIntToInt64(v.AuxInt)
  4885  		if v_0.Op != OpMIPS64MOVHUreg || !(0xffff < c) {
  4886  			break
  4887  		}
  4888  		v.reset(OpMIPS64MOVVconst)
  4889  		v.AuxInt = int64ToAuxInt(1)
  4890  		return true
  4891  	}
  4892  	// match: (SGTconst [c] (MOVHUreg _))
  4893  	// cond: c < 0
  4894  	// result: (MOVVconst [0])
  4895  	for {
  4896  		c := auxIntToInt64(v.AuxInt)
  4897  		if v_0.Op != OpMIPS64MOVHUreg || !(c < 0) {
  4898  			break
  4899  		}
  4900  		v.reset(OpMIPS64MOVVconst)
  4901  		v.AuxInt = int64ToAuxInt(0)
  4902  		return true
  4903  	}
  4904  	// match: (SGTconst [c] (MOVWUreg _))
  4905  	// cond: c < 0
  4906  	// result: (MOVVconst [0])
  4907  	for {
  4908  		c := auxIntToInt64(v.AuxInt)
  4909  		if v_0.Op != OpMIPS64MOVWUreg || !(c < 0) {
  4910  			break
  4911  		}
  4912  		v.reset(OpMIPS64MOVVconst)
  4913  		v.AuxInt = int64ToAuxInt(0)
  4914  		return true
  4915  	}
  4916  	// match: (SGTconst [c] (ANDconst [m] _))
  4917  	// cond: 0 <= m && m < c
  4918  	// result: (MOVVconst [1])
  4919  	for {
  4920  		c := auxIntToInt64(v.AuxInt)
  4921  		if v_0.Op != OpMIPS64ANDconst {
  4922  			break
  4923  		}
  4924  		m := auxIntToInt64(v_0.AuxInt)
  4925  		if !(0 <= m && m < c) {
  4926  			break
  4927  		}
  4928  		v.reset(OpMIPS64MOVVconst)
  4929  		v.AuxInt = int64ToAuxInt(1)
  4930  		return true
  4931  	}
  4932  	// match: (SGTconst [c] (SRLVconst _ [d]))
  4933  	// cond: 0 <= c && 0 < d && d <= 63 && 0xffffffffffffffff>>uint64(d) < uint64(c)
  4934  	// result: (MOVVconst [1])
  4935  	for {
  4936  		c := auxIntToInt64(v.AuxInt)
  4937  		if v_0.Op != OpMIPS64SRLVconst {
  4938  			break
  4939  		}
  4940  		d := auxIntToInt64(v_0.AuxInt)
  4941  		if !(0 <= c && 0 < d && d <= 63 && 0xffffffffffffffff>>uint64(d) < uint64(c)) {
  4942  			break
  4943  		}
  4944  		v.reset(OpMIPS64MOVVconst)
  4945  		v.AuxInt = int64ToAuxInt(1)
  4946  		return true
  4947  	}
  4948  	return false
  4949  }
  4950  func rewriteValueMIPS64_OpMIPS64SLLV(v *Value) bool {
  4951  	v_1 := v.Args[1]
  4952  	v_0 := v.Args[0]
  4953  	// match: (SLLV _ (MOVVconst [c]))
  4954  	// cond: uint64(c)>=64
  4955  	// result: (MOVVconst [0])
  4956  	for {
  4957  		if v_1.Op != OpMIPS64MOVVconst {
  4958  			break
  4959  		}
  4960  		c := auxIntToInt64(v_1.AuxInt)
  4961  		if !(uint64(c) >= 64) {
  4962  			break
  4963  		}
  4964  		v.reset(OpMIPS64MOVVconst)
  4965  		v.AuxInt = int64ToAuxInt(0)
  4966  		return true
  4967  	}
  4968  	// match: (SLLV x (MOVVconst [c]))
  4969  	// result: (SLLVconst x [c])
  4970  	for {
  4971  		x := v_0
  4972  		if v_1.Op != OpMIPS64MOVVconst {
  4973  			break
  4974  		}
  4975  		c := auxIntToInt64(v_1.AuxInt)
  4976  		v.reset(OpMIPS64SLLVconst)
  4977  		v.AuxInt = int64ToAuxInt(c)
  4978  		v.AddArg(x)
  4979  		return true
  4980  	}
  4981  	return false
  4982  }
  4983  func rewriteValueMIPS64_OpMIPS64SLLVconst(v *Value) bool {
  4984  	v_0 := v.Args[0]
  4985  	// match: (SLLVconst [c] (MOVVconst [d]))
  4986  	// result: (MOVVconst [d<<uint64(c)])
  4987  	for {
  4988  		c := auxIntToInt64(v.AuxInt)
  4989  		if v_0.Op != OpMIPS64MOVVconst {
  4990  			break
  4991  		}
  4992  		d := auxIntToInt64(v_0.AuxInt)
  4993  		v.reset(OpMIPS64MOVVconst)
  4994  		v.AuxInt = int64ToAuxInt(d << uint64(c))
  4995  		return true
  4996  	}
  4997  	return false
  4998  }
  4999  func rewriteValueMIPS64_OpMIPS64SRAV(v *Value) bool {
  5000  	v_1 := v.Args[1]
  5001  	v_0 := v.Args[0]
  5002  	// match: (SRAV x (MOVVconst [c]))
  5003  	// cond: uint64(c)>=64
  5004  	// result: (SRAVconst x [63])
  5005  	for {
  5006  		x := v_0
  5007  		if v_1.Op != OpMIPS64MOVVconst {
  5008  			break
  5009  		}
  5010  		c := auxIntToInt64(v_1.AuxInt)
  5011  		if !(uint64(c) >= 64) {
  5012  			break
  5013  		}
  5014  		v.reset(OpMIPS64SRAVconst)
  5015  		v.AuxInt = int64ToAuxInt(63)
  5016  		v.AddArg(x)
  5017  		return true
  5018  	}
  5019  	// match: (SRAV x (MOVVconst [c]))
  5020  	// result: (SRAVconst x [c])
  5021  	for {
  5022  		x := v_0
  5023  		if v_1.Op != OpMIPS64MOVVconst {
  5024  			break
  5025  		}
  5026  		c := auxIntToInt64(v_1.AuxInt)
  5027  		v.reset(OpMIPS64SRAVconst)
  5028  		v.AuxInt = int64ToAuxInt(c)
  5029  		v.AddArg(x)
  5030  		return true
  5031  	}
  5032  	return false
  5033  }
  5034  func rewriteValueMIPS64_OpMIPS64SRAVconst(v *Value) bool {
  5035  	v_0 := v.Args[0]
  5036  	// match: (SRAVconst [c] (MOVVconst [d]))
  5037  	// result: (MOVVconst [d>>uint64(c)])
  5038  	for {
  5039  		c := auxIntToInt64(v.AuxInt)
  5040  		if v_0.Op != OpMIPS64MOVVconst {
  5041  			break
  5042  		}
  5043  		d := auxIntToInt64(v_0.AuxInt)
  5044  		v.reset(OpMIPS64MOVVconst)
  5045  		v.AuxInt = int64ToAuxInt(d >> uint64(c))
  5046  		return true
  5047  	}
  5048  	return false
  5049  }
  5050  func rewriteValueMIPS64_OpMIPS64SRLV(v *Value) bool {
  5051  	v_1 := v.Args[1]
  5052  	v_0 := v.Args[0]
  5053  	// match: (SRLV _ (MOVVconst [c]))
  5054  	// cond: uint64(c)>=64
  5055  	// result: (MOVVconst [0])
  5056  	for {
  5057  		if v_1.Op != OpMIPS64MOVVconst {
  5058  			break
  5059  		}
  5060  		c := auxIntToInt64(v_1.AuxInt)
  5061  		if !(uint64(c) >= 64) {
  5062  			break
  5063  		}
  5064  		v.reset(OpMIPS64MOVVconst)
  5065  		v.AuxInt = int64ToAuxInt(0)
  5066  		return true
  5067  	}
  5068  	// match: (SRLV x (MOVVconst [c]))
  5069  	// result: (SRLVconst x [c])
  5070  	for {
  5071  		x := v_0
  5072  		if v_1.Op != OpMIPS64MOVVconst {
  5073  			break
  5074  		}
  5075  		c := auxIntToInt64(v_1.AuxInt)
  5076  		v.reset(OpMIPS64SRLVconst)
  5077  		v.AuxInt = int64ToAuxInt(c)
  5078  		v.AddArg(x)
  5079  		return true
  5080  	}
  5081  	return false
  5082  }
  5083  func rewriteValueMIPS64_OpMIPS64SRLVconst(v *Value) bool {
  5084  	v_0 := v.Args[0]
  5085  	// match: (SRLVconst [c] (MOVVconst [d]))
  5086  	// result: (MOVVconst [int64(uint64(d)>>uint64(c))])
  5087  	for {
  5088  		c := auxIntToInt64(v.AuxInt)
  5089  		if v_0.Op != OpMIPS64MOVVconst {
  5090  			break
  5091  		}
  5092  		d := auxIntToInt64(v_0.AuxInt)
  5093  		v.reset(OpMIPS64MOVVconst)
  5094  		v.AuxInt = int64ToAuxInt(int64(uint64(d) >> uint64(c)))
  5095  		return true
  5096  	}
  5097  	return false
  5098  }
  5099  func rewriteValueMIPS64_OpMIPS64SUBV(v *Value) bool {
  5100  	v_1 := v.Args[1]
  5101  	v_0 := v.Args[0]
  5102  	// match: (SUBV x (MOVVconst [c]))
  5103  	// cond: is32Bit(c)
  5104  	// result: (SUBVconst [c] x)
  5105  	for {
  5106  		x := v_0
  5107  		if v_1.Op != OpMIPS64MOVVconst {
  5108  			break
  5109  		}
  5110  		c := auxIntToInt64(v_1.AuxInt)
  5111  		if !(is32Bit(c)) {
  5112  			break
  5113  		}
  5114  		v.reset(OpMIPS64SUBVconst)
  5115  		v.AuxInt = int64ToAuxInt(c)
  5116  		v.AddArg(x)
  5117  		return true
  5118  	}
  5119  	// match: (SUBV x (NEGV y))
  5120  	// result: (ADDV x y)
  5121  	for {
  5122  		x := v_0
  5123  		if v_1.Op != OpMIPS64NEGV {
  5124  			break
  5125  		}
  5126  		y := v_1.Args[0]
  5127  		v.reset(OpMIPS64ADDV)
  5128  		v.AddArg2(x, y)
  5129  		return true
  5130  	}
  5131  	// match: (SUBV x x)
  5132  	// result: (MOVVconst [0])
  5133  	for {
  5134  		x := v_0
  5135  		if x != v_1 {
  5136  			break
  5137  		}
  5138  		v.reset(OpMIPS64MOVVconst)
  5139  		v.AuxInt = int64ToAuxInt(0)
  5140  		return true
  5141  	}
  5142  	// match: (SUBV (MOVVconst [0]) x)
  5143  	// result: (NEGV x)
  5144  	for {
  5145  		if v_0.Op != OpMIPS64MOVVconst || auxIntToInt64(v_0.AuxInt) != 0 {
  5146  			break
  5147  		}
  5148  		x := v_1
  5149  		v.reset(OpMIPS64NEGV)
  5150  		v.AddArg(x)
  5151  		return true
  5152  	}
  5153  	return false
  5154  }
  5155  func rewriteValueMIPS64_OpMIPS64SUBVconst(v *Value) bool {
  5156  	v_0 := v.Args[0]
  5157  	// match: (SUBVconst [0] x)
  5158  	// result: x
  5159  	for {
  5160  		if auxIntToInt64(v.AuxInt) != 0 {
  5161  			break
  5162  		}
  5163  		x := v_0
  5164  		v.copyOf(x)
  5165  		return true
  5166  	}
  5167  	// match: (SUBVconst [c] (MOVVconst [d]))
  5168  	// result: (MOVVconst [d-c])
  5169  	for {
  5170  		c := auxIntToInt64(v.AuxInt)
  5171  		if v_0.Op != OpMIPS64MOVVconst {
  5172  			break
  5173  		}
  5174  		d := auxIntToInt64(v_0.AuxInt)
  5175  		v.reset(OpMIPS64MOVVconst)
  5176  		v.AuxInt = int64ToAuxInt(d - c)
  5177  		return true
  5178  	}
  5179  	// match: (SUBVconst [c] (SUBVconst [d] x))
  5180  	// cond: is32Bit(-c-d)
  5181  	// result: (ADDVconst [-c-d] x)
  5182  	for {
  5183  		c := auxIntToInt64(v.AuxInt)
  5184  		if v_0.Op != OpMIPS64SUBVconst {
  5185  			break
  5186  		}
  5187  		d := auxIntToInt64(v_0.AuxInt)
  5188  		x := v_0.Args[0]
  5189  		if !(is32Bit(-c - d)) {
  5190  			break
  5191  		}
  5192  		v.reset(OpMIPS64ADDVconst)
  5193  		v.AuxInt = int64ToAuxInt(-c - d)
  5194  		v.AddArg(x)
  5195  		return true
  5196  	}
  5197  	// match: (SUBVconst [c] (ADDVconst [d] x))
  5198  	// cond: is32Bit(-c+d)
  5199  	// result: (ADDVconst [-c+d] x)
  5200  	for {
  5201  		c := auxIntToInt64(v.AuxInt)
  5202  		if v_0.Op != OpMIPS64ADDVconst {
  5203  			break
  5204  		}
  5205  		d := auxIntToInt64(v_0.AuxInt)
  5206  		x := v_0.Args[0]
  5207  		if !(is32Bit(-c + d)) {
  5208  			break
  5209  		}
  5210  		v.reset(OpMIPS64ADDVconst)
  5211  		v.AuxInt = int64ToAuxInt(-c + d)
  5212  		v.AddArg(x)
  5213  		return true
  5214  	}
  5215  	return false
  5216  }
  5217  func rewriteValueMIPS64_OpMIPS64XOR(v *Value) bool {
  5218  	v_1 := v.Args[1]
  5219  	v_0 := v.Args[0]
  5220  	// match: (XOR x (MOVVconst [c]))
  5221  	// cond: is32Bit(c)
  5222  	// result: (XORconst [c] x)
  5223  	for {
  5224  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  5225  			x := v_0
  5226  			if v_1.Op != OpMIPS64MOVVconst {
  5227  				continue
  5228  			}
  5229  			c := auxIntToInt64(v_1.AuxInt)
  5230  			if !(is32Bit(c)) {
  5231  				continue
  5232  			}
  5233  			v.reset(OpMIPS64XORconst)
  5234  			v.AuxInt = int64ToAuxInt(c)
  5235  			v.AddArg(x)
  5236  			return true
  5237  		}
  5238  		break
  5239  	}
  5240  	// match: (XOR x x)
  5241  	// result: (MOVVconst [0])
  5242  	for {
  5243  		x := v_0
  5244  		if x != v_1 {
  5245  			break
  5246  		}
  5247  		v.reset(OpMIPS64MOVVconst)
  5248  		v.AuxInt = int64ToAuxInt(0)
  5249  		return true
  5250  	}
  5251  	return false
  5252  }
  5253  func rewriteValueMIPS64_OpMIPS64XORconst(v *Value) bool {
  5254  	v_0 := v.Args[0]
  5255  	// match: (XORconst [0] x)
  5256  	// result: x
  5257  	for {
  5258  		if auxIntToInt64(v.AuxInt) != 0 {
  5259  			break
  5260  		}
  5261  		x := v_0
  5262  		v.copyOf(x)
  5263  		return true
  5264  	}
  5265  	// match: (XORconst [c] (MOVVconst [d]))
  5266  	// result: (MOVVconst [c^d])
  5267  	for {
  5268  		c := auxIntToInt64(v.AuxInt)
  5269  		if v_0.Op != OpMIPS64MOVVconst {
  5270  			break
  5271  		}
  5272  		d := auxIntToInt64(v_0.AuxInt)
  5273  		v.reset(OpMIPS64MOVVconst)
  5274  		v.AuxInt = int64ToAuxInt(c ^ d)
  5275  		return true
  5276  	}
  5277  	// match: (XORconst [c] (XORconst [d] x))
  5278  	// cond: is32Bit(c^d)
  5279  	// result: (XORconst [c^d] x)
  5280  	for {
  5281  		c := auxIntToInt64(v.AuxInt)
  5282  		if v_0.Op != OpMIPS64XORconst {
  5283  			break
  5284  		}
  5285  		d := auxIntToInt64(v_0.AuxInt)
  5286  		x := v_0.Args[0]
  5287  		if !(is32Bit(c ^ d)) {
  5288  			break
  5289  		}
  5290  		v.reset(OpMIPS64XORconst)
  5291  		v.AuxInt = int64ToAuxInt(c ^ d)
  5292  		v.AddArg(x)
  5293  		return true
  5294  	}
  5295  	return false
  5296  }
  5297  func rewriteValueMIPS64_OpMod16(v *Value) bool {
  5298  	v_1 := v.Args[1]
  5299  	v_0 := v.Args[0]
  5300  	b := v.Block
  5301  	typ := &b.Func.Config.Types
  5302  	// match: (Mod16 x y)
  5303  	// result: (Select0 (DIVV (SignExt16to64 x) (SignExt16to64 y)))
  5304  	for {
  5305  		x := v_0
  5306  		y := v_1
  5307  		v.reset(OpSelect0)
  5308  		v0 := b.NewValue0(v.Pos, OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
  5309  		v1 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
  5310  		v1.AddArg(x)
  5311  		v2 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
  5312  		v2.AddArg(y)
  5313  		v0.AddArg2(v1, v2)
  5314  		v.AddArg(v0)
  5315  		return true
  5316  	}
  5317  }
  5318  func rewriteValueMIPS64_OpMod16u(v *Value) bool {
  5319  	v_1 := v.Args[1]
  5320  	v_0 := v.Args[0]
  5321  	b := v.Block
  5322  	typ := &b.Func.Config.Types
  5323  	// match: (Mod16u x y)
  5324  	// result: (Select0 (DIVVU (ZeroExt16to64 x) (ZeroExt16to64 y)))
  5325  	for {
  5326  		x := v_0
  5327  		y := v_1
  5328  		v.reset(OpSelect0)
  5329  		v0 := b.NewValue0(v.Pos, OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
  5330  		v1 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  5331  		v1.AddArg(x)
  5332  		v2 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  5333  		v2.AddArg(y)
  5334  		v0.AddArg2(v1, v2)
  5335  		v.AddArg(v0)
  5336  		return true
  5337  	}
  5338  }
  5339  func rewriteValueMIPS64_OpMod32(v *Value) bool {
  5340  	v_1 := v.Args[1]
  5341  	v_0 := v.Args[0]
  5342  	b := v.Block
  5343  	typ := &b.Func.Config.Types
  5344  	// match: (Mod32 x y)
  5345  	// result: (Select0 (DIVV (SignExt32to64 x) (SignExt32to64 y)))
  5346  	for {
  5347  		x := v_0
  5348  		y := v_1
  5349  		v.reset(OpSelect0)
  5350  		v0 := b.NewValue0(v.Pos, OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
  5351  		v1 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
  5352  		v1.AddArg(x)
  5353  		v2 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
  5354  		v2.AddArg(y)
  5355  		v0.AddArg2(v1, v2)
  5356  		v.AddArg(v0)
  5357  		return true
  5358  	}
  5359  }
  5360  func rewriteValueMIPS64_OpMod32u(v *Value) bool {
  5361  	v_1 := v.Args[1]
  5362  	v_0 := v.Args[0]
  5363  	b := v.Block
  5364  	typ := &b.Func.Config.Types
  5365  	// match: (Mod32u x y)
  5366  	// result: (Select0 (DIVVU (ZeroExt32to64 x) (ZeroExt32to64 y)))
  5367  	for {
  5368  		x := v_0
  5369  		y := v_1
  5370  		v.reset(OpSelect0)
  5371  		v0 := b.NewValue0(v.Pos, OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
  5372  		v1 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  5373  		v1.AddArg(x)
  5374  		v2 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  5375  		v2.AddArg(y)
  5376  		v0.AddArg2(v1, v2)
  5377  		v.AddArg(v0)
  5378  		return true
  5379  	}
  5380  }
  5381  func rewriteValueMIPS64_OpMod64(v *Value) bool {
  5382  	v_1 := v.Args[1]
  5383  	v_0 := v.Args[0]
  5384  	b := v.Block
  5385  	typ := &b.Func.Config.Types
  5386  	// match: (Mod64 x y)
  5387  	// result: (Select0 (DIVV x y))
  5388  	for {
  5389  		x := v_0
  5390  		y := v_1
  5391  		v.reset(OpSelect0)
  5392  		v0 := b.NewValue0(v.Pos, OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
  5393  		v0.AddArg2(x, y)
  5394  		v.AddArg(v0)
  5395  		return true
  5396  	}
  5397  }
  5398  func rewriteValueMIPS64_OpMod64u(v *Value) bool {
  5399  	v_1 := v.Args[1]
  5400  	v_0 := v.Args[0]
  5401  	b := v.Block
  5402  	typ := &b.Func.Config.Types
  5403  	// match: (Mod64u x y)
  5404  	// result: (Select0 (DIVVU x y))
  5405  	for {
  5406  		x := v_0
  5407  		y := v_1
  5408  		v.reset(OpSelect0)
  5409  		v0 := b.NewValue0(v.Pos, OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
  5410  		v0.AddArg2(x, y)
  5411  		v.AddArg(v0)
  5412  		return true
  5413  	}
  5414  }
  5415  func rewriteValueMIPS64_OpMod8(v *Value) bool {
  5416  	v_1 := v.Args[1]
  5417  	v_0 := v.Args[0]
  5418  	b := v.Block
  5419  	typ := &b.Func.Config.Types
  5420  	// match: (Mod8 x y)
  5421  	// result: (Select0 (DIVV (SignExt8to64 x) (SignExt8to64 y)))
  5422  	for {
  5423  		x := v_0
  5424  		y := v_1
  5425  		v.reset(OpSelect0)
  5426  		v0 := b.NewValue0(v.Pos, OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
  5427  		v1 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
  5428  		v1.AddArg(x)
  5429  		v2 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
  5430  		v2.AddArg(y)
  5431  		v0.AddArg2(v1, v2)
  5432  		v.AddArg(v0)
  5433  		return true
  5434  	}
  5435  }
  5436  func rewriteValueMIPS64_OpMod8u(v *Value) bool {
  5437  	v_1 := v.Args[1]
  5438  	v_0 := v.Args[0]
  5439  	b := v.Block
  5440  	typ := &b.Func.Config.Types
  5441  	// match: (Mod8u x y)
  5442  	// result: (Select0 (DIVVU (ZeroExt8to64 x) (ZeroExt8to64 y)))
  5443  	for {
  5444  		x := v_0
  5445  		y := v_1
  5446  		v.reset(OpSelect0)
  5447  		v0 := b.NewValue0(v.Pos, OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
  5448  		v1 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  5449  		v1.AddArg(x)
  5450  		v2 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  5451  		v2.AddArg(y)
  5452  		v0.AddArg2(v1, v2)
  5453  		v.AddArg(v0)
  5454  		return true
  5455  	}
  5456  }
  5457  func rewriteValueMIPS64_OpMove(v *Value) bool {
  5458  	v_2 := v.Args[2]
  5459  	v_1 := v.Args[1]
  5460  	v_0 := v.Args[0]
  5461  	b := v.Block
  5462  	config := b.Func.Config
  5463  	typ := &b.Func.Config.Types
  5464  	// match: (Move [0] _ _ mem)
  5465  	// result: mem
  5466  	for {
  5467  		if auxIntToInt64(v.AuxInt) != 0 {
  5468  			break
  5469  		}
  5470  		mem := v_2
  5471  		v.copyOf(mem)
  5472  		return true
  5473  	}
  5474  	// match: (Move [1] dst src mem)
  5475  	// result: (MOVBstore dst (MOVBload src mem) mem)
  5476  	for {
  5477  		if auxIntToInt64(v.AuxInt) != 1 {
  5478  			break
  5479  		}
  5480  		dst := v_0
  5481  		src := v_1
  5482  		mem := v_2
  5483  		v.reset(OpMIPS64MOVBstore)
  5484  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVBload, typ.Int8)
  5485  		v0.AddArg2(src, mem)
  5486  		v.AddArg3(dst, v0, mem)
  5487  		return true
  5488  	}
  5489  	// match: (Move [2] {t} dst src mem)
  5490  	// cond: t.Alignment()%2 == 0
  5491  	// result: (MOVHstore dst (MOVHload src mem) mem)
  5492  	for {
  5493  		if auxIntToInt64(v.AuxInt) != 2 {
  5494  			break
  5495  		}
  5496  		t := auxToType(v.Aux)
  5497  		dst := v_0
  5498  		src := v_1
  5499  		mem := v_2
  5500  		if !(t.Alignment()%2 == 0) {
  5501  			break
  5502  		}
  5503  		v.reset(OpMIPS64MOVHstore)
  5504  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVHload, typ.Int16)
  5505  		v0.AddArg2(src, mem)
  5506  		v.AddArg3(dst, v0, mem)
  5507  		return true
  5508  	}
  5509  	// match: (Move [2] dst src mem)
  5510  	// result: (MOVBstore [1] dst (MOVBload [1] src mem) (MOVBstore dst (MOVBload src mem) mem))
  5511  	for {
  5512  		if auxIntToInt64(v.AuxInt) != 2 {
  5513  			break
  5514  		}
  5515  		dst := v_0
  5516  		src := v_1
  5517  		mem := v_2
  5518  		v.reset(OpMIPS64MOVBstore)
  5519  		v.AuxInt = int32ToAuxInt(1)
  5520  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVBload, typ.Int8)
  5521  		v0.AuxInt = int32ToAuxInt(1)
  5522  		v0.AddArg2(src, mem)
  5523  		v1 := b.NewValue0(v.Pos, OpMIPS64MOVBstore, types.TypeMem)
  5524  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVBload, typ.Int8)
  5525  		v2.AddArg2(src, mem)
  5526  		v1.AddArg3(dst, v2, mem)
  5527  		v.AddArg3(dst, v0, v1)
  5528  		return true
  5529  	}
  5530  	// match: (Move [4] {t} dst src mem)
  5531  	// cond: t.Alignment()%4 == 0
  5532  	// result: (MOVWstore dst (MOVWload src mem) mem)
  5533  	for {
  5534  		if auxIntToInt64(v.AuxInt) != 4 {
  5535  			break
  5536  		}
  5537  		t := auxToType(v.Aux)
  5538  		dst := v_0
  5539  		src := v_1
  5540  		mem := v_2
  5541  		if !(t.Alignment()%4 == 0) {
  5542  			break
  5543  		}
  5544  		v.reset(OpMIPS64MOVWstore)
  5545  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVWload, typ.Int32)
  5546  		v0.AddArg2(src, mem)
  5547  		v.AddArg3(dst, v0, mem)
  5548  		return true
  5549  	}
  5550  	// match: (Move [4] {t} dst src mem)
  5551  	// cond: t.Alignment()%2 == 0
  5552  	// result: (MOVHstore [2] dst (MOVHload [2] src mem) (MOVHstore dst (MOVHload src mem) mem))
  5553  	for {
  5554  		if auxIntToInt64(v.AuxInt) != 4 {
  5555  			break
  5556  		}
  5557  		t := auxToType(v.Aux)
  5558  		dst := v_0
  5559  		src := v_1
  5560  		mem := v_2
  5561  		if !(t.Alignment()%2 == 0) {
  5562  			break
  5563  		}
  5564  		v.reset(OpMIPS64MOVHstore)
  5565  		v.AuxInt = int32ToAuxInt(2)
  5566  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVHload, typ.Int16)
  5567  		v0.AuxInt = int32ToAuxInt(2)
  5568  		v0.AddArg2(src, mem)
  5569  		v1 := b.NewValue0(v.Pos, OpMIPS64MOVHstore, types.TypeMem)
  5570  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVHload, typ.Int16)
  5571  		v2.AddArg2(src, mem)
  5572  		v1.AddArg3(dst, v2, mem)
  5573  		v.AddArg3(dst, v0, v1)
  5574  		return true
  5575  	}
  5576  	// match: (Move [4] dst src mem)
  5577  	// result: (MOVBstore [3] dst (MOVBload [3] src mem) (MOVBstore [2] dst (MOVBload [2] src mem) (MOVBstore [1] dst (MOVBload [1] src mem) (MOVBstore dst (MOVBload src mem) mem))))
  5578  	for {
  5579  		if auxIntToInt64(v.AuxInt) != 4 {
  5580  			break
  5581  		}
  5582  		dst := v_0
  5583  		src := v_1
  5584  		mem := v_2
  5585  		v.reset(OpMIPS64MOVBstore)
  5586  		v.AuxInt = int32ToAuxInt(3)
  5587  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVBload, typ.Int8)
  5588  		v0.AuxInt = int32ToAuxInt(3)
  5589  		v0.AddArg2(src, mem)
  5590  		v1 := b.NewValue0(v.Pos, OpMIPS64MOVBstore, types.TypeMem)
  5591  		v1.AuxInt = int32ToAuxInt(2)
  5592  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVBload, typ.Int8)
  5593  		v2.AuxInt = int32ToAuxInt(2)
  5594  		v2.AddArg2(src, mem)
  5595  		v3 := b.NewValue0(v.Pos, OpMIPS64MOVBstore, types.TypeMem)
  5596  		v3.AuxInt = int32ToAuxInt(1)
  5597  		v4 := b.NewValue0(v.Pos, OpMIPS64MOVBload, typ.Int8)
  5598  		v4.AuxInt = int32ToAuxInt(1)
  5599  		v4.AddArg2(src, mem)
  5600  		v5 := b.NewValue0(v.Pos, OpMIPS64MOVBstore, types.TypeMem)
  5601  		v6 := b.NewValue0(v.Pos, OpMIPS64MOVBload, typ.Int8)
  5602  		v6.AddArg2(src, mem)
  5603  		v5.AddArg3(dst, v6, mem)
  5604  		v3.AddArg3(dst, v4, v5)
  5605  		v1.AddArg3(dst, v2, v3)
  5606  		v.AddArg3(dst, v0, v1)
  5607  		return true
  5608  	}
  5609  	// match: (Move [8] {t} dst src mem)
  5610  	// cond: t.Alignment()%8 == 0
  5611  	// result: (MOVVstore dst (MOVVload src mem) mem)
  5612  	for {
  5613  		if auxIntToInt64(v.AuxInt) != 8 {
  5614  			break
  5615  		}
  5616  		t := auxToType(v.Aux)
  5617  		dst := v_0
  5618  		src := v_1
  5619  		mem := v_2
  5620  		if !(t.Alignment()%8 == 0) {
  5621  			break
  5622  		}
  5623  		v.reset(OpMIPS64MOVVstore)
  5624  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVload, typ.UInt64)
  5625  		v0.AddArg2(src, mem)
  5626  		v.AddArg3(dst, v0, mem)
  5627  		return true
  5628  	}
  5629  	// match: (Move [8] {t} dst src mem)
  5630  	// cond: t.Alignment()%4 == 0
  5631  	// result: (MOVWstore [4] dst (MOVWload [4] src mem) (MOVWstore dst (MOVWload src mem) mem))
  5632  	for {
  5633  		if auxIntToInt64(v.AuxInt) != 8 {
  5634  			break
  5635  		}
  5636  		t := auxToType(v.Aux)
  5637  		dst := v_0
  5638  		src := v_1
  5639  		mem := v_2
  5640  		if !(t.Alignment()%4 == 0) {
  5641  			break
  5642  		}
  5643  		v.reset(OpMIPS64MOVWstore)
  5644  		v.AuxInt = int32ToAuxInt(4)
  5645  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVWload, typ.Int32)
  5646  		v0.AuxInt = int32ToAuxInt(4)
  5647  		v0.AddArg2(src, mem)
  5648  		v1 := b.NewValue0(v.Pos, OpMIPS64MOVWstore, types.TypeMem)
  5649  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVWload, typ.Int32)
  5650  		v2.AddArg2(src, mem)
  5651  		v1.AddArg3(dst, v2, mem)
  5652  		v.AddArg3(dst, v0, v1)
  5653  		return true
  5654  	}
  5655  	// match: (Move [8] {t} dst src mem)
  5656  	// cond: t.Alignment()%2 == 0
  5657  	// result: (MOVHstore [6] dst (MOVHload [6] src mem) (MOVHstore [4] dst (MOVHload [4] src mem) (MOVHstore [2] dst (MOVHload [2] src mem) (MOVHstore dst (MOVHload src mem) mem))))
  5658  	for {
  5659  		if auxIntToInt64(v.AuxInt) != 8 {
  5660  			break
  5661  		}
  5662  		t := auxToType(v.Aux)
  5663  		dst := v_0
  5664  		src := v_1
  5665  		mem := v_2
  5666  		if !(t.Alignment()%2 == 0) {
  5667  			break
  5668  		}
  5669  		v.reset(OpMIPS64MOVHstore)
  5670  		v.AuxInt = int32ToAuxInt(6)
  5671  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVHload, typ.Int16)
  5672  		v0.AuxInt = int32ToAuxInt(6)
  5673  		v0.AddArg2(src, mem)
  5674  		v1 := b.NewValue0(v.Pos, OpMIPS64MOVHstore, types.TypeMem)
  5675  		v1.AuxInt = int32ToAuxInt(4)
  5676  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVHload, typ.Int16)
  5677  		v2.AuxInt = int32ToAuxInt(4)
  5678  		v2.AddArg2(src, mem)
  5679  		v3 := b.NewValue0(v.Pos, OpMIPS64MOVHstore, types.TypeMem)
  5680  		v3.AuxInt = int32ToAuxInt(2)
  5681  		v4 := b.NewValue0(v.Pos, OpMIPS64MOVHload, typ.Int16)
  5682  		v4.AuxInt = int32ToAuxInt(2)
  5683  		v4.AddArg2(src, mem)
  5684  		v5 := b.NewValue0(v.Pos, OpMIPS64MOVHstore, types.TypeMem)
  5685  		v6 := b.NewValue0(v.Pos, OpMIPS64MOVHload, typ.Int16)
  5686  		v6.AddArg2(src, mem)
  5687  		v5.AddArg3(dst, v6, mem)
  5688  		v3.AddArg3(dst, v4, v5)
  5689  		v1.AddArg3(dst, v2, v3)
  5690  		v.AddArg3(dst, v0, v1)
  5691  		return true
  5692  	}
  5693  	// match: (Move [3] dst src mem)
  5694  	// result: (MOVBstore [2] dst (MOVBload [2] src mem) (MOVBstore [1] dst (MOVBload [1] src mem) (MOVBstore dst (MOVBload src mem) mem)))
  5695  	for {
  5696  		if auxIntToInt64(v.AuxInt) != 3 {
  5697  			break
  5698  		}
  5699  		dst := v_0
  5700  		src := v_1
  5701  		mem := v_2
  5702  		v.reset(OpMIPS64MOVBstore)
  5703  		v.AuxInt = int32ToAuxInt(2)
  5704  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVBload, typ.Int8)
  5705  		v0.AuxInt = int32ToAuxInt(2)
  5706  		v0.AddArg2(src, mem)
  5707  		v1 := b.NewValue0(v.Pos, OpMIPS64MOVBstore, types.TypeMem)
  5708  		v1.AuxInt = int32ToAuxInt(1)
  5709  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVBload, typ.Int8)
  5710  		v2.AuxInt = int32ToAuxInt(1)
  5711  		v2.AddArg2(src, mem)
  5712  		v3 := b.NewValue0(v.Pos, OpMIPS64MOVBstore, types.TypeMem)
  5713  		v4 := b.NewValue0(v.Pos, OpMIPS64MOVBload, typ.Int8)
  5714  		v4.AddArg2(src, mem)
  5715  		v3.AddArg3(dst, v4, mem)
  5716  		v1.AddArg3(dst, v2, v3)
  5717  		v.AddArg3(dst, v0, v1)
  5718  		return true
  5719  	}
  5720  	// match: (Move [6] {t} dst src mem)
  5721  	// cond: t.Alignment()%2 == 0
  5722  	// result: (MOVHstore [4] dst (MOVHload [4] src mem) (MOVHstore [2] dst (MOVHload [2] src mem) (MOVHstore dst (MOVHload src mem) mem)))
  5723  	for {
  5724  		if auxIntToInt64(v.AuxInt) != 6 {
  5725  			break
  5726  		}
  5727  		t := auxToType(v.Aux)
  5728  		dst := v_0
  5729  		src := v_1
  5730  		mem := v_2
  5731  		if !(t.Alignment()%2 == 0) {
  5732  			break
  5733  		}
  5734  		v.reset(OpMIPS64MOVHstore)
  5735  		v.AuxInt = int32ToAuxInt(4)
  5736  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVHload, typ.Int16)
  5737  		v0.AuxInt = int32ToAuxInt(4)
  5738  		v0.AddArg2(src, mem)
  5739  		v1 := b.NewValue0(v.Pos, OpMIPS64MOVHstore, types.TypeMem)
  5740  		v1.AuxInt = int32ToAuxInt(2)
  5741  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVHload, typ.Int16)
  5742  		v2.AuxInt = int32ToAuxInt(2)
  5743  		v2.AddArg2(src, mem)
  5744  		v3 := b.NewValue0(v.Pos, OpMIPS64MOVHstore, types.TypeMem)
  5745  		v4 := b.NewValue0(v.Pos, OpMIPS64MOVHload, typ.Int16)
  5746  		v4.AddArg2(src, mem)
  5747  		v3.AddArg3(dst, v4, mem)
  5748  		v1.AddArg3(dst, v2, v3)
  5749  		v.AddArg3(dst, v0, v1)
  5750  		return true
  5751  	}
  5752  	// match: (Move [12] {t} dst src mem)
  5753  	// cond: t.Alignment()%4 == 0
  5754  	// result: (MOVWstore [8] dst (MOVWload [8] src mem) (MOVWstore [4] dst (MOVWload [4] src mem) (MOVWstore dst (MOVWload src mem) mem)))
  5755  	for {
  5756  		if auxIntToInt64(v.AuxInt) != 12 {
  5757  			break
  5758  		}
  5759  		t := auxToType(v.Aux)
  5760  		dst := v_0
  5761  		src := v_1
  5762  		mem := v_2
  5763  		if !(t.Alignment()%4 == 0) {
  5764  			break
  5765  		}
  5766  		v.reset(OpMIPS64MOVWstore)
  5767  		v.AuxInt = int32ToAuxInt(8)
  5768  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVWload, typ.Int32)
  5769  		v0.AuxInt = int32ToAuxInt(8)
  5770  		v0.AddArg2(src, mem)
  5771  		v1 := b.NewValue0(v.Pos, OpMIPS64MOVWstore, types.TypeMem)
  5772  		v1.AuxInt = int32ToAuxInt(4)
  5773  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVWload, typ.Int32)
  5774  		v2.AuxInt = int32ToAuxInt(4)
  5775  		v2.AddArg2(src, mem)
  5776  		v3 := b.NewValue0(v.Pos, OpMIPS64MOVWstore, types.TypeMem)
  5777  		v4 := b.NewValue0(v.Pos, OpMIPS64MOVWload, typ.Int32)
  5778  		v4.AddArg2(src, mem)
  5779  		v3.AddArg3(dst, v4, mem)
  5780  		v1.AddArg3(dst, v2, v3)
  5781  		v.AddArg3(dst, v0, v1)
  5782  		return true
  5783  	}
  5784  	// match: (Move [16] {t} dst src mem)
  5785  	// cond: t.Alignment()%8 == 0
  5786  	// result: (MOVVstore [8] dst (MOVVload [8] src mem) (MOVVstore dst (MOVVload src mem) mem))
  5787  	for {
  5788  		if auxIntToInt64(v.AuxInt) != 16 {
  5789  			break
  5790  		}
  5791  		t := auxToType(v.Aux)
  5792  		dst := v_0
  5793  		src := v_1
  5794  		mem := v_2
  5795  		if !(t.Alignment()%8 == 0) {
  5796  			break
  5797  		}
  5798  		v.reset(OpMIPS64MOVVstore)
  5799  		v.AuxInt = int32ToAuxInt(8)
  5800  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVload, typ.UInt64)
  5801  		v0.AuxInt = int32ToAuxInt(8)
  5802  		v0.AddArg2(src, mem)
  5803  		v1 := b.NewValue0(v.Pos, OpMIPS64MOVVstore, types.TypeMem)
  5804  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVload, typ.UInt64)
  5805  		v2.AddArg2(src, mem)
  5806  		v1.AddArg3(dst, v2, mem)
  5807  		v.AddArg3(dst, v0, v1)
  5808  		return true
  5809  	}
  5810  	// match: (Move [24] {t} dst src mem)
  5811  	// cond: t.Alignment()%8 == 0
  5812  	// result: (MOVVstore [16] dst (MOVVload [16] src mem) (MOVVstore [8] dst (MOVVload [8] src mem) (MOVVstore dst (MOVVload src mem) mem)))
  5813  	for {
  5814  		if auxIntToInt64(v.AuxInt) != 24 {
  5815  			break
  5816  		}
  5817  		t := auxToType(v.Aux)
  5818  		dst := v_0
  5819  		src := v_1
  5820  		mem := v_2
  5821  		if !(t.Alignment()%8 == 0) {
  5822  			break
  5823  		}
  5824  		v.reset(OpMIPS64MOVVstore)
  5825  		v.AuxInt = int32ToAuxInt(16)
  5826  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVload, typ.UInt64)
  5827  		v0.AuxInt = int32ToAuxInt(16)
  5828  		v0.AddArg2(src, mem)
  5829  		v1 := b.NewValue0(v.Pos, OpMIPS64MOVVstore, types.TypeMem)
  5830  		v1.AuxInt = int32ToAuxInt(8)
  5831  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVload, typ.UInt64)
  5832  		v2.AuxInt = int32ToAuxInt(8)
  5833  		v2.AddArg2(src, mem)
  5834  		v3 := b.NewValue0(v.Pos, OpMIPS64MOVVstore, types.TypeMem)
  5835  		v4 := b.NewValue0(v.Pos, OpMIPS64MOVVload, typ.UInt64)
  5836  		v4.AddArg2(src, mem)
  5837  		v3.AddArg3(dst, v4, mem)
  5838  		v1.AddArg3(dst, v2, v3)
  5839  		v.AddArg3(dst, v0, v1)
  5840  		return true
  5841  	}
  5842  	// match: (Move [s] {t} dst src mem)
  5843  	// cond: s%8 == 0 && s >= 24 && s <= 8*128 && t.Alignment()%8 == 0 && logLargeCopy(v, s)
  5844  	// result: (DUFFCOPY [16 * (128 - s/8)] dst src mem)
  5845  	for {
  5846  		s := auxIntToInt64(v.AuxInt)
  5847  		t := auxToType(v.Aux)
  5848  		dst := v_0
  5849  		src := v_1
  5850  		mem := v_2
  5851  		if !(s%8 == 0 && s >= 24 && s <= 8*128 && t.Alignment()%8 == 0 && logLargeCopy(v, s)) {
  5852  			break
  5853  		}
  5854  		v.reset(OpMIPS64DUFFCOPY)
  5855  		v.AuxInt = int64ToAuxInt(16 * (128 - s/8))
  5856  		v.AddArg3(dst, src, mem)
  5857  		return true
  5858  	}
  5859  	// match: (Move [s] {t} dst src mem)
  5860  	// cond: s > 24 && logLargeCopy(v, s) || t.Alignment()%8 != 0
  5861  	// result: (LoweredMove [t.Alignment()] dst src (ADDVconst <src.Type> src [s-moveSize(t.Alignment(), config)]) mem)
  5862  	for {
  5863  		s := auxIntToInt64(v.AuxInt)
  5864  		t := auxToType(v.Aux)
  5865  		dst := v_0
  5866  		src := v_1
  5867  		mem := v_2
  5868  		if !(s > 24 && logLargeCopy(v, s) || t.Alignment()%8 != 0) {
  5869  			break
  5870  		}
  5871  		v.reset(OpMIPS64LoweredMove)
  5872  		v.AuxInt = int64ToAuxInt(t.Alignment())
  5873  		v0 := b.NewValue0(v.Pos, OpMIPS64ADDVconst, src.Type)
  5874  		v0.AuxInt = int64ToAuxInt(s - moveSize(t.Alignment(), config))
  5875  		v0.AddArg(src)
  5876  		v.AddArg4(dst, src, v0, mem)
  5877  		return true
  5878  	}
  5879  	return false
  5880  }
  5881  func rewriteValueMIPS64_OpMul16(v *Value) bool {
  5882  	v_1 := v.Args[1]
  5883  	v_0 := v.Args[0]
  5884  	b := v.Block
  5885  	typ := &b.Func.Config.Types
  5886  	// match: (Mul16 x y)
  5887  	// result: (Select1 (MULVU x y))
  5888  	for {
  5889  		x := v_0
  5890  		y := v_1
  5891  		v.reset(OpSelect1)
  5892  		v0 := b.NewValue0(v.Pos, OpMIPS64MULVU, types.NewTuple(typ.UInt64, typ.UInt64))
  5893  		v0.AddArg2(x, y)
  5894  		v.AddArg(v0)
  5895  		return true
  5896  	}
  5897  }
  5898  func rewriteValueMIPS64_OpMul32(v *Value) bool {
  5899  	v_1 := v.Args[1]
  5900  	v_0 := v.Args[0]
  5901  	b := v.Block
  5902  	typ := &b.Func.Config.Types
  5903  	// match: (Mul32 x y)
  5904  	// result: (Select1 (MULVU x y))
  5905  	for {
  5906  		x := v_0
  5907  		y := v_1
  5908  		v.reset(OpSelect1)
  5909  		v0 := b.NewValue0(v.Pos, OpMIPS64MULVU, types.NewTuple(typ.UInt64, typ.UInt64))
  5910  		v0.AddArg2(x, y)
  5911  		v.AddArg(v0)
  5912  		return true
  5913  	}
  5914  }
  5915  func rewriteValueMIPS64_OpMul64(v *Value) bool {
  5916  	v_1 := v.Args[1]
  5917  	v_0 := v.Args[0]
  5918  	b := v.Block
  5919  	typ := &b.Func.Config.Types
  5920  	// match: (Mul64 x y)
  5921  	// result: (Select1 (MULVU x y))
  5922  	for {
  5923  		x := v_0
  5924  		y := v_1
  5925  		v.reset(OpSelect1)
  5926  		v0 := b.NewValue0(v.Pos, OpMIPS64MULVU, types.NewTuple(typ.UInt64, typ.UInt64))
  5927  		v0.AddArg2(x, y)
  5928  		v.AddArg(v0)
  5929  		return true
  5930  	}
  5931  }
  5932  func rewriteValueMIPS64_OpMul8(v *Value) bool {
  5933  	v_1 := v.Args[1]
  5934  	v_0 := v.Args[0]
  5935  	b := v.Block
  5936  	typ := &b.Func.Config.Types
  5937  	// match: (Mul8 x y)
  5938  	// result: (Select1 (MULVU x y))
  5939  	for {
  5940  		x := v_0
  5941  		y := v_1
  5942  		v.reset(OpSelect1)
  5943  		v0 := b.NewValue0(v.Pos, OpMIPS64MULVU, types.NewTuple(typ.UInt64, typ.UInt64))
  5944  		v0.AddArg2(x, y)
  5945  		v.AddArg(v0)
  5946  		return true
  5947  	}
  5948  }
  5949  func rewriteValueMIPS64_OpNeq16(v *Value) bool {
  5950  	v_1 := v.Args[1]
  5951  	v_0 := v.Args[0]
  5952  	b := v.Block
  5953  	typ := &b.Func.Config.Types
  5954  	// match: (Neq16 x y)
  5955  	// result: (SGTU (XOR (ZeroExt16to32 x) (ZeroExt16to64 y)) (MOVVconst [0]))
  5956  	for {
  5957  		x := v_0
  5958  		y := v_1
  5959  		v.reset(OpMIPS64SGTU)
  5960  		v0 := b.NewValue0(v.Pos, OpMIPS64XOR, typ.UInt64)
  5961  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5962  		v1.AddArg(x)
  5963  		v2 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  5964  		v2.AddArg(y)
  5965  		v0.AddArg2(v1, v2)
  5966  		v3 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  5967  		v3.AuxInt = int64ToAuxInt(0)
  5968  		v.AddArg2(v0, v3)
  5969  		return true
  5970  	}
  5971  }
  5972  func rewriteValueMIPS64_OpNeq32(v *Value) bool {
  5973  	v_1 := v.Args[1]
  5974  	v_0 := v.Args[0]
  5975  	b := v.Block
  5976  	typ := &b.Func.Config.Types
  5977  	// match: (Neq32 x y)
  5978  	// result: (SGTU (XOR (ZeroExt32to64 x) (ZeroExt32to64 y)) (MOVVconst [0]))
  5979  	for {
  5980  		x := v_0
  5981  		y := v_1
  5982  		v.reset(OpMIPS64SGTU)
  5983  		v0 := b.NewValue0(v.Pos, OpMIPS64XOR, typ.UInt64)
  5984  		v1 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  5985  		v1.AddArg(x)
  5986  		v2 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  5987  		v2.AddArg(y)
  5988  		v0.AddArg2(v1, v2)
  5989  		v3 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  5990  		v3.AuxInt = int64ToAuxInt(0)
  5991  		v.AddArg2(v0, v3)
  5992  		return true
  5993  	}
  5994  }
  5995  func rewriteValueMIPS64_OpNeq32F(v *Value) bool {
  5996  	v_1 := v.Args[1]
  5997  	v_0 := v.Args[0]
  5998  	b := v.Block
  5999  	// match: (Neq32F x y)
  6000  	// result: (FPFlagFalse (CMPEQF x y))
  6001  	for {
  6002  		x := v_0
  6003  		y := v_1
  6004  		v.reset(OpMIPS64FPFlagFalse)
  6005  		v0 := b.NewValue0(v.Pos, OpMIPS64CMPEQF, types.TypeFlags)
  6006  		v0.AddArg2(x, y)
  6007  		v.AddArg(v0)
  6008  		return true
  6009  	}
  6010  }
  6011  func rewriteValueMIPS64_OpNeq64(v *Value) bool {
  6012  	v_1 := v.Args[1]
  6013  	v_0 := v.Args[0]
  6014  	b := v.Block
  6015  	typ := &b.Func.Config.Types
  6016  	// match: (Neq64 x y)
  6017  	// result: (SGTU (XOR x y) (MOVVconst [0]))
  6018  	for {
  6019  		x := v_0
  6020  		y := v_1
  6021  		v.reset(OpMIPS64SGTU)
  6022  		v0 := b.NewValue0(v.Pos, OpMIPS64XOR, typ.UInt64)
  6023  		v0.AddArg2(x, y)
  6024  		v1 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6025  		v1.AuxInt = int64ToAuxInt(0)
  6026  		v.AddArg2(v0, v1)
  6027  		return true
  6028  	}
  6029  }
  6030  func rewriteValueMIPS64_OpNeq64F(v *Value) bool {
  6031  	v_1 := v.Args[1]
  6032  	v_0 := v.Args[0]
  6033  	b := v.Block
  6034  	// match: (Neq64F x y)
  6035  	// result: (FPFlagFalse (CMPEQD x y))
  6036  	for {
  6037  		x := v_0
  6038  		y := v_1
  6039  		v.reset(OpMIPS64FPFlagFalse)
  6040  		v0 := b.NewValue0(v.Pos, OpMIPS64CMPEQD, types.TypeFlags)
  6041  		v0.AddArg2(x, y)
  6042  		v.AddArg(v0)
  6043  		return true
  6044  	}
  6045  }
  6046  func rewriteValueMIPS64_OpNeq8(v *Value) bool {
  6047  	v_1 := v.Args[1]
  6048  	v_0 := v.Args[0]
  6049  	b := v.Block
  6050  	typ := &b.Func.Config.Types
  6051  	// match: (Neq8 x y)
  6052  	// result: (SGTU (XOR (ZeroExt8to64 x) (ZeroExt8to64 y)) (MOVVconst [0]))
  6053  	for {
  6054  		x := v_0
  6055  		y := v_1
  6056  		v.reset(OpMIPS64SGTU)
  6057  		v0 := b.NewValue0(v.Pos, OpMIPS64XOR, typ.UInt64)
  6058  		v1 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  6059  		v1.AddArg(x)
  6060  		v2 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  6061  		v2.AddArg(y)
  6062  		v0.AddArg2(v1, v2)
  6063  		v3 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6064  		v3.AuxInt = int64ToAuxInt(0)
  6065  		v.AddArg2(v0, v3)
  6066  		return true
  6067  	}
  6068  }
  6069  func rewriteValueMIPS64_OpNeqPtr(v *Value) bool {
  6070  	v_1 := v.Args[1]
  6071  	v_0 := v.Args[0]
  6072  	b := v.Block
  6073  	typ := &b.Func.Config.Types
  6074  	// match: (NeqPtr x y)
  6075  	// result: (SGTU (XOR x y) (MOVVconst [0]))
  6076  	for {
  6077  		x := v_0
  6078  		y := v_1
  6079  		v.reset(OpMIPS64SGTU)
  6080  		v0 := b.NewValue0(v.Pos, OpMIPS64XOR, typ.UInt64)
  6081  		v0.AddArg2(x, y)
  6082  		v1 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6083  		v1.AuxInt = int64ToAuxInt(0)
  6084  		v.AddArg2(v0, v1)
  6085  		return true
  6086  	}
  6087  }
  6088  func rewriteValueMIPS64_OpNot(v *Value) bool {
  6089  	v_0 := v.Args[0]
  6090  	// match: (Not x)
  6091  	// result: (XORconst [1] x)
  6092  	for {
  6093  		x := v_0
  6094  		v.reset(OpMIPS64XORconst)
  6095  		v.AuxInt = int64ToAuxInt(1)
  6096  		v.AddArg(x)
  6097  		return true
  6098  	}
  6099  }
  6100  func rewriteValueMIPS64_OpOffPtr(v *Value) bool {
  6101  	v_0 := v.Args[0]
  6102  	// match: (OffPtr [off] ptr:(SP))
  6103  	// cond: is32Bit(off)
  6104  	// result: (MOVVaddr [int32(off)] ptr)
  6105  	for {
  6106  		off := auxIntToInt64(v.AuxInt)
  6107  		ptr := v_0
  6108  		if ptr.Op != OpSP || !(is32Bit(off)) {
  6109  			break
  6110  		}
  6111  		v.reset(OpMIPS64MOVVaddr)
  6112  		v.AuxInt = int32ToAuxInt(int32(off))
  6113  		v.AddArg(ptr)
  6114  		return true
  6115  	}
  6116  	// match: (OffPtr [off] ptr)
  6117  	// result: (ADDVconst [off] ptr)
  6118  	for {
  6119  		off := auxIntToInt64(v.AuxInt)
  6120  		ptr := v_0
  6121  		v.reset(OpMIPS64ADDVconst)
  6122  		v.AuxInt = int64ToAuxInt(off)
  6123  		v.AddArg(ptr)
  6124  		return true
  6125  	}
  6126  }
  6127  func rewriteValueMIPS64_OpRotateLeft16(v *Value) bool {
  6128  	v_1 := v.Args[1]
  6129  	v_0 := v.Args[0]
  6130  	b := v.Block
  6131  	typ := &b.Func.Config.Types
  6132  	// match: (RotateLeft16 <t> x (MOVVconst [c]))
  6133  	// result: (Or16 (Lsh16x64 <t> x (MOVVconst [c&15])) (Rsh16Ux64 <t> x (MOVVconst [-c&15])))
  6134  	for {
  6135  		t := v.Type
  6136  		x := v_0
  6137  		if v_1.Op != OpMIPS64MOVVconst {
  6138  			break
  6139  		}
  6140  		c := auxIntToInt64(v_1.AuxInt)
  6141  		v.reset(OpOr16)
  6142  		v0 := b.NewValue0(v.Pos, OpLsh16x64, t)
  6143  		v1 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6144  		v1.AuxInt = int64ToAuxInt(c & 15)
  6145  		v0.AddArg2(x, v1)
  6146  		v2 := b.NewValue0(v.Pos, OpRsh16Ux64, t)
  6147  		v3 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6148  		v3.AuxInt = int64ToAuxInt(-c & 15)
  6149  		v2.AddArg2(x, v3)
  6150  		v.AddArg2(v0, v2)
  6151  		return true
  6152  	}
  6153  	return false
  6154  }
  6155  func rewriteValueMIPS64_OpRotateLeft32(v *Value) bool {
  6156  	v_1 := v.Args[1]
  6157  	v_0 := v.Args[0]
  6158  	b := v.Block
  6159  	typ := &b.Func.Config.Types
  6160  	// match: (RotateLeft32 <t> x (MOVVconst [c]))
  6161  	// result: (Or32 (Lsh32x64 <t> x (MOVVconst [c&31])) (Rsh32Ux64 <t> x (MOVVconst [-c&31])))
  6162  	for {
  6163  		t := v.Type
  6164  		x := v_0
  6165  		if v_1.Op != OpMIPS64MOVVconst {
  6166  			break
  6167  		}
  6168  		c := auxIntToInt64(v_1.AuxInt)
  6169  		v.reset(OpOr32)
  6170  		v0 := b.NewValue0(v.Pos, OpLsh32x64, t)
  6171  		v1 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6172  		v1.AuxInt = int64ToAuxInt(c & 31)
  6173  		v0.AddArg2(x, v1)
  6174  		v2 := b.NewValue0(v.Pos, OpRsh32Ux64, t)
  6175  		v3 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6176  		v3.AuxInt = int64ToAuxInt(-c & 31)
  6177  		v2.AddArg2(x, v3)
  6178  		v.AddArg2(v0, v2)
  6179  		return true
  6180  	}
  6181  	return false
  6182  }
  6183  func rewriteValueMIPS64_OpRotateLeft64(v *Value) bool {
  6184  	v_1 := v.Args[1]
  6185  	v_0 := v.Args[0]
  6186  	b := v.Block
  6187  	typ := &b.Func.Config.Types
  6188  	// match: (RotateLeft64 <t> x (MOVVconst [c]))
  6189  	// result: (Or64 (Lsh64x64 <t> x (MOVVconst [c&63])) (Rsh64Ux64 <t> x (MOVVconst [-c&63])))
  6190  	for {
  6191  		t := v.Type
  6192  		x := v_0
  6193  		if v_1.Op != OpMIPS64MOVVconst {
  6194  			break
  6195  		}
  6196  		c := auxIntToInt64(v_1.AuxInt)
  6197  		v.reset(OpOr64)
  6198  		v0 := b.NewValue0(v.Pos, OpLsh64x64, t)
  6199  		v1 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6200  		v1.AuxInt = int64ToAuxInt(c & 63)
  6201  		v0.AddArg2(x, v1)
  6202  		v2 := b.NewValue0(v.Pos, OpRsh64Ux64, t)
  6203  		v3 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6204  		v3.AuxInt = int64ToAuxInt(-c & 63)
  6205  		v2.AddArg2(x, v3)
  6206  		v.AddArg2(v0, v2)
  6207  		return true
  6208  	}
  6209  	return false
  6210  }
  6211  func rewriteValueMIPS64_OpRotateLeft8(v *Value) bool {
  6212  	v_1 := v.Args[1]
  6213  	v_0 := v.Args[0]
  6214  	b := v.Block
  6215  	typ := &b.Func.Config.Types
  6216  	// match: (RotateLeft8 <t> x (MOVVconst [c]))
  6217  	// result: (Or8 (Lsh8x64 <t> x (MOVVconst [c&7])) (Rsh8Ux64 <t> x (MOVVconst [-c&7])))
  6218  	for {
  6219  		t := v.Type
  6220  		x := v_0
  6221  		if v_1.Op != OpMIPS64MOVVconst {
  6222  			break
  6223  		}
  6224  		c := auxIntToInt64(v_1.AuxInt)
  6225  		v.reset(OpOr8)
  6226  		v0 := b.NewValue0(v.Pos, OpLsh8x64, t)
  6227  		v1 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6228  		v1.AuxInt = int64ToAuxInt(c & 7)
  6229  		v0.AddArg2(x, v1)
  6230  		v2 := b.NewValue0(v.Pos, OpRsh8Ux64, t)
  6231  		v3 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6232  		v3.AuxInt = int64ToAuxInt(-c & 7)
  6233  		v2.AddArg2(x, v3)
  6234  		v.AddArg2(v0, v2)
  6235  		return true
  6236  	}
  6237  	return false
  6238  }
  6239  func rewriteValueMIPS64_OpRsh16Ux16(v *Value) bool {
  6240  	v_1 := v.Args[1]
  6241  	v_0 := v.Args[0]
  6242  	b := v.Block
  6243  	typ := &b.Func.Config.Types
  6244  	// match: (Rsh16Ux16 <t> x y)
  6245  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SRLV <t> (ZeroExt16to64 x) (ZeroExt16to64 y)))
  6246  	for {
  6247  		t := v.Type
  6248  		x := v_0
  6249  		y := v_1
  6250  		v.reset(OpMIPS64AND)
  6251  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  6252  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  6253  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6254  		v2.AuxInt = int64ToAuxInt(64)
  6255  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  6256  		v3.AddArg(y)
  6257  		v1.AddArg2(v2, v3)
  6258  		v0.AddArg(v1)
  6259  		v4 := b.NewValue0(v.Pos, OpMIPS64SRLV, t)
  6260  		v5 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  6261  		v5.AddArg(x)
  6262  		v4.AddArg2(v5, v3)
  6263  		v.AddArg2(v0, v4)
  6264  		return true
  6265  	}
  6266  }
  6267  func rewriteValueMIPS64_OpRsh16Ux32(v *Value) bool {
  6268  	v_1 := v.Args[1]
  6269  	v_0 := v.Args[0]
  6270  	b := v.Block
  6271  	typ := &b.Func.Config.Types
  6272  	// match: (Rsh16Ux32 <t> x y)
  6273  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SRLV <t> (ZeroExt16to64 x) (ZeroExt32to64 y)))
  6274  	for {
  6275  		t := v.Type
  6276  		x := v_0
  6277  		y := v_1
  6278  		v.reset(OpMIPS64AND)
  6279  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  6280  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  6281  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6282  		v2.AuxInt = int64ToAuxInt(64)
  6283  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  6284  		v3.AddArg(y)
  6285  		v1.AddArg2(v2, v3)
  6286  		v0.AddArg(v1)
  6287  		v4 := b.NewValue0(v.Pos, OpMIPS64SRLV, t)
  6288  		v5 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  6289  		v5.AddArg(x)
  6290  		v4.AddArg2(v5, v3)
  6291  		v.AddArg2(v0, v4)
  6292  		return true
  6293  	}
  6294  }
  6295  func rewriteValueMIPS64_OpRsh16Ux64(v *Value) bool {
  6296  	v_1 := v.Args[1]
  6297  	v_0 := v.Args[0]
  6298  	b := v.Block
  6299  	typ := &b.Func.Config.Types
  6300  	// match: (Rsh16Ux64 <t> x y)
  6301  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SRLV <t> (ZeroExt16to64 x) y))
  6302  	for {
  6303  		t := v.Type
  6304  		x := v_0
  6305  		y := v_1
  6306  		v.reset(OpMIPS64AND)
  6307  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  6308  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  6309  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6310  		v2.AuxInt = int64ToAuxInt(64)
  6311  		v1.AddArg2(v2, y)
  6312  		v0.AddArg(v1)
  6313  		v3 := b.NewValue0(v.Pos, OpMIPS64SRLV, t)
  6314  		v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  6315  		v4.AddArg(x)
  6316  		v3.AddArg2(v4, y)
  6317  		v.AddArg2(v0, v3)
  6318  		return true
  6319  	}
  6320  }
  6321  func rewriteValueMIPS64_OpRsh16Ux8(v *Value) bool {
  6322  	v_1 := v.Args[1]
  6323  	v_0 := v.Args[0]
  6324  	b := v.Block
  6325  	typ := &b.Func.Config.Types
  6326  	// match: (Rsh16Ux8 <t> x y)
  6327  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SRLV <t> (ZeroExt16to64 x) (ZeroExt8to64 y)))
  6328  	for {
  6329  		t := v.Type
  6330  		x := v_0
  6331  		y := v_1
  6332  		v.reset(OpMIPS64AND)
  6333  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  6334  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  6335  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6336  		v2.AuxInt = int64ToAuxInt(64)
  6337  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  6338  		v3.AddArg(y)
  6339  		v1.AddArg2(v2, v3)
  6340  		v0.AddArg(v1)
  6341  		v4 := b.NewValue0(v.Pos, OpMIPS64SRLV, t)
  6342  		v5 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  6343  		v5.AddArg(x)
  6344  		v4.AddArg2(v5, v3)
  6345  		v.AddArg2(v0, v4)
  6346  		return true
  6347  	}
  6348  }
  6349  func rewriteValueMIPS64_OpRsh16x16(v *Value) bool {
  6350  	v_1 := v.Args[1]
  6351  	v_0 := v.Args[0]
  6352  	b := v.Block
  6353  	typ := &b.Func.Config.Types
  6354  	// match: (Rsh16x16 <t> x y)
  6355  	// result: (SRAV (SignExt16to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt16to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt16to64 y)))
  6356  	for {
  6357  		t := v.Type
  6358  		x := v_0
  6359  		y := v_1
  6360  		v.reset(OpMIPS64SRAV)
  6361  		v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
  6362  		v0.AddArg(x)
  6363  		v1 := b.NewValue0(v.Pos, OpMIPS64OR, t)
  6364  		v2 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  6365  		v3 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  6366  		v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  6367  		v4.AddArg(y)
  6368  		v5 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6369  		v5.AuxInt = int64ToAuxInt(63)
  6370  		v3.AddArg2(v4, v5)
  6371  		v2.AddArg(v3)
  6372  		v1.AddArg2(v2, v4)
  6373  		v.AddArg2(v0, v1)
  6374  		return true
  6375  	}
  6376  }
  6377  func rewriteValueMIPS64_OpRsh16x32(v *Value) bool {
  6378  	v_1 := v.Args[1]
  6379  	v_0 := v.Args[0]
  6380  	b := v.Block
  6381  	typ := &b.Func.Config.Types
  6382  	// match: (Rsh16x32 <t> x y)
  6383  	// result: (SRAV (SignExt16to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt32to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt32to64 y)))
  6384  	for {
  6385  		t := v.Type
  6386  		x := v_0
  6387  		y := v_1
  6388  		v.reset(OpMIPS64SRAV)
  6389  		v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
  6390  		v0.AddArg(x)
  6391  		v1 := b.NewValue0(v.Pos, OpMIPS64OR, t)
  6392  		v2 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  6393  		v3 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  6394  		v4 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  6395  		v4.AddArg(y)
  6396  		v5 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6397  		v5.AuxInt = int64ToAuxInt(63)
  6398  		v3.AddArg2(v4, v5)
  6399  		v2.AddArg(v3)
  6400  		v1.AddArg2(v2, v4)
  6401  		v.AddArg2(v0, v1)
  6402  		return true
  6403  	}
  6404  }
  6405  func rewriteValueMIPS64_OpRsh16x64(v *Value) bool {
  6406  	v_1 := v.Args[1]
  6407  	v_0 := v.Args[0]
  6408  	b := v.Block
  6409  	typ := &b.Func.Config.Types
  6410  	// match: (Rsh16x64 <t> x y)
  6411  	// result: (SRAV (SignExt16to64 x) (OR <t> (NEGV <t> (SGTU y (MOVVconst <typ.UInt64> [63]))) y))
  6412  	for {
  6413  		t := v.Type
  6414  		x := v_0
  6415  		y := v_1
  6416  		v.reset(OpMIPS64SRAV)
  6417  		v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
  6418  		v0.AddArg(x)
  6419  		v1 := b.NewValue0(v.Pos, OpMIPS64OR, t)
  6420  		v2 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  6421  		v3 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  6422  		v4 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6423  		v4.AuxInt = int64ToAuxInt(63)
  6424  		v3.AddArg2(y, v4)
  6425  		v2.AddArg(v3)
  6426  		v1.AddArg2(v2, y)
  6427  		v.AddArg2(v0, v1)
  6428  		return true
  6429  	}
  6430  }
  6431  func rewriteValueMIPS64_OpRsh16x8(v *Value) bool {
  6432  	v_1 := v.Args[1]
  6433  	v_0 := v.Args[0]
  6434  	b := v.Block
  6435  	typ := &b.Func.Config.Types
  6436  	// match: (Rsh16x8 <t> x y)
  6437  	// result: (SRAV (SignExt16to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt8to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt8to64 y)))
  6438  	for {
  6439  		t := v.Type
  6440  		x := v_0
  6441  		y := v_1
  6442  		v.reset(OpMIPS64SRAV)
  6443  		v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
  6444  		v0.AddArg(x)
  6445  		v1 := b.NewValue0(v.Pos, OpMIPS64OR, t)
  6446  		v2 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  6447  		v3 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  6448  		v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  6449  		v4.AddArg(y)
  6450  		v5 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6451  		v5.AuxInt = int64ToAuxInt(63)
  6452  		v3.AddArg2(v4, v5)
  6453  		v2.AddArg(v3)
  6454  		v1.AddArg2(v2, v4)
  6455  		v.AddArg2(v0, v1)
  6456  		return true
  6457  	}
  6458  }
  6459  func rewriteValueMIPS64_OpRsh32Ux16(v *Value) bool {
  6460  	v_1 := v.Args[1]
  6461  	v_0 := v.Args[0]
  6462  	b := v.Block
  6463  	typ := &b.Func.Config.Types
  6464  	// match: (Rsh32Ux16 <t> x y)
  6465  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SRLV <t> (ZeroExt32to64 x) (ZeroExt16to64 y)))
  6466  	for {
  6467  		t := v.Type
  6468  		x := v_0
  6469  		y := v_1
  6470  		v.reset(OpMIPS64AND)
  6471  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  6472  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  6473  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6474  		v2.AuxInt = int64ToAuxInt(64)
  6475  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  6476  		v3.AddArg(y)
  6477  		v1.AddArg2(v2, v3)
  6478  		v0.AddArg(v1)
  6479  		v4 := b.NewValue0(v.Pos, OpMIPS64SRLV, t)
  6480  		v5 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  6481  		v5.AddArg(x)
  6482  		v4.AddArg2(v5, v3)
  6483  		v.AddArg2(v0, v4)
  6484  		return true
  6485  	}
  6486  }
  6487  func rewriteValueMIPS64_OpRsh32Ux32(v *Value) bool {
  6488  	v_1 := v.Args[1]
  6489  	v_0 := v.Args[0]
  6490  	b := v.Block
  6491  	typ := &b.Func.Config.Types
  6492  	// match: (Rsh32Ux32 <t> x y)
  6493  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SRLV <t> (ZeroExt32to64 x) (ZeroExt32to64 y)))
  6494  	for {
  6495  		t := v.Type
  6496  		x := v_0
  6497  		y := v_1
  6498  		v.reset(OpMIPS64AND)
  6499  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  6500  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  6501  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6502  		v2.AuxInt = int64ToAuxInt(64)
  6503  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  6504  		v3.AddArg(y)
  6505  		v1.AddArg2(v2, v3)
  6506  		v0.AddArg(v1)
  6507  		v4 := b.NewValue0(v.Pos, OpMIPS64SRLV, t)
  6508  		v5 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  6509  		v5.AddArg(x)
  6510  		v4.AddArg2(v5, v3)
  6511  		v.AddArg2(v0, v4)
  6512  		return true
  6513  	}
  6514  }
  6515  func rewriteValueMIPS64_OpRsh32Ux64(v *Value) bool {
  6516  	v_1 := v.Args[1]
  6517  	v_0 := v.Args[0]
  6518  	b := v.Block
  6519  	typ := &b.Func.Config.Types
  6520  	// match: (Rsh32Ux64 <t> x y)
  6521  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SRLV <t> (ZeroExt32to64 x) y))
  6522  	for {
  6523  		t := v.Type
  6524  		x := v_0
  6525  		y := v_1
  6526  		v.reset(OpMIPS64AND)
  6527  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  6528  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  6529  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6530  		v2.AuxInt = int64ToAuxInt(64)
  6531  		v1.AddArg2(v2, y)
  6532  		v0.AddArg(v1)
  6533  		v3 := b.NewValue0(v.Pos, OpMIPS64SRLV, t)
  6534  		v4 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  6535  		v4.AddArg(x)
  6536  		v3.AddArg2(v4, y)
  6537  		v.AddArg2(v0, v3)
  6538  		return true
  6539  	}
  6540  }
  6541  func rewriteValueMIPS64_OpRsh32Ux8(v *Value) bool {
  6542  	v_1 := v.Args[1]
  6543  	v_0 := v.Args[0]
  6544  	b := v.Block
  6545  	typ := &b.Func.Config.Types
  6546  	// match: (Rsh32Ux8 <t> x y)
  6547  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SRLV <t> (ZeroExt32to64 x) (ZeroExt8to64 y)))
  6548  	for {
  6549  		t := v.Type
  6550  		x := v_0
  6551  		y := v_1
  6552  		v.reset(OpMIPS64AND)
  6553  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  6554  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  6555  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6556  		v2.AuxInt = int64ToAuxInt(64)
  6557  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  6558  		v3.AddArg(y)
  6559  		v1.AddArg2(v2, v3)
  6560  		v0.AddArg(v1)
  6561  		v4 := b.NewValue0(v.Pos, OpMIPS64SRLV, t)
  6562  		v5 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  6563  		v5.AddArg(x)
  6564  		v4.AddArg2(v5, v3)
  6565  		v.AddArg2(v0, v4)
  6566  		return true
  6567  	}
  6568  }
  6569  func rewriteValueMIPS64_OpRsh32x16(v *Value) bool {
  6570  	v_1 := v.Args[1]
  6571  	v_0 := v.Args[0]
  6572  	b := v.Block
  6573  	typ := &b.Func.Config.Types
  6574  	// match: (Rsh32x16 <t> x y)
  6575  	// result: (SRAV (SignExt32to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt16to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt16to64 y)))
  6576  	for {
  6577  		t := v.Type
  6578  		x := v_0
  6579  		y := v_1
  6580  		v.reset(OpMIPS64SRAV)
  6581  		v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
  6582  		v0.AddArg(x)
  6583  		v1 := b.NewValue0(v.Pos, OpMIPS64OR, t)
  6584  		v2 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  6585  		v3 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  6586  		v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  6587  		v4.AddArg(y)
  6588  		v5 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6589  		v5.AuxInt = int64ToAuxInt(63)
  6590  		v3.AddArg2(v4, v5)
  6591  		v2.AddArg(v3)
  6592  		v1.AddArg2(v2, v4)
  6593  		v.AddArg2(v0, v1)
  6594  		return true
  6595  	}
  6596  }
  6597  func rewriteValueMIPS64_OpRsh32x32(v *Value) bool {
  6598  	v_1 := v.Args[1]
  6599  	v_0 := v.Args[0]
  6600  	b := v.Block
  6601  	typ := &b.Func.Config.Types
  6602  	// match: (Rsh32x32 <t> x y)
  6603  	// result: (SRAV (SignExt32to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt32to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt32to64 y)))
  6604  	for {
  6605  		t := v.Type
  6606  		x := v_0
  6607  		y := v_1
  6608  		v.reset(OpMIPS64SRAV)
  6609  		v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
  6610  		v0.AddArg(x)
  6611  		v1 := b.NewValue0(v.Pos, OpMIPS64OR, t)
  6612  		v2 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  6613  		v3 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  6614  		v4 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  6615  		v4.AddArg(y)
  6616  		v5 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6617  		v5.AuxInt = int64ToAuxInt(63)
  6618  		v3.AddArg2(v4, v5)
  6619  		v2.AddArg(v3)
  6620  		v1.AddArg2(v2, v4)
  6621  		v.AddArg2(v0, v1)
  6622  		return true
  6623  	}
  6624  }
  6625  func rewriteValueMIPS64_OpRsh32x64(v *Value) bool {
  6626  	v_1 := v.Args[1]
  6627  	v_0 := v.Args[0]
  6628  	b := v.Block
  6629  	typ := &b.Func.Config.Types
  6630  	// match: (Rsh32x64 <t> x y)
  6631  	// result: (SRAV (SignExt32to64 x) (OR <t> (NEGV <t> (SGTU y (MOVVconst <typ.UInt64> [63]))) y))
  6632  	for {
  6633  		t := v.Type
  6634  		x := v_0
  6635  		y := v_1
  6636  		v.reset(OpMIPS64SRAV)
  6637  		v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
  6638  		v0.AddArg(x)
  6639  		v1 := b.NewValue0(v.Pos, OpMIPS64OR, t)
  6640  		v2 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  6641  		v3 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  6642  		v4 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6643  		v4.AuxInt = int64ToAuxInt(63)
  6644  		v3.AddArg2(y, v4)
  6645  		v2.AddArg(v3)
  6646  		v1.AddArg2(v2, y)
  6647  		v.AddArg2(v0, v1)
  6648  		return true
  6649  	}
  6650  }
  6651  func rewriteValueMIPS64_OpRsh32x8(v *Value) bool {
  6652  	v_1 := v.Args[1]
  6653  	v_0 := v.Args[0]
  6654  	b := v.Block
  6655  	typ := &b.Func.Config.Types
  6656  	// match: (Rsh32x8 <t> x y)
  6657  	// result: (SRAV (SignExt32to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt8to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt8to64 y)))
  6658  	for {
  6659  		t := v.Type
  6660  		x := v_0
  6661  		y := v_1
  6662  		v.reset(OpMIPS64SRAV)
  6663  		v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
  6664  		v0.AddArg(x)
  6665  		v1 := b.NewValue0(v.Pos, OpMIPS64OR, t)
  6666  		v2 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  6667  		v3 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  6668  		v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  6669  		v4.AddArg(y)
  6670  		v5 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6671  		v5.AuxInt = int64ToAuxInt(63)
  6672  		v3.AddArg2(v4, v5)
  6673  		v2.AddArg(v3)
  6674  		v1.AddArg2(v2, v4)
  6675  		v.AddArg2(v0, v1)
  6676  		return true
  6677  	}
  6678  }
  6679  func rewriteValueMIPS64_OpRsh64Ux16(v *Value) bool {
  6680  	v_1 := v.Args[1]
  6681  	v_0 := v.Args[0]
  6682  	b := v.Block
  6683  	typ := &b.Func.Config.Types
  6684  	// match: (Rsh64Ux16 <t> x y)
  6685  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SRLV <t> x (ZeroExt16to64 y)))
  6686  	for {
  6687  		t := v.Type
  6688  		x := v_0
  6689  		y := v_1
  6690  		v.reset(OpMIPS64AND)
  6691  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  6692  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  6693  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6694  		v2.AuxInt = int64ToAuxInt(64)
  6695  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  6696  		v3.AddArg(y)
  6697  		v1.AddArg2(v2, v3)
  6698  		v0.AddArg(v1)
  6699  		v4 := b.NewValue0(v.Pos, OpMIPS64SRLV, t)
  6700  		v4.AddArg2(x, v3)
  6701  		v.AddArg2(v0, v4)
  6702  		return true
  6703  	}
  6704  }
  6705  func rewriteValueMIPS64_OpRsh64Ux32(v *Value) bool {
  6706  	v_1 := v.Args[1]
  6707  	v_0 := v.Args[0]
  6708  	b := v.Block
  6709  	typ := &b.Func.Config.Types
  6710  	// match: (Rsh64Ux32 <t> x y)
  6711  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SRLV <t> x (ZeroExt32to64 y)))
  6712  	for {
  6713  		t := v.Type
  6714  		x := v_0
  6715  		y := v_1
  6716  		v.reset(OpMIPS64AND)
  6717  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  6718  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  6719  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6720  		v2.AuxInt = int64ToAuxInt(64)
  6721  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  6722  		v3.AddArg(y)
  6723  		v1.AddArg2(v2, v3)
  6724  		v0.AddArg(v1)
  6725  		v4 := b.NewValue0(v.Pos, OpMIPS64SRLV, t)
  6726  		v4.AddArg2(x, v3)
  6727  		v.AddArg2(v0, v4)
  6728  		return true
  6729  	}
  6730  }
  6731  func rewriteValueMIPS64_OpRsh64Ux64(v *Value) bool {
  6732  	v_1 := v.Args[1]
  6733  	v_0 := v.Args[0]
  6734  	b := v.Block
  6735  	typ := &b.Func.Config.Types
  6736  	// match: (Rsh64Ux64 <t> x y)
  6737  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SRLV <t> x y))
  6738  	for {
  6739  		t := v.Type
  6740  		x := v_0
  6741  		y := v_1
  6742  		v.reset(OpMIPS64AND)
  6743  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  6744  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  6745  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6746  		v2.AuxInt = int64ToAuxInt(64)
  6747  		v1.AddArg2(v2, y)
  6748  		v0.AddArg(v1)
  6749  		v3 := b.NewValue0(v.Pos, OpMIPS64SRLV, t)
  6750  		v3.AddArg2(x, y)
  6751  		v.AddArg2(v0, v3)
  6752  		return true
  6753  	}
  6754  }
  6755  func rewriteValueMIPS64_OpRsh64Ux8(v *Value) bool {
  6756  	v_1 := v.Args[1]
  6757  	v_0 := v.Args[0]
  6758  	b := v.Block
  6759  	typ := &b.Func.Config.Types
  6760  	// match: (Rsh64Ux8 <t> x y)
  6761  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SRLV <t> x (ZeroExt8to64 y)))
  6762  	for {
  6763  		t := v.Type
  6764  		x := v_0
  6765  		y := v_1
  6766  		v.reset(OpMIPS64AND)
  6767  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  6768  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  6769  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6770  		v2.AuxInt = int64ToAuxInt(64)
  6771  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  6772  		v3.AddArg(y)
  6773  		v1.AddArg2(v2, v3)
  6774  		v0.AddArg(v1)
  6775  		v4 := b.NewValue0(v.Pos, OpMIPS64SRLV, t)
  6776  		v4.AddArg2(x, v3)
  6777  		v.AddArg2(v0, v4)
  6778  		return true
  6779  	}
  6780  }
  6781  func rewriteValueMIPS64_OpRsh64x16(v *Value) bool {
  6782  	v_1 := v.Args[1]
  6783  	v_0 := v.Args[0]
  6784  	b := v.Block
  6785  	typ := &b.Func.Config.Types
  6786  	// match: (Rsh64x16 <t> x y)
  6787  	// result: (SRAV x (OR <t> (NEGV <t> (SGTU (ZeroExt16to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt16to64 y)))
  6788  	for {
  6789  		t := v.Type
  6790  		x := v_0
  6791  		y := v_1
  6792  		v.reset(OpMIPS64SRAV)
  6793  		v0 := b.NewValue0(v.Pos, OpMIPS64OR, t)
  6794  		v1 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  6795  		v2 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  6796  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  6797  		v3.AddArg(y)
  6798  		v4 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6799  		v4.AuxInt = int64ToAuxInt(63)
  6800  		v2.AddArg2(v3, v4)
  6801  		v1.AddArg(v2)
  6802  		v0.AddArg2(v1, v3)
  6803  		v.AddArg2(x, v0)
  6804  		return true
  6805  	}
  6806  }
  6807  func rewriteValueMIPS64_OpRsh64x32(v *Value) bool {
  6808  	v_1 := v.Args[1]
  6809  	v_0 := v.Args[0]
  6810  	b := v.Block
  6811  	typ := &b.Func.Config.Types
  6812  	// match: (Rsh64x32 <t> x y)
  6813  	// result: (SRAV x (OR <t> (NEGV <t> (SGTU (ZeroExt32to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt32to64 y)))
  6814  	for {
  6815  		t := v.Type
  6816  		x := v_0
  6817  		y := v_1
  6818  		v.reset(OpMIPS64SRAV)
  6819  		v0 := b.NewValue0(v.Pos, OpMIPS64OR, t)
  6820  		v1 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  6821  		v2 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  6822  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  6823  		v3.AddArg(y)
  6824  		v4 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6825  		v4.AuxInt = int64ToAuxInt(63)
  6826  		v2.AddArg2(v3, v4)
  6827  		v1.AddArg(v2)
  6828  		v0.AddArg2(v1, v3)
  6829  		v.AddArg2(x, v0)
  6830  		return true
  6831  	}
  6832  }
  6833  func rewriteValueMIPS64_OpRsh64x64(v *Value) bool {
  6834  	v_1 := v.Args[1]
  6835  	v_0 := v.Args[0]
  6836  	b := v.Block
  6837  	typ := &b.Func.Config.Types
  6838  	// match: (Rsh64x64 <t> x y)
  6839  	// result: (SRAV x (OR <t> (NEGV <t> (SGTU y (MOVVconst <typ.UInt64> [63]))) y))
  6840  	for {
  6841  		t := v.Type
  6842  		x := v_0
  6843  		y := v_1
  6844  		v.reset(OpMIPS64SRAV)
  6845  		v0 := b.NewValue0(v.Pos, OpMIPS64OR, t)
  6846  		v1 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  6847  		v2 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  6848  		v3 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6849  		v3.AuxInt = int64ToAuxInt(63)
  6850  		v2.AddArg2(y, v3)
  6851  		v1.AddArg(v2)
  6852  		v0.AddArg2(v1, y)
  6853  		v.AddArg2(x, v0)
  6854  		return true
  6855  	}
  6856  }
  6857  func rewriteValueMIPS64_OpRsh64x8(v *Value) bool {
  6858  	v_1 := v.Args[1]
  6859  	v_0 := v.Args[0]
  6860  	b := v.Block
  6861  	typ := &b.Func.Config.Types
  6862  	// match: (Rsh64x8 <t> x y)
  6863  	// result: (SRAV x (OR <t> (NEGV <t> (SGTU (ZeroExt8to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt8to64 y)))
  6864  	for {
  6865  		t := v.Type
  6866  		x := v_0
  6867  		y := v_1
  6868  		v.reset(OpMIPS64SRAV)
  6869  		v0 := b.NewValue0(v.Pos, OpMIPS64OR, t)
  6870  		v1 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  6871  		v2 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  6872  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  6873  		v3.AddArg(y)
  6874  		v4 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6875  		v4.AuxInt = int64ToAuxInt(63)
  6876  		v2.AddArg2(v3, v4)
  6877  		v1.AddArg(v2)
  6878  		v0.AddArg2(v1, v3)
  6879  		v.AddArg2(x, v0)
  6880  		return true
  6881  	}
  6882  }
  6883  func rewriteValueMIPS64_OpRsh8Ux16(v *Value) bool {
  6884  	v_1 := v.Args[1]
  6885  	v_0 := v.Args[0]
  6886  	b := v.Block
  6887  	typ := &b.Func.Config.Types
  6888  	// match: (Rsh8Ux16 <t> x y)
  6889  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SRLV <t> (ZeroExt8to64 x) (ZeroExt16to64 y)))
  6890  	for {
  6891  		t := v.Type
  6892  		x := v_0
  6893  		y := v_1
  6894  		v.reset(OpMIPS64AND)
  6895  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  6896  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  6897  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6898  		v2.AuxInt = int64ToAuxInt(64)
  6899  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  6900  		v3.AddArg(y)
  6901  		v1.AddArg2(v2, v3)
  6902  		v0.AddArg(v1)
  6903  		v4 := b.NewValue0(v.Pos, OpMIPS64SRLV, t)
  6904  		v5 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  6905  		v5.AddArg(x)
  6906  		v4.AddArg2(v5, v3)
  6907  		v.AddArg2(v0, v4)
  6908  		return true
  6909  	}
  6910  }
  6911  func rewriteValueMIPS64_OpRsh8Ux32(v *Value) bool {
  6912  	v_1 := v.Args[1]
  6913  	v_0 := v.Args[0]
  6914  	b := v.Block
  6915  	typ := &b.Func.Config.Types
  6916  	// match: (Rsh8Ux32 <t> x y)
  6917  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SRLV <t> (ZeroExt8to64 x) (ZeroExt32to64 y)))
  6918  	for {
  6919  		t := v.Type
  6920  		x := v_0
  6921  		y := v_1
  6922  		v.reset(OpMIPS64AND)
  6923  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  6924  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  6925  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6926  		v2.AuxInt = int64ToAuxInt(64)
  6927  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  6928  		v3.AddArg(y)
  6929  		v1.AddArg2(v2, v3)
  6930  		v0.AddArg(v1)
  6931  		v4 := b.NewValue0(v.Pos, OpMIPS64SRLV, t)
  6932  		v5 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  6933  		v5.AddArg(x)
  6934  		v4.AddArg2(v5, v3)
  6935  		v.AddArg2(v0, v4)
  6936  		return true
  6937  	}
  6938  }
  6939  func rewriteValueMIPS64_OpRsh8Ux64(v *Value) bool {
  6940  	v_1 := v.Args[1]
  6941  	v_0 := v.Args[0]
  6942  	b := v.Block
  6943  	typ := &b.Func.Config.Types
  6944  	// match: (Rsh8Ux64 <t> x y)
  6945  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SRLV <t> (ZeroExt8to64 x) y))
  6946  	for {
  6947  		t := v.Type
  6948  		x := v_0
  6949  		y := v_1
  6950  		v.reset(OpMIPS64AND)
  6951  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  6952  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  6953  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6954  		v2.AuxInt = int64ToAuxInt(64)
  6955  		v1.AddArg2(v2, y)
  6956  		v0.AddArg(v1)
  6957  		v3 := b.NewValue0(v.Pos, OpMIPS64SRLV, t)
  6958  		v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  6959  		v4.AddArg(x)
  6960  		v3.AddArg2(v4, y)
  6961  		v.AddArg2(v0, v3)
  6962  		return true
  6963  	}
  6964  }
  6965  func rewriteValueMIPS64_OpRsh8Ux8(v *Value) bool {
  6966  	v_1 := v.Args[1]
  6967  	v_0 := v.Args[0]
  6968  	b := v.Block
  6969  	typ := &b.Func.Config.Types
  6970  	// match: (Rsh8Ux8 <t> x y)
  6971  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SRLV <t> (ZeroExt8to64 x) (ZeroExt8to64 y)))
  6972  	for {
  6973  		t := v.Type
  6974  		x := v_0
  6975  		y := v_1
  6976  		v.reset(OpMIPS64AND)
  6977  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  6978  		v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  6979  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  6980  		v2.AuxInt = int64ToAuxInt(64)
  6981  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  6982  		v3.AddArg(y)
  6983  		v1.AddArg2(v2, v3)
  6984  		v0.AddArg(v1)
  6985  		v4 := b.NewValue0(v.Pos, OpMIPS64SRLV, t)
  6986  		v5 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  6987  		v5.AddArg(x)
  6988  		v4.AddArg2(v5, v3)
  6989  		v.AddArg2(v0, v4)
  6990  		return true
  6991  	}
  6992  }
  6993  func rewriteValueMIPS64_OpRsh8x16(v *Value) bool {
  6994  	v_1 := v.Args[1]
  6995  	v_0 := v.Args[0]
  6996  	b := v.Block
  6997  	typ := &b.Func.Config.Types
  6998  	// match: (Rsh8x16 <t> x y)
  6999  	// result: (SRAV (SignExt8to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt16to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt16to64 y)))
  7000  	for {
  7001  		t := v.Type
  7002  		x := v_0
  7003  		y := v_1
  7004  		v.reset(OpMIPS64SRAV)
  7005  		v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
  7006  		v0.AddArg(x)
  7007  		v1 := b.NewValue0(v.Pos, OpMIPS64OR, t)
  7008  		v2 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  7009  		v3 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  7010  		v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  7011  		v4.AddArg(y)
  7012  		v5 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  7013  		v5.AuxInt = int64ToAuxInt(63)
  7014  		v3.AddArg2(v4, v5)
  7015  		v2.AddArg(v3)
  7016  		v1.AddArg2(v2, v4)
  7017  		v.AddArg2(v0, v1)
  7018  		return true
  7019  	}
  7020  }
  7021  func rewriteValueMIPS64_OpRsh8x32(v *Value) bool {
  7022  	v_1 := v.Args[1]
  7023  	v_0 := v.Args[0]
  7024  	b := v.Block
  7025  	typ := &b.Func.Config.Types
  7026  	// match: (Rsh8x32 <t> x y)
  7027  	// result: (SRAV (SignExt8to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt32to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt32to64 y)))
  7028  	for {
  7029  		t := v.Type
  7030  		x := v_0
  7031  		y := v_1
  7032  		v.reset(OpMIPS64SRAV)
  7033  		v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
  7034  		v0.AddArg(x)
  7035  		v1 := b.NewValue0(v.Pos, OpMIPS64OR, t)
  7036  		v2 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  7037  		v3 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  7038  		v4 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  7039  		v4.AddArg(y)
  7040  		v5 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  7041  		v5.AuxInt = int64ToAuxInt(63)
  7042  		v3.AddArg2(v4, v5)
  7043  		v2.AddArg(v3)
  7044  		v1.AddArg2(v2, v4)
  7045  		v.AddArg2(v0, v1)
  7046  		return true
  7047  	}
  7048  }
  7049  func rewriteValueMIPS64_OpRsh8x64(v *Value) bool {
  7050  	v_1 := v.Args[1]
  7051  	v_0 := v.Args[0]
  7052  	b := v.Block
  7053  	typ := &b.Func.Config.Types
  7054  	// match: (Rsh8x64 <t> x y)
  7055  	// result: (SRAV (SignExt8to64 x) (OR <t> (NEGV <t> (SGTU y (MOVVconst <typ.UInt64> [63]))) y))
  7056  	for {
  7057  		t := v.Type
  7058  		x := v_0
  7059  		y := v_1
  7060  		v.reset(OpMIPS64SRAV)
  7061  		v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
  7062  		v0.AddArg(x)
  7063  		v1 := b.NewValue0(v.Pos, OpMIPS64OR, t)
  7064  		v2 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  7065  		v3 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  7066  		v4 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  7067  		v4.AuxInt = int64ToAuxInt(63)
  7068  		v3.AddArg2(y, v4)
  7069  		v2.AddArg(v3)
  7070  		v1.AddArg2(v2, y)
  7071  		v.AddArg2(v0, v1)
  7072  		return true
  7073  	}
  7074  }
  7075  func rewriteValueMIPS64_OpRsh8x8(v *Value) bool {
  7076  	v_1 := v.Args[1]
  7077  	v_0 := v.Args[0]
  7078  	b := v.Block
  7079  	typ := &b.Func.Config.Types
  7080  	// match: (Rsh8x8 <t> x y)
  7081  	// result: (SRAV (SignExt8to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt8to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt8to64 y)))
  7082  	for {
  7083  		t := v.Type
  7084  		x := v_0
  7085  		y := v_1
  7086  		v.reset(OpMIPS64SRAV)
  7087  		v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
  7088  		v0.AddArg(x)
  7089  		v1 := b.NewValue0(v.Pos, OpMIPS64OR, t)
  7090  		v2 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  7091  		v3 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
  7092  		v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  7093  		v4.AddArg(y)
  7094  		v5 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  7095  		v5.AuxInt = int64ToAuxInt(63)
  7096  		v3.AddArg2(v4, v5)
  7097  		v2.AddArg(v3)
  7098  		v1.AddArg2(v2, v4)
  7099  		v.AddArg2(v0, v1)
  7100  		return true
  7101  	}
  7102  }
  7103  func rewriteValueMIPS64_OpSelect0(v *Value) bool {
  7104  	v_0 := v.Args[0]
  7105  	b := v.Block
  7106  	typ := &b.Func.Config.Types
  7107  	// match: (Select0 (Mul64uover x y))
  7108  	// result: (Select1 <typ.UInt64> (MULVU x y))
  7109  	for {
  7110  		if v_0.Op != OpMul64uover {
  7111  			break
  7112  		}
  7113  		y := v_0.Args[1]
  7114  		x := v_0.Args[0]
  7115  		v.reset(OpSelect1)
  7116  		v.Type = typ.UInt64
  7117  		v0 := b.NewValue0(v.Pos, OpMIPS64MULVU, types.NewTuple(typ.UInt64, typ.UInt64))
  7118  		v0.AddArg2(x, y)
  7119  		v.AddArg(v0)
  7120  		return true
  7121  	}
  7122  	// match: (Select0 <t> (Add64carry x y c))
  7123  	// result: (ADDV (ADDV <t> x y) c)
  7124  	for {
  7125  		t := v.Type
  7126  		if v_0.Op != OpAdd64carry {
  7127  			break
  7128  		}
  7129  		c := v_0.Args[2]
  7130  		x := v_0.Args[0]
  7131  		y := v_0.Args[1]
  7132  		v.reset(OpMIPS64ADDV)
  7133  		v0 := b.NewValue0(v.Pos, OpMIPS64ADDV, t)
  7134  		v0.AddArg2(x, y)
  7135  		v.AddArg2(v0, c)
  7136  		return true
  7137  	}
  7138  	// match: (Select0 <t> (Sub64borrow x y c))
  7139  	// result: (SUBV (SUBV <t> x y) c)
  7140  	for {
  7141  		t := v.Type
  7142  		if v_0.Op != OpSub64borrow {
  7143  			break
  7144  		}
  7145  		c := v_0.Args[2]
  7146  		x := v_0.Args[0]
  7147  		y := v_0.Args[1]
  7148  		v.reset(OpMIPS64SUBV)
  7149  		v0 := b.NewValue0(v.Pos, OpMIPS64SUBV, t)
  7150  		v0.AddArg2(x, y)
  7151  		v.AddArg2(v0, c)
  7152  		return true
  7153  	}
  7154  	// match: (Select0 (DIVVU _ (MOVVconst [1])))
  7155  	// result: (MOVVconst [0])
  7156  	for {
  7157  		if v_0.Op != OpMIPS64DIVVU {
  7158  			break
  7159  		}
  7160  		_ = v_0.Args[1]
  7161  		v_0_1 := v_0.Args[1]
  7162  		if v_0_1.Op != OpMIPS64MOVVconst || auxIntToInt64(v_0_1.AuxInt) != 1 {
  7163  			break
  7164  		}
  7165  		v.reset(OpMIPS64MOVVconst)
  7166  		v.AuxInt = int64ToAuxInt(0)
  7167  		return true
  7168  	}
  7169  	// match: (Select0 (DIVVU x (MOVVconst [c])))
  7170  	// cond: isPowerOfTwo(c)
  7171  	// result: (ANDconst [c-1] x)
  7172  	for {
  7173  		if v_0.Op != OpMIPS64DIVVU {
  7174  			break
  7175  		}
  7176  		_ = v_0.Args[1]
  7177  		x := v_0.Args[0]
  7178  		v_0_1 := v_0.Args[1]
  7179  		if v_0_1.Op != OpMIPS64MOVVconst {
  7180  			break
  7181  		}
  7182  		c := auxIntToInt64(v_0_1.AuxInt)
  7183  		if !(isPowerOfTwo(c)) {
  7184  			break
  7185  		}
  7186  		v.reset(OpMIPS64ANDconst)
  7187  		v.AuxInt = int64ToAuxInt(c - 1)
  7188  		v.AddArg(x)
  7189  		return true
  7190  	}
  7191  	// match: (Select0 (DIVV (MOVVconst [c]) (MOVVconst [d])))
  7192  	// cond: d != 0
  7193  	// result: (MOVVconst [c%d])
  7194  	for {
  7195  		if v_0.Op != OpMIPS64DIVV {
  7196  			break
  7197  		}
  7198  		_ = v_0.Args[1]
  7199  		v_0_0 := v_0.Args[0]
  7200  		if v_0_0.Op != OpMIPS64MOVVconst {
  7201  			break
  7202  		}
  7203  		c := auxIntToInt64(v_0_0.AuxInt)
  7204  		v_0_1 := v_0.Args[1]
  7205  		if v_0_1.Op != OpMIPS64MOVVconst {
  7206  			break
  7207  		}
  7208  		d := auxIntToInt64(v_0_1.AuxInt)
  7209  		if !(d != 0) {
  7210  			break
  7211  		}
  7212  		v.reset(OpMIPS64MOVVconst)
  7213  		v.AuxInt = int64ToAuxInt(c % d)
  7214  		return true
  7215  	}
  7216  	// match: (Select0 (DIVVU (MOVVconst [c]) (MOVVconst [d])))
  7217  	// cond: d != 0
  7218  	// result: (MOVVconst [int64(uint64(c)%uint64(d))])
  7219  	for {
  7220  		if v_0.Op != OpMIPS64DIVVU {
  7221  			break
  7222  		}
  7223  		_ = v_0.Args[1]
  7224  		v_0_0 := v_0.Args[0]
  7225  		if v_0_0.Op != OpMIPS64MOVVconst {
  7226  			break
  7227  		}
  7228  		c := auxIntToInt64(v_0_0.AuxInt)
  7229  		v_0_1 := v_0.Args[1]
  7230  		if v_0_1.Op != OpMIPS64MOVVconst {
  7231  			break
  7232  		}
  7233  		d := auxIntToInt64(v_0_1.AuxInt)
  7234  		if !(d != 0) {
  7235  			break
  7236  		}
  7237  		v.reset(OpMIPS64MOVVconst)
  7238  		v.AuxInt = int64ToAuxInt(int64(uint64(c) % uint64(d)))
  7239  		return true
  7240  	}
  7241  	return false
  7242  }
  7243  func rewriteValueMIPS64_OpSelect1(v *Value) bool {
  7244  	v_0 := v.Args[0]
  7245  	b := v.Block
  7246  	typ := &b.Func.Config.Types
  7247  	// match: (Select1 (Mul64uover x y))
  7248  	// result: (SGTU <typ.Bool> (Select0 <typ.UInt64> (MULVU x y)) (MOVVconst <typ.UInt64> [0]))
  7249  	for {
  7250  		if v_0.Op != OpMul64uover {
  7251  			break
  7252  		}
  7253  		y := v_0.Args[1]
  7254  		x := v_0.Args[0]
  7255  		v.reset(OpMIPS64SGTU)
  7256  		v.Type = typ.Bool
  7257  		v0 := b.NewValue0(v.Pos, OpSelect0, typ.UInt64)
  7258  		v1 := b.NewValue0(v.Pos, OpMIPS64MULVU, types.NewTuple(typ.UInt64, typ.UInt64))
  7259  		v1.AddArg2(x, y)
  7260  		v0.AddArg(v1)
  7261  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  7262  		v2.AuxInt = int64ToAuxInt(0)
  7263  		v.AddArg2(v0, v2)
  7264  		return true
  7265  	}
  7266  	// match: (Select1 <t> (Add64carry x y c))
  7267  	// result: (OR (SGTU <t> x s:(ADDV <t> x y)) (SGTU <t> s (ADDV <t> s c)))
  7268  	for {
  7269  		t := v.Type
  7270  		if v_0.Op != OpAdd64carry {
  7271  			break
  7272  		}
  7273  		c := v_0.Args[2]
  7274  		x := v_0.Args[0]
  7275  		y := v_0.Args[1]
  7276  		v.reset(OpMIPS64OR)
  7277  		v0 := b.NewValue0(v.Pos, OpMIPS64SGTU, t)
  7278  		s := b.NewValue0(v.Pos, OpMIPS64ADDV, t)
  7279  		s.AddArg2(x, y)
  7280  		v0.AddArg2(x, s)
  7281  		v2 := b.NewValue0(v.Pos, OpMIPS64SGTU, t)
  7282  		v3 := b.NewValue0(v.Pos, OpMIPS64ADDV, t)
  7283  		v3.AddArg2(s, c)
  7284  		v2.AddArg2(s, v3)
  7285  		v.AddArg2(v0, v2)
  7286  		return true
  7287  	}
  7288  	// match: (Select1 <t> (Sub64borrow x y c))
  7289  	// result: (OR (SGTU <t> s:(SUBV <t> x y) x) (SGTU <t> (SUBV <t> s c) s))
  7290  	for {
  7291  		t := v.Type
  7292  		if v_0.Op != OpSub64borrow {
  7293  			break
  7294  		}
  7295  		c := v_0.Args[2]
  7296  		x := v_0.Args[0]
  7297  		y := v_0.Args[1]
  7298  		v.reset(OpMIPS64OR)
  7299  		v0 := b.NewValue0(v.Pos, OpMIPS64SGTU, t)
  7300  		s := b.NewValue0(v.Pos, OpMIPS64SUBV, t)
  7301  		s.AddArg2(x, y)
  7302  		v0.AddArg2(s, x)
  7303  		v2 := b.NewValue0(v.Pos, OpMIPS64SGTU, t)
  7304  		v3 := b.NewValue0(v.Pos, OpMIPS64SUBV, t)
  7305  		v3.AddArg2(s, c)
  7306  		v2.AddArg2(v3, s)
  7307  		v.AddArg2(v0, v2)
  7308  		return true
  7309  	}
  7310  	// match: (Select1 (MULVU x (MOVVconst [-1])))
  7311  	// result: (NEGV x)
  7312  	for {
  7313  		if v_0.Op != OpMIPS64MULVU {
  7314  			break
  7315  		}
  7316  		_ = v_0.Args[1]
  7317  		v_0_0 := v_0.Args[0]
  7318  		v_0_1 := v_0.Args[1]
  7319  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  7320  			x := v_0_0
  7321  			if v_0_1.Op != OpMIPS64MOVVconst || auxIntToInt64(v_0_1.AuxInt) != -1 {
  7322  				continue
  7323  			}
  7324  			v.reset(OpMIPS64NEGV)
  7325  			v.AddArg(x)
  7326  			return true
  7327  		}
  7328  		break
  7329  	}
  7330  	// match: (Select1 (MULVU _ (MOVVconst [0])))
  7331  	// result: (MOVVconst [0])
  7332  	for {
  7333  		if v_0.Op != OpMIPS64MULVU {
  7334  			break
  7335  		}
  7336  		_ = v_0.Args[1]
  7337  		v_0_0 := v_0.Args[0]
  7338  		v_0_1 := v_0.Args[1]
  7339  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  7340  			if v_0_1.Op != OpMIPS64MOVVconst || auxIntToInt64(v_0_1.AuxInt) != 0 {
  7341  				continue
  7342  			}
  7343  			v.reset(OpMIPS64MOVVconst)
  7344  			v.AuxInt = int64ToAuxInt(0)
  7345  			return true
  7346  		}
  7347  		break
  7348  	}
  7349  	// match: (Select1 (MULVU x (MOVVconst [1])))
  7350  	// result: x
  7351  	for {
  7352  		if v_0.Op != OpMIPS64MULVU {
  7353  			break
  7354  		}
  7355  		_ = v_0.Args[1]
  7356  		v_0_0 := v_0.Args[0]
  7357  		v_0_1 := v_0.Args[1]
  7358  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  7359  			x := v_0_0
  7360  			if v_0_1.Op != OpMIPS64MOVVconst || auxIntToInt64(v_0_1.AuxInt) != 1 {
  7361  				continue
  7362  			}
  7363  			v.copyOf(x)
  7364  			return true
  7365  		}
  7366  		break
  7367  	}
  7368  	// match: (Select1 (MULVU x (MOVVconst [c])))
  7369  	// cond: isPowerOfTwo(c)
  7370  	// result: (SLLVconst [log64(c)] x)
  7371  	for {
  7372  		if v_0.Op != OpMIPS64MULVU {
  7373  			break
  7374  		}
  7375  		_ = v_0.Args[1]
  7376  		v_0_0 := v_0.Args[0]
  7377  		v_0_1 := v_0.Args[1]
  7378  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  7379  			x := v_0_0
  7380  			if v_0_1.Op != OpMIPS64MOVVconst {
  7381  				continue
  7382  			}
  7383  			c := auxIntToInt64(v_0_1.AuxInt)
  7384  			if !(isPowerOfTwo(c)) {
  7385  				continue
  7386  			}
  7387  			v.reset(OpMIPS64SLLVconst)
  7388  			v.AuxInt = int64ToAuxInt(log64(c))
  7389  			v.AddArg(x)
  7390  			return true
  7391  		}
  7392  		break
  7393  	}
  7394  	// match: (Select1 (DIVVU x (MOVVconst [1])))
  7395  	// result: x
  7396  	for {
  7397  		if v_0.Op != OpMIPS64DIVVU {
  7398  			break
  7399  		}
  7400  		_ = v_0.Args[1]
  7401  		x := v_0.Args[0]
  7402  		v_0_1 := v_0.Args[1]
  7403  		if v_0_1.Op != OpMIPS64MOVVconst || auxIntToInt64(v_0_1.AuxInt) != 1 {
  7404  			break
  7405  		}
  7406  		v.copyOf(x)
  7407  		return true
  7408  	}
  7409  	// match: (Select1 (DIVVU x (MOVVconst [c])))
  7410  	// cond: isPowerOfTwo(c)
  7411  	// result: (SRLVconst [log64(c)] x)
  7412  	for {
  7413  		if v_0.Op != OpMIPS64DIVVU {
  7414  			break
  7415  		}
  7416  		_ = v_0.Args[1]
  7417  		x := v_0.Args[0]
  7418  		v_0_1 := v_0.Args[1]
  7419  		if v_0_1.Op != OpMIPS64MOVVconst {
  7420  			break
  7421  		}
  7422  		c := auxIntToInt64(v_0_1.AuxInt)
  7423  		if !(isPowerOfTwo(c)) {
  7424  			break
  7425  		}
  7426  		v.reset(OpMIPS64SRLVconst)
  7427  		v.AuxInt = int64ToAuxInt(log64(c))
  7428  		v.AddArg(x)
  7429  		return true
  7430  	}
  7431  	// match: (Select1 (MULVU (MOVVconst [c]) (MOVVconst [d])))
  7432  	// result: (MOVVconst [c*d])
  7433  	for {
  7434  		if v_0.Op != OpMIPS64MULVU {
  7435  			break
  7436  		}
  7437  		_ = v_0.Args[1]
  7438  		v_0_0 := v_0.Args[0]
  7439  		v_0_1 := v_0.Args[1]
  7440  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  7441  			if v_0_0.Op != OpMIPS64MOVVconst {
  7442  				continue
  7443  			}
  7444  			c := auxIntToInt64(v_0_0.AuxInt)
  7445  			if v_0_1.Op != OpMIPS64MOVVconst {
  7446  				continue
  7447  			}
  7448  			d := auxIntToInt64(v_0_1.AuxInt)
  7449  			v.reset(OpMIPS64MOVVconst)
  7450  			v.AuxInt = int64ToAuxInt(c * d)
  7451  			return true
  7452  		}
  7453  		break
  7454  	}
  7455  	// match: (Select1 (DIVV (MOVVconst [c]) (MOVVconst [d])))
  7456  	// cond: d != 0
  7457  	// result: (MOVVconst [c/d])
  7458  	for {
  7459  		if v_0.Op != OpMIPS64DIVV {
  7460  			break
  7461  		}
  7462  		_ = v_0.Args[1]
  7463  		v_0_0 := v_0.Args[0]
  7464  		if v_0_0.Op != OpMIPS64MOVVconst {
  7465  			break
  7466  		}
  7467  		c := auxIntToInt64(v_0_0.AuxInt)
  7468  		v_0_1 := v_0.Args[1]
  7469  		if v_0_1.Op != OpMIPS64MOVVconst {
  7470  			break
  7471  		}
  7472  		d := auxIntToInt64(v_0_1.AuxInt)
  7473  		if !(d != 0) {
  7474  			break
  7475  		}
  7476  		v.reset(OpMIPS64MOVVconst)
  7477  		v.AuxInt = int64ToAuxInt(c / d)
  7478  		return true
  7479  	}
  7480  	// match: (Select1 (DIVVU (MOVVconst [c]) (MOVVconst [d])))
  7481  	// cond: d != 0
  7482  	// result: (MOVVconst [int64(uint64(c)/uint64(d))])
  7483  	for {
  7484  		if v_0.Op != OpMIPS64DIVVU {
  7485  			break
  7486  		}
  7487  		_ = v_0.Args[1]
  7488  		v_0_0 := v_0.Args[0]
  7489  		if v_0_0.Op != OpMIPS64MOVVconst {
  7490  			break
  7491  		}
  7492  		c := auxIntToInt64(v_0_0.AuxInt)
  7493  		v_0_1 := v_0.Args[1]
  7494  		if v_0_1.Op != OpMIPS64MOVVconst {
  7495  			break
  7496  		}
  7497  		d := auxIntToInt64(v_0_1.AuxInt)
  7498  		if !(d != 0) {
  7499  			break
  7500  		}
  7501  		v.reset(OpMIPS64MOVVconst)
  7502  		v.AuxInt = int64ToAuxInt(int64(uint64(c) / uint64(d)))
  7503  		return true
  7504  	}
  7505  	return false
  7506  }
  7507  func rewriteValueMIPS64_OpSlicemask(v *Value) bool {
  7508  	v_0 := v.Args[0]
  7509  	b := v.Block
  7510  	// match: (Slicemask <t> x)
  7511  	// result: (SRAVconst (NEGV <t> x) [63])
  7512  	for {
  7513  		t := v.Type
  7514  		x := v_0
  7515  		v.reset(OpMIPS64SRAVconst)
  7516  		v.AuxInt = int64ToAuxInt(63)
  7517  		v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
  7518  		v0.AddArg(x)
  7519  		v.AddArg(v0)
  7520  		return true
  7521  	}
  7522  }
  7523  func rewriteValueMIPS64_OpStore(v *Value) bool {
  7524  	v_2 := v.Args[2]
  7525  	v_1 := v.Args[1]
  7526  	v_0 := v.Args[0]
  7527  	// match: (Store {t} ptr val mem)
  7528  	// cond: t.Size() == 1
  7529  	// result: (MOVBstore ptr val mem)
  7530  	for {
  7531  		t := auxToType(v.Aux)
  7532  		ptr := v_0
  7533  		val := v_1
  7534  		mem := v_2
  7535  		if !(t.Size() == 1) {
  7536  			break
  7537  		}
  7538  		v.reset(OpMIPS64MOVBstore)
  7539  		v.AddArg3(ptr, val, mem)
  7540  		return true
  7541  	}
  7542  	// match: (Store {t} ptr val mem)
  7543  	// cond: t.Size() == 2
  7544  	// result: (MOVHstore ptr val mem)
  7545  	for {
  7546  		t := auxToType(v.Aux)
  7547  		ptr := v_0
  7548  		val := v_1
  7549  		mem := v_2
  7550  		if !(t.Size() == 2) {
  7551  			break
  7552  		}
  7553  		v.reset(OpMIPS64MOVHstore)
  7554  		v.AddArg3(ptr, val, mem)
  7555  		return true
  7556  	}
  7557  	// match: (Store {t} ptr val mem)
  7558  	// cond: t.Size() == 4 && !t.IsFloat()
  7559  	// result: (MOVWstore ptr val mem)
  7560  	for {
  7561  		t := auxToType(v.Aux)
  7562  		ptr := v_0
  7563  		val := v_1
  7564  		mem := v_2
  7565  		if !(t.Size() == 4 && !t.IsFloat()) {
  7566  			break
  7567  		}
  7568  		v.reset(OpMIPS64MOVWstore)
  7569  		v.AddArg3(ptr, val, mem)
  7570  		return true
  7571  	}
  7572  	// match: (Store {t} ptr val mem)
  7573  	// cond: t.Size() == 8 && !t.IsFloat()
  7574  	// result: (MOVVstore ptr val mem)
  7575  	for {
  7576  		t := auxToType(v.Aux)
  7577  		ptr := v_0
  7578  		val := v_1
  7579  		mem := v_2
  7580  		if !(t.Size() == 8 && !t.IsFloat()) {
  7581  			break
  7582  		}
  7583  		v.reset(OpMIPS64MOVVstore)
  7584  		v.AddArg3(ptr, val, mem)
  7585  		return true
  7586  	}
  7587  	// match: (Store {t} ptr val mem)
  7588  	// cond: t.Size() == 4 && t.IsFloat()
  7589  	// result: (MOVFstore ptr val mem)
  7590  	for {
  7591  		t := auxToType(v.Aux)
  7592  		ptr := v_0
  7593  		val := v_1
  7594  		mem := v_2
  7595  		if !(t.Size() == 4 && t.IsFloat()) {
  7596  			break
  7597  		}
  7598  		v.reset(OpMIPS64MOVFstore)
  7599  		v.AddArg3(ptr, val, mem)
  7600  		return true
  7601  	}
  7602  	// match: (Store {t} ptr val mem)
  7603  	// cond: t.Size() == 8 && t.IsFloat()
  7604  	// result: (MOVDstore ptr val mem)
  7605  	for {
  7606  		t := auxToType(v.Aux)
  7607  		ptr := v_0
  7608  		val := v_1
  7609  		mem := v_2
  7610  		if !(t.Size() == 8 && t.IsFloat()) {
  7611  			break
  7612  		}
  7613  		v.reset(OpMIPS64MOVDstore)
  7614  		v.AddArg3(ptr, val, mem)
  7615  		return true
  7616  	}
  7617  	return false
  7618  }
  7619  func rewriteValueMIPS64_OpZero(v *Value) bool {
  7620  	v_1 := v.Args[1]
  7621  	v_0 := v.Args[0]
  7622  	b := v.Block
  7623  	config := b.Func.Config
  7624  	typ := &b.Func.Config.Types
  7625  	// match: (Zero [0] _ mem)
  7626  	// result: mem
  7627  	for {
  7628  		if auxIntToInt64(v.AuxInt) != 0 {
  7629  			break
  7630  		}
  7631  		mem := v_1
  7632  		v.copyOf(mem)
  7633  		return true
  7634  	}
  7635  	// match: (Zero [1] ptr mem)
  7636  	// result: (MOVBstore ptr (MOVVconst [0]) mem)
  7637  	for {
  7638  		if auxIntToInt64(v.AuxInt) != 1 {
  7639  			break
  7640  		}
  7641  		ptr := v_0
  7642  		mem := v_1
  7643  		v.reset(OpMIPS64MOVBstore)
  7644  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  7645  		v0.AuxInt = int64ToAuxInt(0)
  7646  		v.AddArg3(ptr, v0, mem)
  7647  		return true
  7648  	}
  7649  	// match: (Zero [2] {t} ptr mem)
  7650  	// cond: t.Alignment()%2 == 0
  7651  	// result: (MOVHstore ptr (MOVVconst [0]) mem)
  7652  	for {
  7653  		if auxIntToInt64(v.AuxInt) != 2 {
  7654  			break
  7655  		}
  7656  		t := auxToType(v.Aux)
  7657  		ptr := v_0
  7658  		mem := v_1
  7659  		if !(t.Alignment()%2 == 0) {
  7660  			break
  7661  		}
  7662  		v.reset(OpMIPS64MOVHstore)
  7663  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  7664  		v0.AuxInt = int64ToAuxInt(0)
  7665  		v.AddArg3(ptr, v0, mem)
  7666  		return true
  7667  	}
  7668  	// match: (Zero [2] ptr mem)
  7669  	// result: (MOVBstore [1] ptr (MOVVconst [0]) (MOVBstore [0] ptr (MOVVconst [0]) mem))
  7670  	for {
  7671  		if auxIntToInt64(v.AuxInt) != 2 {
  7672  			break
  7673  		}
  7674  		ptr := v_0
  7675  		mem := v_1
  7676  		v.reset(OpMIPS64MOVBstore)
  7677  		v.AuxInt = int32ToAuxInt(1)
  7678  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  7679  		v0.AuxInt = int64ToAuxInt(0)
  7680  		v1 := b.NewValue0(v.Pos, OpMIPS64MOVBstore, types.TypeMem)
  7681  		v1.AuxInt = int32ToAuxInt(0)
  7682  		v1.AddArg3(ptr, v0, mem)
  7683  		v.AddArg3(ptr, v0, v1)
  7684  		return true
  7685  	}
  7686  	// match: (Zero [4] {t} ptr mem)
  7687  	// cond: t.Alignment()%4 == 0
  7688  	// result: (MOVWstore ptr (MOVVconst [0]) mem)
  7689  	for {
  7690  		if auxIntToInt64(v.AuxInt) != 4 {
  7691  			break
  7692  		}
  7693  		t := auxToType(v.Aux)
  7694  		ptr := v_0
  7695  		mem := v_1
  7696  		if !(t.Alignment()%4 == 0) {
  7697  			break
  7698  		}
  7699  		v.reset(OpMIPS64MOVWstore)
  7700  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  7701  		v0.AuxInt = int64ToAuxInt(0)
  7702  		v.AddArg3(ptr, v0, mem)
  7703  		return true
  7704  	}
  7705  	// match: (Zero [4] {t} ptr mem)
  7706  	// cond: t.Alignment()%2 == 0
  7707  	// result: (MOVHstore [2] ptr (MOVVconst [0]) (MOVHstore [0] ptr (MOVVconst [0]) mem))
  7708  	for {
  7709  		if auxIntToInt64(v.AuxInt) != 4 {
  7710  			break
  7711  		}
  7712  		t := auxToType(v.Aux)
  7713  		ptr := v_0
  7714  		mem := v_1
  7715  		if !(t.Alignment()%2 == 0) {
  7716  			break
  7717  		}
  7718  		v.reset(OpMIPS64MOVHstore)
  7719  		v.AuxInt = int32ToAuxInt(2)
  7720  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  7721  		v0.AuxInt = int64ToAuxInt(0)
  7722  		v1 := b.NewValue0(v.Pos, OpMIPS64MOVHstore, types.TypeMem)
  7723  		v1.AuxInt = int32ToAuxInt(0)
  7724  		v1.AddArg3(ptr, v0, mem)
  7725  		v.AddArg3(ptr, v0, v1)
  7726  		return true
  7727  	}
  7728  	// match: (Zero [4] ptr mem)
  7729  	// result: (MOVBstore [3] ptr (MOVVconst [0]) (MOVBstore [2] ptr (MOVVconst [0]) (MOVBstore [1] ptr (MOVVconst [0]) (MOVBstore [0] ptr (MOVVconst [0]) mem))))
  7730  	for {
  7731  		if auxIntToInt64(v.AuxInt) != 4 {
  7732  			break
  7733  		}
  7734  		ptr := v_0
  7735  		mem := v_1
  7736  		v.reset(OpMIPS64MOVBstore)
  7737  		v.AuxInt = int32ToAuxInt(3)
  7738  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  7739  		v0.AuxInt = int64ToAuxInt(0)
  7740  		v1 := b.NewValue0(v.Pos, OpMIPS64MOVBstore, types.TypeMem)
  7741  		v1.AuxInt = int32ToAuxInt(2)
  7742  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVBstore, types.TypeMem)
  7743  		v2.AuxInt = int32ToAuxInt(1)
  7744  		v3 := b.NewValue0(v.Pos, OpMIPS64MOVBstore, types.TypeMem)
  7745  		v3.AuxInt = int32ToAuxInt(0)
  7746  		v3.AddArg3(ptr, v0, mem)
  7747  		v2.AddArg3(ptr, v0, v3)
  7748  		v1.AddArg3(ptr, v0, v2)
  7749  		v.AddArg3(ptr, v0, v1)
  7750  		return true
  7751  	}
  7752  	// match: (Zero [8] {t} ptr mem)
  7753  	// cond: t.Alignment()%8 == 0
  7754  	// result: (MOVVstore ptr (MOVVconst [0]) mem)
  7755  	for {
  7756  		if auxIntToInt64(v.AuxInt) != 8 {
  7757  			break
  7758  		}
  7759  		t := auxToType(v.Aux)
  7760  		ptr := v_0
  7761  		mem := v_1
  7762  		if !(t.Alignment()%8 == 0) {
  7763  			break
  7764  		}
  7765  		v.reset(OpMIPS64MOVVstore)
  7766  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  7767  		v0.AuxInt = int64ToAuxInt(0)
  7768  		v.AddArg3(ptr, v0, mem)
  7769  		return true
  7770  	}
  7771  	// match: (Zero [8] {t} ptr mem)
  7772  	// cond: t.Alignment()%4 == 0
  7773  	// result: (MOVWstore [4] ptr (MOVVconst [0]) (MOVWstore [0] ptr (MOVVconst [0]) mem))
  7774  	for {
  7775  		if auxIntToInt64(v.AuxInt) != 8 {
  7776  			break
  7777  		}
  7778  		t := auxToType(v.Aux)
  7779  		ptr := v_0
  7780  		mem := v_1
  7781  		if !(t.Alignment()%4 == 0) {
  7782  			break
  7783  		}
  7784  		v.reset(OpMIPS64MOVWstore)
  7785  		v.AuxInt = int32ToAuxInt(4)
  7786  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  7787  		v0.AuxInt = int64ToAuxInt(0)
  7788  		v1 := b.NewValue0(v.Pos, OpMIPS64MOVWstore, types.TypeMem)
  7789  		v1.AuxInt = int32ToAuxInt(0)
  7790  		v1.AddArg3(ptr, v0, mem)
  7791  		v.AddArg3(ptr, v0, v1)
  7792  		return true
  7793  	}
  7794  	// match: (Zero [8] {t} ptr mem)
  7795  	// cond: t.Alignment()%2 == 0
  7796  	// result: (MOVHstore [6] ptr (MOVVconst [0]) (MOVHstore [4] ptr (MOVVconst [0]) (MOVHstore [2] ptr (MOVVconst [0]) (MOVHstore [0] ptr (MOVVconst [0]) mem))))
  7797  	for {
  7798  		if auxIntToInt64(v.AuxInt) != 8 {
  7799  			break
  7800  		}
  7801  		t := auxToType(v.Aux)
  7802  		ptr := v_0
  7803  		mem := v_1
  7804  		if !(t.Alignment()%2 == 0) {
  7805  			break
  7806  		}
  7807  		v.reset(OpMIPS64MOVHstore)
  7808  		v.AuxInt = int32ToAuxInt(6)
  7809  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  7810  		v0.AuxInt = int64ToAuxInt(0)
  7811  		v1 := b.NewValue0(v.Pos, OpMIPS64MOVHstore, types.TypeMem)
  7812  		v1.AuxInt = int32ToAuxInt(4)
  7813  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVHstore, types.TypeMem)
  7814  		v2.AuxInt = int32ToAuxInt(2)
  7815  		v3 := b.NewValue0(v.Pos, OpMIPS64MOVHstore, types.TypeMem)
  7816  		v3.AuxInt = int32ToAuxInt(0)
  7817  		v3.AddArg3(ptr, v0, mem)
  7818  		v2.AddArg3(ptr, v0, v3)
  7819  		v1.AddArg3(ptr, v0, v2)
  7820  		v.AddArg3(ptr, v0, v1)
  7821  		return true
  7822  	}
  7823  	// match: (Zero [3] ptr mem)
  7824  	// result: (MOVBstore [2] ptr (MOVVconst [0]) (MOVBstore [1] ptr (MOVVconst [0]) (MOVBstore [0] ptr (MOVVconst [0]) mem)))
  7825  	for {
  7826  		if auxIntToInt64(v.AuxInt) != 3 {
  7827  			break
  7828  		}
  7829  		ptr := v_0
  7830  		mem := v_1
  7831  		v.reset(OpMIPS64MOVBstore)
  7832  		v.AuxInt = int32ToAuxInt(2)
  7833  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  7834  		v0.AuxInt = int64ToAuxInt(0)
  7835  		v1 := b.NewValue0(v.Pos, OpMIPS64MOVBstore, types.TypeMem)
  7836  		v1.AuxInt = int32ToAuxInt(1)
  7837  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVBstore, types.TypeMem)
  7838  		v2.AuxInt = int32ToAuxInt(0)
  7839  		v2.AddArg3(ptr, v0, mem)
  7840  		v1.AddArg3(ptr, v0, v2)
  7841  		v.AddArg3(ptr, v0, v1)
  7842  		return true
  7843  	}
  7844  	// match: (Zero [6] {t} ptr mem)
  7845  	// cond: t.Alignment()%2 == 0
  7846  	// result: (MOVHstore [4] ptr (MOVVconst [0]) (MOVHstore [2] ptr (MOVVconst [0]) (MOVHstore [0] ptr (MOVVconst [0]) mem)))
  7847  	for {
  7848  		if auxIntToInt64(v.AuxInt) != 6 {
  7849  			break
  7850  		}
  7851  		t := auxToType(v.Aux)
  7852  		ptr := v_0
  7853  		mem := v_1
  7854  		if !(t.Alignment()%2 == 0) {
  7855  			break
  7856  		}
  7857  		v.reset(OpMIPS64MOVHstore)
  7858  		v.AuxInt = int32ToAuxInt(4)
  7859  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  7860  		v0.AuxInt = int64ToAuxInt(0)
  7861  		v1 := b.NewValue0(v.Pos, OpMIPS64MOVHstore, types.TypeMem)
  7862  		v1.AuxInt = int32ToAuxInt(2)
  7863  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVHstore, types.TypeMem)
  7864  		v2.AuxInt = int32ToAuxInt(0)
  7865  		v2.AddArg3(ptr, v0, mem)
  7866  		v1.AddArg3(ptr, v0, v2)
  7867  		v.AddArg3(ptr, v0, v1)
  7868  		return true
  7869  	}
  7870  	// match: (Zero [12] {t} ptr mem)
  7871  	// cond: t.Alignment()%4 == 0
  7872  	// result: (MOVWstore [8] ptr (MOVVconst [0]) (MOVWstore [4] ptr (MOVVconst [0]) (MOVWstore [0] ptr (MOVVconst [0]) mem)))
  7873  	for {
  7874  		if auxIntToInt64(v.AuxInt) != 12 {
  7875  			break
  7876  		}
  7877  		t := auxToType(v.Aux)
  7878  		ptr := v_0
  7879  		mem := v_1
  7880  		if !(t.Alignment()%4 == 0) {
  7881  			break
  7882  		}
  7883  		v.reset(OpMIPS64MOVWstore)
  7884  		v.AuxInt = int32ToAuxInt(8)
  7885  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  7886  		v0.AuxInt = int64ToAuxInt(0)
  7887  		v1 := b.NewValue0(v.Pos, OpMIPS64MOVWstore, types.TypeMem)
  7888  		v1.AuxInt = int32ToAuxInt(4)
  7889  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVWstore, types.TypeMem)
  7890  		v2.AuxInt = int32ToAuxInt(0)
  7891  		v2.AddArg3(ptr, v0, mem)
  7892  		v1.AddArg3(ptr, v0, v2)
  7893  		v.AddArg3(ptr, v0, v1)
  7894  		return true
  7895  	}
  7896  	// match: (Zero [16] {t} ptr mem)
  7897  	// cond: t.Alignment()%8 == 0
  7898  	// result: (MOVVstore [8] ptr (MOVVconst [0]) (MOVVstore [0] ptr (MOVVconst [0]) mem))
  7899  	for {
  7900  		if auxIntToInt64(v.AuxInt) != 16 {
  7901  			break
  7902  		}
  7903  		t := auxToType(v.Aux)
  7904  		ptr := v_0
  7905  		mem := v_1
  7906  		if !(t.Alignment()%8 == 0) {
  7907  			break
  7908  		}
  7909  		v.reset(OpMIPS64MOVVstore)
  7910  		v.AuxInt = int32ToAuxInt(8)
  7911  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  7912  		v0.AuxInt = int64ToAuxInt(0)
  7913  		v1 := b.NewValue0(v.Pos, OpMIPS64MOVVstore, types.TypeMem)
  7914  		v1.AuxInt = int32ToAuxInt(0)
  7915  		v1.AddArg3(ptr, v0, mem)
  7916  		v.AddArg3(ptr, v0, v1)
  7917  		return true
  7918  	}
  7919  	// match: (Zero [24] {t} ptr mem)
  7920  	// cond: t.Alignment()%8 == 0
  7921  	// result: (MOVVstore [16] ptr (MOVVconst [0]) (MOVVstore [8] ptr (MOVVconst [0]) (MOVVstore [0] ptr (MOVVconst [0]) mem)))
  7922  	for {
  7923  		if auxIntToInt64(v.AuxInt) != 24 {
  7924  			break
  7925  		}
  7926  		t := auxToType(v.Aux)
  7927  		ptr := v_0
  7928  		mem := v_1
  7929  		if !(t.Alignment()%8 == 0) {
  7930  			break
  7931  		}
  7932  		v.reset(OpMIPS64MOVVstore)
  7933  		v.AuxInt = int32ToAuxInt(16)
  7934  		v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
  7935  		v0.AuxInt = int64ToAuxInt(0)
  7936  		v1 := b.NewValue0(v.Pos, OpMIPS64MOVVstore, types.TypeMem)
  7937  		v1.AuxInt = int32ToAuxInt(8)
  7938  		v2 := b.NewValue0(v.Pos, OpMIPS64MOVVstore, types.TypeMem)
  7939  		v2.AuxInt = int32ToAuxInt(0)
  7940  		v2.AddArg3(ptr, v0, mem)
  7941  		v1.AddArg3(ptr, v0, v2)
  7942  		v.AddArg3(ptr, v0, v1)
  7943  		return true
  7944  	}
  7945  	// match: (Zero [s] {t} ptr mem)
  7946  	// cond: s%8 == 0 && s > 24 && s <= 8*128 && t.Alignment()%8 == 0
  7947  	// result: (DUFFZERO [8 * (128 - s/8)] ptr mem)
  7948  	for {
  7949  		s := auxIntToInt64(v.AuxInt)
  7950  		t := auxToType(v.Aux)
  7951  		ptr := v_0
  7952  		mem := v_1
  7953  		if !(s%8 == 0 && s > 24 && s <= 8*128 && t.Alignment()%8 == 0) {
  7954  			break
  7955  		}
  7956  		v.reset(OpMIPS64DUFFZERO)
  7957  		v.AuxInt = int64ToAuxInt(8 * (128 - s/8))
  7958  		v.AddArg2(ptr, mem)
  7959  		return true
  7960  	}
  7961  	// match: (Zero [s] {t} ptr mem)
  7962  	// cond: s > 8*128 || t.Alignment()%8 != 0
  7963  	// result: (LoweredZero [t.Alignment()] ptr (ADDVconst <ptr.Type> ptr [s-moveSize(t.Alignment(), config)]) mem)
  7964  	for {
  7965  		s := auxIntToInt64(v.AuxInt)
  7966  		t := auxToType(v.Aux)
  7967  		ptr := v_0
  7968  		mem := v_1
  7969  		if !(s > 8*128 || t.Alignment()%8 != 0) {
  7970  			break
  7971  		}
  7972  		v.reset(OpMIPS64LoweredZero)
  7973  		v.AuxInt = int64ToAuxInt(t.Alignment())
  7974  		v0 := b.NewValue0(v.Pos, OpMIPS64ADDVconst, ptr.Type)
  7975  		v0.AuxInt = int64ToAuxInt(s - moveSize(t.Alignment(), config))
  7976  		v0.AddArg(ptr)
  7977  		v.AddArg3(ptr, v0, mem)
  7978  		return true
  7979  	}
  7980  	return false
  7981  }
  7982  func rewriteBlockMIPS64(b *Block) bool {
  7983  	switch b.Kind {
  7984  	case BlockMIPS64EQ:
  7985  		// match: (EQ (FPFlagTrue cmp) yes no)
  7986  		// result: (FPF cmp yes no)
  7987  		for b.Controls[0].Op == OpMIPS64FPFlagTrue {
  7988  			v_0 := b.Controls[0]
  7989  			cmp := v_0.Args[0]
  7990  			b.resetWithControl(BlockMIPS64FPF, cmp)
  7991  			return true
  7992  		}
  7993  		// match: (EQ (FPFlagFalse cmp) yes no)
  7994  		// result: (FPT cmp yes no)
  7995  		for b.Controls[0].Op == OpMIPS64FPFlagFalse {
  7996  			v_0 := b.Controls[0]
  7997  			cmp := v_0.Args[0]
  7998  			b.resetWithControl(BlockMIPS64FPT, cmp)
  7999  			return true
  8000  		}
  8001  		// match: (EQ (XORconst [1] cmp:(SGT _ _)) yes no)
  8002  		// result: (NE cmp yes no)
  8003  		for b.Controls[0].Op == OpMIPS64XORconst {
  8004  			v_0 := b.Controls[0]
  8005  			if auxIntToInt64(v_0.AuxInt) != 1 {
  8006  				break
  8007  			}
  8008  			cmp := v_0.Args[0]
  8009  			if cmp.Op != OpMIPS64SGT {
  8010  				break
  8011  			}
  8012  			b.resetWithControl(BlockMIPS64NE, cmp)
  8013  			return true
  8014  		}
  8015  		// match: (EQ (XORconst [1] cmp:(SGTU _ _)) yes no)
  8016  		// result: (NE cmp yes no)
  8017  		for b.Controls[0].Op == OpMIPS64XORconst {
  8018  			v_0 := b.Controls[0]
  8019  			if auxIntToInt64(v_0.AuxInt) != 1 {
  8020  				break
  8021  			}
  8022  			cmp := v_0.Args[0]
  8023  			if cmp.Op != OpMIPS64SGTU {
  8024  				break
  8025  			}
  8026  			b.resetWithControl(BlockMIPS64NE, cmp)
  8027  			return true
  8028  		}
  8029  		// match: (EQ (XORconst [1] cmp:(SGTconst _)) yes no)
  8030  		// result: (NE cmp yes no)
  8031  		for b.Controls[0].Op == OpMIPS64XORconst {
  8032  			v_0 := b.Controls[0]
  8033  			if auxIntToInt64(v_0.AuxInt) != 1 {
  8034  				break
  8035  			}
  8036  			cmp := v_0.Args[0]
  8037  			if cmp.Op != OpMIPS64SGTconst {
  8038  				break
  8039  			}
  8040  			b.resetWithControl(BlockMIPS64NE, cmp)
  8041  			return true
  8042  		}
  8043  		// match: (EQ (XORconst [1] cmp:(SGTUconst _)) yes no)
  8044  		// result: (NE cmp yes no)
  8045  		for b.Controls[0].Op == OpMIPS64XORconst {
  8046  			v_0 := b.Controls[0]
  8047  			if auxIntToInt64(v_0.AuxInt) != 1 {
  8048  				break
  8049  			}
  8050  			cmp := v_0.Args[0]
  8051  			if cmp.Op != OpMIPS64SGTUconst {
  8052  				break
  8053  			}
  8054  			b.resetWithControl(BlockMIPS64NE, cmp)
  8055  			return true
  8056  		}
  8057  		// match: (EQ (SGTUconst [1] x) yes no)
  8058  		// result: (NE x yes no)
  8059  		for b.Controls[0].Op == OpMIPS64SGTUconst {
  8060  			v_0 := b.Controls[0]
  8061  			if auxIntToInt64(v_0.AuxInt) != 1 {
  8062  				break
  8063  			}
  8064  			x := v_0.Args[0]
  8065  			b.resetWithControl(BlockMIPS64NE, x)
  8066  			return true
  8067  		}
  8068  		// match: (EQ (SGTU x (MOVVconst [0])) yes no)
  8069  		// result: (EQ x yes no)
  8070  		for b.Controls[0].Op == OpMIPS64SGTU {
  8071  			v_0 := b.Controls[0]
  8072  			_ = v_0.Args[1]
  8073  			x := v_0.Args[0]
  8074  			v_0_1 := v_0.Args[1]
  8075  			if v_0_1.Op != OpMIPS64MOVVconst || auxIntToInt64(v_0_1.AuxInt) != 0 {
  8076  				break
  8077  			}
  8078  			b.resetWithControl(BlockMIPS64EQ, x)
  8079  			return true
  8080  		}
  8081  		// match: (EQ (SGTconst [0] x) yes no)
  8082  		// result: (GEZ x yes no)
  8083  		for b.Controls[0].Op == OpMIPS64SGTconst {
  8084  			v_0 := b.Controls[0]
  8085  			if auxIntToInt64(v_0.AuxInt) != 0 {
  8086  				break
  8087  			}
  8088  			x := v_0.Args[0]
  8089  			b.resetWithControl(BlockMIPS64GEZ, x)
  8090  			return true
  8091  		}
  8092  		// match: (EQ (SGT x (MOVVconst [0])) yes no)
  8093  		// result: (LEZ x yes no)
  8094  		for b.Controls[0].Op == OpMIPS64SGT {
  8095  			v_0 := b.Controls[0]
  8096  			_ = v_0.Args[1]
  8097  			x := v_0.Args[0]
  8098  			v_0_1 := v_0.Args[1]
  8099  			if v_0_1.Op != OpMIPS64MOVVconst || auxIntToInt64(v_0_1.AuxInt) != 0 {
  8100  				break
  8101  			}
  8102  			b.resetWithControl(BlockMIPS64LEZ, x)
  8103  			return true
  8104  		}
  8105  		// match: (EQ (MOVVconst [0]) yes no)
  8106  		// result: (First yes no)
  8107  		for b.Controls[0].Op == OpMIPS64MOVVconst {
  8108  			v_0 := b.Controls[0]
  8109  			if auxIntToInt64(v_0.AuxInt) != 0 {
  8110  				break
  8111  			}
  8112  			b.Reset(BlockFirst)
  8113  			return true
  8114  		}
  8115  		// match: (EQ (MOVVconst [c]) yes no)
  8116  		// cond: c != 0
  8117  		// result: (First no yes)
  8118  		for b.Controls[0].Op == OpMIPS64MOVVconst {
  8119  			v_0 := b.Controls[0]
  8120  			c := auxIntToInt64(v_0.AuxInt)
  8121  			if !(c != 0) {
  8122  				break
  8123  			}
  8124  			b.Reset(BlockFirst)
  8125  			b.swapSuccessors()
  8126  			return true
  8127  		}
  8128  	case BlockMIPS64GEZ:
  8129  		// match: (GEZ (MOVVconst [c]) yes no)
  8130  		// cond: c >= 0
  8131  		// result: (First yes no)
  8132  		for b.Controls[0].Op == OpMIPS64MOVVconst {
  8133  			v_0 := b.Controls[0]
  8134  			c := auxIntToInt64(v_0.AuxInt)
  8135  			if !(c >= 0) {
  8136  				break
  8137  			}
  8138  			b.Reset(BlockFirst)
  8139  			return true
  8140  		}
  8141  		// match: (GEZ (MOVVconst [c]) yes no)
  8142  		// cond: c < 0
  8143  		// result: (First no yes)
  8144  		for b.Controls[0].Op == OpMIPS64MOVVconst {
  8145  			v_0 := b.Controls[0]
  8146  			c := auxIntToInt64(v_0.AuxInt)
  8147  			if !(c < 0) {
  8148  				break
  8149  			}
  8150  			b.Reset(BlockFirst)
  8151  			b.swapSuccessors()
  8152  			return true
  8153  		}
  8154  	case BlockMIPS64GTZ:
  8155  		// match: (GTZ (MOVVconst [c]) yes no)
  8156  		// cond: c > 0
  8157  		// result: (First yes no)
  8158  		for b.Controls[0].Op == OpMIPS64MOVVconst {
  8159  			v_0 := b.Controls[0]
  8160  			c := auxIntToInt64(v_0.AuxInt)
  8161  			if !(c > 0) {
  8162  				break
  8163  			}
  8164  			b.Reset(BlockFirst)
  8165  			return true
  8166  		}
  8167  		// match: (GTZ (MOVVconst [c]) yes no)
  8168  		// cond: c <= 0
  8169  		// result: (First no yes)
  8170  		for b.Controls[0].Op == OpMIPS64MOVVconst {
  8171  			v_0 := b.Controls[0]
  8172  			c := auxIntToInt64(v_0.AuxInt)
  8173  			if !(c <= 0) {
  8174  				break
  8175  			}
  8176  			b.Reset(BlockFirst)
  8177  			b.swapSuccessors()
  8178  			return true
  8179  		}
  8180  	case BlockIf:
  8181  		// match: (If cond yes no)
  8182  		// result: (NE cond yes no)
  8183  		for {
  8184  			cond := b.Controls[0]
  8185  			b.resetWithControl(BlockMIPS64NE, cond)
  8186  			return true
  8187  		}
  8188  	case BlockMIPS64LEZ:
  8189  		// match: (LEZ (MOVVconst [c]) yes no)
  8190  		// cond: c <= 0
  8191  		// result: (First yes no)
  8192  		for b.Controls[0].Op == OpMIPS64MOVVconst {
  8193  			v_0 := b.Controls[0]
  8194  			c := auxIntToInt64(v_0.AuxInt)
  8195  			if !(c <= 0) {
  8196  				break
  8197  			}
  8198  			b.Reset(BlockFirst)
  8199  			return true
  8200  		}
  8201  		// match: (LEZ (MOVVconst [c]) yes no)
  8202  		// cond: c > 0
  8203  		// result: (First no yes)
  8204  		for b.Controls[0].Op == OpMIPS64MOVVconst {
  8205  			v_0 := b.Controls[0]
  8206  			c := auxIntToInt64(v_0.AuxInt)
  8207  			if !(c > 0) {
  8208  				break
  8209  			}
  8210  			b.Reset(BlockFirst)
  8211  			b.swapSuccessors()
  8212  			return true
  8213  		}
  8214  	case BlockMIPS64LTZ:
  8215  		// match: (LTZ (MOVVconst [c]) yes no)
  8216  		// cond: c < 0
  8217  		// result: (First yes no)
  8218  		for b.Controls[0].Op == OpMIPS64MOVVconst {
  8219  			v_0 := b.Controls[0]
  8220  			c := auxIntToInt64(v_0.AuxInt)
  8221  			if !(c < 0) {
  8222  				break
  8223  			}
  8224  			b.Reset(BlockFirst)
  8225  			return true
  8226  		}
  8227  		// match: (LTZ (MOVVconst [c]) yes no)
  8228  		// cond: c >= 0
  8229  		// result: (First no yes)
  8230  		for b.Controls[0].Op == OpMIPS64MOVVconst {
  8231  			v_0 := b.Controls[0]
  8232  			c := auxIntToInt64(v_0.AuxInt)
  8233  			if !(c >= 0) {
  8234  				break
  8235  			}
  8236  			b.Reset(BlockFirst)
  8237  			b.swapSuccessors()
  8238  			return true
  8239  		}
  8240  	case BlockMIPS64NE:
  8241  		// match: (NE (FPFlagTrue cmp) yes no)
  8242  		// result: (FPT cmp yes no)
  8243  		for b.Controls[0].Op == OpMIPS64FPFlagTrue {
  8244  			v_0 := b.Controls[0]
  8245  			cmp := v_0.Args[0]
  8246  			b.resetWithControl(BlockMIPS64FPT, cmp)
  8247  			return true
  8248  		}
  8249  		// match: (NE (FPFlagFalse cmp) yes no)
  8250  		// result: (FPF cmp yes no)
  8251  		for b.Controls[0].Op == OpMIPS64FPFlagFalse {
  8252  			v_0 := b.Controls[0]
  8253  			cmp := v_0.Args[0]
  8254  			b.resetWithControl(BlockMIPS64FPF, cmp)
  8255  			return true
  8256  		}
  8257  		// match: (NE (XORconst [1] cmp:(SGT _ _)) yes no)
  8258  		// result: (EQ cmp yes no)
  8259  		for b.Controls[0].Op == OpMIPS64XORconst {
  8260  			v_0 := b.Controls[0]
  8261  			if auxIntToInt64(v_0.AuxInt) != 1 {
  8262  				break
  8263  			}
  8264  			cmp := v_0.Args[0]
  8265  			if cmp.Op != OpMIPS64SGT {
  8266  				break
  8267  			}
  8268  			b.resetWithControl(BlockMIPS64EQ, cmp)
  8269  			return true
  8270  		}
  8271  		// match: (NE (XORconst [1] cmp:(SGTU _ _)) yes no)
  8272  		// result: (EQ cmp yes no)
  8273  		for b.Controls[0].Op == OpMIPS64XORconst {
  8274  			v_0 := b.Controls[0]
  8275  			if auxIntToInt64(v_0.AuxInt) != 1 {
  8276  				break
  8277  			}
  8278  			cmp := v_0.Args[0]
  8279  			if cmp.Op != OpMIPS64SGTU {
  8280  				break
  8281  			}
  8282  			b.resetWithControl(BlockMIPS64EQ, cmp)
  8283  			return true
  8284  		}
  8285  		// match: (NE (XORconst [1] cmp:(SGTconst _)) yes no)
  8286  		// result: (EQ cmp yes no)
  8287  		for b.Controls[0].Op == OpMIPS64XORconst {
  8288  			v_0 := b.Controls[0]
  8289  			if auxIntToInt64(v_0.AuxInt) != 1 {
  8290  				break
  8291  			}
  8292  			cmp := v_0.Args[0]
  8293  			if cmp.Op != OpMIPS64SGTconst {
  8294  				break
  8295  			}
  8296  			b.resetWithControl(BlockMIPS64EQ, cmp)
  8297  			return true
  8298  		}
  8299  		// match: (NE (XORconst [1] cmp:(SGTUconst _)) yes no)
  8300  		// result: (EQ cmp yes no)
  8301  		for b.Controls[0].Op == OpMIPS64XORconst {
  8302  			v_0 := b.Controls[0]
  8303  			if auxIntToInt64(v_0.AuxInt) != 1 {
  8304  				break
  8305  			}
  8306  			cmp := v_0.Args[0]
  8307  			if cmp.Op != OpMIPS64SGTUconst {
  8308  				break
  8309  			}
  8310  			b.resetWithControl(BlockMIPS64EQ, cmp)
  8311  			return true
  8312  		}
  8313  		// match: (NE (SGTUconst [1] x) yes no)
  8314  		// result: (EQ x yes no)
  8315  		for b.Controls[0].Op == OpMIPS64SGTUconst {
  8316  			v_0 := b.Controls[0]
  8317  			if auxIntToInt64(v_0.AuxInt) != 1 {
  8318  				break
  8319  			}
  8320  			x := v_0.Args[0]
  8321  			b.resetWithControl(BlockMIPS64EQ, x)
  8322  			return true
  8323  		}
  8324  		// match: (NE (SGTU x (MOVVconst [0])) yes no)
  8325  		// result: (NE x yes no)
  8326  		for b.Controls[0].Op == OpMIPS64SGTU {
  8327  			v_0 := b.Controls[0]
  8328  			_ = v_0.Args[1]
  8329  			x := v_0.Args[0]
  8330  			v_0_1 := v_0.Args[1]
  8331  			if v_0_1.Op != OpMIPS64MOVVconst || auxIntToInt64(v_0_1.AuxInt) != 0 {
  8332  				break
  8333  			}
  8334  			b.resetWithControl(BlockMIPS64NE, x)
  8335  			return true
  8336  		}
  8337  		// match: (NE (SGTconst [0] x) yes no)
  8338  		// result: (LTZ x yes no)
  8339  		for b.Controls[0].Op == OpMIPS64SGTconst {
  8340  			v_0 := b.Controls[0]
  8341  			if auxIntToInt64(v_0.AuxInt) != 0 {
  8342  				break
  8343  			}
  8344  			x := v_0.Args[0]
  8345  			b.resetWithControl(BlockMIPS64LTZ, x)
  8346  			return true
  8347  		}
  8348  		// match: (NE (SGT x (MOVVconst [0])) yes no)
  8349  		// result: (GTZ x yes no)
  8350  		for b.Controls[0].Op == OpMIPS64SGT {
  8351  			v_0 := b.Controls[0]
  8352  			_ = v_0.Args[1]
  8353  			x := v_0.Args[0]
  8354  			v_0_1 := v_0.Args[1]
  8355  			if v_0_1.Op != OpMIPS64MOVVconst || auxIntToInt64(v_0_1.AuxInt) != 0 {
  8356  				break
  8357  			}
  8358  			b.resetWithControl(BlockMIPS64GTZ, x)
  8359  			return true
  8360  		}
  8361  		// match: (NE (MOVVconst [0]) yes no)
  8362  		// result: (First no yes)
  8363  		for b.Controls[0].Op == OpMIPS64MOVVconst {
  8364  			v_0 := b.Controls[0]
  8365  			if auxIntToInt64(v_0.AuxInt) != 0 {
  8366  				break
  8367  			}
  8368  			b.Reset(BlockFirst)
  8369  			b.swapSuccessors()
  8370  			return true
  8371  		}
  8372  		// match: (NE (MOVVconst [c]) yes no)
  8373  		// cond: c != 0
  8374  		// result: (First yes no)
  8375  		for b.Controls[0].Op == OpMIPS64MOVVconst {
  8376  			v_0 := b.Controls[0]
  8377  			c := auxIntToInt64(v_0.AuxInt)
  8378  			if !(c != 0) {
  8379  				break
  8380  			}
  8381  			b.Reset(BlockFirst)
  8382  			return true
  8383  		}
  8384  	}
  8385  	return false
  8386  }
  8387  

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