1
2
3 package ssa
4
5 import (
6 "cmd/internal/obj"
7 "cmd/internal/obj/arm"
8 "cmd/internal/obj/arm64"
9 "cmd/internal/obj/loong64"
10 "cmd/internal/obj/mips"
11 "cmd/internal/obj/ppc64"
12 "cmd/internal/obj/riscv"
13 "cmd/internal/obj/s390x"
14 "cmd/internal/obj/wasm"
15 "cmd/internal/obj/x86"
16 )
17
18 const (
19 BlockInvalid BlockKind = iota
20
21 Block386EQ
22 Block386NE
23 Block386LT
24 Block386LE
25 Block386GT
26 Block386GE
27 Block386OS
28 Block386OC
29 Block386ULT
30 Block386ULE
31 Block386UGT
32 Block386UGE
33 Block386EQF
34 Block386NEF
35 Block386ORD
36 Block386NAN
37
38 BlockAMD64EQ
39 BlockAMD64NE
40 BlockAMD64LT
41 BlockAMD64LE
42 BlockAMD64GT
43 BlockAMD64GE
44 BlockAMD64OS
45 BlockAMD64OC
46 BlockAMD64ULT
47 BlockAMD64ULE
48 BlockAMD64UGT
49 BlockAMD64UGE
50 BlockAMD64EQF
51 BlockAMD64NEF
52 BlockAMD64ORD
53 BlockAMD64NAN
54 BlockAMD64JUMPTABLE
55
56 BlockARMEQ
57 BlockARMNE
58 BlockARMLT
59 BlockARMLE
60 BlockARMGT
61 BlockARMGE
62 BlockARMULT
63 BlockARMULE
64 BlockARMUGT
65 BlockARMUGE
66 BlockARMLTnoov
67 BlockARMLEnoov
68 BlockARMGTnoov
69 BlockARMGEnoov
70
71 BlockARM64EQ
72 BlockARM64NE
73 BlockARM64LT
74 BlockARM64LE
75 BlockARM64GT
76 BlockARM64GE
77 BlockARM64ULT
78 BlockARM64ULE
79 BlockARM64UGT
80 BlockARM64UGE
81 BlockARM64Z
82 BlockARM64NZ
83 BlockARM64ZW
84 BlockARM64NZW
85 BlockARM64TBZ
86 BlockARM64TBNZ
87 BlockARM64FLT
88 BlockARM64FLE
89 BlockARM64FGT
90 BlockARM64FGE
91 BlockARM64LTnoov
92 BlockARM64LEnoov
93 BlockARM64GTnoov
94 BlockARM64GEnoov
95 BlockARM64JUMPTABLE
96
97 BlockLOONG64EQ
98 BlockLOONG64NE
99 BlockLOONG64LTZ
100 BlockLOONG64LEZ
101 BlockLOONG64GTZ
102 BlockLOONG64GEZ
103 BlockLOONG64FPT
104 BlockLOONG64FPF
105 BlockLOONG64BEQ
106 BlockLOONG64BNE
107 BlockLOONG64BGE
108 BlockLOONG64BLT
109 BlockLOONG64BGEU
110 BlockLOONG64BLTU
111
112 BlockMIPSEQ
113 BlockMIPSNE
114 BlockMIPSLTZ
115 BlockMIPSLEZ
116 BlockMIPSGTZ
117 BlockMIPSGEZ
118 BlockMIPSFPT
119 BlockMIPSFPF
120
121 BlockMIPS64EQ
122 BlockMIPS64NE
123 BlockMIPS64LTZ
124 BlockMIPS64LEZ
125 BlockMIPS64GTZ
126 BlockMIPS64GEZ
127 BlockMIPS64FPT
128 BlockMIPS64FPF
129
130 BlockPPC64EQ
131 BlockPPC64NE
132 BlockPPC64LT
133 BlockPPC64LE
134 BlockPPC64GT
135 BlockPPC64GE
136 BlockPPC64FLT
137 BlockPPC64FLE
138 BlockPPC64FGT
139 BlockPPC64FGE
140
141 BlockRISCV64BEQ
142 BlockRISCV64BNE
143 BlockRISCV64BLT
144 BlockRISCV64BGE
145 BlockRISCV64BLTU
146 BlockRISCV64BGEU
147 BlockRISCV64BEQZ
148 BlockRISCV64BNEZ
149 BlockRISCV64BLEZ
150 BlockRISCV64BGEZ
151 BlockRISCV64BLTZ
152 BlockRISCV64BGTZ
153
154 BlockS390XBRC
155 BlockS390XCRJ
156 BlockS390XCGRJ
157 BlockS390XCLRJ
158 BlockS390XCLGRJ
159 BlockS390XCIJ
160 BlockS390XCGIJ
161 BlockS390XCLIJ
162 BlockS390XCLGIJ
163
164 BlockPlain
165 BlockIf
166 BlockDefer
167 BlockRet
168 BlockRetJmp
169 BlockExit
170 BlockJumpTable
171 BlockFirst
172 )
173
174 var blockString = [...]string{
175 BlockInvalid: "BlockInvalid",
176
177 Block386EQ: "EQ",
178 Block386NE: "NE",
179 Block386LT: "LT",
180 Block386LE: "LE",
181 Block386GT: "GT",
182 Block386GE: "GE",
183 Block386OS: "OS",
184 Block386OC: "OC",
185 Block386ULT: "ULT",
186 Block386ULE: "ULE",
187 Block386UGT: "UGT",
188 Block386UGE: "UGE",
189 Block386EQF: "EQF",
190 Block386NEF: "NEF",
191 Block386ORD: "ORD",
192 Block386NAN: "NAN",
193
194 BlockAMD64EQ: "EQ",
195 BlockAMD64NE: "NE",
196 BlockAMD64LT: "LT",
197 BlockAMD64LE: "LE",
198 BlockAMD64GT: "GT",
199 BlockAMD64GE: "GE",
200 BlockAMD64OS: "OS",
201 BlockAMD64OC: "OC",
202 BlockAMD64ULT: "ULT",
203 BlockAMD64ULE: "ULE",
204 BlockAMD64UGT: "UGT",
205 BlockAMD64UGE: "UGE",
206 BlockAMD64EQF: "EQF",
207 BlockAMD64NEF: "NEF",
208 BlockAMD64ORD: "ORD",
209 BlockAMD64NAN: "NAN",
210 BlockAMD64JUMPTABLE: "JUMPTABLE",
211
212 BlockARMEQ: "EQ",
213 BlockARMNE: "NE",
214 BlockARMLT: "LT",
215 BlockARMLE: "LE",
216 BlockARMGT: "GT",
217 BlockARMGE: "GE",
218 BlockARMULT: "ULT",
219 BlockARMULE: "ULE",
220 BlockARMUGT: "UGT",
221 BlockARMUGE: "UGE",
222 BlockARMLTnoov: "LTnoov",
223 BlockARMLEnoov: "LEnoov",
224 BlockARMGTnoov: "GTnoov",
225 BlockARMGEnoov: "GEnoov",
226
227 BlockARM64EQ: "EQ",
228 BlockARM64NE: "NE",
229 BlockARM64LT: "LT",
230 BlockARM64LE: "LE",
231 BlockARM64GT: "GT",
232 BlockARM64GE: "GE",
233 BlockARM64ULT: "ULT",
234 BlockARM64ULE: "ULE",
235 BlockARM64UGT: "UGT",
236 BlockARM64UGE: "UGE",
237 BlockARM64Z: "Z",
238 BlockARM64NZ: "NZ",
239 BlockARM64ZW: "ZW",
240 BlockARM64NZW: "NZW",
241 BlockARM64TBZ: "TBZ",
242 BlockARM64TBNZ: "TBNZ",
243 BlockARM64FLT: "FLT",
244 BlockARM64FLE: "FLE",
245 BlockARM64FGT: "FGT",
246 BlockARM64FGE: "FGE",
247 BlockARM64LTnoov: "LTnoov",
248 BlockARM64LEnoov: "LEnoov",
249 BlockARM64GTnoov: "GTnoov",
250 BlockARM64GEnoov: "GEnoov",
251 BlockARM64JUMPTABLE: "JUMPTABLE",
252
253 BlockLOONG64EQ: "EQ",
254 BlockLOONG64NE: "NE",
255 BlockLOONG64LTZ: "LTZ",
256 BlockLOONG64LEZ: "LEZ",
257 BlockLOONG64GTZ: "GTZ",
258 BlockLOONG64GEZ: "GEZ",
259 BlockLOONG64FPT: "FPT",
260 BlockLOONG64FPF: "FPF",
261 BlockLOONG64BEQ: "BEQ",
262 BlockLOONG64BNE: "BNE",
263 BlockLOONG64BGE: "BGE",
264 BlockLOONG64BLT: "BLT",
265 BlockLOONG64BGEU: "BGEU",
266 BlockLOONG64BLTU: "BLTU",
267
268 BlockMIPSEQ: "EQ",
269 BlockMIPSNE: "NE",
270 BlockMIPSLTZ: "LTZ",
271 BlockMIPSLEZ: "LEZ",
272 BlockMIPSGTZ: "GTZ",
273 BlockMIPSGEZ: "GEZ",
274 BlockMIPSFPT: "FPT",
275 BlockMIPSFPF: "FPF",
276
277 BlockMIPS64EQ: "EQ",
278 BlockMIPS64NE: "NE",
279 BlockMIPS64LTZ: "LTZ",
280 BlockMIPS64LEZ: "LEZ",
281 BlockMIPS64GTZ: "GTZ",
282 BlockMIPS64GEZ: "GEZ",
283 BlockMIPS64FPT: "FPT",
284 BlockMIPS64FPF: "FPF",
285
286 BlockPPC64EQ: "EQ",
287 BlockPPC64NE: "NE",
288 BlockPPC64LT: "LT",
289 BlockPPC64LE: "LE",
290 BlockPPC64GT: "GT",
291 BlockPPC64GE: "GE",
292 BlockPPC64FLT: "FLT",
293 BlockPPC64FLE: "FLE",
294 BlockPPC64FGT: "FGT",
295 BlockPPC64FGE: "FGE",
296
297 BlockRISCV64BEQ: "BEQ",
298 BlockRISCV64BNE: "BNE",
299 BlockRISCV64BLT: "BLT",
300 BlockRISCV64BGE: "BGE",
301 BlockRISCV64BLTU: "BLTU",
302 BlockRISCV64BGEU: "BGEU",
303 BlockRISCV64BEQZ: "BEQZ",
304 BlockRISCV64BNEZ: "BNEZ",
305 BlockRISCV64BLEZ: "BLEZ",
306 BlockRISCV64BGEZ: "BGEZ",
307 BlockRISCV64BLTZ: "BLTZ",
308 BlockRISCV64BGTZ: "BGTZ",
309
310 BlockS390XBRC: "BRC",
311 BlockS390XCRJ: "CRJ",
312 BlockS390XCGRJ: "CGRJ",
313 BlockS390XCLRJ: "CLRJ",
314 BlockS390XCLGRJ: "CLGRJ",
315 BlockS390XCIJ: "CIJ",
316 BlockS390XCGIJ: "CGIJ",
317 BlockS390XCLIJ: "CLIJ",
318 BlockS390XCLGIJ: "CLGIJ",
319
320 BlockPlain: "Plain",
321 BlockIf: "If",
322 BlockDefer: "Defer",
323 BlockRet: "Ret",
324 BlockRetJmp: "RetJmp",
325 BlockExit: "Exit",
326 BlockJumpTable: "JumpTable",
327 BlockFirst: "First",
328 }
329
330 func (k BlockKind) String() string { return blockString[k] }
331 func (k BlockKind) AuxIntType() string {
332 switch k {
333 case BlockARM64TBZ:
334 return "int64"
335 case BlockARM64TBNZ:
336 return "int64"
337 case BlockS390XCIJ:
338 return "int8"
339 case BlockS390XCGIJ:
340 return "int8"
341 case BlockS390XCLIJ:
342 return "uint8"
343 case BlockS390XCLGIJ:
344 return "uint8"
345 }
346 return ""
347 }
348
349 const (
350 OpInvalid Op = iota
351
352 Op386ADDSS
353 Op386ADDSD
354 Op386SUBSS
355 Op386SUBSD
356 Op386MULSS
357 Op386MULSD
358 Op386DIVSS
359 Op386DIVSD
360 Op386MOVSSload
361 Op386MOVSDload
362 Op386MOVSSconst
363 Op386MOVSDconst
364 Op386MOVSSloadidx1
365 Op386MOVSSloadidx4
366 Op386MOVSDloadidx1
367 Op386MOVSDloadidx8
368 Op386MOVSSstore
369 Op386MOVSDstore
370 Op386MOVSSstoreidx1
371 Op386MOVSSstoreidx4
372 Op386MOVSDstoreidx1
373 Op386MOVSDstoreidx8
374 Op386ADDSSload
375 Op386ADDSDload
376 Op386SUBSSload
377 Op386SUBSDload
378 Op386MULSSload
379 Op386MULSDload
380 Op386DIVSSload
381 Op386DIVSDload
382 Op386ADDL
383 Op386ADDLconst
384 Op386ADDLcarry
385 Op386ADDLconstcarry
386 Op386ADCL
387 Op386ADCLconst
388 Op386SUBL
389 Op386SUBLconst
390 Op386SUBLcarry
391 Op386SUBLconstcarry
392 Op386SBBL
393 Op386SBBLconst
394 Op386MULL
395 Op386MULLconst
396 Op386MULLU
397 Op386HMULL
398 Op386HMULLU
399 Op386MULLQU
400 Op386AVGLU
401 Op386DIVL
402 Op386DIVW
403 Op386DIVLU
404 Op386DIVWU
405 Op386MODL
406 Op386MODW
407 Op386MODLU
408 Op386MODWU
409 Op386ANDL
410 Op386ANDLconst
411 Op386ORL
412 Op386ORLconst
413 Op386XORL
414 Op386XORLconst
415 Op386CMPL
416 Op386CMPW
417 Op386CMPB
418 Op386CMPLconst
419 Op386CMPWconst
420 Op386CMPBconst
421 Op386CMPLload
422 Op386CMPWload
423 Op386CMPBload
424 Op386CMPLconstload
425 Op386CMPWconstload
426 Op386CMPBconstload
427 Op386UCOMISS
428 Op386UCOMISD
429 Op386TESTL
430 Op386TESTW
431 Op386TESTB
432 Op386TESTLconst
433 Op386TESTWconst
434 Op386TESTBconst
435 Op386SHLL
436 Op386SHLLconst
437 Op386SHRL
438 Op386SHRW
439 Op386SHRB
440 Op386SHRLconst
441 Op386SHRWconst
442 Op386SHRBconst
443 Op386SARL
444 Op386SARW
445 Op386SARB
446 Op386SARLconst
447 Op386SARWconst
448 Op386SARBconst
449 Op386ROLL
450 Op386ROLW
451 Op386ROLB
452 Op386ROLLconst
453 Op386ROLWconst
454 Op386ROLBconst
455 Op386ADDLload
456 Op386SUBLload
457 Op386MULLload
458 Op386ANDLload
459 Op386ORLload
460 Op386XORLload
461 Op386ADDLloadidx4
462 Op386SUBLloadidx4
463 Op386MULLloadidx4
464 Op386ANDLloadidx4
465 Op386ORLloadidx4
466 Op386XORLloadidx4
467 Op386NEGL
468 Op386NOTL
469 Op386BSFL
470 Op386BSFW
471 Op386LoweredCtz32
472 Op386LoweredCtz64
473 Op386BSRL
474 Op386BSRW
475 Op386BSWAPL
476 Op386SQRTSD
477 Op386SQRTSS
478 Op386SBBLcarrymask
479 Op386SETEQ
480 Op386SETNE
481 Op386SETL
482 Op386SETLE
483 Op386SETG
484 Op386SETGE
485 Op386SETB
486 Op386SETBE
487 Op386SETA
488 Op386SETAE
489 Op386SETO
490 Op386SETEQF
491 Op386SETNEF
492 Op386SETORD
493 Op386SETNAN
494 Op386SETGF
495 Op386SETGEF
496 Op386MOVBLSX
497 Op386MOVBLZX
498 Op386MOVWLSX
499 Op386MOVWLZX
500 Op386MOVLconst
501 Op386CVTTSD2SL
502 Op386CVTTSS2SL
503 Op386CVTSL2SS
504 Op386CVTSL2SD
505 Op386CVTSD2SS
506 Op386CVTSS2SD
507 Op386PXOR
508 Op386LEAL
509 Op386LEAL1
510 Op386LEAL2
511 Op386LEAL4
512 Op386LEAL8
513 Op386MOVBload
514 Op386MOVBLSXload
515 Op386MOVWload
516 Op386MOVWLSXload
517 Op386MOVLload
518 Op386MOVBstore
519 Op386MOVWstore
520 Op386MOVLstore
521 Op386ADDLmodify
522 Op386SUBLmodify
523 Op386ANDLmodify
524 Op386ORLmodify
525 Op386XORLmodify
526 Op386ADDLmodifyidx4
527 Op386SUBLmodifyidx4
528 Op386ANDLmodifyidx4
529 Op386ORLmodifyidx4
530 Op386XORLmodifyidx4
531 Op386ADDLconstmodify
532 Op386ANDLconstmodify
533 Op386ORLconstmodify
534 Op386XORLconstmodify
535 Op386ADDLconstmodifyidx4
536 Op386ANDLconstmodifyidx4
537 Op386ORLconstmodifyidx4
538 Op386XORLconstmodifyidx4
539 Op386MOVBloadidx1
540 Op386MOVWloadidx1
541 Op386MOVWloadidx2
542 Op386MOVLloadidx1
543 Op386MOVLloadidx4
544 Op386MOVBstoreidx1
545 Op386MOVWstoreidx1
546 Op386MOVWstoreidx2
547 Op386MOVLstoreidx1
548 Op386MOVLstoreidx4
549 Op386MOVBstoreconst
550 Op386MOVWstoreconst
551 Op386MOVLstoreconst
552 Op386MOVBstoreconstidx1
553 Op386MOVWstoreconstidx1
554 Op386MOVWstoreconstidx2
555 Op386MOVLstoreconstidx1
556 Op386MOVLstoreconstidx4
557 Op386DUFFZERO
558 Op386REPSTOSL
559 Op386CALLstatic
560 Op386CALLtail
561 Op386CALLclosure
562 Op386CALLinter
563 Op386DUFFCOPY
564 Op386REPMOVSL
565 Op386InvertFlags
566 Op386LoweredGetG
567 Op386LoweredGetClosurePtr
568 Op386LoweredGetCallerPC
569 Op386LoweredGetCallerSP
570 Op386LoweredNilCheck
571 Op386LoweredWB
572 Op386LoweredPanicBoundsA
573 Op386LoweredPanicBoundsB
574 Op386LoweredPanicBoundsC
575 Op386LoweredPanicExtendA
576 Op386LoweredPanicExtendB
577 Op386LoweredPanicExtendC
578 Op386FlagEQ
579 Op386FlagLT_ULT
580 Op386FlagLT_UGT
581 Op386FlagGT_UGT
582 Op386FlagGT_ULT
583 Op386MOVSSconst1
584 Op386MOVSDconst1
585 Op386MOVSSconst2
586 Op386MOVSDconst2
587
588 OpAMD64ADDSS
589 OpAMD64ADDSD
590 OpAMD64SUBSS
591 OpAMD64SUBSD
592 OpAMD64MULSS
593 OpAMD64MULSD
594 OpAMD64DIVSS
595 OpAMD64DIVSD
596 OpAMD64MOVSSload
597 OpAMD64MOVSDload
598 OpAMD64MOVSSconst
599 OpAMD64MOVSDconst
600 OpAMD64MOVSSloadidx1
601 OpAMD64MOVSSloadidx4
602 OpAMD64MOVSDloadidx1
603 OpAMD64MOVSDloadidx8
604 OpAMD64MOVSSstore
605 OpAMD64MOVSDstore
606 OpAMD64MOVSSstoreidx1
607 OpAMD64MOVSSstoreidx4
608 OpAMD64MOVSDstoreidx1
609 OpAMD64MOVSDstoreidx8
610 OpAMD64ADDSSload
611 OpAMD64ADDSDload
612 OpAMD64SUBSSload
613 OpAMD64SUBSDload
614 OpAMD64MULSSload
615 OpAMD64MULSDload
616 OpAMD64DIVSSload
617 OpAMD64DIVSDload
618 OpAMD64ADDSSloadidx1
619 OpAMD64ADDSSloadidx4
620 OpAMD64ADDSDloadidx1
621 OpAMD64ADDSDloadidx8
622 OpAMD64SUBSSloadidx1
623 OpAMD64SUBSSloadidx4
624 OpAMD64SUBSDloadidx1
625 OpAMD64SUBSDloadidx8
626 OpAMD64MULSSloadidx1
627 OpAMD64MULSSloadidx4
628 OpAMD64MULSDloadidx1
629 OpAMD64MULSDloadidx8
630 OpAMD64DIVSSloadidx1
631 OpAMD64DIVSSloadidx4
632 OpAMD64DIVSDloadidx1
633 OpAMD64DIVSDloadidx8
634 OpAMD64ADDQ
635 OpAMD64ADDL
636 OpAMD64ADDQconst
637 OpAMD64ADDLconst
638 OpAMD64ADDQconstmodify
639 OpAMD64ADDLconstmodify
640 OpAMD64SUBQ
641 OpAMD64SUBL
642 OpAMD64SUBQconst
643 OpAMD64SUBLconst
644 OpAMD64MULQ
645 OpAMD64MULL
646 OpAMD64MULQconst
647 OpAMD64MULLconst
648 OpAMD64MULLU
649 OpAMD64MULQU
650 OpAMD64HMULQ
651 OpAMD64HMULL
652 OpAMD64HMULQU
653 OpAMD64HMULLU
654 OpAMD64AVGQU
655 OpAMD64DIVQ
656 OpAMD64DIVL
657 OpAMD64DIVW
658 OpAMD64DIVQU
659 OpAMD64DIVLU
660 OpAMD64DIVWU
661 OpAMD64NEGLflags
662 OpAMD64ADDQcarry
663 OpAMD64ADCQ
664 OpAMD64ADDQconstcarry
665 OpAMD64ADCQconst
666 OpAMD64SUBQborrow
667 OpAMD64SBBQ
668 OpAMD64SUBQconstborrow
669 OpAMD64SBBQconst
670 OpAMD64MULQU2
671 OpAMD64DIVQU2
672 OpAMD64ANDQ
673 OpAMD64ANDL
674 OpAMD64ANDQconst
675 OpAMD64ANDLconst
676 OpAMD64ANDQconstmodify
677 OpAMD64ANDLconstmodify
678 OpAMD64ORQ
679 OpAMD64ORL
680 OpAMD64ORQconst
681 OpAMD64ORLconst
682 OpAMD64ORQconstmodify
683 OpAMD64ORLconstmodify
684 OpAMD64XORQ
685 OpAMD64XORL
686 OpAMD64XORQconst
687 OpAMD64XORLconst
688 OpAMD64XORQconstmodify
689 OpAMD64XORLconstmodify
690 OpAMD64CMPQ
691 OpAMD64CMPL
692 OpAMD64CMPW
693 OpAMD64CMPB
694 OpAMD64CMPQconst
695 OpAMD64CMPLconst
696 OpAMD64CMPWconst
697 OpAMD64CMPBconst
698 OpAMD64CMPQload
699 OpAMD64CMPLload
700 OpAMD64CMPWload
701 OpAMD64CMPBload
702 OpAMD64CMPQconstload
703 OpAMD64CMPLconstload
704 OpAMD64CMPWconstload
705 OpAMD64CMPBconstload
706 OpAMD64CMPQloadidx8
707 OpAMD64CMPQloadidx1
708 OpAMD64CMPLloadidx4
709 OpAMD64CMPLloadidx1
710 OpAMD64CMPWloadidx2
711 OpAMD64CMPWloadidx1
712 OpAMD64CMPBloadidx1
713 OpAMD64CMPQconstloadidx8
714 OpAMD64CMPQconstloadidx1
715 OpAMD64CMPLconstloadidx4
716 OpAMD64CMPLconstloadidx1
717 OpAMD64CMPWconstloadidx2
718 OpAMD64CMPWconstloadidx1
719 OpAMD64CMPBconstloadidx1
720 OpAMD64UCOMISS
721 OpAMD64UCOMISD
722 OpAMD64BTL
723 OpAMD64BTQ
724 OpAMD64BTCL
725 OpAMD64BTCQ
726 OpAMD64BTRL
727 OpAMD64BTRQ
728 OpAMD64BTSL
729 OpAMD64BTSQ
730 OpAMD64BTLconst
731 OpAMD64BTQconst
732 OpAMD64BTCQconst
733 OpAMD64BTRQconst
734 OpAMD64BTSQconst
735 OpAMD64BTSQconstmodify
736 OpAMD64BTRQconstmodify
737 OpAMD64BTCQconstmodify
738 OpAMD64TESTQ
739 OpAMD64TESTL
740 OpAMD64TESTW
741 OpAMD64TESTB
742 OpAMD64TESTQconst
743 OpAMD64TESTLconst
744 OpAMD64TESTWconst
745 OpAMD64TESTBconst
746 OpAMD64SHLQ
747 OpAMD64SHLL
748 OpAMD64SHLQconst
749 OpAMD64SHLLconst
750 OpAMD64SHRQ
751 OpAMD64SHRL
752 OpAMD64SHRW
753 OpAMD64SHRB
754 OpAMD64SHRQconst
755 OpAMD64SHRLconst
756 OpAMD64SHRWconst
757 OpAMD64SHRBconst
758 OpAMD64SARQ
759 OpAMD64SARL
760 OpAMD64SARW
761 OpAMD64SARB
762 OpAMD64SARQconst
763 OpAMD64SARLconst
764 OpAMD64SARWconst
765 OpAMD64SARBconst
766 OpAMD64SHRDQ
767 OpAMD64SHLDQ
768 OpAMD64ROLQ
769 OpAMD64ROLL
770 OpAMD64ROLW
771 OpAMD64ROLB
772 OpAMD64RORQ
773 OpAMD64RORL
774 OpAMD64RORW
775 OpAMD64RORB
776 OpAMD64ROLQconst
777 OpAMD64ROLLconst
778 OpAMD64ROLWconst
779 OpAMD64ROLBconst
780 OpAMD64ADDLload
781 OpAMD64ADDQload
782 OpAMD64SUBQload
783 OpAMD64SUBLload
784 OpAMD64ANDLload
785 OpAMD64ANDQload
786 OpAMD64ORQload
787 OpAMD64ORLload
788 OpAMD64XORQload
789 OpAMD64XORLload
790 OpAMD64ADDLloadidx1
791 OpAMD64ADDLloadidx4
792 OpAMD64ADDLloadidx8
793 OpAMD64ADDQloadidx1
794 OpAMD64ADDQloadidx8
795 OpAMD64SUBLloadidx1
796 OpAMD64SUBLloadidx4
797 OpAMD64SUBLloadidx8
798 OpAMD64SUBQloadidx1
799 OpAMD64SUBQloadidx8
800 OpAMD64ANDLloadidx1
801 OpAMD64ANDLloadidx4
802 OpAMD64ANDLloadidx8
803 OpAMD64ANDQloadidx1
804 OpAMD64ANDQloadidx8
805 OpAMD64ORLloadidx1
806 OpAMD64ORLloadidx4
807 OpAMD64ORLloadidx8
808 OpAMD64ORQloadidx1
809 OpAMD64ORQloadidx8
810 OpAMD64XORLloadidx1
811 OpAMD64XORLloadidx4
812 OpAMD64XORLloadidx8
813 OpAMD64XORQloadidx1
814 OpAMD64XORQloadidx8
815 OpAMD64ADDQmodify
816 OpAMD64SUBQmodify
817 OpAMD64ANDQmodify
818 OpAMD64ORQmodify
819 OpAMD64XORQmodify
820 OpAMD64ADDLmodify
821 OpAMD64SUBLmodify
822 OpAMD64ANDLmodify
823 OpAMD64ORLmodify
824 OpAMD64XORLmodify
825 OpAMD64ADDQmodifyidx1
826 OpAMD64ADDQmodifyidx8
827 OpAMD64SUBQmodifyidx1
828 OpAMD64SUBQmodifyidx8
829 OpAMD64ANDQmodifyidx1
830 OpAMD64ANDQmodifyidx8
831 OpAMD64ORQmodifyidx1
832 OpAMD64ORQmodifyidx8
833 OpAMD64XORQmodifyidx1
834 OpAMD64XORQmodifyidx8
835 OpAMD64ADDLmodifyidx1
836 OpAMD64ADDLmodifyidx4
837 OpAMD64ADDLmodifyidx8
838 OpAMD64SUBLmodifyidx1
839 OpAMD64SUBLmodifyidx4
840 OpAMD64SUBLmodifyidx8
841 OpAMD64ANDLmodifyidx1
842 OpAMD64ANDLmodifyidx4
843 OpAMD64ANDLmodifyidx8
844 OpAMD64ORLmodifyidx1
845 OpAMD64ORLmodifyidx4
846 OpAMD64ORLmodifyidx8
847 OpAMD64XORLmodifyidx1
848 OpAMD64XORLmodifyidx4
849 OpAMD64XORLmodifyidx8
850 OpAMD64ADDQconstmodifyidx1
851 OpAMD64ADDQconstmodifyidx8
852 OpAMD64ANDQconstmodifyidx1
853 OpAMD64ANDQconstmodifyidx8
854 OpAMD64ORQconstmodifyidx1
855 OpAMD64ORQconstmodifyidx8
856 OpAMD64XORQconstmodifyidx1
857 OpAMD64XORQconstmodifyidx8
858 OpAMD64ADDLconstmodifyidx1
859 OpAMD64ADDLconstmodifyidx4
860 OpAMD64ADDLconstmodifyidx8
861 OpAMD64ANDLconstmodifyidx1
862 OpAMD64ANDLconstmodifyidx4
863 OpAMD64ANDLconstmodifyidx8
864 OpAMD64ORLconstmodifyidx1
865 OpAMD64ORLconstmodifyidx4
866 OpAMD64ORLconstmodifyidx8
867 OpAMD64XORLconstmodifyidx1
868 OpAMD64XORLconstmodifyidx4
869 OpAMD64XORLconstmodifyidx8
870 OpAMD64NEGQ
871 OpAMD64NEGL
872 OpAMD64NOTQ
873 OpAMD64NOTL
874 OpAMD64BSFQ
875 OpAMD64BSFL
876 OpAMD64BSRQ
877 OpAMD64BSRL
878 OpAMD64CMOVQEQ
879 OpAMD64CMOVQNE
880 OpAMD64CMOVQLT
881 OpAMD64CMOVQGT
882 OpAMD64CMOVQLE
883 OpAMD64CMOVQGE
884 OpAMD64CMOVQLS
885 OpAMD64CMOVQHI
886 OpAMD64CMOVQCC
887 OpAMD64CMOVQCS
888 OpAMD64CMOVLEQ
889 OpAMD64CMOVLNE
890 OpAMD64CMOVLLT
891 OpAMD64CMOVLGT
892 OpAMD64CMOVLLE
893 OpAMD64CMOVLGE
894 OpAMD64CMOVLLS
895 OpAMD64CMOVLHI
896 OpAMD64CMOVLCC
897 OpAMD64CMOVLCS
898 OpAMD64CMOVWEQ
899 OpAMD64CMOVWNE
900 OpAMD64CMOVWLT
901 OpAMD64CMOVWGT
902 OpAMD64CMOVWLE
903 OpAMD64CMOVWGE
904 OpAMD64CMOVWLS
905 OpAMD64CMOVWHI
906 OpAMD64CMOVWCC
907 OpAMD64CMOVWCS
908 OpAMD64CMOVQEQF
909 OpAMD64CMOVQNEF
910 OpAMD64CMOVQGTF
911 OpAMD64CMOVQGEF
912 OpAMD64CMOVLEQF
913 OpAMD64CMOVLNEF
914 OpAMD64CMOVLGTF
915 OpAMD64CMOVLGEF
916 OpAMD64CMOVWEQF
917 OpAMD64CMOVWNEF
918 OpAMD64CMOVWGTF
919 OpAMD64CMOVWGEF
920 OpAMD64BSWAPQ
921 OpAMD64BSWAPL
922 OpAMD64POPCNTQ
923 OpAMD64POPCNTL
924 OpAMD64SQRTSD
925 OpAMD64SQRTSS
926 OpAMD64ROUNDSD
927 OpAMD64LoweredRound32F
928 OpAMD64LoweredRound64F
929 OpAMD64VFMADD231SS
930 OpAMD64VFMADD231SD
931 OpAMD64MINSD
932 OpAMD64MINSS
933 OpAMD64SBBQcarrymask
934 OpAMD64SBBLcarrymask
935 OpAMD64SETEQ
936 OpAMD64SETNE
937 OpAMD64SETL
938 OpAMD64SETLE
939 OpAMD64SETG
940 OpAMD64SETGE
941 OpAMD64SETB
942 OpAMD64SETBE
943 OpAMD64SETA
944 OpAMD64SETAE
945 OpAMD64SETO
946 OpAMD64SETEQstore
947 OpAMD64SETNEstore
948 OpAMD64SETLstore
949 OpAMD64SETLEstore
950 OpAMD64SETGstore
951 OpAMD64SETGEstore
952 OpAMD64SETBstore
953 OpAMD64SETBEstore
954 OpAMD64SETAstore
955 OpAMD64SETAEstore
956 OpAMD64SETEQstoreidx1
957 OpAMD64SETNEstoreidx1
958 OpAMD64SETLstoreidx1
959 OpAMD64SETLEstoreidx1
960 OpAMD64SETGstoreidx1
961 OpAMD64SETGEstoreidx1
962 OpAMD64SETBstoreidx1
963 OpAMD64SETBEstoreidx1
964 OpAMD64SETAstoreidx1
965 OpAMD64SETAEstoreidx1
966 OpAMD64SETEQF
967 OpAMD64SETNEF
968 OpAMD64SETORD
969 OpAMD64SETNAN
970 OpAMD64SETGF
971 OpAMD64SETGEF
972 OpAMD64MOVBQSX
973 OpAMD64MOVBQZX
974 OpAMD64MOVWQSX
975 OpAMD64MOVWQZX
976 OpAMD64MOVLQSX
977 OpAMD64MOVLQZX
978 OpAMD64MOVLconst
979 OpAMD64MOVQconst
980 OpAMD64CVTTSD2SL
981 OpAMD64CVTTSD2SQ
982 OpAMD64CVTTSS2SL
983 OpAMD64CVTTSS2SQ
984 OpAMD64CVTSL2SS
985 OpAMD64CVTSL2SD
986 OpAMD64CVTSQ2SS
987 OpAMD64CVTSQ2SD
988 OpAMD64CVTSD2SS
989 OpAMD64CVTSS2SD
990 OpAMD64MOVQi2f
991 OpAMD64MOVQf2i
992 OpAMD64MOVLi2f
993 OpAMD64MOVLf2i
994 OpAMD64PXOR
995 OpAMD64POR
996 OpAMD64LEAQ
997 OpAMD64LEAL
998 OpAMD64LEAW
999 OpAMD64LEAQ1
1000 OpAMD64LEAL1
1001 OpAMD64LEAW1
1002 OpAMD64LEAQ2
1003 OpAMD64LEAL2
1004 OpAMD64LEAW2
1005 OpAMD64LEAQ4
1006 OpAMD64LEAL4
1007 OpAMD64LEAW4
1008 OpAMD64LEAQ8
1009 OpAMD64LEAL8
1010 OpAMD64LEAW8
1011 OpAMD64MOVBload
1012 OpAMD64MOVBQSXload
1013 OpAMD64MOVWload
1014 OpAMD64MOVWQSXload
1015 OpAMD64MOVLload
1016 OpAMD64MOVLQSXload
1017 OpAMD64MOVQload
1018 OpAMD64MOVBstore
1019 OpAMD64MOVWstore
1020 OpAMD64MOVLstore
1021 OpAMD64MOVQstore
1022 OpAMD64MOVOload
1023 OpAMD64MOVOstore
1024 OpAMD64MOVBloadidx1
1025 OpAMD64MOVWloadidx1
1026 OpAMD64MOVWloadidx2
1027 OpAMD64MOVLloadidx1
1028 OpAMD64MOVLloadidx4
1029 OpAMD64MOVLloadidx8
1030 OpAMD64MOVQloadidx1
1031 OpAMD64MOVQloadidx8
1032 OpAMD64MOVBstoreidx1
1033 OpAMD64MOVWstoreidx1
1034 OpAMD64MOVWstoreidx2
1035 OpAMD64MOVLstoreidx1
1036 OpAMD64MOVLstoreidx4
1037 OpAMD64MOVLstoreidx8
1038 OpAMD64MOVQstoreidx1
1039 OpAMD64MOVQstoreidx8
1040 OpAMD64MOVBstoreconst
1041 OpAMD64MOVWstoreconst
1042 OpAMD64MOVLstoreconst
1043 OpAMD64MOVQstoreconst
1044 OpAMD64MOVOstoreconst
1045 OpAMD64MOVBstoreconstidx1
1046 OpAMD64MOVWstoreconstidx1
1047 OpAMD64MOVWstoreconstidx2
1048 OpAMD64MOVLstoreconstidx1
1049 OpAMD64MOVLstoreconstidx4
1050 OpAMD64MOVQstoreconstidx1
1051 OpAMD64MOVQstoreconstidx8
1052 OpAMD64DUFFZERO
1053 OpAMD64REPSTOSQ
1054 OpAMD64CALLstatic
1055 OpAMD64CALLtail
1056 OpAMD64CALLclosure
1057 OpAMD64CALLinter
1058 OpAMD64DUFFCOPY
1059 OpAMD64REPMOVSQ
1060 OpAMD64InvertFlags
1061 OpAMD64LoweredGetG
1062 OpAMD64LoweredGetClosurePtr
1063 OpAMD64LoweredGetCallerPC
1064 OpAMD64LoweredGetCallerSP
1065 OpAMD64LoweredNilCheck
1066 OpAMD64LoweredWB
1067 OpAMD64LoweredHasCPUFeature
1068 OpAMD64LoweredPanicBoundsA
1069 OpAMD64LoweredPanicBoundsB
1070 OpAMD64LoweredPanicBoundsC
1071 OpAMD64FlagEQ
1072 OpAMD64FlagLT_ULT
1073 OpAMD64FlagLT_UGT
1074 OpAMD64FlagGT_UGT
1075 OpAMD64FlagGT_ULT
1076 OpAMD64MOVBatomicload
1077 OpAMD64MOVLatomicload
1078 OpAMD64MOVQatomicload
1079 OpAMD64XCHGB
1080 OpAMD64XCHGL
1081 OpAMD64XCHGQ
1082 OpAMD64XADDLlock
1083 OpAMD64XADDQlock
1084 OpAMD64AddTupleFirst32
1085 OpAMD64AddTupleFirst64
1086 OpAMD64CMPXCHGLlock
1087 OpAMD64CMPXCHGQlock
1088 OpAMD64ANDBlock
1089 OpAMD64ANDLlock
1090 OpAMD64ANDQlock
1091 OpAMD64ORBlock
1092 OpAMD64ORLlock
1093 OpAMD64ORQlock
1094 OpAMD64LoweredAtomicAnd64
1095 OpAMD64LoweredAtomicAnd32
1096 OpAMD64LoweredAtomicOr64
1097 OpAMD64LoweredAtomicOr32
1098 OpAMD64PrefetchT0
1099 OpAMD64PrefetchNTA
1100 OpAMD64ANDNQ
1101 OpAMD64ANDNL
1102 OpAMD64BLSIQ
1103 OpAMD64BLSIL
1104 OpAMD64BLSMSKQ
1105 OpAMD64BLSMSKL
1106 OpAMD64BLSRQ
1107 OpAMD64BLSRL
1108 OpAMD64TZCNTQ
1109 OpAMD64TZCNTL
1110 OpAMD64LZCNTQ
1111 OpAMD64LZCNTL
1112 OpAMD64MOVBEWstore
1113 OpAMD64MOVBELload
1114 OpAMD64MOVBELstore
1115 OpAMD64MOVBEQload
1116 OpAMD64MOVBEQstore
1117 OpAMD64MOVBELloadidx1
1118 OpAMD64MOVBELloadidx4
1119 OpAMD64MOVBELloadidx8
1120 OpAMD64MOVBEQloadidx1
1121 OpAMD64MOVBEQloadidx8
1122 OpAMD64MOVBEWstoreidx1
1123 OpAMD64MOVBEWstoreidx2
1124 OpAMD64MOVBELstoreidx1
1125 OpAMD64MOVBELstoreidx4
1126 OpAMD64MOVBELstoreidx8
1127 OpAMD64MOVBEQstoreidx1
1128 OpAMD64MOVBEQstoreidx8
1129 OpAMD64SARXQ
1130 OpAMD64SARXL
1131 OpAMD64SHLXQ
1132 OpAMD64SHLXL
1133 OpAMD64SHRXQ
1134 OpAMD64SHRXL
1135 OpAMD64SARXLload
1136 OpAMD64SARXQload
1137 OpAMD64SHLXLload
1138 OpAMD64SHLXQload
1139 OpAMD64SHRXLload
1140 OpAMD64SHRXQload
1141 OpAMD64SARXLloadidx1
1142 OpAMD64SARXLloadidx4
1143 OpAMD64SARXLloadidx8
1144 OpAMD64SARXQloadidx1
1145 OpAMD64SARXQloadidx8
1146 OpAMD64SHLXLloadidx1
1147 OpAMD64SHLXLloadidx4
1148 OpAMD64SHLXLloadidx8
1149 OpAMD64SHLXQloadidx1
1150 OpAMD64SHLXQloadidx8
1151 OpAMD64SHRXLloadidx1
1152 OpAMD64SHRXLloadidx4
1153 OpAMD64SHRXLloadidx8
1154 OpAMD64SHRXQloadidx1
1155 OpAMD64SHRXQloadidx8
1156 OpAMD64PUNPCKLBW
1157 OpAMD64PSHUFLW
1158 OpAMD64PSHUFBbroadcast
1159 OpAMD64VPBROADCASTB
1160 OpAMD64PSIGNB
1161 OpAMD64PCMPEQB
1162 OpAMD64PMOVMSKB
1163
1164 OpARMADD
1165 OpARMADDconst
1166 OpARMSUB
1167 OpARMSUBconst
1168 OpARMRSB
1169 OpARMRSBconst
1170 OpARMMUL
1171 OpARMHMUL
1172 OpARMHMULU
1173 OpARMCALLudiv
1174 OpARMADDS
1175 OpARMADDSconst
1176 OpARMADC
1177 OpARMADCconst
1178 OpARMSUBS
1179 OpARMSUBSconst
1180 OpARMRSBSconst
1181 OpARMSBC
1182 OpARMSBCconst
1183 OpARMRSCconst
1184 OpARMMULLU
1185 OpARMMULA
1186 OpARMMULS
1187 OpARMADDF
1188 OpARMADDD
1189 OpARMSUBF
1190 OpARMSUBD
1191 OpARMMULF
1192 OpARMMULD
1193 OpARMNMULF
1194 OpARMNMULD
1195 OpARMDIVF
1196 OpARMDIVD
1197 OpARMMULAF
1198 OpARMMULAD
1199 OpARMMULSF
1200 OpARMMULSD
1201 OpARMFMULAD
1202 OpARMAND
1203 OpARMANDconst
1204 OpARMOR
1205 OpARMORconst
1206 OpARMXOR
1207 OpARMXORconst
1208 OpARMBIC
1209 OpARMBICconst
1210 OpARMBFX
1211 OpARMBFXU
1212 OpARMMVN
1213 OpARMNEGF
1214 OpARMNEGD
1215 OpARMSQRTD
1216 OpARMSQRTF
1217 OpARMABSD
1218 OpARMCLZ
1219 OpARMREV
1220 OpARMREV16
1221 OpARMRBIT
1222 OpARMSLL
1223 OpARMSLLconst
1224 OpARMSRL
1225 OpARMSRLconst
1226 OpARMSRA
1227 OpARMSRAconst
1228 OpARMSRR
1229 OpARMSRRconst
1230 OpARMADDshiftLL
1231 OpARMADDshiftRL
1232 OpARMADDshiftRA
1233 OpARMSUBshiftLL
1234 OpARMSUBshiftRL
1235 OpARMSUBshiftRA
1236 OpARMRSBshiftLL
1237 OpARMRSBshiftRL
1238 OpARMRSBshiftRA
1239 OpARMANDshiftLL
1240 OpARMANDshiftRL
1241 OpARMANDshiftRA
1242 OpARMORshiftLL
1243 OpARMORshiftRL
1244 OpARMORshiftRA
1245 OpARMXORshiftLL
1246 OpARMXORshiftRL
1247 OpARMXORshiftRA
1248 OpARMXORshiftRR
1249 OpARMBICshiftLL
1250 OpARMBICshiftRL
1251 OpARMBICshiftRA
1252 OpARMMVNshiftLL
1253 OpARMMVNshiftRL
1254 OpARMMVNshiftRA
1255 OpARMADCshiftLL
1256 OpARMADCshiftRL
1257 OpARMADCshiftRA
1258 OpARMSBCshiftLL
1259 OpARMSBCshiftRL
1260 OpARMSBCshiftRA
1261 OpARMRSCshiftLL
1262 OpARMRSCshiftRL
1263 OpARMRSCshiftRA
1264 OpARMADDSshiftLL
1265 OpARMADDSshiftRL
1266 OpARMADDSshiftRA
1267 OpARMSUBSshiftLL
1268 OpARMSUBSshiftRL
1269 OpARMSUBSshiftRA
1270 OpARMRSBSshiftLL
1271 OpARMRSBSshiftRL
1272 OpARMRSBSshiftRA
1273 OpARMADDshiftLLreg
1274 OpARMADDshiftRLreg
1275 OpARMADDshiftRAreg
1276 OpARMSUBshiftLLreg
1277 OpARMSUBshiftRLreg
1278 OpARMSUBshiftRAreg
1279 OpARMRSBshiftLLreg
1280 OpARMRSBshiftRLreg
1281 OpARMRSBshiftRAreg
1282 OpARMANDshiftLLreg
1283 OpARMANDshiftRLreg
1284 OpARMANDshiftRAreg
1285 OpARMORshiftLLreg
1286 OpARMORshiftRLreg
1287 OpARMORshiftRAreg
1288 OpARMXORshiftLLreg
1289 OpARMXORshiftRLreg
1290 OpARMXORshiftRAreg
1291 OpARMBICshiftLLreg
1292 OpARMBICshiftRLreg
1293 OpARMBICshiftRAreg
1294 OpARMMVNshiftLLreg
1295 OpARMMVNshiftRLreg
1296 OpARMMVNshiftRAreg
1297 OpARMADCshiftLLreg
1298 OpARMADCshiftRLreg
1299 OpARMADCshiftRAreg
1300 OpARMSBCshiftLLreg
1301 OpARMSBCshiftRLreg
1302 OpARMSBCshiftRAreg
1303 OpARMRSCshiftLLreg
1304 OpARMRSCshiftRLreg
1305 OpARMRSCshiftRAreg
1306 OpARMADDSshiftLLreg
1307 OpARMADDSshiftRLreg
1308 OpARMADDSshiftRAreg
1309 OpARMSUBSshiftLLreg
1310 OpARMSUBSshiftRLreg
1311 OpARMSUBSshiftRAreg
1312 OpARMRSBSshiftLLreg
1313 OpARMRSBSshiftRLreg
1314 OpARMRSBSshiftRAreg
1315 OpARMCMP
1316 OpARMCMPconst
1317 OpARMCMN
1318 OpARMCMNconst
1319 OpARMTST
1320 OpARMTSTconst
1321 OpARMTEQ
1322 OpARMTEQconst
1323 OpARMCMPF
1324 OpARMCMPD
1325 OpARMCMPshiftLL
1326 OpARMCMPshiftRL
1327 OpARMCMPshiftRA
1328 OpARMCMNshiftLL
1329 OpARMCMNshiftRL
1330 OpARMCMNshiftRA
1331 OpARMTSTshiftLL
1332 OpARMTSTshiftRL
1333 OpARMTSTshiftRA
1334 OpARMTEQshiftLL
1335 OpARMTEQshiftRL
1336 OpARMTEQshiftRA
1337 OpARMCMPshiftLLreg
1338 OpARMCMPshiftRLreg
1339 OpARMCMPshiftRAreg
1340 OpARMCMNshiftLLreg
1341 OpARMCMNshiftRLreg
1342 OpARMCMNshiftRAreg
1343 OpARMTSTshiftLLreg
1344 OpARMTSTshiftRLreg
1345 OpARMTSTshiftRAreg
1346 OpARMTEQshiftLLreg
1347 OpARMTEQshiftRLreg
1348 OpARMTEQshiftRAreg
1349 OpARMCMPF0
1350 OpARMCMPD0
1351 OpARMMOVWconst
1352 OpARMMOVFconst
1353 OpARMMOVDconst
1354 OpARMMOVWaddr
1355 OpARMMOVBload
1356 OpARMMOVBUload
1357 OpARMMOVHload
1358 OpARMMOVHUload
1359 OpARMMOVWload
1360 OpARMMOVFload
1361 OpARMMOVDload
1362 OpARMMOVBstore
1363 OpARMMOVHstore
1364 OpARMMOVWstore
1365 OpARMMOVFstore
1366 OpARMMOVDstore
1367 OpARMMOVWloadidx
1368 OpARMMOVWloadshiftLL
1369 OpARMMOVWloadshiftRL
1370 OpARMMOVWloadshiftRA
1371 OpARMMOVBUloadidx
1372 OpARMMOVBloadidx
1373 OpARMMOVHUloadidx
1374 OpARMMOVHloadidx
1375 OpARMMOVWstoreidx
1376 OpARMMOVWstoreshiftLL
1377 OpARMMOVWstoreshiftRL
1378 OpARMMOVWstoreshiftRA
1379 OpARMMOVBstoreidx
1380 OpARMMOVHstoreidx
1381 OpARMMOVBreg
1382 OpARMMOVBUreg
1383 OpARMMOVHreg
1384 OpARMMOVHUreg
1385 OpARMMOVWreg
1386 OpARMMOVWnop
1387 OpARMMOVWF
1388 OpARMMOVWD
1389 OpARMMOVWUF
1390 OpARMMOVWUD
1391 OpARMMOVFW
1392 OpARMMOVDW
1393 OpARMMOVFWU
1394 OpARMMOVDWU
1395 OpARMMOVFD
1396 OpARMMOVDF
1397 OpARMCMOVWHSconst
1398 OpARMCMOVWLSconst
1399 OpARMSRAcond
1400 OpARMCALLstatic
1401 OpARMCALLtail
1402 OpARMCALLclosure
1403 OpARMCALLinter
1404 OpARMLoweredNilCheck
1405 OpARMEqual
1406 OpARMNotEqual
1407 OpARMLessThan
1408 OpARMLessEqual
1409 OpARMGreaterThan
1410 OpARMGreaterEqual
1411 OpARMLessThanU
1412 OpARMLessEqualU
1413 OpARMGreaterThanU
1414 OpARMGreaterEqualU
1415 OpARMDUFFZERO
1416 OpARMDUFFCOPY
1417 OpARMLoweredZero
1418 OpARMLoweredMove
1419 OpARMLoweredGetClosurePtr
1420 OpARMLoweredGetCallerSP
1421 OpARMLoweredGetCallerPC
1422 OpARMLoweredPanicBoundsA
1423 OpARMLoweredPanicBoundsB
1424 OpARMLoweredPanicBoundsC
1425 OpARMLoweredPanicExtendA
1426 OpARMLoweredPanicExtendB
1427 OpARMLoweredPanicExtendC
1428 OpARMFlagConstant
1429 OpARMInvertFlags
1430 OpARMLoweredWB
1431
1432 OpARM64ADCSflags
1433 OpARM64ADCzerocarry
1434 OpARM64ADD
1435 OpARM64ADDconst
1436 OpARM64ADDSconstflags
1437 OpARM64ADDSflags
1438 OpARM64SUB
1439 OpARM64SUBconst
1440 OpARM64SBCSflags
1441 OpARM64SUBSflags
1442 OpARM64MUL
1443 OpARM64MULW
1444 OpARM64MNEG
1445 OpARM64MNEGW
1446 OpARM64MULH
1447 OpARM64UMULH
1448 OpARM64MULL
1449 OpARM64UMULL
1450 OpARM64DIV
1451 OpARM64UDIV
1452 OpARM64DIVW
1453 OpARM64UDIVW
1454 OpARM64MOD
1455 OpARM64UMOD
1456 OpARM64MODW
1457 OpARM64UMODW
1458 OpARM64FADDS
1459 OpARM64FADDD
1460 OpARM64FSUBS
1461 OpARM64FSUBD
1462 OpARM64FMULS
1463 OpARM64FMULD
1464 OpARM64FNMULS
1465 OpARM64FNMULD
1466 OpARM64FDIVS
1467 OpARM64FDIVD
1468 OpARM64AND
1469 OpARM64ANDconst
1470 OpARM64OR
1471 OpARM64ORconst
1472 OpARM64XOR
1473 OpARM64XORconst
1474 OpARM64BIC
1475 OpARM64EON
1476 OpARM64ORN
1477 OpARM64MVN
1478 OpARM64NEG
1479 OpARM64NEGSflags
1480 OpARM64NGCzerocarry
1481 OpARM64FABSD
1482 OpARM64FNEGS
1483 OpARM64FNEGD
1484 OpARM64FSQRTD
1485 OpARM64FSQRTS
1486 OpARM64FMIND
1487 OpARM64FMINS
1488 OpARM64FMAXD
1489 OpARM64FMAXS
1490 OpARM64REV
1491 OpARM64REVW
1492 OpARM64REV16
1493 OpARM64REV16W
1494 OpARM64RBIT
1495 OpARM64RBITW
1496 OpARM64CLZ
1497 OpARM64CLZW
1498 OpARM64VCNT
1499 OpARM64VUADDLV
1500 OpARM64LoweredRound32F
1501 OpARM64LoweredRound64F
1502 OpARM64FMADDS
1503 OpARM64FMADDD
1504 OpARM64FNMADDS
1505 OpARM64FNMADDD
1506 OpARM64FMSUBS
1507 OpARM64FMSUBD
1508 OpARM64FNMSUBS
1509 OpARM64FNMSUBD
1510 OpARM64MADD
1511 OpARM64MADDW
1512 OpARM64MSUB
1513 OpARM64MSUBW
1514 OpARM64SLL
1515 OpARM64SLLconst
1516 OpARM64SRL
1517 OpARM64SRLconst
1518 OpARM64SRA
1519 OpARM64SRAconst
1520 OpARM64ROR
1521 OpARM64RORW
1522 OpARM64RORconst
1523 OpARM64RORWconst
1524 OpARM64EXTRconst
1525 OpARM64EXTRWconst
1526 OpARM64CMP
1527 OpARM64CMPconst
1528 OpARM64CMPW
1529 OpARM64CMPWconst
1530 OpARM64CMN
1531 OpARM64CMNconst
1532 OpARM64CMNW
1533 OpARM64CMNWconst
1534 OpARM64TST
1535 OpARM64TSTconst
1536 OpARM64TSTW
1537 OpARM64TSTWconst
1538 OpARM64FCMPS
1539 OpARM64FCMPD
1540 OpARM64FCMPS0
1541 OpARM64FCMPD0
1542 OpARM64MVNshiftLL
1543 OpARM64MVNshiftRL
1544 OpARM64MVNshiftRA
1545 OpARM64MVNshiftRO
1546 OpARM64NEGshiftLL
1547 OpARM64NEGshiftRL
1548 OpARM64NEGshiftRA
1549 OpARM64ADDshiftLL
1550 OpARM64ADDshiftRL
1551 OpARM64ADDshiftRA
1552 OpARM64SUBshiftLL
1553 OpARM64SUBshiftRL
1554 OpARM64SUBshiftRA
1555 OpARM64ANDshiftLL
1556 OpARM64ANDshiftRL
1557 OpARM64ANDshiftRA
1558 OpARM64ANDshiftRO
1559 OpARM64ORshiftLL
1560 OpARM64ORshiftRL
1561 OpARM64ORshiftRA
1562 OpARM64ORshiftRO
1563 OpARM64XORshiftLL
1564 OpARM64XORshiftRL
1565 OpARM64XORshiftRA
1566 OpARM64XORshiftRO
1567 OpARM64BICshiftLL
1568 OpARM64BICshiftRL
1569 OpARM64BICshiftRA
1570 OpARM64BICshiftRO
1571 OpARM64EONshiftLL
1572 OpARM64EONshiftRL
1573 OpARM64EONshiftRA
1574 OpARM64EONshiftRO
1575 OpARM64ORNshiftLL
1576 OpARM64ORNshiftRL
1577 OpARM64ORNshiftRA
1578 OpARM64ORNshiftRO
1579 OpARM64CMPshiftLL
1580 OpARM64CMPshiftRL
1581 OpARM64CMPshiftRA
1582 OpARM64CMNshiftLL
1583 OpARM64CMNshiftRL
1584 OpARM64CMNshiftRA
1585 OpARM64TSTshiftLL
1586 OpARM64TSTshiftRL
1587 OpARM64TSTshiftRA
1588 OpARM64TSTshiftRO
1589 OpARM64BFI
1590 OpARM64BFXIL
1591 OpARM64SBFIZ
1592 OpARM64SBFX
1593 OpARM64UBFIZ
1594 OpARM64UBFX
1595 OpARM64MOVDconst
1596 OpARM64FMOVSconst
1597 OpARM64FMOVDconst
1598 OpARM64MOVDaddr
1599 OpARM64MOVBload
1600 OpARM64MOVBUload
1601 OpARM64MOVHload
1602 OpARM64MOVHUload
1603 OpARM64MOVWload
1604 OpARM64MOVWUload
1605 OpARM64MOVDload
1606 OpARM64FMOVSload
1607 OpARM64FMOVDload
1608 OpARM64LDP
1609 OpARM64LDPW
1610 OpARM64LDPSW
1611 OpARM64FLDPD
1612 OpARM64FLDPS
1613 OpARM64MOVDloadidx
1614 OpARM64MOVWloadidx
1615 OpARM64MOVWUloadidx
1616 OpARM64MOVHloadidx
1617 OpARM64MOVHUloadidx
1618 OpARM64MOVBloadidx
1619 OpARM64MOVBUloadidx
1620 OpARM64FMOVSloadidx
1621 OpARM64FMOVDloadidx
1622 OpARM64MOVHloadidx2
1623 OpARM64MOVHUloadidx2
1624 OpARM64MOVWloadidx4
1625 OpARM64MOVWUloadidx4
1626 OpARM64MOVDloadidx8
1627 OpARM64FMOVSloadidx4
1628 OpARM64FMOVDloadidx8
1629 OpARM64MOVBstore
1630 OpARM64MOVHstore
1631 OpARM64MOVWstore
1632 OpARM64MOVDstore
1633 OpARM64FMOVSstore
1634 OpARM64FMOVDstore
1635 OpARM64STP
1636 OpARM64STPW
1637 OpARM64FSTPD
1638 OpARM64FSTPS
1639 OpARM64MOVBstoreidx
1640 OpARM64MOVHstoreidx
1641 OpARM64MOVWstoreidx
1642 OpARM64MOVDstoreidx
1643 OpARM64FMOVSstoreidx
1644 OpARM64FMOVDstoreidx
1645 OpARM64MOVHstoreidx2
1646 OpARM64MOVWstoreidx4
1647 OpARM64MOVDstoreidx8
1648 OpARM64FMOVSstoreidx4
1649 OpARM64FMOVDstoreidx8
1650 OpARM64FMOVDgpfp
1651 OpARM64FMOVDfpgp
1652 OpARM64FMOVSgpfp
1653 OpARM64FMOVSfpgp
1654 OpARM64MOVBreg
1655 OpARM64MOVBUreg
1656 OpARM64MOVHreg
1657 OpARM64MOVHUreg
1658 OpARM64MOVWreg
1659 OpARM64MOVWUreg
1660 OpARM64MOVDreg
1661 OpARM64MOVDnop
1662 OpARM64SCVTFWS
1663 OpARM64SCVTFWD
1664 OpARM64UCVTFWS
1665 OpARM64UCVTFWD
1666 OpARM64SCVTFS
1667 OpARM64SCVTFD
1668 OpARM64UCVTFS
1669 OpARM64UCVTFD
1670 OpARM64FCVTZSSW
1671 OpARM64FCVTZSDW
1672 OpARM64FCVTZUSW
1673 OpARM64FCVTZUDW
1674 OpARM64FCVTZSS
1675 OpARM64FCVTZSD
1676 OpARM64FCVTZUS
1677 OpARM64FCVTZUD
1678 OpARM64FCVTSD
1679 OpARM64FCVTDS
1680 OpARM64FRINTAD
1681 OpARM64FRINTMD
1682 OpARM64FRINTND
1683 OpARM64FRINTPD
1684 OpARM64FRINTZD
1685 OpARM64CSEL
1686 OpARM64CSEL0
1687 OpARM64CSINC
1688 OpARM64CSINV
1689 OpARM64CSNEG
1690 OpARM64CSETM
1691 OpARM64CALLstatic
1692 OpARM64CALLtail
1693 OpARM64CALLclosure
1694 OpARM64CALLinter
1695 OpARM64LoweredNilCheck
1696 OpARM64Equal
1697 OpARM64NotEqual
1698 OpARM64LessThan
1699 OpARM64LessEqual
1700 OpARM64GreaterThan
1701 OpARM64GreaterEqual
1702 OpARM64LessThanU
1703 OpARM64LessEqualU
1704 OpARM64GreaterThanU
1705 OpARM64GreaterEqualU
1706 OpARM64LessThanF
1707 OpARM64LessEqualF
1708 OpARM64GreaterThanF
1709 OpARM64GreaterEqualF
1710 OpARM64NotLessThanF
1711 OpARM64NotLessEqualF
1712 OpARM64NotGreaterThanF
1713 OpARM64NotGreaterEqualF
1714 OpARM64LessThanNoov
1715 OpARM64GreaterEqualNoov
1716 OpARM64DUFFZERO
1717 OpARM64LoweredZero
1718 OpARM64DUFFCOPY
1719 OpARM64LoweredMove
1720 OpARM64LoweredGetClosurePtr
1721 OpARM64LoweredGetCallerSP
1722 OpARM64LoweredGetCallerPC
1723 OpARM64FlagConstant
1724 OpARM64InvertFlags
1725 OpARM64LDAR
1726 OpARM64LDARB
1727 OpARM64LDARW
1728 OpARM64STLRB
1729 OpARM64STLR
1730 OpARM64STLRW
1731 OpARM64LoweredAtomicExchange64
1732 OpARM64LoweredAtomicExchange32
1733 OpARM64LoweredAtomicExchange8
1734 OpARM64LoweredAtomicExchange64Variant
1735 OpARM64LoweredAtomicExchange32Variant
1736 OpARM64LoweredAtomicExchange8Variant
1737 OpARM64LoweredAtomicAdd64
1738 OpARM64LoweredAtomicAdd32
1739 OpARM64LoweredAtomicAdd64Variant
1740 OpARM64LoweredAtomicAdd32Variant
1741 OpARM64LoweredAtomicCas64
1742 OpARM64LoweredAtomicCas32
1743 OpARM64LoweredAtomicCas64Variant
1744 OpARM64LoweredAtomicCas32Variant
1745 OpARM64LoweredAtomicAnd8
1746 OpARM64LoweredAtomicOr8
1747 OpARM64LoweredAtomicAnd64
1748 OpARM64LoweredAtomicOr64
1749 OpARM64LoweredAtomicAnd32
1750 OpARM64LoweredAtomicOr32
1751 OpARM64LoweredAtomicAnd8Variant
1752 OpARM64LoweredAtomicOr8Variant
1753 OpARM64LoweredAtomicAnd64Variant
1754 OpARM64LoweredAtomicOr64Variant
1755 OpARM64LoweredAtomicAnd32Variant
1756 OpARM64LoweredAtomicOr32Variant
1757 OpARM64LoweredWB
1758 OpARM64LoweredPanicBoundsA
1759 OpARM64LoweredPanicBoundsB
1760 OpARM64LoweredPanicBoundsC
1761 OpARM64PRFM
1762 OpARM64DMB
1763 OpARM64ZERO
1764
1765 OpLOONG64NEGV
1766 OpLOONG64NEGF
1767 OpLOONG64NEGD
1768 OpLOONG64SQRTD
1769 OpLOONG64SQRTF
1770 OpLOONG64ABSD
1771 OpLOONG64CLZW
1772 OpLOONG64CLZV
1773 OpLOONG64CTZW
1774 OpLOONG64CTZV
1775 OpLOONG64REVB2H
1776 OpLOONG64REVB2W
1777 OpLOONG64REVBV
1778 OpLOONG64BITREV4B
1779 OpLOONG64BITREVW
1780 OpLOONG64BITREVV
1781 OpLOONG64VPCNT64
1782 OpLOONG64VPCNT32
1783 OpLOONG64VPCNT16
1784 OpLOONG64ADDV
1785 OpLOONG64ADDVconst
1786 OpLOONG64SUBV
1787 OpLOONG64SUBVconst
1788 OpLOONG64MULV
1789 OpLOONG64MULHV
1790 OpLOONG64MULHVU
1791 OpLOONG64DIVV
1792 OpLOONG64DIVVU
1793 OpLOONG64REMV
1794 OpLOONG64REMVU
1795 OpLOONG64ADDF
1796 OpLOONG64ADDD
1797 OpLOONG64SUBF
1798 OpLOONG64SUBD
1799 OpLOONG64MULF
1800 OpLOONG64MULD
1801 OpLOONG64DIVF
1802 OpLOONG64DIVD
1803 OpLOONG64AND
1804 OpLOONG64ANDconst
1805 OpLOONG64OR
1806 OpLOONG64ORconst
1807 OpLOONG64XOR
1808 OpLOONG64XORconst
1809 OpLOONG64NOR
1810 OpLOONG64NORconst
1811 OpLOONG64FMADDF
1812 OpLOONG64FMADDD
1813 OpLOONG64FMSUBF
1814 OpLOONG64FMSUBD
1815 OpLOONG64FNMADDF
1816 OpLOONG64FNMADDD
1817 OpLOONG64FNMSUBF
1818 OpLOONG64FNMSUBD
1819 OpLOONG64FMINF
1820 OpLOONG64FMIND
1821 OpLOONG64FMAXF
1822 OpLOONG64FMAXD
1823 OpLOONG64MASKEQZ
1824 OpLOONG64MASKNEZ
1825 OpLOONG64FCOPYSGD
1826 OpLOONG64SLL
1827 OpLOONG64SLLV
1828 OpLOONG64SLLconst
1829 OpLOONG64SLLVconst
1830 OpLOONG64SRL
1831 OpLOONG64SRLV
1832 OpLOONG64SRLconst
1833 OpLOONG64SRLVconst
1834 OpLOONG64SRA
1835 OpLOONG64SRAV
1836 OpLOONG64SRAconst
1837 OpLOONG64SRAVconst
1838 OpLOONG64ROTR
1839 OpLOONG64ROTRV
1840 OpLOONG64ROTRconst
1841 OpLOONG64ROTRVconst
1842 OpLOONG64SGT
1843 OpLOONG64SGTconst
1844 OpLOONG64SGTU
1845 OpLOONG64SGTUconst
1846 OpLOONG64CMPEQF
1847 OpLOONG64CMPEQD
1848 OpLOONG64CMPGEF
1849 OpLOONG64CMPGED
1850 OpLOONG64CMPGTF
1851 OpLOONG64CMPGTD
1852 OpLOONG64BSTRPICKW
1853 OpLOONG64BSTRPICKV
1854 OpLOONG64MOVVconst
1855 OpLOONG64MOVFconst
1856 OpLOONG64MOVDconst
1857 OpLOONG64MOVVaddr
1858 OpLOONG64MOVBload
1859 OpLOONG64MOVBUload
1860 OpLOONG64MOVHload
1861 OpLOONG64MOVHUload
1862 OpLOONG64MOVWload
1863 OpLOONG64MOVWUload
1864 OpLOONG64MOVVload
1865 OpLOONG64MOVFload
1866 OpLOONG64MOVDload
1867 OpLOONG64MOVVloadidx
1868 OpLOONG64MOVWloadidx
1869 OpLOONG64MOVWUloadidx
1870 OpLOONG64MOVHloadidx
1871 OpLOONG64MOVHUloadidx
1872 OpLOONG64MOVBloadidx
1873 OpLOONG64MOVBUloadidx
1874 OpLOONG64MOVFloadidx
1875 OpLOONG64MOVDloadidx
1876 OpLOONG64MOVBstore
1877 OpLOONG64MOVHstore
1878 OpLOONG64MOVWstore
1879 OpLOONG64MOVVstore
1880 OpLOONG64MOVFstore
1881 OpLOONG64MOVDstore
1882 OpLOONG64MOVBstoreidx
1883 OpLOONG64MOVHstoreidx
1884 OpLOONG64MOVWstoreidx
1885 OpLOONG64MOVVstoreidx
1886 OpLOONG64MOVFstoreidx
1887 OpLOONG64MOVDstoreidx
1888 OpLOONG64MOVBstorezero
1889 OpLOONG64MOVHstorezero
1890 OpLOONG64MOVWstorezero
1891 OpLOONG64MOVVstorezero
1892 OpLOONG64MOVBstorezeroidx
1893 OpLOONG64MOVHstorezeroidx
1894 OpLOONG64MOVWstorezeroidx
1895 OpLOONG64MOVVstorezeroidx
1896 OpLOONG64MOVWfpgp
1897 OpLOONG64MOVWgpfp
1898 OpLOONG64MOVVfpgp
1899 OpLOONG64MOVVgpfp
1900 OpLOONG64MOVBreg
1901 OpLOONG64MOVBUreg
1902 OpLOONG64MOVHreg
1903 OpLOONG64MOVHUreg
1904 OpLOONG64MOVWreg
1905 OpLOONG64MOVWUreg
1906 OpLOONG64MOVVreg
1907 OpLOONG64MOVVnop
1908 OpLOONG64MOVWF
1909 OpLOONG64MOVWD
1910 OpLOONG64MOVVF
1911 OpLOONG64MOVVD
1912 OpLOONG64TRUNCFW
1913 OpLOONG64TRUNCDW
1914 OpLOONG64TRUNCFV
1915 OpLOONG64TRUNCDV
1916 OpLOONG64MOVFD
1917 OpLOONG64MOVDF
1918 OpLOONG64LoweredRound32F
1919 OpLOONG64LoweredRound64F
1920 OpLOONG64CALLstatic
1921 OpLOONG64CALLtail
1922 OpLOONG64CALLclosure
1923 OpLOONG64CALLinter
1924 OpLOONG64DUFFZERO
1925 OpLOONG64DUFFCOPY
1926 OpLOONG64LoweredZero
1927 OpLOONG64LoweredMove
1928 OpLOONG64LoweredAtomicLoad8
1929 OpLOONG64LoweredAtomicLoad32
1930 OpLOONG64LoweredAtomicLoad64
1931 OpLOONG64LoweredAtomicStore8
1932 OpLOONG64LoweredAtomicStore32
1933 OpLOONG64LoweredAtomicStore64
1934 OpLOONG64LoweredAtomicStore8Variant
1935 OpLOONG64LoweredAtomicStore32Variant
1936 OpLOONG64LoweredAtomicStore64Variant
1937 OpLOONG64LoweredAtomicExchange32
1938 OpLOONG64LoweredAtomicExchange64
1939 OpLOONG64LoweredAtomicExchange8Variant
1940 OpLOONG64LoweredAtomicAdd32
1941 OpLOONG64LoweredAtomicAdd64
1942 OpLOONG64LoweredAtomicCas32
1943 OpLOONG64LoweredAtomicCas64
1944 OpLOONG64LoweredAtomicCas64Variant
1945 OpLOONG64LoweredAtomicCas32Variant
1946 OpLOONG64LoweredAtomicAnd32
1947 OpLOONG64LoweredAtomicOr32
1948 OpLOONG64LoweredAtomicAnd32value
1949 OpLOONG64LoweredAtomicAnd64value
1950 OpLOONG64LoweredAtomicOr32value
1951 OpLOONG64LoweredAtomicOr64value
1952 OpLOONG64LoweredNilCheck
1953 OpLOONG64FPFlagTrue
1954 OpLOONG64FPFlagFalse
1955 OpLOONG64LoweredGetClosurePtr
1956 OpLOONG64LoweredGetCallerSP
1957 OpLOONG64LoweredGetCallerPC
1958 OpLOONG64LoweredWB
1959 OpLOONG64LoweredPubBarrier
1960 OpLOONG64LoweredPanicBoundsA
1961 OpLOONG64LoweredPanicBoundsB
1962 OpLOONG64LoweredPanicBoundsC
1963
1964 OpMIPSADD
1965 OpMIPSADDconst
1966 OpMIPSSUB
1967 OpMIPSSUBconst
1968 OpMIPSMUL
1969 OpMIPSMULT
1970 OpMIPSMULTU
1971 OpMIPSDIV
1972 OpMIPSDIVU
1973 OpMIPSADDF
1974 OpMIPSADDD
1975 OpMIPSSUBF
1976 OpMIPSSUBD
1977 OpMIPSMULF
1978 OpMIPSMULD
1979 OpMIPSDIVF
1980 OpMIPSDIVD
1981 OpMIPSAND
1982 OpMIPSANDconst
1983 OpMIPSOR
1984 OpMIPSORconst
1985 OpMIPSXOR
1986 OpMIPSXORconst
1987 OpMIPSNOR
1988 OpMIPSNORconst
1989 OpMIPSNEG
1990 OpMIPSNEGF
1991 OpMIPSNEGD
1992 OpMIPSABSD
1993 OpMIPSSQRTD
1994 OpMIPSSQRTF
1995 OpMIPSSLL
1996 OpMIPSSLLconst
1997 OpMIPSSRL
1998 OpMIPSSRLconst
1999 OpMIPSSRA
2000 OpMIPSSRAconst
2001 OpMIPSCLZ
2002 OpMIPSSGT
2003 OpMIPSSGTconst
2004 OpMIPSSGTzero
2005 OpMIPSSGTU
2006 OpMIPSSGTUconst
2007 OpMIPSSGTUzero
2008 OpMIPSCMPEQF
2009 OpMIPSCMPEQD
2010 OpMIPSCMPGEF
2011 OpMIPSCMPGED
2012 OpMIPSCMPGTF
2013 OpMIPSCMPGTD
2014 OpMIPSMOVWconst
2015 OpMIPSMOVFconst
2016 OpMIPSMOVDconst
2017 OpMIPSMOVWaddr
2018 OpMIPSMOVBload
2019 OpMIPSMOVBUload
2020 OpMIPSMOVHload
2021 OpMIPSMOVHUload
2022 OpMIPSMOVWload
2023 OpMIPSMOVFload
2024 OpMIPSMOVDload
2025 OpMIPSMOVBstore
2026 OpMIPSMOVHstore
2027 OpMIPSMOVWstore
2028 OpMIPSMOVFstore
2029 OpMIPSMOVDstore
2030 OpMIPSMOVBstorezero
2031 OpMIPSMOVHstorezero
2032 OpMIPSMOVWstorezero
2033 OpMIPSMOVWfpgp
2034 OpMIPSMOVWgpfp
2035 OpMIPSMOVBreg
2036 OpMIPSMOVBUreg
2037 OpMIPSMOVHreg
2038 OpMIPSMOVHUreg
2039 OpMIPSMOVWreg
2040 OpMIPSMOVWnop
2041 OpMIPSCMOVZ
2042 OpMIPSCMOVZzero
2043 OpMIPSMOVWF
2044 OpMIPSMOVWD
2045 OpMIPSTRUNCFW
2046 OpMIPSTRUNCDW
2047 OpMIPSMOVFD
2048 OpMIPSMOVDF
2049 OpMIPSCALLstatic
2050 OpMIPSCALLtail
2051 OpMIPSCALLclosure
2052 OpMIPSCALLinter
2053 OpMIPSLoweredAtomicLoad8
2054 OpMIPSLoweredAtomicLoad32
2055 OpMIPSLoweredAtomicStore8
2056 OpMIPSLoweredAtomicStore32
2057 OpMIPSLoweredAtomicStorezero
2058 OpMIPSLoweredAtomicExchange
2059 OpMIPSLoweredAtomicAdd
2060 OpMIPSLoweredAtomicAddconst
2061 OpMIPSLoweredAtomicCas
2062 OpMIPSLoweredAtomicAnd
2063 OpMIPSLoweredAtomicOr
2064 OpMIPSLoweredZero
2065 OpMIPSLoweredMove
2066 OpMIPSLoweredNilCheck
2067 OpMIPSFPFlagTrue
2068 OpMIPSFPFlagFalse
2069 OpMIPSLoweredGetClosurePtr
2070 OpMIPSLoweredGetCallerSP
2071 OpMIPSLoweredGetCallerPC
2072 OpMIPSLoweredWB
2073 OpMIPSLoweredPanicBoundsA
2074 OpMIPSLoweredPanicBoundsB
2075 OpMIPSLoweredPanicBoundsC
2076 OpMIPSLoweredPanicExtendA
2077 OpMIPSLoweredPanicExtendB
2078 OpMIPSLoweredPanicExtendC
2079
2080 OpMIPS64ADDV
2081 OpMIPS64ADDVconst
2082 OpMIPS64SUBV
2083 OpMIPS64SUBVconst
2084 OpMIPS64MULV
2085 OpMIPS64MULVU
2086 OpMIPS64DIVV
2087 OpMIPS64DIVVU
2088 OpMIPS64ADDF
2089 OpMIPS64ADDD
2090 OpMIPS64SUBF
2091 OpMIPS64SUBD
2092 OpMIPS64MULF
2093 OpMIPS64MULD
2094 OpMIPS64DIVF
2095 OpMIPS64DIVD
2096 OpMIPS64AND
2097 OpMIPS64ANDconst
2098 OpMIPS64OR
2099 OpMIPS64ORconst
2100 OpMIPS64XOR
2101 OpMIPS64XORconst
2102 OpMIPS64NOR
2103 OpMIPS64NORconst
2104 OpMIPS64NEGV
2105 OpMIPS64NEGF
2106 OpMIPS64NEGD
2107 OpMIPS64ABSD
2108 OpMIPS64SQRTD
2109 OpMIPS64SQRTF
2110 OpMIPS64SLLV
2111 OpMIPS64SLLVconst
2112 OpMIPS64SRLV
2113 OpMIPS64SRLVconst
2114 OpMIPS64SRAV
2115 OpMIPS64SRAVconst
2116 OpMIPS64SGT
2117 OpMIPS64SGTconst
2118 OpMIPS64SGTU
2119 OpMIPS64SGTUconst
2120 OpMIPS64CMPEQF
2121 OpMIPS64CMPEQD
2122 OpMIPS64CMPGEF
2123 OpMIPS64CMPGED
2124 OpMIPS64CMPGTF
2125 OpMIPS64CMPGTD
2126 OpMIPS64MOVVconst
2127 OpMIPS64MOVFconst
2128 OpMIPS64MOVDconst
2129 OpMIPS64MOVVaddr
2130 OpMIPS64MOVBload
2131 OpMIPS64MOVBUload
2132 OpMIPS64MOVHload
2133 OpMIPS64MOVHUload
2134 OpMIPS64MOVWload
2135 OpMIPS64MOVWUload
2136 OpMIPS64MOVVload
2137 OpMIPS64MOVFload
2138 OpMIPS64MOVDload
2139 OpMIPS64MOVBstore
2140 OpMIPS64MOVHstore
2141 OpMIPS64MOVWstore
2142 OpMIPS64MOVVstore
2143 OpMIPS64MOVFstore
2144 OpMIPS64MOVDstore
2145 OpMIPS64MOVBstorezero
2146 OpMIPS64MOVHstorezero
2147 OpMIPS64MOVWstorezero
2148 OpMIPS64MOVVstorezero
2149 OpMIPS64MOVWfpgp
2150 OpMIPS64MOVWgpfp
2151 OpMIPS64MOVVfpgp
2152 OpMIPS64MOVVgpfp
2153 OpMIPS64MOVBreg
2154 OpMIPS64MOVBUreg
2155 OpMIPS64MOVHreg
2156 OpMIPS64MOVHUreg
2157 OpMIPS64MOVWreg
2158 OpMIPS64MOVWUreg
2159 OpMIPS64MOVVreg
2160 OpMIPS64MOVVnop
2161 OpMIPS64MOVWF
2162 OpMIPS64MOVWD
2163 OpMIPS64MOVVF
2164 OpMIPS64MOVVD
2165 OpMIPS64TRUNCFW
2166 OpMIPS64TRUNCDW
2167 OpMIPS64TRUNCFV
2168 OpMIPS64TRUNCDV
2169 OpMIPS64MOVFD
2170 OpMIPS64MOVDF
2171 OpMIPS64CALLstatic
2172 OpMIPS64CALLtail
2173 OpMIPS64CALLclosure
2174 OpMIPS64CALLinter
2175 OpMIPS64DUFFZERO
2176 OpMIPS64DUFFCOPY
2177 OpMIPS64LoweredZero
2178 OpMIPS64LoweredMove
2179 OpMIPS64LoweredAtomicAnd32
2180 OpMIPS64LoweredAtomicOr32
2181 OpMIPS64LoweredAtomicLoad8
2182 OpMIPS64LoweredAtomicLoad32
2183 OpMIPS64LoweredAtomicLoad64
2184 OpMIPS64LoweredAtomicStore8
2185 OpMIPS64LoweredAtomicStore32
2186 OpMIPS64LoweredAtomicStore64
2187 OpMIPS64LoweredAtomicStorezero32
2188 OpMIPS64LoweredAtomicStorezero64
2189 OpMIPS64LoweredAtomicExchange32
2190 OpMIPS64LoweredAtomicExchange64
2191 OpMIPS64LoweredAtomicAdd32
2192 OpMIPS64LoweredAtomicAdd64
2193 OpMIPS64LoweredAtomicAddconst32
2194 OpMIPS64LoweredAtomicAddconst64
2195 OpMIPS64LoweredAtomicCas32
2196 OpMIPS64LoweredAtomicCas64
2197 OpMIPS64LoweredNilCheck
2198 OpMIPS64FPFlagTrue
2199 OpMIPS64FPFlagFalse
2200 OpMIPS64LoweredGetClosurePtr
2201 OpMIPS64LoweredGetCallerSP
2202 OpMIPS64LoweredGetCallerPC
2203 OpMIPS64LoweredWB
2204 OpMIPS64LoweredPanicBoundsA
2205 OpMIPS64LoweredPanicBoundsB
2206 OpMIPS64LoweredPanicBoundsC
2207
2208 OpPPC64ADD
2209 OpPPC64ADDCC
2210 OpPPC64ADDconst
2211 OpPPC64ADDCCconst
2212 OpPPC64FADD
2213 OpPPC64FADDS
2214 OpPPC64SUB
2215 OpPPC64SUBCC
2216 OpPPC64SUBFCconst
2217 OpPPC64FSUB
2218 OpPPC64FSUBS
2219 OpPPC64XSMINJDP
2220 OpPPC64XSMAXJDP
2221 OpPPC64MULLD
2222 OpPPC64MULLW
2223 OpPPC64MULLDconst
2224 OpPPC64MULLWconst
2225 OpPPC64MADDLD
2226 OpPPC64MULHD
2227 OpPPC64MULHW
2228 OpPPC64MULHDU
2229 OpPPC64MULHDUCC
2230 OpPPC64MULHWU
2231 OpPPC64FMUL
2232 OpPPC64FMULS
2233 OpPPC64FMADD
2234 OpPPC64FMADDS
2235 OpPPC64FMSUB
2236 OpPPC64FMSUBS
2237 OpPPC64SRAD
2238 OpPPC64SRAW
2239 OpPPC64SRD
2240 OpPPC64SRW
2241 OpPPC64SLD
2242 OpPPC64SLW
2243 OpPPC64ROTL
2244 OpPPC64ROTLW
2245 OpPPC64CLRLSLWI
2246 OpPPC64CLRLSLDI
2247 OpPPC64ADDC
2248 OpPPC64SUBC
2249 OpPPC64ADDCconst
2250 OpPPC64SUBCconst
2251 OpPPC64ADDE
2252 OpPPC64ADDZE
2253 OpPPC64SUBE
2254 OpPPC64ADDZEzero
2255 OpPPC64SUBZEzero
2256 OpPPC64SRADconst
2257 OpPPC64SRAWconst
2258 OpPPC64SRDconst
2259 OpPPC64SRWconst
2260 OpPPC64SLDconst
2261 OpPPC64SLWconst
2262 OpPPC64ROTLconst
2263 OpPPC64ROTLWconst
2264 OpPPC64EXTSWSLconst
2265 OpPPC64RLWINM
2266 OpPPC64RLWNM
2267 OpPPC64RLWMI
2268 OpPPC64RLDICL
2269 OpPPC64RLDICLCC
2270 OpPPC64RLDICR
2271 OpPPC64CNTLZD
2272 OpPPC64CNTLZDCC
2273 OpPPC64CNTLZW
2274 OpPPC64CNTTZD
2275 OpPPC64CNTTZW
2276 OpPPC64POPCNTD
2277 OpPPC64POPCNTW
2278 OpPPC64POPCNTB
2279 OpPPC64FDIV
2280 OpPPC64FDIVS
2281 OpPPC64DIVD
2282 OpPPC64DIVW
2283 OpPPC64DIVDU
2284 OpPPC64DIVWU
2285 OpPPC64MODUD
2286 OpPPC64MODSD
2287 OpPPC64MODUW
2288 OpPPC64MODSW
2289 OpPPC64FCTIDZ
2290 OpPPC64FCTIWZ
2291 OpPPC64FCFID
2292 OpPPC64FCFIDS
2293 OpPPC64FRSP
2294 OpPPC64MFVSRD
2295 OpPPC64MTVSRD
2296 OpPPC64AND
2297 OpPPC64ANDN
2298 OpPPC64ANDNCC
2299 OpPPC64ANDCC
2300 OpPPC64OR
2301 OpPPC64ORN
2302 OpPPC64ORCC
2303 OpPPC64NOR
2304 OpPPC64NORCC
2305 OpPPC64XOR
2306 OpPPC64XORCC
2307 OpPPC64EQV
2308 OpPPC64NEG
2309 OpPPC64NEGCC
2310 OpPPC64BRD
2311 OpPPC64BRW
2312 OpPPC64BRH
2313 OpPPC64FNEG
2314 OpPPC64FSQRT
2315 OpPPC64FSQRTS
2316 OpPPC64FFLOOR
2317 OpPPC64FCEIL
2318 OpPPC64FTRUNC
2319 OpPPC64FROUND
2320 OpPPC64FABS
2321 OpPPC64FNABS
2322 OpPPC64FCPSGN
2323 OpPPC64ORconst
2324 OpPPC64XORconst
2325 OpPPC64ANDCCconst
2326 OpPPC64ANDconst
2327 OpPPC64MOVBreg
2328 OpPPC64MOVBZreg
2329 OpPPC64MOVHreg
2330 OpPPC64MOVHZreg
2331 OpPPC64MOVWreg
2332 OpPPC64MOVWZreg
2333 OpPPC64MOVBZload
2334 OpPPC64MOVHload
2335 OpPPC64MOVHZload
2336 OpPPC64MOVWload
2337 OpPPC64MOVWZload
2338 OpPPC64MOVDload
2339 OpPPC64MOVDBRload
2340 OpPPC64MOVWBRload
2341 OpPPC64MOVHBRload
2342 OpPPC64MOVBZloadidx
2343 OpPPC64MOVHloadidx
2344 OpPPC64MOVHZloadidx
2345 OpPPC64MOVWloadidx
2346 OpPPC64MOVWZloadidx
2347 OpPPC64MOVDloadidx
2348 OpPPC64MOVHBRloadidx
2349 OpPPC64MOVWBRloadidx
2350 OpPPC64MOVDBRloadidx
2351 OpPPC64FMOVDloadidx
2352 OpPPC64FMOVSloadidx
2353 OpPPC64DCBT
2354 OpPPC64MOVDBRstore
2355 OpPPC64MOVWBRstore
2356 OpPPC64MOVHBRstore
2357 OpPPC64FMOVDload
2358 OpPPC64FMOVSload
2359 OpPPC64MOVBstore
2360 OpPPC64MOVHstore
2361 OpPPC64MOVWstore
2362 OpPPC64MOVDstore
2363 OpPPC64FMOVDstore
2364 OpPPC64FMOVSstore
2365 OpPPC64MOVBstoreidx
2366 OpPPC64MOVHstoreidx
2367 OpPPC64MOVWstoreidx
2368 OpPPC64MOVDstoreidx
2369 OpPPC64FMOVDstoreidx
2370 OpPPC64FMOVSstoreidx
2371 OpPPC64MOVHBRstoreidx
2372 OpPPC64MOVWBRstoreidx
2373 OpPPC64MOVDBRstoreidx
2374 OpPPC64MOVBstorezero
2375 OpPPC64MOVHstorezero
2376 OpPPC64MOVWstorezero
2377 OpPPC64MOVDstorezero
2378 OpPPC64MOVDaddr
2379 OpPPC64MOVDconst
2380 OpPPC64FMOVDconst
2381 OpPPC64FMOVSconst
2382 OpPPC64FCMPU
2383 OpPPC64CMP
2384 OpPPC64CMPU
2385 OpPPC64CMPW
2386 OpPPC64CMPWU
2387 OpPPC64CMPconst
2388 OpPPC64CMPUconst
2389 OpPPC64CMPWconst
2390 OpPPC64CMPWUconst
2391 OpPPC64ISEL
2392 OpPPC64ISELZ
2393 OpPPC64SETBC
2394 OpPPC64SETBCR
2395 OpPPC64Equal
2396 OpPPC64NotEqual
2397 OpPPC64LessThan
2398 OpPPC64FLessThan
2399 OpPPC64LessEqual
2400 OpPPC64FLessEqual
2401 OpPPC64GreaterThan
2402 OpPPC64FGreaterThan
2403 OpPPC64GreaterEqual
2404 OpPPC64FGreaterEqual
2405 OpPPC64LoweredGetClosurePtr
2406 OpPPC64LoweredGetCallerSP
2407 OpPPC64LoweredGetCallerPC
2408 OpPPC64LoweredNilCheck
2409 OpPPC64LoweredRound32F
2410 OpPPC64LoweredRound64F
2411 OpPPC64CALLstatic
2412 OpPPC64CALLtail
2413 OpPPC64CALLclosure
2414 OpPPC64CALLinter
2415 OpPPC64LoweredZero
2416 OpPPC64LoweredZeroShort
2417 OpPPC64LoweredQuadZeroShort
2418 OpPPC64LoweredQuadZero
2419 OpPPC64LoweredMove
2420 OpPPC64LoweredMoveShort
2421 OpPPC64LoweredQuadMove
2422 OpPPC64LoweredQuadMoveShort
2423 OpPPC64LoweredAtomicStore8
2424 OpPPC64LoweredAtomicStore32
2425 OpPPC64LoweredAtomicStore64
2426 OpPPC64LoweredAtomicLoad8
2427 OpPPC64LoweredAtomicLoad32
2428 OpPPC64LoweredAtomicLoad64
2429 OpPPC64LoweredAtomicLoadPtr
2430 OpPPC64LoweredAtomicAdd32
2431 OpPPC64LoweredAtomicAdd64
2432 OpPPC64LoweredAtomicExchange8
2433 OpPPC64LoweredAtomicExchange32
2434 OpPPC64LoweredAtomicExchange64
2435 OpPPC64LoweredAtomicCas64
2436 OpPPC64LoweredAtomicCas32
2437 OpPPC64LoweredAtomicAnd8
2438 OpPPC64LoweredAtomicAnd32
2439 OpPPC64LoweredAtomicOr8
2440 OpPPC64LoweredAtomicOr32
2441 OpPPC64LoweredWB
2442 OpPPC64LoweredPubBarrier
2443 OpPPC64LoweredPanicBoundsA
2444 OpPPC64LoweredPanicBoundsB
2445 OpPPC64LoweredPanicBoundsC
2446 OpPPC64InvertFlags
2447 OpPPC64FlagEQ
2448 OpPPC64FlagLT
2449 OpPPC64FlagGT
2450
2451 OpRISCV64ADD
2452 OpRISCV64ADDI
2453 OpRISCV64ADDIW
2454 OpRISCV64NEG
2455 OpRISCV64NEGW
2456 OpRISCV64SUB
2457 OpRISCV64SUBW
2458 OpRISCV64MUL
2459 OpRISCV64MULW
2460 OpRISCV64MULH
2461 OpRISCV64MULHU
2462 OpRISCV64LoweredMuluhilo
2463 OpRISCV64LoweredMuluover
2464 OpRISCV64DIV
2465 OpRISCV64DIVU
2466 OpRISCV64DIVW
2467 OpRISCV64DIVUW
2468 OpRISCV64REM
2469 OpRISCV64REMU
2470 OpRISCV64REMW
2471 OpRISCV64REMUW
2472 OpRISCV64MOVaddr
2473 OpRISCV64MOVDconst
2474 OpRISCV64MOVBload
2475 OpRISCV64MOVHload
2476 OpRISCV64MOVWload
2477 OpRISCV64MOVDload
2478 OpRISCV64MOVBUload
2479 OpRISCV64MOVHUload
2480 OpRISCV64MOVWUload
2481 OpRISCV64MOVBstore
2482 OpRISCV64MOVHstore
2483 OpRISCV64MOVWstore
2484 OpRISCV64MOVDstore
2485 OpRISCV64MOVBstorezero
2486 OpRISCV64MOVHstorezero
2487 OpRISCV64MOVWstorezero
2488 OpRISCV64MOVDstorezero
2489 OpRISCV64MOVBreg
2490 OpRISCV64MOVHreg
2491 OpRISCV64MOVWreg
2492 OpRISCV64MOVDreg
2493 OpRISCV64MOVBUreg
2494 OpRISCV64MOVHUreg
2495 OpRISCV64MOVWUreg
2496 OpRISCV64MOVDnop
2497 OpRISCV64SLL
2498 OpRISCV64SLLW
2499 OpRISCV64SRA
2500 OpRISCV64SRAW
2501 OpRISCV64SRL
2502 OpRISCV64SRLW
2503 OpRISCV64SLLI
2504 OpRISCV64SLLIW
2505 OpRISCV64SRAI
2506 OpRISCV64SRAIW
2507 OpRISCV64SRLI
2508 OpRISCV64SRLIW
2509 OpRISCV64SH1ADD
2510 OpRISCV64SH2ADD
2511 OpRISCV64SH3ADD
2512 OpRISCV64AND
2513 OpRISCV64ANDN
2514 OpRISCV64ANDI
2515 OpRISCV64CLZ
2516 OpRISCV64CLZW
2517 OpRISCV64CTZ
2518 OpRISCV64CTZW
2519 OpRISCV64NOT
2520 OpRISCV64OR
2521 OpRISCV64ORN
2522 OpRISCV64ORI
2523 OpRISCV64ROL
2524 OpRISCV64ROLW
2525 OpRISCV64ROR
2526 OpRISCV64RORI
2527 OpRISCV64RORIW
2528 OpRISCV64RORW
2529 OpRISCV64XNOR
2530 OpRISCV64XOR
2531 OpRISCV64XORI
2532 OpRISCV64MIN
2533 OpRISCV64MAX
2534 OpRISCV64MINU
2535 OpRISCV64MAXU
2536 OpRISCV64SEQZ
2537 OpRISCV64SNEZ
2538 OpRISCV64SLT
2539 OpRISCV64SLTI
2540 OpRISCV64SLTU
2541 OpRISCV64SLTIU
2542 OpRISCV64LoweredRound32F
2543 OpRISCV64LoweredRound64F
2544 OpRISCV64CALLstatic
2545 OpRISCV64CALLtail
2546 OpRISCV64CALLclosure
2547 OpRISCV64CALLinter
2548 OpRISCV64DUFFZERO
2549 OpRISCV64DUFFCOPY
2550 OpRISCV64LoweredZero
2551 OpRISCV64LoweredMove
2552 OpRISCV64LoweredAtomicLoad8
2553 OpRISCV64LoweredAtomicLoad32
2554 OpRISCV64LoweredAtomicLoad64
2555 OpRISCV64LoweredAtomicStore8
2556 OpRISCV64LoweredAtomicStore32
2557 OpRISCV64LoweredAtomicStore64
2558 OpRISCV64LoweredAtomicExchange32
2559 OpRISCV64LoweredAtomicExchange64
2560 OpRISCV64LoweredAtomicAdd32
2561 OpRISCV64LoweredAtomicAdd64
2562 OpRISCV64LoweredAtomicCas32
2563 OpRISCV64LoweredAtomicCas64
2564 OpRISCV64LoweredAtomicAnd32
2565 OpRISCV64LoweredAtomicOr32
2566 OpRISCV64LoweredNilCheck
2567 OpRISCV64LoweredGetClosurePtr
2568 OpRISCV64LoweredGetCallerSP
2569 OpRISCV64LoweredGetCallerPC
2570 OpRISCV64LoweredWB
2571 OpRISCV64LoweredPubBarrier
2572 OpRISCV64LoweredPanicBoundsA
2573 OpRISCV64LoweredPanicBoundsB
2574 OpRISCV64LoweredPanicBoundsC
2575 OpRISCV64FADDS
2576 OpRISCV64FSUBS
2577 OpRISCV64FMULS
2578 OpRISCV64FDIVS
2579 OpRISCV64FMADDS
2580 OpRISCV64FMSUBS
2581 OpRISCV64FNMADDS
2582 OpRISCV64FNMSUBS
2583 OpRISCV64FSQRTS
2584 OpRISCV64FNEGS
2585 OpRISCV64FMVSX
2586 OpRISCV64FCVTSW
2587 OpRISCV64FCVTSL
2588 OpRISCV64FCVTWS
2589 OpRISCV64FCVTLS
2590 OpRISCV64FMOVWload
2591 OpRISCV64FMOVWstore
2592 OpRISCV64FEQS
2593 OpRISCV64FNES
2594 OpRISCV64FLTS
2595 OpRISCV64FLES
2596 OpRISCV64LoweredFMAXS
2597 OpRISCV64LoweredFMINS
2598 OpRISCV64FADDD
2599 OpRISCV64FSUBD
2600 OpRISCV64FMULD
2601 OpRISCV64FDIVD
2602 OpRISCV64FMADDD
2603 OpRISCV64FMSUBD
2604 OpRISCV64FNMADDD
2605 OpRISCV64FNMSUBD
2606 OpRISCV64FSQRTD
2607 OpRISCV64FNEGD
2608 OpRISCV64FABSD
2609 OpRISCV64FSGNJD
2610 OpRISCV64FMVDX
2611 OpRISCV64FCVTDW
2612 OpRISCV64FCVTDL
2613 OpRISCV64FCVTWD
2614 OpRISCV64FCVTLD
2615 OpRISCV64FCVTDS
2616 OpRISCV64FCVTSD
2617 OpRISCV64FMOVDload
2618 OpRISCV64FMOVDstore
2619 OpRISCV64FEQD
2620 OpRISCV64FNED
2621 OpRISCV64FLTD
2622 OpRISCV64FLED
2623 OpRISCV64LoweredFMIND
2624 OpRISCV64LoweredFMAXD
2625
2626 OpS390XFADDS
2627 OpS390XFADD
2628 OpS390XFSUBS
2629 OpS390XFSUB
2630 OpS390XFMULS
2631 OpS390XFMUL
2632 OpS390XFDIVS
2633 OpS390XFDIV
2634 OpS390XFNEGS
2635 OpS390XFNEG
2636 OpS390XFMADDS
2637 OpS390XFMADD
2638 OpS390XFMSUBS
2639 OpS390XFMSUB
2640 OpS390XLPDFR
2641 OpS390XLNDFR
2642 OpS390XCPSDR
2643 OpS390XFIDBR
2644 OpS390XFMOVSload
2645 OpS390XFMOVDload
2646 OpS390XFMOVSconst
2647 OpS390XFMOVDconst
2648 OpS390XFMOVSloadidx
2649 OpS390XFMOVDloadidx
2650 OpS390XFMOVSstore
2651 OpS390XFMOVDstore
2652 OpS390XFMOVSstoreidx
2653 OpS390XFMOVDstoreidx
2654 OpS390XADD
2655 OpS390XADDW
2656 OpS390XADDconst
2657 OpS390XADDWconst
2658 OpS390XADDload
2659 OpS390XADDWload
2660 OpS390XSUB
2661 OpS390XSUBW
2662 OpS390XSUBconst
2663 OpS390XSUBWconst
2664 OpS390XSUBload
2665 OpS390XSUBWload
2666 OpS390XMULLD
2667 OpS390XMULLW
2668 OpS390XMULLDconst
2669 OpS390XMULLWconst
2670 OpS390XMULLDload
2671 OpS390XMULLWload
2672 OpS390XMULHD
2673 OpS390XMULHDU
2674 OpS390XDIVD
2675 OpS390XDIVW
2676 OpS390XDIVDU
2677 OpS390XDIVWU
2678 OpS390XMODD
2679 OpS390XMODW
2680 OpS390XMODDU
2681 OpS390XMODWU
2682 OpS390XAND
2683 OpS390XANDW
2684 OpS390XANDconst
2685 OpS390XANDWconst
2686 OpS390XANDload
2687 OpS390XANDWload
2688 OpS390XOR
2689 OpS390XORW
2690 OpS390XORconst
2691 OpS390XORWconst
2692 OpS390XORload
2693 OpS390XORWload
2694 OpS390XXOR
2695 OpS390XXORW
2696 OpS390XXORconst
2697 OpS390XXORWconst
2698 OpS390XXORload
2699 OpS390XXORWload
2700 OpS390XADDC
2701 OpS390XADDCconst
2702 OpS390XADDE
2703 OpS390XSUBC
2704 OpS390XSUBE
2705 OpS390XCMP
2706 OpS390XCMPW
2707 OpS390XCMPU
2708 OpS390XCMPWU
2709 OpS390XCMPconst
2710 OpS390XCMPWconst
2711 OpS390XCMPUconst
2712 OpS390XCMPWUconst
2713 OpS390XFCMPS
2714 OpS390XFCMP
2715 OpS390XLTDBR
2716 OpS390XLTEBR
2717 OpS390XSLD
2718 OpS390XSLW
2719 OpS390XSLDconst
2720 OpS390XSLWconst
2721 OpS390XSRD
2722 OpS390XSRW
2723 OpS390XSRDconst
2724 OpS390XSRWconst
2725 OpS390XSRAD
2726 OpS390XSRAW
2727 OpS390XSRADconst
2728 OpS390XSRAWconst
2729 OpS390XRLLG
2730 OpS390XRLL
2731 OpS390XRLLconst
2732 OpS390XRXSBG
2733 OpS390XRISBGZ
2734 OpS390XNEG
2735 OpS390XNEGW
2736 OpS390XNOT
2737 OpS390XNOTW
2738 OpS390XFSQRT
2739 OpS390XFSQRTS
2740 OpS390XLOCGR
2741 OpS390XMOVBreg
2742 OpS390XMOVBZreg
2743 OpS390XMOVHreg
2744 OpS390XMOVHZreg
2745 OpS390XMOVWreg
2746 OpS390XMOVWZreg
2747 OpS390XMOVDconst
2748 OpS390XLDGR
2749 OpS390XLGDR
2750 OpS390XCFDBRA
2751 OpS390XCGDBRA
2752 OpS390XCFEBRA
2753 OpS390XCGEBRA
2754 OpS390XCEFBRA
2755 OpS390XCDFBRA
2756 OpS390XCEGBRA
2757 OpS390XCDGBRA
2758 OpS390XCLFEBR
2759 OpS390XCLFDBR
2760 OpS390XCLGEBR
2761 OpS390XCLGDBR
2762 OpS390XCELFBR
2763 OpS390XCDLFBR
2764 OpS390XCELGBR
2765 OpS390XCDLGBR
2766 OpS390XLEDBR
2767 OpS390XLDEBR
2768 OpS390XMOVDaddr
2769 OpS390XMOVDaddridx
2770 OpS390XMOVBZload
2771 OpS390XMOVBload
2772 OpS390XMOVHZload
2773 OpS390XMOVHload
2774 OpS390XMOVWZload
2775 OpS390XMOVWload
2776 OpS390XMOVDload
2777 OpS390XMOVWBR
2778 OpS390XMOVDBR
2779 OpS390XMOVHBRload
2780 OpS390XMOVWBRload
2781 OpS390XMOVDBRload
2782 OpS390XMOVBstore
2783 OpS390XMOVHstore
2784 OpS390XMOVWstore
2785 OpS390XMOVDstore
2786 OpS390XMOVHBRstore
2787 OpS390XMOVWBRstore
2788 OpS390XMOVDBRstore
2789 OpS390XMVC
2790 OpS390XMOVBZloadidx
2791 OpS390XMOVBloadidx
2792 OpS390XMOVHZloadidx
2793 OpS390XMOVHloadidx
2794 OpS390XMOVWZloadidx
2795 OpS390XMOVWloadidx
2796 OpS390XMOVDloadidx
2797 OpS390XMOVHBRloadidx
2798 OpS390XMOVWBRloadidx
2799 OpS390XMOVDBRloadidx
2800 OpS390XMOVBstoreidx
2801 OpS390XMOVHstoreidx
2802 OpS390XMOVWstoreidx
2803 OpS390XMOVDstoreidx
2804 OpS390XMOVHBRstoreidx
2805 OpS390XMOVWBRstoreidx
2806 OpS390XMOVDBRstoreidx
2807 OpS390XMOVBstoreconst
2808 OpS390XMOVHstoreconst
2809 OpS390XMOVWstoreconst
2810 OpS390XMOVDstoreconst
2811 OpS390XCLEAR
2812 OpS390XCALLstatic
2813 OpS390XCALLtail
2814 OpS390XCALLclosure
2815 OpS390XCALLinter
2816 OpS390XInvertFlags
2817 OpS390XLoweredGetG
2818 OpS390XLoweredGetClosurePtr
2819 OpS390XLoweredGetCallerSP
2820 OpS390XLoweredGetCallerPC
2821 OpS390XLoweredNilCheck
2822 OpS390XLoweredRound32F
2823 OpS390XLoweredRound64F
2824 OpS390XLoweredWB
2825 OpS390XLoweredPanicBoundsA
2826 OpS390XLoweredPanicBoundsB
2827 OpS390XLoweredPanicBoundsC
2828 OpS390XFlagEQ
2829 OpS390XFlagLT
2830 OpS390XFlagGT
2831 OpS390XFlagOV
2832 OpS390XSYNC
2833 OpS390XMOVBZatomicload
2834 OpS390XMOVWZatomicload
2835 OpS390XMOVDatomicload
2836 OpS390XMOVBatomicstore
2837 OpS390XMOVWatomicstore
2838 OpS390XMOVDatomicstore
2839 OpS390XLAA
2840 OpS390XLAAG
2841 OpS390XAddTupleFirst32
2842 OpS390XAddTupleFirst64
2843 OpS390XLAN
2844 OpS390XLANfloor
2845 OpS390XLAO
2846 OpS390XLAOfloor
2847 OpS390XLoweredAtomicCas32
2848 OpS390XLoweredAtomicCas64
2849 OpS390XLoweredAtomicExchange32
2850 OpS390XLoweredAtomicExchange64
2851 OpS390XFLOGR
2852 OpS390XPOPCNT
2853 OpS390XMLGR
2854 OpS390XSumBytes2
2855 OpS390XSumBytes4
2856 OpS390XSumBytes8
2857 OpS390XSTMG2
2858 OpS390XSTMG3
2859 OpS390XSTMG4
2860 OpS390XSTM2
2861 OpS390XSTM3
2862 OpS390XSTM4
2863 OpS390XLoweredMove
2864 OpS390XLoweredZero
2865
2866 OpWasmLoweredStaticCall
2867 OpWasmLoweredTailCall
2868 OpWasmLoweredClosureCall
2869 OpWasmLoweredInterCall
2870 OpWasmLoweredAddr
2871 OpWasmLoweredMove
2872 OpWasmLoweredZero
2873 OpWasmLoweredGetClosurePtr
2874 OpWasmLoweredGetCallerPC
2875 OpWasmLoweredGetCallerSP
2876 OpWasmLoweredNilCheck
2877 OpWasmLoweredWB
2878 OpWasmLoweredConvert
2879 OpWasmSelect
2880 OpWasmI64Load8U
2881 OpWasmI64Load8S
2882 OpWasmI64Load16U
2883 OpWasmI64Load16S
2884 OpWasmI64Load32U
2885 OpWasmI64Load32S
2886 OpWasmI64Load
2887 OpWasmI64Store8
2888 OpWasmI64Store16
2889 OpWasmI64Store32
2890 OpWasmI64Store
2891 OpWasmF32Load
2892 OpWasmF64Load
2893 OpWasmF32Store
2894 OpWasmF64Store
2895 OpWasmI64Const
2896 OpWasmF32Const
2897 OpWasmF64Const
2898 OpWasmI64Eqz
2899 OpWasmI64Eq
2900 OpWasmI64Ne
2901 OpWasmI64LtS
2902 OpWasmI64LtU
2903 OpWasmI64GtS
2904 OpWasmI64GtU
2905 OpWasmI64LeS
2906 OpWasmI64LeU
2907 OpWasmI64GeS
2908 OpWasmI64GeU
2909 OpWasmF32Eq
2910 OpWasmF32Ne
2911 OpWasmF32Lt
2912 OpWasmF32Gt
2913 OpWasmF32Le
2914 OpWasmF32Ge
2915 OpWasmF64Eq
2916 OpWasmF64Ne
2917 OpWasmF64Lt
2918 OpWasmF64Gt
2919 OpWasmF64Le
2920 OpWasmF64Ge
2921 OpWasmI64Add
2922 OpWasmI64AddConst
2923 OpWasmI64Sub
2924 OpWasmI64Mul
2925 OpWasmI64DivS
2926 OpWasmI64DivU
2927 OpWasmI64RemS
2928 OpWasmI64RemU
2929 OpWasmI64And
2930 OpWasmI64Or
2931 OpWasmI64Xor
2932 OpWasmI64Shl
2933 OpWasmI64ShrS
2934 OpWasmI64ShrU
2935 OpWasmF32Neg
2936 OpWasmF32Add
2937 OpWasmF32Sub
2938 OpWasmF32Mul
2939 OpWasmF32Div
2940 OpWasmF64Neg
2941 OpWasmF64Add
2942 OpWasmF64Sub
2943 OpWasmF64Mul
2944 OpWasmF64Div
2945 OpWasmI64TruncSatF64S
2946 OpWasmI64TruncSatF64U
2947 OpWasmI64TruncSatF32S
2948 OpWasmI64TruncSatF32U
2949 OpWasmF32ConvertI64S
2950 OpWasmF32ConvertI64U
2951 OpWasmF64ConvertI64S
2952 OpWasmF64ConvertI64U
2953 OpWasmF32DemoteF64
2954 OpWasmF64PromoteF32
2955 OpWasmI64Extend8S
2956 OpWasmI64Extend16S
2957 OpWasmI64Extend32S
2958 OpWasmF32Sqrt
2959 OpWasmF32Trunc
2960 OpWasmF32Ceil
2961 OpWasmF32Floor
2962 OpWasmF32Nearest
2963 OpWasmF32Abs
2964 OpWasmF32Copysign
2965 OpWasmF64Sqrt
2966 OpWasmF64Trunc
2967 OpWasmF64Ceil
2968 OpWasmF64Floor
2969 OpWasmF64Nearest
2970 OpWasmF64Abs
2971 OpWasmF64Copysign
2972 OpWasmI64Ctz
2973 OpWasmI64Clz
2974 OpWasmI32Rotl
2975 OpWasmI64Rotl
2976 OpWasmI64Popcnt
2977
2978 OpAdd8
2979 OpAdd16
2980 OpAdd32
2981 OpAdd64
2982 OpAddPtr
2983 OpAdd32F
2984 OpAdd64F
2985 OpSub8
2986 OpSub16
2987 OpSub32
2988 OpSub64
2989 OpSubPtr
2990 OpSub32F
2991 OpSub64F
2992 OpMul8
2993 OpMul16
2994 OpMul32
2995 OpMul64
2996 OpMul32F
2997 OpMul64F
2998 OpDiv32F
2999 OpDiv64F
3000 OpHmul32
3001 OpHmul32u
3002 OpHmul64
3003 OpHmul64u
3004 OpMul32uhilo
3005 OpMul64uhilo
3006 OpMul32uover
3007 OpMul64uover
3008 OpAvg32u
3009 OpAvg64u
3010 OpDiv8
3011 OpDiv8u
3012 OpDiv16
3013 OpDiv16u
3014 OpDiv32
3015 OpDiv32u
3016 OpDiv64
3017 OpDiv64u
3018 OpDiv128u
3019 OpMod8
3020 OpMod8u
3021 OpMod16
3022 OpMod16u
3023 OpMod32
3024 OpMod32u
3025 OpMod64
3026 OpMod64u
3027 OpAnd8
3028 OpAnd16
3029 OpAnd32
3030 OpAnd64
3031 OpOr8
3032 OpOr16
3033 OpOr32
3034 OpOr64
3035 OpXor8
3036 OpXor16
3037 OpXor32
3038 OpXor64
3039 OpLsh8x8
3040 OpLsh8x16
3041 OpLsh8x32
3042 OpLsh8x64
3043 OpLsh16x8
3044 OpLsh16x16
3045 OpLsh16x32
3046 OpLsh16x64
3047 OpLsh32x8
3048 OpLsh32x16
3049 OpLsh32x32
3050 OpLsh32x64
3051 OpLsh64x8
3052 OpLsh64x16
3053 OpLsh64x32
3054 OpLsh64x64
3055 OpRsh8x8
3056 OpRsh8x16
3057 OpRsh8x32
3058 OpRsh8x64
3059 OpRsh16x8
3060 OpRsh16x16
3061 OpRsh16x32
3062 OpRsh16x64
3063 OpRsh32x8
3064 OpRsh32x16
3065 OpRsh32x32
3066 OpRsh32x64
3067 OpRsh64x8
3068 OpRsh64x16
3069 OpRsh64x32
3070 OpRsh64x64
3071 OpRsh8Ux8
3072 OpRsh8Ux16
3073 OpRsh8Ux32
3074 OpRsh8Ux64
3075 OpRsh16Ux8
3076 OpRsh16Ux16
3077 OpRsh16Ux32
3078 OpRsh16Ux64
3079 OpRsh32Ux8
3080 OpRsh32Ux16
3081 OpRsh32Ux32
3082 OpRsh32Ux64
3083 OpRsh64Ux8
3084 OpRsh64Ux16
3085 OpRsh64Ux32
3086 OpRsh64Ux64
3087 OpEq8
3088 OpEq16
3089 OpEq32
3090 OpEq64
3091 OpEqPtr
3092 OpEqInter
3093 OpEqSlice
3094 OpEq32F
3095 OpEq64F
3096 OpNeq8
3097 OpNeq16
3098 OpNeq32
3099 OpNeq64
3100 OpNeqPtr
3101 OpNeqInter
3102 OpNeqSlice
3103 OpNeq32F
3104 OpNeq64F
3105 OpLess8
3106 OpLess8U
3107 OpLess16
3108 OpLess16U
3109 OpLess32
3110 OpLess32U
3111 OpLess64
3112 OpLess64U
3113 OpLess32F
3114 OpLess64F
3115 OpLeq8
3116 OpLeq8U
3117 OpLeq16
3118 OpLeq16U
3119 OpLeq32
3120 OpLeq32U
3121 OpLeq64
3122 OpLeq64U
3123 OpLeq32F
3124 OpLeq64F
3125 OpCondSelect
3126 OpAndB
3127 OpOrB
3128 OpEqB
3129 OpNeqB
3130 OpNot
3131 OpNeg8
3132 OpNeg16
3133 OpNeg32
3134 OpNeg64
3135 OpNeg32F
3136 OpNeg64F
3137 OpCom8
3138 OpCom16
3139 OpCom32
3140 OpCom64
3141 OpCtz8
3142 OpCtz16
3143 OpCtz32
3144 OpCtz64
3145 OpCtz64On32
3146 OpCtz8NonZero
3147 OpCtz16NonZero
3148 OpCtz32NonZero
3149 OpCtz64NonZero
3150 OpBitLen8
3151 OpBitLen16
3152 OpBitLen32
3153 OpBitLen64
3154 OpBswap16
3155 OpBswap32
3156 OpBswap64
3157 OpBitRev8
3158 OpBitRev16
3159 OpBitRev32
3160 OpBitRev64
3161 OpPopCount8
3162 OpPopCount16
3163 OpPopCount32
3164 OpPopCount64
3165 OpRotateLeft64
3166 OpRotateLeft32
3167 OpRotateLeft16
3168 OpRotateLeft8
3169 OpSqrt
3170 OpSqrt32
3171 OpFloor
3172 OpCeil
3173 OpTrunc
3174 OpRound
3175 OpRoundToEven
3176 OpAbs
3177 OpCopysign
3178 OpMin64
3179 OpMax64
3180 OpMin64u
3181 OpMax64u
3182 OpMin64F
3183 OpMin32F
3184 OpMax64F
3185 OpMax32F
3186 OpFMA
3187 OpPhi
3188 OpCopy
3189 OpConvert
3190 OpConstBool
3191 OpConstString
3192 OpConstNil
3193 OpConst8
3194 OpConst16
3195 OpConst32
3196 OpConst64
3197 OpConst32F
3198 OpConst64F
3199 OpConstInterface
3200 OpConstSlice
3201 OpInitMem
3202 OpArg
3203 OpArgIntReg
3204 OpArgFloatReg
3205 OpAddr
3206 OpLocalAddr
3207 OpSP
3208 OpSB
3209 OpSPanchored
3210 OpLoad
3211 OpDereference
3212 OpStore
3213 OpMove
3214 OpZero
3215 OpStoreWB
3216 OpMoveWB
3217 OpZeroWB
3218 OpWBend
3219 OpWB
3220 OpHasCPUFeature
3221 OpPanicBounds
3222 OpPanicExtend
3223 OpClosureCall
3224 OpStaticCall
3225 OpInterCall
3226 OpTailCall
3227 OpClosureLECall
3228 OpStaticLECall
3229 OpInterLECall
3230 OpTailLECall
3231 OpSignExt8to16
3232 OpSignExt8to32
3233 OpSignExt8to64
3234 OpSignExt16to32
3235 OpSignExt16to64
3236 OpSignExt32to64
3237 OpZeroExt8to16
3238 OpZeroExt8to32
3239 OpZeroExt8to64
3240 OpZeroExt16to32
3241 OpZeroExt16to64
3242 OpZeroExt32to64
3243 OpTrunc16to8
3244 OpTrunc32to8
3245 OpTrunc32to16
3246 OpTrunc64to8
3247 OpTrunc64to16
3248 OpTrunc64to32
3249 OpCvt32to32F
3250 OpCvt32to64F
3251 OpCvt64to32F
3252 OpCvt64to64F
3253 OpCvt32Fto32
3254 OpCvt32Fto64
3255 OpCvt64Fto32
3256 OpCvt64Fto64
3257 OpCvt32Fto64F
3258 OpCvt64Fto32F
3259 OpCvtBoolToUint8
3260 OpRound32F
3261 OpRound64F
3262 OpIsNonNil
3263 OpIsInBounds
3264 OpIsSliceInBounds
3265 OpNilCheck
3266 OpGetG
3267 OpGetClosurePtr
3268 OpGetCallerPC
3269 OpGetCallerSP
3270 OpPtrIndex
3271 OpOffPtr
3272 OpSliceMake
3273 OpSlicePtr
3274 OpSliceLen
3275 OpSliceCap
3276 OpSlicePtrUnchecked
3277 OpComplexMake
3278 OpComplexReal
3279 OpComplexImag
3280 OpStringMake
3281 OpStringPtr
3282 OpStringLen
3283 OpIMake
3284 OpITab
3285 OpIData
3286 OpStructMake
3287 OpStructSelect
3288 OpArrayMake0
3289 OpArrayMake1
3290 OpArraySelect
3291 OpStoreReg
3292 OpLoadReg
3293 OpFwdRef
3294 OpUnknown
3295 OpVarDef
3296 OpVarLive
3297 OpKeepAlive
3298 OpInlMark
3299 OpInt64Make
3300 OpInt64Hi
3301 OpInt64Lo
3302 OpAdd32carry
3303 OpAdd32withcarry
3304 OpSub32carry
3305 OpSub32withcarry
3306 OpAdd64carry
3307 OpSub64borrow
3308 OpSignmask
3309 OpZeromask
3310 OpSlicemask
3311 OpSpectreIndex
3312 OpSpectreSliceIndex
3313 OpCvt32Uto32F
3314 OpCvt32Uto64F
3315 OpCvt32Fto32U
3316 OpCvt64Fto32U
3317 OpCvt64Uto32F
3318 OpCvt64Uto64F
3319 OpCvt32Fto64U
3320 OpCvt64Fto64U
3321 OpSelect0
3322 OpSelect1
3323 OpMakeTuple
3324 OpSelectN
3325 OpSelectNAddr
3326 OpMakeResult
3327 OpAtomicLoad8
3328 OpAtomicLoad32
3329 OpAtomicLoad64
3330 OpAtomicLoadPtr
3331 OpAtomicLoadAcq32
3332 OpAtomicLoadAcq64
3333 OpAtomicStore8
3334 OpAtomicStore32
3335 OpAtomicStore64
3336 OpAtomicStorePtrNoWB
3337 OpAtomicStoreRel32
3338 OpAtomicStoreRel64
3339 OpAtomicExchange8
3340 OpAtomicExchange32
3341 OpAtomicExchange64
3342 OpAtomicAdd32
3343 OpAtomicAdd64
3344 OpAtomicCompareAndSwap32
3345 OpAtomicCompareAndSwap64
3346 OpAtomicCompareAndSwapRel32
3347 OpAtomicAnd8
3348 OpAtomicOr8
3349 OpAtomicAnd32
3350 OpAtomicOr32
3351 OpAtomicAnd64value
3352 OpAtomicAnd32value
3353 OpAtomicAnd8value
3354 OpAtomicOr64value
3355 OpAtomicOr32value
3356 OpAtomicOr8value
3357 OpAtomicStore8Variant
3358 OpAtomicStore32Variant
3359 OpAtomicStore64Variant
3360 OpAtomicAdd32Variant
3361 OpAtomicAdd64Variant
3362 OpAtomicExchange8Variant
3363 OpAtomicExchange32Variant
3364 OpAtomicExchange64Variant
3365 OpAtomicCompareAndSwap32Variant
3366 OpAtomicCompareAndSwap64Variant
3367 OpAtomicAnd64valueVariant
3368 OpAtomicOr64valueVariant
3369 OpAtomicAnd32valueVariant
3370 OpAtomicOr32valueVariant
3371 OpAtomicAnd8valueVariant
3372 OpAtomicOr8valueVariant
3373 OpPubBarrier
3374 OpClobber
3375 OpClobberReg
3376 OpPrefetchCache
3377 OpPrefetchCacheStreamed
3378 )
3379
3380 var opcodeTable = [...]opInfo{
3381 {name: "OpInvalid"},
3382
3383 {
3384 name: "ADDSS",
3385 argLen: 2,
3386 commutative: true,
3387 resultInArg0: true,
3388 asm: x86.AADDSS,
3389 reg: regInfo{
3390 inputs: []inputInfo{
3391 {0, 65280},
3392 {1, 65280},
3393 },
3394 outputs: []outputInfo{
3395 {0, 65280},
3396 },
3397 },
3398 },
3399 {
3400 name: "ADDSD",
3401 argLen: 2,
3402 commutative: true,
3403 resultInArg0: true,
3404 asm: x86.AADDSD,
3405 reg: regInfo{
3406 inputs: []inputInfo{
3407 {0, 65280},
3408 {1, 65280},
3409 },
3410 outputs: []outputInfo{
3411 {0, 65280},
3412 },
3413 },
3414 },
3415 {
3416 name: "SUBSS",
3417 argLen: 2,
3418 resultInArg0: true,
3419 asm: x86.ASUBSS,
3420 reg: regInfo{
3421 inputs: []inputInfo{
3422 {0, 65280},
3423 {1, 65280},
3424 },
3425 outputs: []outputInfo{
3426 {0, 65280},
3427 },
3428 },
3429 },
3430 {
3431 name: "SUBSD",
3432 argLen: 2,
3433 resultInArg0: true,
3434 asm: x86.ASUBSD,
3435 reg: regInfo{
3436 inputs: []inputInfo{
3437 {0, 65280},
3438 {1, 65280},
3439 },
3440 outputs: []outputInfo{
3441 {0, 65280},
3442 },
3443 },
3444 },
3445 {
3446 name: "MULSS",
3447 argLen: 2,
3448 commutative: true,
3449 resultInArg0: true,
3450 asm: x86.AMULSS,
3451 reg: regInfo{
3452 inputs: []inputInfo{
3453 {0, 65280},
3454 {1, 65280},
3455 },
3456 outputs: []outputInfo{
3457 {0, 65280},
3458 },
3459 },
3460 },
3461 {
3462 name: "MULSD",
3463 argLen: 2,
3464 commutative: true,
3465 resultInArg0: true,
3466 asm: x86.AMULSD,
3467 reg: regInfo{
3468 inputs: []inputInfo{
3469 {0, 65280},
3470 {1, 65280},
3471 },
3472 outputs: []outputInfo{
3473 {0, 65280},
3474 },
3475 },
3476 },
3477 {
3478 name: "DIVSS",
3479 argLen: 2,
3480 resultInArg0: true,
3481 asm: x86.ADIVSS,
3482 reg: regInfo{
3483 inputs: []inputInfo{
3484 {0, 65280},
3485 {1, 65280},
3486 },
3487 outputs: []outputInfo{
3488 {0, 65280},
3489 },
3490 },
3491 },
3492 {
3493 name: "DIVSD",
3494 argLen: 2,
3495 resultInArg0: true,
3496 asm: x86.ADIVSD,
3497 reg: regInfo{
3498 inputs: []inputInfo{
3499 {0, 65280},
3500 {1, 65280},
3501 },
3502 outputs: []outputInfo{
3503 {0, 65280},
3504 },
3505 },
3506 },
3507 {
3508 name: "MOVSSload",
3509 auxType: auxSymOff,
3510 argLen: 2,
3511 faultOnNilArg0: true,
3512 symEffect: SymRead,
3513 asm: x86.AMOVSS,
3514 reg: regInfo{
3515 inputs: []inputInfo{
3516 {0, 65791},
3517 },
3518 outputs: []outputInfo{
3519 {0, 65280},
3520 },
3521 },
3522 },
3523 {
3524 name: "MOVSDload",
3525 auxType: auxSymOff,
3526 argLen: 2,
3527 faultOnNilArg0: true,
3528 symEffect: SymRead,
3529 asm: x86.AMOVSD,
3530 reg: regInfo{
3531 inputs: []inputInfo{
3532 {0, 65791},
3533 },
3534 outputs: []outputInfo{
3535 {0, 65280},
3536 },
3537 },
3538 },
3539 {
3540 name: "MOVSSconst",
3541 auxType: auxFloat32,
3542 argLen: 0,
3543 rematerializeable: true,
3544 asm: x86.AMOVSS,
3545 reg: regInfo{
3546 outputs: []outputInfo{
3547 {0, 65280},
3548 },
3549 },
3550 },
3551 {
3552 name: "MOVSDconst",
3553 auxType: auxFloat64,
3554 argLen: 0,
3555 rematerializeable: true,
3556 asm: x86.AMOVSD,
3557 reg: regInfo{
3558 outputs: []outputInfo{
3559 {0, 65280},
3560 },
3561 },
3562 },
3563 {
3564 name: "MOVSSloadidx1",
3565 auxType: auxSymOff,
3566 argLen: 3,
3567 symEffect: SymRead,
3568 asm: x86.AMOVSS,
3569 reg: regInfo{
3570 inputs: []inputInfo{
3571 {1, 255},
3572 {0, 65791},
3573 },
3574 outputs: []outputInfo{
3575 {0, 65280},
3576 },
3577 },
3578 },
3579 {
3580 name: "MOVSSloadidx4",
3581 auxType: auxSymOff,
3582 argLen: 3,
3583 symEffect: SymRead,
3584 asm: x86.AMOVSS,
3585 reg: regInfo{
3586 inputs: []inputInfo{
3587 {1, 255},
3588 {0, 65791},
3589 },
3590 outputs: []outputInfo{
3591 {0, 65280},
3592 },
3593 },
3594 },
3595 {
3596 name: "MOVSDloadidx1",
3597 auxType: auxSymOff,
3598 argLen: 3,
3599 symEffect: SymRead,
3600 asm: x86.AMOVSD,
3601 reg: regInfo{
3602 inputs: []inputInfo{
3603 {1, 255},
3604 {0, 65791},
3605 },
3606 outputs: []outputInfo{
3607 {0, 65280},
3608 },
3609 },
3610 },
3611 {
3612 name: "MOVSDloadidx8",
3613 auxType: auxSymOff,
3614 argLen: 3,
3615 symEffect: SymRead,
3616 asm: x86.AMOVSD,
3617 reg: regInfo{
3618 inputs: []inputInfo{
3619 {1, 255},
3620 {0, 65791},
3621 },
3622 outputs: []outputInfo{
3623 {0, 65280},
3624 },
3625 },
3626 },
3627 {
3628 name: "MOVSSstore",
3629 auxType: auxSymOff,
3630 argLen: 3,
3631 faultOnNilArg0: true,
3632 symEffect: SymWrite,
3633 asm: x86.AMOVSS,
3634 reg: regInfo{
3635 inputs: []inputInfo{
3636 {1, 65280},
3637 {0, 65791},
3638 },
3639 },
3640 },
3641 {
3642 name: "MOVSDstore",
3643 auxType: auxSymOff,
3644 argLen: 3,
3645 faultOnNilArg0: true,
3646 symEffect: SymWrite,
3647 asm: x86.AMOVSD,
3648 reg: regInfo{
3649 inputs: []inputInfo{
3650 {1, 65280},
3651 {0, 65791},
3652 },
3653 },
3654 },
3655 {
3656 name: "MOVSSstoreidx1",
3657 auxType: auxSymOff,
3658 argLen: 4,
3659 symEffect: SymWrite,
3660 asm: x86.AMOVSS,
3661 reg: regInfo{
3662 inputs: []inputInfo{
3663 {1, 255},
3664 {2, 65280},
3665 {0, 65791},
3666 },
3667 },
3668 },
3669 {
3670 name: "MOVSSstoreidx4",
3671 auxType: auxSymOff,
3672 argLen: 4,
3673 symEffect: SymWrite,
3674 asm: x86.AMOVSS,
3675 reg: regInfo{
3676 inputs: []inputInfo{
3677 {1, 255},
3678 {2, 65280},
3679 {0, 65791},
3680 },
3681 },
3682 },
3683 {
3684 name: "MOVSDstoreidx1",
3685 auxType: auxSymOff,
3686 argLen: 4,
3687 symEffect: SymWrite,
3688 asm: x86.AMOVSD,
3689 reg: regInfo{
3690 inputs: []inputInfo{
3691 {1, 255},
3692 {2, 65280},
3693 {0, 65791},
3694 },
3695 },
3696 },
3697 {
3698 name: "MOVSDstoreidx8",
3699 auxType: auxSymOff,
3700 argLen: 4,
3701 symEffect: SymWrite,
3702 asm: x86.AMOVSD,
3703 reg: regInfo{
3704 inputs: []inputInfo{
3705 {1, 255},
3706 {2, 65280},
3707 {0, 65791},
3708 },
3709 },
3710 },
3711 {
3712 name: "ADDSSload",
3713 auxType: auxSymOff,
3714 argLen: 3,
3715 resultInArg0: true,
3716 faultOnNilArg1: true,
3717 symEffect: SymRead,
3718 asm: x86.AADDSS,
3719 reg: regInfo{
3720 inputs: []inputInfo{
3721 {0, 65280},
3722 {1, 65791},
3723 },
3724 outputs: []outputInfo{
3725 {0, 65280},
3726 },
3727 },
3728 },
3729 {
3730 name: "ADDSDload",
3731 auxType: auxSymOff,
3732 argLen: 3,
3733 resultInArg0: true,
3734 faultOnNilArg1: true,
3735 symEffect: SymRead,
3736 asm: x86.AADDSD,
3737 reg: regInfo{
3738 inputs: []inputInfo{
3739 {0, 65280},
3740 {1, 65791},
3741 },
3742 outputs: []outputInfo{
3743 {0, 65280},
3744 },
3745 },
3746 },
3747 {
3748 name: "SUBSSload",
3749 auxType: auxSymOff,
3750 argLen: 3,
3751 resultInArg0: true,
3752 faultOnNilArg1: true,
3753 symEffect: SymRead,
3754 asm: x86.ASUBSS,
3755 reg: regInfo{
3756 inputs: []inputInfo{
3757 {0, 65280},
3758 {1, 65791},
3759 },
3760 outputs: []outputInfo{
3761 {0, 65280},
3762 },
3763 },
3764 },
3765 {
3766 name: "SUBSDload",
3767 auxType: auxSymOff,
3768 argLen: 3,
3769 resultInArg0: true,
3770 faultOnNilArg1: true,
3771 symEffect: SymRead,
3772 asm: x86.ASUBSD,
3773 reg: regInfo{
3774 inputs: []inputInfo{
3775 {0, 65280},
3776 {1, 65791},
3777 },
3778 outputs: []outputInfo{
3779 {0, 65280},
3780 },
3781 },
3782 },
3783 {
3784 name: "MULSSload",
3785 auxType: auxSymOff,
3786 argLen: 3,
3787 resultInArg0: true,
3788 faultOnNilArg1: true,
3789 symEffect: SymRead,
3790 asm: x86.AMULSS,
3791 reg: regInfo{
3792 inputs: []inputInfo{
3793 {0, 65280},
3794 {1, 65791},
3795 },
3796 outputs: []outputInfo{
3797 {0, 65280},
3798 },
3799 },
3800 },
3801 {
3802 name: "MULSDload",
3803 auxType: auxSymOff,
3804 argLen: 3,
3805 resultInArg0: true,
3806 faultOnNilArg1: true,
3807 symEffect: SymRead,
3808 asm: x86.AMULSD,
3809 reg: regInfo{
3810 inputs: []inputInfo{
3811 {0, 65280},
3812 {1, 65791},
3813 },
3814 outputs: []outputInfo{
3815 {0, 65280},
3816 },
3817 },
3818 },
3819 {
3820 name: "DIVSSload",
3821 auxType: auxSymOff,
3822 argLen: 3,
3823 resultInArg0: true,
3824 faultOnNilArg1: true,
3825 symEffect: SymRead,
3826 asm: x86.ADIVSS,
3827 reg: regInfo{
3828 inputs: []inputInfo{
3829 {0, 65280},
3830 {1, 65791},
3831 },
3832 outputs: []outputInfo{
3833 {0, 65280},
3834 },
3835 },
3836 },
3837 {
3838 name: "DIVSDload",
3839 auxType: auxSymOff,
3840 argLen: 3,
3841 resultInArg0: true,
3842 faultOnNilArg1: true,
3843 symEffect: SymRead,
3844 asm: x86.ADIVSD,
3845 reg: regInfo{
3846 inputs: []inputInfo{
3847 {0, 65280},
3848 {1, 65791},
3849 },
3850 outputs: []outputInfo{
3851 {0, 65280},
3852 },
3853 },
3854 },
3855 {
3856 name: "ADDL",
3857 argLen: 2,
3858 commutative: true,
3859 clobberFlags: true,
3860 asm: x86.AADDL,
3861 reg: regInfo{
3862 inputs: []inputInfo{
3863 {1, 239},
3864 {0, 255},
3865 },
3866 outputs: []outputInfo{
3867 {0, 239},
3868 },
3869 },
3870 },
3871 {
3872 name: "ADDLconst",
3873 auxType: auxInt32,
3874 argLen: 1,
3875 clobberFlags: true,
3876 asm: x86.AADDL,
3877 reg: regInfo{
3878 inputs: []inputInfo{
3879 {0, 255},
3880 },
3881 outputs: []outputInfo{
3882 {0, 239},
3883 },
3884 },
3885 },
3886 {
3887 name: "ADDLcarry",
3888 argLen: 2,
3889 commutative: true,
3890 resultInArg0: true,
3891 asm: x86.AADDL,
3892 reg: regInfo{
3893 inputs: []inputInfo{
3894 {0, 239},
3895 {1, 239},
3896 },
3897 outputs: []outputInfo{
3898 {1, 0},
3899 {0, 239},
3900 },
3901 },
3902 },
3903 {
3904 name: "ADDLconstcarry",
3905 auxType: auxInt32,
3906 argLen: 1,
3907 resultInArg0: true,
3908 asm: x86.AADDL,
3909 reg: regInfo{
3910 inputs: []inputInfo{
3911 {0, 239},
3912 },
3913 outputs: []outputInfo{
3914 {1, 0},
3915 {0, 239},
3916 },
3917 },
3918 },
3919 {
3920 name: "ADCL",
3921 argLen: 3,
3922 commutative: true,
3923 resultInArg0: true,
3924 clobberFlags: true,
3925 asm: x86.AADCL,
3926 reg: regInfo{
3927 inputs: []inputInfo{
3928 {0, 239},
3929 {1, 239},
3930 },
3931 outputs: []outputInfo{
3932 {0, 239},
3933 },
3934 },
3935 },
3936 {
3937 name: "ADCLconst",
3938 auxType: auxInt32,
3939 argLen: 2,
3940 resultInArg0: true,
3941 clobberFlags: true,
3942 asm: x86.AADCL,
3943 reg: regInfo{
3944 inputs: []inputInfo{
3945 {0, 239},
3946 },
3947 outputs: []outputInfo{
3948 {0, 239},
3949 },
3950 },
3951 },
3952 {
3953 name: "SUBL",
3954 argLen: 2,
3955 resultInArg0: true,
3956 clobberFlags: true,
3957 asm: x86.ASUBL,
3958 reg: regInfo{
3959 inputs: []inputInfo{
3960 {0, 239},
3961 {1, 239},
3962 },
3963 outputs: []outputInfo{
3964 {0, 239},
3965 },
3966 },
3967 },
3968 {
3969 name: "SUBLconst",
3970 auxType: auxInt32,
3971 argLen: 1,
3972 resultInArg0: true,
3973 clobberFlags: true,
3974 asm: x86.ASUBL,
3975 reg: regInfo{
3976 inputs: []inputInfo{
3977 {0, 239},
3978 },
3979 outputs: []outputInfo{
3980 {0, 239},
3981 },
3982 },
3983 },
3984 {
3985 name: "SUBLcarry",
3986 argLen: 2,
3987 resultInArg0: true,
3988 asm: x86.ASUBL,
3989 reg: regInfo{
3990 inputs: []inputInfo{
3991 {0, 239},
3992 {1, 239},
3993 },
3994 outputs: []outputInfo{
3995 {1, 0},
3996 {0, 239},
3997 },
3998 },
3999 },
4000 {
4001 name: "SUBLconstcarry",
4002 auxType: auxInt32,
4003 argLen: 1,
4004 resultInArg0: true,
4005 asm: x86.ASUBL,
4006 reg: regInfo{
4007 inputs: []inputInfo{
4008 {0, 239},
4009 },
4010 outputs: []outputInfo{
4011 {1, 0},
4012 {0, 239},
4013 },
4014 },
4015 },
4016 {
4017 name: "SBBL",
4018 argLen: 3,
4019 resultInArg0: true,
4020 clobberFlags: true,
4021 asm: x86.ASBBL,
4022 reg: regInfo{
4023 inputs: []inputInfo{
4024 {0, 239},
4025 {1, 239},
4026 },
4027 outputs: []outputInfo{
4028 {0, 239},
4029 },
4030 },
4031 },
4032 {
4033 name: "SBBLconst",
4034 auxType: auxInt32,
4035 argLen: 2,
4036 resultInArg0: true,
4037 clobberFlags: true,
4038 asm: x86.ASBBL,
4039 reg: regInfo{
4040 inputs: []inputInfo{
4041 {0, 239},
4042 },
4043 outputs: []outputInfo{
4044 {0, 239},
4045 },
4046 },
4047 },
4048 {
4049 name: "MULL",
4050 argLen: 2,
4051 commutative: true,
4052 resultInArg0: true,
4053 clobberFlags: true,
4054 asm: x86.AIMULL,
4055 reg: regInfo{
4056 inputs: []inputInfo{
4057 {0, 239},
4058 {1, 239},
4059 },
4060 outputs: []outputInfo{
4061 {0, 239},
4062 },
4063 },
4064 },
4065 {
4066 name: "MULLconst",
4067 auxType: auxInt32,
4068 argLen: 1,
4069 clobberFlags: true,
4070 asm: x86.AIMUL3L,
4071 reg: regInfo{
4072 inputs: []inputInfo{
4073 {0, 239},
4074 },
4075 outputs: []outputInfo{
4076 {0, 239},
4077 },
4078 },
4079 },
4080 {
4081 name: "MULLU",
4082 argLen: 2,
4083 commutative: true,
4084 clobberFlags: true,
4085 asm: x86.AMULL,
4086 reg: regInfo{
4087 inputs: []inputInfo{
4088 {0, 1},
4089 {1, 255},
4090 },
4091 clobbers: 4,
4092 outputs: []outputInfo{
4093 {1, 0},
4094 {0, 1},
4095 },
4096 },
4097 },
4098 {
4099 name: "HMULL",
4100 argLen: 2,
4101 commutative: true,
4102 clobberFlags: true,
4103 asm: x86.AIMULL,
4104 reg: regInfo{
4105 inputs: []inputInfo{
4106 {0, 1},
4107 {1, 255},
4108 },
4109 clobbers: 1,
4110 outputs: []outputInfo{
4111 {0, 4},
4112 },
4113 },
4114 },
4115 {
4116 name: "HMULLU",
4117 argLen: 2,
4118 commutative: true,
4119 clobberFlags: true,
4120 asm: x86.AMULL,
4121 reg: regInfo{
4122 inputs: []inputInfo{
4123 {0, 1},
4124 {1, 255},
4125 },
4126 clobbers: 1,
4127 outputs: []outputInfo{
4128 {0, 4},
4129 },
4130 },
4131 },
4132 {
4133 name: "MULLQU",
4134 argLen: 2,
4135 commutative: true,
4136 clobberFlags: true,
4137 asm: x86.AMULL,
4138 reg: regInfo{
4139 inputs: []inputInfo{
4140 {0, 1},
4141 {1, 255},
4142 },
4143 outputs: []outputInfo{
4144 {0, 4},
4145 {1, 1},
4146 },
4147 },
4148 },
4149 {
4150 name: "AVGLU",
4151 argLen: 2,
4152 commutative: true,
4153 resultInArg0: true,
4154 clobberFlags: true,
4155 reg: regInfo{
4156 inputs: []inputInfo{
4157 {0, 239},
4158 {1, 239},
4159 },
4160 outputs: []outputInfo{
4161 {0, 239},
4162 },
4163 },
4164 },
4165 {
4166 name: "DIVL",
4167 auxType: auxBool,
4168 argLen: 2,
4169 clobberFlags: true,
4170 asm: x86.AIDIVL,
4171 reg: regInfo{
4172 inputs: []inputInfo{
4173 {0, 1},
4174 {1, 251},
4175 },
4176 clobbers: 4,
4177 outputs: []outputInfo{
4178 {0, 1},
4179 },
4180 },
4181 },
4182 {
4183 name: "DIVW",
4184 auxType: auxBool,
4185 argLen: 2,
4186 clobberFlags: true,
4187 asm: x86.AIDIVW,
4188 reg: regInfo{
4189 inputs: []inputInfo{
4190 {0, 1},
4191 {1, 251},
4192 },
4193 clobbers: 4,
4194 outputs: []outputInfo{
4195 {0, 1},
4196 },
4197 },
4198 },
4199 {
4200 name: "DIVLU",
4201 argLen: 2,
4202 clobberFlags: true,
4203 asm: x86.ADIVL,
4204 reg: regInfo{
4205 inputs: []inputInfo{
4206 {0, 1},
4207 {1, 251},
4208 },
4209 clobbers: 4,
4210 outputs: []outputInfo{
4211 {0, 1},
4212 },
4213 },
4214 },
4215 {
4216 name: "DIVWU",
4217 argLen: 2,
4218 clobberFlags: true,
4219 asm: x86.ADIVW,
4220 reg: regInfo{
4221 inputs: []inputInfo{
4222 {0, 1},
4223 {1, 251},
4224 },
4225 clobbers: 4,
4226 outputs: []outputInfo{
4227 {0, 1},
4228 },
4229 },
4230 },
4231 {
4232 name: "MODL",
4233 auxType: auxBool,
4234 argLen: 2,
4235 clobberFlags: true,
4236 asm: x86.AIDIVL,
4237 reg: regInfo{
4238 inputs: []inputInfo{
4239 {0, 1},
4240 {1, 251},
4241 },
4242 clobbers: 1,
4243 outputs: []outputInfo{
4244 {0, 4},
4245 },
4246 },
4247 },
4248 {
4249 name: "MODW",
4250 auxType: auxBool,
4251 argLen: 2,
4252 clobberFlags: true,
4253 asm: x86.AIDIVW,
4254 reg: regInfo{
4255 inputs: []inputInfo{
4256 {0, 1},
4257 {1, 251},
4258 },
4259 clobbers: 1,
4260 outputs: []outputInfo{
4261 {0, 4},
4262 },
4263 },
4264 },
4265 {
4266 name: "MODLU",
4267 argLen: 2,
4268 clobberFlags: true,
4269 asm: x86.ADIVL,
4270 reg: regInfo{
4271 inputs: []inputInfo{
4272 {0, 1},
4273 {1, 251},
4274 },
4275 clobbers: 1,
4276 outputs: []outputInfo{
4277 {0, 4},
4278 },
4279 },
4280 },
4281 {
4282 name: "MODWU",
4283 argLen: 2,
4284 clobberFlags: true,
4285 asm: x86.ADIVW,
4286 reg: regInfo{
4287 inputs: []inputInfo{
4288 {0, 1},
4289 {1, 251},
4290 },
4291 clobbers: 1,
4292 outputs: []outputInfo{
4293 {0, 4},
4294 },
4295 },
4296 },
4297 {
4298 name: "ANDL",
4299 argLen: 2,
4300 commutative: true,
4301 resultInArg0: true,
4302 clobberFlags: true,
4303 asm: x86.AANDL,
4304 reg: regInfo{
4305 inputs: []inputInfo{
4306 {0, 239},
4307 {1, 239},
4308 },
4309 outputs: []outputInfo{
4310 {0, 239},
4311 },
4312 },
4313 },
4314 {
4315 name: "ANDLconst",
4316 auxType: auxInt32,
4317 argLen: 1,
4318 resultInArg0: true,
4319 clobberFlags: true,
4320 asm: x86.AANDL,
4321 reg: regInfo{
4322 inputs: []inputInfo{
4323 {0, 239},
4324 },
4325 outputs: []outputInfo{
4326 {0, 239},
4327 },
4328 },
4329 },
4330 {
4331 name: "ORL",
4332 argLen: 2,
4333 commutative: true,
4334 resultInArg0: true,
4335 clobberFlags: true,
4336 asm: x86.AORL,
4337 reg: regInfo{
4338 inputs: []inputInfo{
4339 {0, 239},
4340 {1, 239},
4341 },
4342 outputs: []outputInfo{
4343 {0, 239},
4344 },
4345 },
4346 },
4347 {
4348 name: "ORLconst",
4349 auxType: auxInt32,
4350 argLen: 1,
4351 resultInArg0: true,
4352 clobberFlags: true,
4353 asm: x86.AORL,
4354 reg: regInfo{
4355 inputs: []inputInfo{
4356 {0, 239},
4357 },
4358 outputs: []outputInfo{
4359 {0, 239},
4360 },
4361 },
4362 },
4363 {
4364 name: "XORL",
4365 argLen: 2,
4366 commutative: true,
4367 resultInArg0: true,
4368 clobberFlags: true,
4369 asm: x86.AXORL,
4370 reg: regInfo{
4371 inputs: []inputInfo{
4372 {0, 239},
4373 {1, 239},
4374 },
4375 outputs: []outputInfo{
4376 {0, 239},
4377 },
4378 },
4379 },
4380 {
4381 name: "XORLconst",
4382 auxType: auxInt32,
4383 argLen: 1,
4384 resultInArg0: true,
4385 clobberFlags: true,
4386 asm: x86.AXORL,
4387 reg: regInfo{
4388 inputs: []inputInfo{
4389 {0, 239},
4390 },
4391 outputs: []outputInfo{
4392 {0, 239},
4393 },
4394 },
4395 },
4396 {
4397 name: "CMPL",
4398 argLen: 2,
4399 asm: x86.ACMPL,
4400 reg: regInfo{
4401 inputs: []inputInfo{
4402 {0, 255},
4403 {1, 255},
4404 },
4405 },
4406 },
4407 {
4408 name: "CMPW",
4409 argLen: 2,
4410 asm: x86.ACMPW,
4411 reg: regInfo{
4412 inputs: []inputInfo{
4413 {0, 255},
4414 {1, 255},
4415 },
4416 },
4417 },
4418 {
4419 name: "CMPB",
4420 argLen: 2,
4421 asm: x86.ACMPB,
4422 reg: regInfo{
4423 inputs: []inputInfo{
4424 {0, 255},
4425 {1, 255},
4426 },
4427 },
4428 },
4429 {
4430 name: "CMPLconst",
4431 auxType: auxInt32,
4432 argLen: 1,
4433 asm: x86.ACMPL,
4434 reg: regInfo{
4435 inputs: []inputInfo{
4436 {0, 255},
4437 },
4438 },
4439 },
4440 {
4441 name: "CMPWconst",
4442 auxType: auxInt16,
4443 argLen: 1,
4444 asm: x86.ACMPW,
4445 reg: regInfo{
4446 inputs: []inputInfo{
4447 {0, 255},
4448 },
4449 },
4450 },
4451 {
4452 name: "CMPBconst",
4453 auxType: auxInt8,
4454 argLen: 1,
4455 asm: x86.ACMPB,
4456 reg: regInfo{
4457 inputs: []inputInfo{
4458 {0, 255},
4459 },
4460 },
4461 },
4462 {
4463 name: "CMPLload",
4464 auxType: auxSymOff,
4465 argLen: 3,
4466 faultOnNilArg0: true,
4467 symEffect: SymRead,
4468 asm: x86.ACMPL,
4469 reg: regInfo{
4470 inputs: []inputInfo{
4471 {1, 255},
4472 {0, 65791},
4473 },
4474 },
4475 },
4476 {
4477 name: "CMPWload",
4478 auxType: auxSymOff,
4479 argLen: 3,
4480 faultOnNilArg0: true,
4481 symEffect: SymRead,
4482 asm: x86.ACMPW,
4483 reg: regInfo{
4484 inputs: []inputInfo{
4485 {1, 255},
4486 {0, 65791},
4487 },
4488 },
4489 },
4490 {
4491 name: "CMPBload",
4492 auxType: auxSymOff,
4493 argLen: 3,
4494 faultOnNilArg0: true,
4495 symEffect: SymRead,
4496 asm: x86.ACMPB,
4497 reg: regInfo{
4498 inputs: []inputInfo{
4499 {1, 255},
4500 {0, 65791},
4501 },
4502 },
4503 },
4504 {
4505 name: "CMPLconstload",
4506 auxType: auxSymValAndOff,
4507 argLen: 2,
4508 faultOnNilArg0: true,
4509 symEffect: SymRead,
4510 asm: x86.ACMPL,
4511 reg: regInfo{
4512 inputs: []inputInfo{
4513 {0, 65791},
4514 },
4515 },
4516 },
4517 {
4518 name: "CMPWconstload",
4519 auxType: auxSymValAndOff,
4520 argLen: 2,
4521 faultOnNilArg0: true,
4522 symEffect: SymRead,
4523 asm: x86.ACMPW,
4524 reg: regInfo{
4525 inputs: []inputInfo{
4526 {0, 65791},
4527 },
4528 },
4529 },
4530 {
4531 name: "CMPBconstload",
4532 auxType: auxSymValAndOff,
4533 argLen: 2,
4534 faultOnNilArg0: true,
4535 symEffect: SymRead,
4536 asm: x86.ACMPB,
4537 reg: regInfo{
4538 inputs: []inputInfo{
4539 {0, 65791},
4540 },
4541 },
4542 },
4543 {
4544 name: "UCOMISS",
4545 argLen: 2,
4546 asm: x86.AUCOMISS,
4547 reg: regInfo{
4548 inputs: []inputInfo{
4549 {0, 65280},
4550 {1, 65280},
4551 },
4552 },
4553 },
4554 {
4555 name: "UCOMISD",
4556 argLen: 2,
4557 asm: x86.AUCOMISD,
4558 reg: regInfo{
4559 inputs: []inputInfo{
4560 {0, 65280},
4561 {1, 65280},
4562 },
4563 },
4564 },
4565 {
4566 name: "TESTL",
4567 argLen: 2,
4568 commutative: true,
4569 asm: x86.ATESTL,
4570 reg: regInfo{
4571 inputs: []inputInfo{
4572 {0, 255},
4573 {1, 255},
4574 },
4575 },
4576 },
4577 {
4578 name: "TESTW",
4579 argLen: 2,
4580 commutative: true,
4581 asm: x86.ATESTW,
4582 reg: regInfo{
4583 inputs: []inputInfo{
4584 {0, 255},
4585 {1, 255},
4586 },
4587 },
4588 },
4589 {
4590 name: "TESTB",
4591 argLen: 2,
4592 commutative: true,
4593 asm: x86.ATESTB,
4594 reg: regInfo{
4595 inputs: []inputInfo{
4596 {0, 255},
4597 {1, 255},
4598 },
4599 },
4600 },
4601 {
4602 name: "TESTLconst",
4603 auxType: auxInt32,
4604 argLen: 1,
4605 asm: x86.ATESTL,
4606 reg: regInfo{
4607 inputs: []inputInfo{
4608 {0, 255},
4609 },
4610 },
4611 },
4612 {
4613 name: "TESTWconst",
4614 auxType: auxInt16,
4615 argLen: 1,
4616 asm: x86.ATESTW,
4617 reg: regInfo{
4618 inputs: []inputInfo{
4619 {0, 255},
4620 },
4621 },
4622 },
4623 {
4624 name: "TESTBconst",
4625 auxType: auxInt8,
4626 argLen: 1,
4627 asm: x86.ATESTB,
4628 reg: regInfo{
4629 inputs: []inputInfo{
4630 {0, 255},
4631 },
4632 },
4633 },
4634 {
4635 name: "SHLL",
4636 argLen: 2,
4637 resultInArg0: true,
4638 clobberFlags: true,
4639 asm: x86.ASHLL,
4640 reg: regInfo{
4641 inputs: []inputInfo{
4642 {1, 2},
4643 {0, 239},
4644 },
4645 outputs: []outputInfo{
4646 {0, 239},
4647 },
4648 },
4649 },
4650 {
4651 name: "SHLLconst",
4652 auxType: auxInt32,
4653 argLen: 1,
4654 resultInArg0: true,
4655 clobberFlags: true,
4656 asm: x86.ASHLL,
4657 reg: regInfo{
4658 inputs: []inputInfo{
4659 {0, 239},
4660 },
4661 outputs: []outputInfo{
4662 {0, 239},
4663 },
4664 },
4665 },
4666 {
4667 name: "SHRL",
4668 argLen: 2,
4669 resultInArg0: true,
4670 clobberFlags: true,
4671 asm: x86.ASHRL,
4672 reg: regInfo{
4673 inputs: []inputInfo{
4674 {1, 2},
4675 {0, 239},
4676 },
4677 outputs: []outputInfo{
4678 {0, 239},
4679 },
4680 },
4681 },
4682 {
4683 name: "SHRW",
4684 argLen: 2,
4685 resultInArg0: true,
4686 clobberFlags: true,
4687 asm: x86.ASHRW,
4688 reg: regInfo{
4689 inputs: []inputInfo{
4690 {1, 2},
4691 {0, 239},
4692 },
4693 outputs: []outputInfo{
4694 {0, 239},
4695 },
4696 },
4697 },
4698 {
4699 name: "SHRB",
4700 argLen: 2,
4701 resultInArg0: true,
4702 clobberFlags: true,
4703 asm: x86.ASHRB,
4704 reg: regInfo{
4705 inputs: []inputInfo{
4706 {1, 2},
4707 {0, 239},
4708 },
4709 outputs: []outputInfo{
4710 {0, 239},
4711 },
4712 },
4713 },
4714 {
4715 name: "SHRLconst",
4716 auxType: auxInt32,
4717 argLen: 1,
4718 resultInArg0: true,
4719 clobberFlags: true,
4720 asm: x86.ASHRL,
4721 reg: regInfo{
4722 inputs: []inputInfo{
4723 {0, 239},
4724 },
4725 outputs: []outputInfo{
4726 {0, 239},
4727 },
4728 },
4729 },
4730 {
4731 name: "SHRWconst",
4732 auxType: auxInt16,
4733 argLen: 1,
4734 resultInArg0: true,
4735 clobberFlags: true,
4736 asm: x86.ASHRW,
4737 reg: regInfo{
4738 inputs: []inputInfo{
4739 {0, 239},
4740 },
4741 outputs: []outputInfo{
4742 {0, 239},
4743 },
4744 },
4745 },
4746 {
4747 name: "SHRBconst",
4748 auxType: auxInt8,
4749 argLen: 1,
4750 resultInArg0: true,
4751 clobberFlags: true,
4752 asm: x86.ASHRB,
4753 reg: regInfo{
4754 inputs: []inputInfo{
4755 {0, 239},
4756 },
4757 outputs: []outputInfo{
4758 {0, 239},
4759 },
4760 },
4761 },
4762 {
4763 name: "SARL",
4764 argLen: 2,
4765 resultInArg0: true,
4766 clobberFlags: true,
4767 asm: x86.ASARL,
4768 reg: regInfo{
4769 inputs: []inputInfo{
4770 {1, 2},
4771 {0, 239},
4772 },
4773 outputs: []outputInfo{
4774 {0, 239},
4775 },
4776 },
4777 },
4778 {
4779 name: "SARW",
4780 argLen: 2,
4781 resultInArg0: true,
4782 clobberFlags: true,
4783 asm: x86.ASARW,
4784 reg: regInfo{
4785 inputs: []inputInfo{
4786 {1, 2},
4787 {0, 239},
4788 },
4789 outputs: []outputInfo{
4790 {0, 239},
4791 },
4792 },
4793 },
4794 {
4795 name: "SARB",
4796 argLen: 2,
4797 resultInArg0: true,
4798 clobberFlags: true,
4799 asm: x86.ASARB,
4800 reg: regInfo{
4801 inputs: []inputInfo{
4802 {1, 2},
4803 {0, 239},
4804 },
4805 outputs: []outputInfo{
4806 {0, 239},
4807 },
4808 },
4809 },
4810 {
4811 name: "SARLconst",
4812 auxType: auxInt32,
4813 argLen: 1,
4814 resultInArg0: true,
4815 clobberFlags: true,
4816 asm: x86.ASARL,
4817 reg: regInfo{
4818 inputs: []inputInfo{
4819 {0, 239},
4820 },
4821 outputs: []outputInfo{
4822 {0, 239},
4823 },
4824 },
4825 },
4826 {
4827 name: "SARWconst",
4828 auxType: auxInt16,
4829 argLen: 1,
4830 resultInArg0: true,
4831 clobberFlags: true,
4832 asm: x86.ASARW,
4833 reg: regInfo{
4834 inputs: []inputInfo{
4835 {0, 239},
4836 },
4837 outputs: []outputInfo{
4838 {0, 239},
4839 },
4840 },
4841 },
4842 {
4843 name: "SARBconst",
4844 auxType: auxInt8,
4845 argLen: 1,
4846 resultInArg0: true,
4847 clobberFlags: true,
4848 asm: x86.ASARB,
4849 reg: regInfo{
4850 inputs: []inputInfo{
4851 {0, 239},
4852 },
4853 outputs: []outputInfo{
4854 {0, 239},
4855 },
4856 },
4857 },
4858 {
4859 name: "ROLL",
4860 argLen: 2,
4861 resultInArg0: true,
4862 clobberFlags: true,
4863 asm: x86.AROLL,
4864 reg: regInfo{
4865 inputs: []inputInfo{
4866 {1, 2},
4867 {0, 239},
4868 },
4869 outputs: []outputInfo{
4870 {0, 239},
4871 },
4872 },
4873 },
4874 {
4875 name: "ROLW",
4876 argLen: 2,
4877 resultInArg0: true,
4878 clobberFlags: true,
4879 asm: x86.AROLW,
4880 reg: regInfo{
4881 inputs: []inputInfo{
4882 {1, 2},
4883 {0, 239},
4884 },
4885 outputs: []outputInfo{
4886 {0, 239},
4887 },
4888 },
4889 },
4890 {
4891 name: "ROLB",
4892 argLen: 2,
4893 resultInArg0: true,
4894 clobberFlags: true,
4895 asm: x86.AROLB,
4896 reg: regInfo{
4897 inputs: []inputInfo{
4898 {1, 2},
4899 {0, 239},
4900 },
4901 outputs: []outputInfo{
4902 {0, 239},
4903 },
4904 },
4905 },
4906 {
4907 name: "ROLLconst",
4908 auxType: auxInt32,
4909 argLen: 1,
4910 resultInArg0: true,
4911 clobberFlags: true,
4912 asm: x86.AROLL,
4913 reg: regInfo{
4914 inputs: []inputInfo{
4915 {0, 239},
4916 },
4917 outputs: []outputInfo{
4918 {0, 239},
4919 },
4920 },
4921 },
4922 {
4923 name: "ROLWconst",
4924 auxType: auxInt16,
4925 argLen: 1,
4926 resultInArg0: true,
4927 clobberFlags: true,
4928 asm: x86.AROLW,
4929 reg: regInfo{
4930 inputs: []inputInfo{
4931 {0, 239},
4932 },
4933 outputs: []outputInfo{
4934 {0, 239},
4935 },
4936 },
4937 },
4938 {
4939 name: "ROLBconst",
4940 auxType: auxInt8,
4941 argLen: 1,
4942 resultInArg0: true,
4943 clobberFlags: true,
4944 asm: x86.AROLB,
4945 reg: regInfo{
4946 inputs: []inputInfo{
4947 {0, 239},
4948 },
4949 outputs: []outputInfo{
4950 {0, 239},
4951 },
4952 },
4953 },
4954 {
4955 name: "ADDLload",
4956 auxType: auxSymOff,
4957 argLen: 3,
4958 resultInArg0: true,
4959 clobberFlags: true,
4960 faultOnNilArg1: true,
4961 symEffect: SymRead,
4962 asm: x86.AADDL,
4963 reg: regInfo{
4964 inputs: []inputInfo{
4965 {0, 239},
4966 {1, 65791},
4967 },
4968 outputs: []outputInfo{
4969 {0, 239},
4970 },
4971 },
4972 },
4973 {
4974 name: "SUBLload",
4975 auxType: auxSymOff,
4976 argLen: 3,
4977 resultInArg0: true,
4978 clobberFlags: true,
4979 faultOnNilArg1: true,
4980 symEffect: SymRead,
4981 asm: x86.ASUBL,
4982 reg: regInfo{
4983 inputs: []inputInfo{
4984 {0, 239},
4985 {1, 65791},
4986 },
4987 outputs: []outputInfo{
4988 {0, 239},
4989 },
4990 },
4991 },
4992 {
4993 name: "MULLload",
4994 auxType: auxSymOff,
4995 argLen: 3,
4996 resultInArg0: true,
4997 clobberFlags: true,
4998 faultOnNilArg1: true,
4999 symEffect: SymRead,
5000 asm: x86.AIMULL,
5001 reg: regInfo{
5002 inputs: []inputInfo{
5003 {0, 239},
5004 {1, 65791},
5005 },
5006 outputs: []outputInfo{
5007 {0, 239},
5008 },
5009 },
5010 },
5011 {
5012 name: "ANDLload",
5013 auxType: auxSymOff,
5014 argLen: 3,
5015 resultInArg0: true,
5016 clobberFlags: true,
5017 faultOnNilArg1: true,
5018 symEffect: SymRead,
5019 asm: x86.AANDL,
5020 reg: regInfo{
5021 inputs: []inputInfo{
5022 {0, 239},
5023 {1, 65791},
5024 },
5025 outputs: []outputInfo{
5026 {0, 239},
5027 },
5028 },
5029 },
5030 {
5031 name: "ORLload",
5032 auxType: auxSymOff,
5033 argLen: 3,
5034 resultInArg0: true,
5035 clobberFlags: true,
5036 faultOnNilArg1: true,
5037 symEffect: SymRead,
5038 asm: x86.AORL,
5039 reg: regInfo{
5040 inputs: []inputInfo{
5041 {0, 239},
5042 {1, 65791},
5043 },
5044 outputs: []outputInfo{
5045 {0, 239},
5046 },
5047 },
5048 },
5049 {
5050 name: "XORLload",
5051 auxType: auxSymOff,
5052 argLen: 3,
5053 resultInArg0: true,
5054 clobberFlags: true,
5055 faultOnNilArg1: true,
5056 symEffect: SymRead,
5057 asm: x86.AXORL,
5058 reg: regInfo{
5059 inputs: []inputInfo{
5060 {0, 239},
5061 {1, 65791},
5062 },
5063 outputs: []outputInfo{
5064 {0, 239},
5065 },
5066 },
5067 },
5068 {
5069 name: "ADDLloadidx4",
5070 auxType: auxSymOff,
5071 argLen: 4,
5072 resultInArg0: true,
5073 clobberFlags: true,
5074 symEffect: SymRead,
5075 asm: x86.AADDL,
5076 reg: regInfo{
5077 inputs: []inputInfo{
5078 {0, 239},
5079 {2, 255},
5080 {1, 65791},
5081 },
5082 outputs: []outputInfo{
5083 {0, 239},
5084 },
5085 },
5086 },
5087 {
5088 name: "SUBLloadidx4",
5089 auxType: auxSymOff,
5090 argLen: 4,
5091 resultInArg0: true,
5092 clobberFlags: true,
5093 symEffect: SymRead,
5094 asm: x86.ASUBL,
5095 reg: regInfo{
5096 inputs: []inputInfo{
5097 {0, 239},
5098 {2, 255},
5099 {1, 65791},
5100 },
5101 outputs: []outputInfo{
5102 {0, 239},
5103 },
5104 },
5105 },
5106 {
5107 name: "MULLloadidx4",
5108 auxType: auxSymOff,
5109 argLen: 4,
5110 resultInArg0: true,
5111 clobberFlags: true,
5112 symEffect: SymRead,
5113 asm: x86.AIMULL,
5114 reg: regInfo{
5115 inputs: []inputInfo{
5116 {0, 239},
5117 {2, 255},
5118 {1, 65791},
5119 },
5120 outputs: []outputInfo{
5121 {0, 239},
5122 },
5123 },
5124 },
5125 {
5126 name: "ANDLloadidx4",
5127 auxType: auxSymOff,
5128 argLen: 4,
5129 resultInArg0: true,
5130 clobberFlags: true,
5131 symEffect: SymRead,
5132 asm: x86.AANDL,
5133 reg: regInfo{
5134 inputs: []inputInfo{
5135 {0, 239},
5136 {2, 255},
5137 {1, 65791},
5138 },
5139 outputs: []outputInfo{
5140 {0, 239},
5141 },
5142 },
5143 },
5144 {
5145 name: "ORLloadidx4",
5146 auxType: auxSymOff,
5147 argLen: 4,
5148 resultInArg0: true,
5149 clobberFlags: true,
5150 symEffect: SymRead,
5151 asm: x86.AORL,
5152 reg: regInfo{
5153 inputs: []inputInfo{
5154 {0, 239},
5155 {2, 255},
5156 {1, 65791},
5157 },
5158 outputs: []outputInfo{
5159 {0, 239},
5160 },
5161 },
5162 },
5163 {
5164 name: "XORLloadidx4",
5165 auxType: auxSymOff,
5166 argLen: 4,
5167 resultInArg0: true,
5168 clobberFlags: true,
5169 symEffect: SymRead,
5170 asm: x86.AXORL,
5171 reg: regInfo{
5172 inputs: []inputInfo{
5173 {0, 239},
5174 {2, 255},
5175 {1, 65791},
5176 },
5177 outputs: []outputInfo{
5178 {0, 239},
5179 },
5180 },
5181 },
5182 {
5183 name: "NEGL",
5184 argLen: 1,
5185 resultInArg0: true,
5186 clobberFlags: true,
5187 asm: x86.ANEGL,
5188 reg: regInfo{
5189 inputs: []inputInfo{
5190 {0, 239},
5191 },
5192 outputs: []outputInfo{
5193 {0, 239},
5194 },
5195 },
5196 },
5197 {
5198 name: "NOTL",
5199 argLen: 1,
5200 resultInArg0: true,
5201 asm: x86.ANOTL,
5202 reg: regInfo{
5203 inputs: []inputInfo{
5204 {0, 239},
5205 },
5206 outputs: []outputInfo{
5207 {0, 239},
5208 },
5209 },
5210 },
5211 {
5212 name: "BSFL",
5213 argLen: 1,
5214 clobberFlags: true,
5215 asm: x86.ABSFL,
5216 reg: regInfo{
5217 inputs: []inputInfo{
5218 {0, 239},
5219 },
5220 outputs: []outputInfo{
5221 {0, 239},
5222 },
5223 },
5224 },
5225 {
5226 name: "BSFW",
5227 argLen: 1,
5228 clobberFlags: true,
5229 asm: x86.ABSFW,
5230 reg: regInfo{
5231 inputs: []inputInfo{
5232 {0, 239},
5233 },
5234 outputs: []outputInfo{
5235 {0, 239},
5236 },
5237 },
5238 },
5239 {
5240 name: "LoweredCtz32",
5241 argLen: 1,
5242 clobberFlags: true,
5243 reg: regInfo{
5244 inputs: []inputInfo{
5245 {0, 239},
5246 },
5247 outputs: []outputInfo{
5248 {0, 239},
5249 },
5250 },
5251 },
5252 {
5253 name: "LoweredCtz64",
5254 argLen: 2,
5255 resultNotInArgs: true,
5256 clobberFlags: true,
5257 reg: regInfo{
5258 inputs: []inputInfo{
5259 {0, 239},
5260 {1, 239},
5261 },
5262 outputs: []outputInfo{
5263 {0, 239},
5264 },
5265 },
5266 },
5267 {
5268 name: "BSRL",
5269 argLen: 1,
5270 clobberFlags: true,
5271 asm: x86.ABSRL,
5272 reg: regInfo{
5273 inputs: []inputInfo{
5274 {0, 239},
5275 },
5276 outputs: []outputInfo{
5277 {0, 239},
5278 },
5279 },
5280 },
5281 {
5282 name: "BSRW",
5283 argLen: 1,
5284 clobberFlags: true,
5285 asm: x86.ABSRW,
5286 reg: regInfo{
5287 inputs: []inputInfo{
5288 {0, 239},
5289 },
5290 outputs: []outputInfo{
5291 {0, 239},
5292 },
5293 },
5294 },
5295 {
5296 name: "BSWAPL",
5297 argLen: 1,
5298 resultInArg0: true,
5299 asm: x86.ABSWAPL,
5300 reg: regInfo{
5301 inputs: []inputInfo{
5302 {0, 239},
5303 },
5304 outputs: []outputInfo{
5305 {0, 239},
5306 },
5307 },
5308 },
5309 {
5310 name: "SQRTSD",
5311 argLen: 1,
5312 asm: x86.ASQRTSD,
5313 reg: regInfo{
5314 inputs: []inputInfo{
5315 {0, 65280},
5316 },
5317 outputs: []outputInfo{
5318 {0, 65280},
5319 },
5320 },
5321 },
5322 {
5323 name: "SQRTSS",
5324 argLen: 1,
5325 asm: x86.ASQRTSS,
5326 reg: regInfo{
5327 inputs: []inputInfo{
5328 {0, 65280},
5329 },
5330 outputs: []outputInfo{
5331 {0, 65280},
5332 },
5333 },
5334 },
5335 {
5336 name: "SBBLcarrymask",
5337 argLen: 1,
5338 asm: x86.ASBBL,
5339 reg: regInfo{
5340 outputs: []outputInfo{
5341 {0, 239},
5342 },
5343 },
5344 },
5345 {
5346 name: "SETEQ",
5347 argLen: 1,
5348 asm: x86.ASETEQ,
5349 reg: regInfo{
5350 outputs: []outputInfo{
5351 {0, 239},
5352 },
5353 },
5354 },
5355 {
5356 name: "SETNE",
5357 argLen: 1,
5358 asm: x86.ASETNE,
5359 reg: regInfo{
5360 outputs: []outputInfo{
5361 {0, 239},
5362 },
5363 },
5364 },
5365 {
5366 name: "SETL",
5367 argLen: 1,
5368 asm: x86.ASETLT,
5369 reg: regInfo{
5370 outputs: []outputInfo{
5371 {0, 239},
5372 },
5373 },
5374 },
5375 {
5376 name: "SETLE",
5377 argLen: 1,
5378 asm: x86.ASETLE,
5379 reg: regInfo{
5380 outputs: []outputInfo{
5381 {0, 239},
5382 },
5383 },
5384 },
5385 {
5386 name: "SETG",
5387 argLen: 1,
5388 asm: x86.ASETGT,
5389 reg: regInfo{
5390 outputs: []outputInfo{
5391 {0, 239},
5392 },
5393 },
5394 },
5395 {
5396 name: "SETGE",
5397 argLen: 1,
5398 asm: x86.ASETGE,
5399 reg: regInfo{
5400 outputs: []outputInfo{
5401 {0, 239},
5402 },
5403 },
5404 },
5405 {
5406 name: "SETB",
5407 argLen: 1,
5408 asm: x86.ASETCS,
5409 reg: regInfo{
5410 outputs: []outputInfo{
5411 {0, 239},
5412 },
5413 },
5414 },
5415 {
5416 name: "SETBE",
5417 argLen: 1,
5418 asm: x86.ASETLS,
5419 reg: regInfo{
5420 outputs: []outputInfo{
5421 {0, 239},
5422 },
5423 },
5424 },
5425 {
5426 name: "SETA",
5427 argLen: 1,
5428 asm: x86.ASETHI,
5429 reg: regInfo{
5430 outputs: []outputInfo{
5431 {0, 239},
5432 },
5433 },
5434 },
5435 {
5436 name: "SETAE",
5437 argLen: 1,
5438 asm: x86.ASETCC,
5439 reg: regInfo{
5440 outputs: []outputInfo{
5441 {0, 239},
5442 },
5443 },
5444 },
5445 {
5446 name: "SETO",
5447 argLen: 1,
5448 asm: x86.ASETOS,
5449 reg: regInfo{
5450 outputs: []outputInfo{
5451 {0, 239},
5452 },
5453 },
5454 },
5455 {
5456 name: "SETEQF",
5457 argLen: 1,
5458 clobberFlags: true,
5459 asm: x86.ASETEQ,
5460 reg: regInfo{
5461 clobbers: 1,
5462 outputs: []outputInfo{
5463 {0, 238},
5464 },
5465 },
5466 },
5467 {
5468 name: "SETNEF",
5469 argLen: 1,
5470 clobberFlags: true,
5471 asm: x86.ASETNE,
5472 reg: regInfo{
5473 clobbers: 1,
5474 outputs: []outputInfo{
5475 {0, 238},
5476 },
5477 },
5478 },
5479 {
5480 name: "SETORD",
5481 argLen: 1,
5482 asm: x86.ASETPC,
5483 reg: regInfo{
5484 outputs: []outputInfo{
5485 {0, 239},
5486 },
5487 },
5488 },
5489 {
5490 name: "SETNAN",
5491 argLen: 1,
5492 asm: x86.ASETPS,
5493 reg: regInfo{
5494 outputs: []outputInfo{
5495 {0, 239},
5496 },
5497 },
5498 },
5499 {
5500 name: "SETGF",
5501 argLen: 1,
5502 asm: x86.ASETHI,
5503 reg: regInfo{
5504 outputs: []outputInfo{
5505 {0, 239},
5506 },
5507 },
5508 },
5509 {
5510 name: "SETGEF",
5511 argLen: 1,
5512 asm: x86.ASETCC,
5513 reg: regInfo{
5514 outputs: []outputInfo{
5515 {0, 239},
5516 },
5517 },
5518 },
5519 {
5520 name: "MOVBLSX",
5521 argLen: 1,
5522 asm: x86.AMOVBLSX,
5523 reg: regInfo{
5524 inputs: []inputInfo{
5525 {0, 239},
5526 },
5527 outputs: []outputInfo{
5528 {0, 239},
5529 },
5530 },
5531 },
5532 {
5533 name: "MOVBLZX",
5534 argLen: 1,
5535 asm: x86.AMOVBLZX,
5536 reg: regInfo{
5537 inputs: []inputInfo{
5538 {0, 239},
5539 },
5540 outputs: []outputInfo{
5541 {0, 239},
5542 },
5543 },
5544 },
5545 {
5546 name: "MOVWLSX",
5547 argLen: 1,
5548 asm: x86.AMOVWLSX,
5549 reg: regInfo{
5550 inputs: []inputInfo{
5551 {0, 239},
5552 },
5553 outputs: []outputInfo{
5554 {0, 239},
5555 },
5556 },
5557 },
5558 {
5559 name: "MOVWLZX",
5560 argLen: 1,
5561 asm: x86.AMOVWLZX,
5562 reg: regInfo{
5563 inputs: []inputInfo{
5564 {0, 239},
5565 },
5566 outputs: []outputInfo{
5567 {0, 239},
5568 },
5569 },
5570 },
5571 {
5572 name: "MOVLconst",
5573 auxType: auxInt32,
5574 argLen: 0,
5575 rematerializeable: true,
5576 asm: x86.AMOVL,
5577 reg: regInfo{
5578 outputs: []outputInfo{
5579 {0, 239},
5580 },
5581 },
5582 },
5583 {
5584 name: "CVTTSD2SL",
5585 argLen: 1,
5586 asm: x86.ACVTTSD2SL,
5587 reg: regInfo{
5588 inputs: []inputInfo{
5589 {0, 65280},
5590 },
5591 outputs: []outputInfo{
5592 {0, 239},
5593 },
5594 },
5595 },
5596 {
5597 name: "CVTTSS2SL",
5598 argLen: 1,
5599 asm: x86.ACVTTSS2SL,
5600 reg: regInfo{
5601 inputs: []inputInfo{
5602 {0, 65280},
5603 },
5604 outputs: []outputInfo{
5605 {0, 239},
5606 },
5607 },
5608 },
5609 {
5610 name: "CVTSL2SS",
5611 argLen: 1,
5612 asm: x86.ACVTSL2SS,
5613 reg: regInfo{
5614 inputs: []inputInfo{
5615 {0, 239},
5616 },
5617 outputs: []outputInfo{
5618 {0, 65280},
5619 },
5620 },
5621 },
5622 {
5623 name: "CVTSL2SD",
5624 argLen: 1,
5625 asm: x86.ACVTSL2SD,
5626 reg: regInfo{
5627 inputs: []inputInfo{
5628 {0, 239},
5629 },
5630 outputs: []outputInfo{
5631 {0, 65280},
5632 },
5633 },
5634 },
5635 {
5636 name: "CVTSD2SS",
5637 argLen: 1,
5638 asm: x86.ACVTSD2SS,
5639 reg: regInfo{
5640 inputs: []inputInfo{
5641 {0, 65280},
5642 },
5643 outputs: []outputInfo{
5644 {0, 65280},
5645 },
5646 },
5647 },
5648 {
5649 name: "CVTSS2SD",
5650 argLen: 1,
5651 asm: x86.ACVTSS2SD,
5652 reg: regInfo{
5653 inputs: []inputInfo{
5654 {0, 65280},
5655 },
5656 outputs: []outputInfo{
5657 {0, 65280},
5658 },
5659 },
5660 },
5661 {
5662 name: "PXOR",
5663 argLen: 2,
5664 commutative: true,
5665 resultInArg0: true,
5666 asm: x86.APXOR,
5667 reg: regInfo{
5668 inputs: []inputInfo{
5669 {0, 65280},
5670 {1, 65280},
5671 },
5672 outputs: []outputInfo{
5673 {0, 65280},
5674 },
5675 },
5676 },
5677 {
5678 name: "LEAL",
5679 auxType: auxSymOff,
5680 argLen: 1,
5681 rematerializeable: true,
5682 symEffect: SymAddr,
5683 reg: regInfo{
5684 inputs: []inputInfo{
5685 {0, 65791},
5686 },
5687 outputs: []outputInfo{
5688 {0, 239},
5689 },
5690 },
5691 },
5692 {
5693 name: "LEAL1",
5694 auxType: auxSymOff,
5695 argLen: 2,
5696 commutative: true,
5697 symEffect: SymAddr,
5698 reg: regInfo{
5699 inputs: []inputInfo{
5700 {1, 255},
5701 {0, 65791},
5702 },
5703 outputs: []outputInfo{
5704 {0, 239},
5705 },
5706 },
5707 },
5708 {
5709 name: "LEAL2",
5710 auxType: auxSymOff,
5711 argLen: 2,
5712 symEffect: SymAddr,
5713 reg: regInfo{
5714 inputs: []inputInfo{
5715 {1, 255},
5716 {0, 65791},
5717 },
5718 outputs: []outputInfo{
5719 {0, 239},
5720 },
5721 },
5722 },
5723 {
5724 name: "LEAL4",
5725 auxType: auxSymOff,
5726 argLen: 2,
5727 symEffect: SymAddr,
5728 reg: regInfo{
5729 inputs: []inputInfo{
5730 {1, 255},
5731 {0, 65791},
5732 },
5733 outputs: []outputInfo{
5734 {0, 239},
5735 },
5736 },
5737 },
5738 {
5739 name: "LEAL8",
5740 auxType: auxSymOff,
5741 argLen: 2,
5742 symEffect: SymAddr,
5743 reg: regInfo{
5744 inputs: []inputInfo{
5745 {1, 255},
5746 {0, 65791},
5747 },
5748 outputs: []outputInfo{
5749 {0, 239},
5750 },
5751 },
5752 },
5753 {
5754 name: "MOVBload",
5755 auxType: auxSymOff,
5756 argLen: 2,
5757 faultOnNilArg0: true,
5758 symEffect: SymRead,
5759 asm: x86.AMOVBLZX,
5760 reg: regInfo{
5761 inputs: []inputInfo{
5762 {0, 65791},
5763 },
5764 outputs: []outputInfo{
5765 {0, 239},
5766 },
5767 },
5768 },
5769 {
5770 name: "MOVBLSXload",
5771 auxType: auxSymOff,
5772 argLen: 2,
5773 faultOnNilArg0: true,
5774 symEffect: SymRead,
5775 asm: x86.AMOVBLSX,
5776 reg: regInfo{
5777 inputs: []inputInfo{
5778 {0, 65791},
5779 },
5780 outputs: []outputInfo{
5781 {0, 239},
5782 },
5783 },
5784 },
5785 {
5786 name: "MOVWload",
5787 auxType: auxSymOff,
5788 argLen: 2,
5789 faultOnNilArg0: true,
5790 symEffect: SymRead,
5791 asm: x86.AMOVWLZX,
5792 reg: regInfo{
5793 inputs: []inputInfo{
5794 {0, 65791},
5795 },
5796 outputs: []outputInfo{
5797 {0, 239},
5798 },
5799 },
5800 },
5801 {
5802 name: "MOVWLSXload",
5803 auxType: auxSymOff,
5804 argLen: 2,
5805 faultOnNilArg0: true,
5806 symEffect: SymRead,
5807 asm: x86.AMOVWLSX,
5808 reg: regInfo{
5809 inputs: []inputInfo{
5810 {0, 65791},
5811 },
5812 outputs: []outputInfo{
5813 {0, 239},
5814 },
5815 },
5816 },
5817 {
5818 name: "MOVLload",
5819 auxType: auxSymOff,
5820 argLen: 2,
5821 faultOnNilArg0: true,
5822 symEffect: SymRead,
5823 asm: x86.AMOVL,
5824 reg: regInfo{
5825 inputs: []inputInfo{
5826 {0, 65791},
5827 },
5828 outputs: []outputInfo{
5829 {0, 239},
5830 },
5831 },
5832 },
5833 {
5834 name: "MOVBstore",
5835 auxType: auxSymOff,
5836 argLen: 3,
5837 faultOnNilArg0: true,
5838 symEffect: SymWrite,
5839 asm: x86.AMOVB,
5840 reg: regInfo{
5841 inputs: []inputInfo{
5842 {1, 255},
5843 {0, 65791},
5844 },
5845 },
5846 },
5847 {
5848 name: "MOVWstore",
5849 auxType: auxSymOff,
5850 argLen: 3,
5851 faultOnNilArg0: true,
5852 symEffect: SymWrite,
5853 asm: x86.AMOVW,
5854 reg: regInfo{
5855 inputs: []inputInfo{
5856 {1, 255},
5857 {0, 65791},
5858 },
5859 },
5860 },
5861 {
5862 name: "MOVLstore",
5863 auxType: auxSymOff,
5864 argLen: 3,
5865 faultOnNilArg0: true,
5866 symEffect: SymWrite,
5867 asm: x86.AMOVL,
5868 reg: regInfo{
5869 inputs: []inputInfo{
5870 {1, 255},
5871 {0, 65791},
5872 },
5873 },
5874 },
5875 {
5876 name: "ADDLmodify",
5877 auxType: auxSymOff,
5878 argLen: 3,
5879 clobberFlags: true,
5880 faultOnNilArg0: true,
5881 symEffect: SymRead | SymWrite,
5882 asm: x86.AADDL,
5883 reg: regInfo{
5884 inputs: []inputInfo{
5885 {1, 255},
5886 {0, 65791},
5887 },
5888 },
5889 },
5890 {
5891 name: "SUBLmodify",
5892 auxType: auxSymOff,
5893 argLen: 3,
5894 clobberFlags: true,
5895 faultOnNilArg0: true,
5896 symEffect: SymRead | SymWrite,
5897 asm: x86.ASUBL,
5898 reg: regInfo{
5899 inputs: []inputInfo{
5900 {1, 255},
5901 {0, 65791},
5902 },
5903 },
5904 },
5905 {
5906 name: "ANDLmodify",
5907 auxType: auxSymOff,
5908 argLen: 3,
5909 clobberFlags: true,
5910 faultOnNilArg0: true,
5911 symEffect: SymRead | SymWrite,
5912 asm: x86.AANDL,
5913 reg: regInfo{
5914 inputs: []inputInfo{
5915 {1, 255},
5916 {0, 65791},
5917 },
5918 },
5919 },
5920 {
5921 name: "ORLmodify",
5922 auxType: auxSymOff,
5923 argLen: 3,
5924 clobberFlags: true,
5925 faultOnNilArg0: true,
5926 symEffect: SymRead | SymWrite,
5927 asm: x86.AORL,
5928 reg: regInfo{
5929 inputs: []inputInfo{
5930 {1, 255},
5931 {0, 65791},
5932 },
5933 },
5934 },
5935 {
5936 name: "XORLmodify",
5937 auxType: auxSymOff,
5938 argLen: 3,
5939 clobberFlags: true,
5940 faultOnNilArg0: true,
5941 symEffect: SymRead | SymWrite,
5942 asm: x86.AXORL,
5943 reg: regInfo{
5944 inputs: []inputInfo{
5945 {1, 255},
5946 {0, 65791},
5947 },
5948 },
5949 },
5950 {
5951 name: "ADDLmodifyidx4",
5952 auxType: auxSymOff,
5953 argLen: 4,
5954 clobberFlags: true,
5955 symEffect: SymRead | SymWrite,
5956 asm: x86.AADDL,
5957 reg: regInfo{
5958 inputs: []inputInfo{
5959 {1, 255},
5960 {2, 255},
5961 {0, 65791},
5962 },
5963 },
5964 },
5965 {
5966 name: "SUBLmodifyidx4",
5967 auxType: auxSymOff,
5968 argLen: 4,
5969 clobberFlags: true,
5970 symEffect: SymRead | SymWrite,
5971 asm: x86.ASUBL,
5972 reg: regInfo{
5973 inputs: []inputInfo{
5974 {1, 255},
5975 {2, 255},
5976 {0, 65791},
5977 },
5978 },
5979 },
5980 {
5981 name: "ANDLmodifyidx4",
5982 auxType: auxSymOff,
5983 argLen: 4,
5984 clobberFlags: true,
5985 symEffect: SymRead | SymWrite,
5986 asm: x86.AANDL,
5987 reg: regInfo{
5988 inputs: []inputInfo{
5989 {1, 255},
5990 {2, 255},
5991 {0, 65791},
5992 },
5993 },
5994 },
5995 {
5996 name: "ORLmodifyidx4",
5997 auxType: auxSymOff,
5998 argLen: 4,
5999 clobberFlags: true,
6000 symEffect: SymRead | SymWrite,
6001 asm: x86.AORL,
6002 reg: regInfo{
6003 inputs: []inputInfo{
6004 {1, 255},
6005 {2, 255},
6006 {0, 65791},
6007 },
6008 },
6009 },
6010 {
6011 name: "XORLmodifyidx4",
6012 auxType: auxSymOff,
6013 argLen: 4,
6014 clobberFlags: true,
6015 symEffect: SymRead | SymWrite,
6016 asm: x86.AXORL,
6017 reg: regInfo{
6018 inputs: []inputInfo{
6019 {1, 255},
6020 {2, 255},
6021 {0, 65791},
6022 },
6023 },
6024 },
6025 {
6026 name: "ADDLconstmodify",
6027 auxType: auxSymValAndOff,
6028 argLen: 2,
6029 clobberFlags: true,
6030 faultOnNilArg0: true,
6031 symEffect: SymRead | SymWrite,
6032 asm: x86.AADDL,
6033 reg: regInfo{
6034 inputs: []inputInfo{
6035 {0, 65791},
6036 },
6037 },
6038 },
6039 {
6040 name: "ANDLconstmodify",
6041 auxType: auxSymValAndOff,
6042 argLen: 2,
6043 clobberFlags: true,
6044 faultOnNilArg0: true,
6045 symEffect: SymRead | SymWrite,
6046 asm: x86.AANDL,
6047 reg: regInfo{
6048 inputs: []inputInfo{
6049 {0, 65791},
6050 },
6051 },
6052 },
6053 {
6054 name: "ORLconstmodify",
6055 auxType: auxSymValAndOff,
6056 argLen: 2,
6057 clobberFlags: true,
6058 faultOnNilArg0: true,
6059 symEffect: SymRead | SymWrite,
6060 asm: x86.AORL,
6061 reg: regInfo{
6062 inputs: []inputInfo{
6063 {0, 65791},
6064 },
6065 },
6066 },
6067 {
6068 name: "XORLconstmodify",
6069 auxType: auxSymValAndOff,
6070 argLen: 2,
6071 clobberFlags: true,
6072 faultOnNilArg0: true,
6073 symEffect: SymRead | SymWrite,
6074 asm: x86.AXORL,
6075 reg: regInfo{
6076 inputs: []inputInfo{
6077 {0, 65791},
6078 },
6079 },
6080 },
6081 {
6082 name: "ADDLconstmodifyidx4",
6083 auxType: auxSymValAndOff,
6084 argLen: 3,
6085 clobberFlags: true,
6086 symEffect: SymRead | SymWrite,
6087 asm: x86.AADDL,
6088 reg: regInfo{
6089 inputs: []inputInfo{
6090 {1, 255},
6091 {0, 65791},
6092 },
6093 },
6094 },
6095 {
6096 name: "ANDLconstmodifyidx4",
6097 auxType: auxSymValAndOff,
6098 argLen: 3,
6099 clobberFlags: true,
6100 symEffect: SymRead | SymWrite,
6101 asm: x86.AANDL,
6102 reg: regInfo{
6103 inputs: []inputInfo{
6104 {1, 255},
6105 {0, 65791},
6106 },
6107 },
6108 },
6109 {
6110 name: "ORLconstmodifyidx4",
6111 auxType: auxSymValAndOff,
6112 argLen: 3,
6113 clobberFlags: true,
6114 symEffect: SymRead | SymWrite,
6115 asm: x86.AORL,
6116 reg: regInfo{
6117 inputs: []inputInfo{
6118 {1, 255},
6119 {0, 65791},
6120 },
6121 },
6122 },
6123 {
6124 name: "XORLconstmodifyidx4",
6125 auxType: auxSymValAndOff,
6126 argLen: 3,
6127 clobberFlags: true,
6128 symEffect: SymRead | SymWrite,
6129 asm: x86.AXORL,
6130 reg: regInfo{
6131 inputs: []inputInfo{
6132 {1, 255},
6133 {0, 65791},
6134 },
6135 },
6136 },
6137 {
6138 name: "MOVBloadidx1",
6139 auxType: auxSymOff,
6140 argLen: 3,
6141 commutative: true,
6142 symEffect: SymRead,
6143 asm: x86.AMOVBLZX,
6144 reg: regInfo{
6145 inputs: []inputInfo{
6146 {1, 255},
6147 {0, 65791},
6148 },
6149 outputs: []outputInfo{
6150 {0, 239},
6151 },
6152 },
6153 },
6154 {
6155 name: "MOVWloadidx1",
6156 auxType: auxSymOff,
6157 argLen: 3,
6158 commutative: true,
6159 symEffect: SymRead,
6160 asm: x86.AMOVWLZX,
6161 reg: regInfo{
6162 inputs: []inputInfo{
6163 {1, 255},
6164 {0, 65791},
6165 },
6166 outputs: []outputInfo{
6167 {0, 239},
6168 },
6169 },
6170 },
6171 {
6172 name: "MOVWloadidx2",
6173 auxType: auxSymOff,
6174 argLen: 3,
6175 symEffect: SymRead,
6176 asm: x86.AMOVWLZX,
6177 reg: regInfo{
6178 inputs: []inputInfo{
6179 {1, 255},
6180 {0, 65791},
6181 },
6182 outputs: []outputInfo{
6183 {0, 239},
6184 },
6185 },
6186 },
6187 {
6188 name: "MOVLloadidx1",
6189 auxType: auxSymOff,
6190 argLen: 3,
6191 commutative: true,
6192 symEffect: SymRead,
6193 asm: x86.AMOVL,
6194 reg: regInfo{
6195 inputs: []inputInfo{
6196 {1, 255},
6197 {0, 65791},
6198 },
6199 outputs: []outputInfo{
6200 {0, 239},
6201 },
6202 },
6203 },
6204 {
6205 name: "MOVLloadidx4",
6206 auxType: auxSymOff,
6207 argLen: 3,
6208 symEffect: SymRead,
6209 asm: x86.AMOVL,
6210 reg: regInfo{
6211 inputs: []inputInfo{
6212 {1, 255},
6213 {0, 65791},
6214 },
6215 outputs: []outputInfo{
6216 {0, 239},
6217 },
6218 },
6219 },
6220 {
6221 name: "MOVBstoreidx1",
6222 auxType: auxSymOff,
6223 argLen: 4,
6224 commutative: true,
6225 symEffect: SymWrite,
6226 asm: x86.AMOVB,
6227 reg: regInfo{
6228 inputs: []inputInfo{
6229 {1, 255},
6230 {2, 255},
6231 {0, 65791},
6232 },
6233 },
6234 },
6235 {
6236 name: "MOVWstoreidx1",
6237 auxType: auxSymOff,
6238 argLen: 4,
6239 commutative: true,
6240 symEffect: SymWrite,
6241 asm: x86.AMOVW,
6242 reg: regInfo{
6243 inputs: []inputInfo{
6244 {1, 255},
6245 {2, 255},
6246 {0, 65791},
6247 },
6248 },
6249 },
6250 {
6251 name: "MOVWstoreidx2",
6252 auxType: auxSymOff,
6253 argLen: 4,
6254 symEffect: SymWrite,
6255 asm: x86.AMOVW,
6256 reg: regInfo{
6257 inputs: []inputInfo{
6258 {1, 255},
6259 {2, 255},
6260 {0, 65791},
6261 },
6262 },
6263 },
6264 {
6265 name: "MOVLstoreidx1",
6266 auxType: auxSymOff,
6267 argLen: 4,
6268 commutative: true,
6269 symEffect: SymWrite,
6270 asm: x86.AMOVL,
6271 reg: regInfo{
6272 inputs: []inputInfo{
6273 {1, 255},
6274 {2, 255},
6275 {0, 65791},
6276 },
6277 },
6278 },
6279 {
6280 name: "MOVLstoreidx4",
6281 auxType: auxSymOff,
6282 argLen: 4,
6283 symEffect: SymWrite,
6284 asm: x86.AMOVL,
6285 reg: regInfo{
6286 inputs: []inputInfo{
6287 {1, 255},
6288 {2, 255},
6289 {0, 65791},
6290 },
6291 },
6292 },
6293 {
6294 name: "MOVBstoreconst",
6295 auxType: auxSymValAndOff,
6296 argLen: 2,
6297 faultOnNilArg0: true,
6298 symEffect: SymWrite,
6299 asm: x86.AMOVB,
6300 reg: regInfo{
6301 inputs: []inputInfo{
6302 {0, 65791},
6303 },
6304 },
6305 },
6306 {
6307 name: "MOVWstoreconst",
6308 auxType: auxSymValAndOff,
6309 argLen: 2,
6310 faultOnNilArg0: true,
6311 symEffect: SymWrite,
6312 asm: x86.AMOVW,
6313 reg: regInfo{
6314 inputs: []inputInfo{
6315 {0, 65791},
6316 },
6317 },
6318 },
6319 {
6320 name: "MOVLstoreconst",
6321 auxType: auxSymValAndOff,
6322 argLen: 2,
6323 faultOnNilArg0: true,
6324 symEffect: SymWrite,
6325 asm: x86.AMOVL,
6326 reg: regInfo{
6327 inputs: []inputInfo{
6328 {0, 65791},
6329 },
6330 },
6331 },
6332 {
6333 name: "MOVBstoreconstidx1",
6334 auxType: auxSymValAndOff,
6335 argLen: 3,
6336 symEffect: SymWrite,
6337 asm: x86.AMOVB,
6338 reg: regInfo{
6339 inputs: []inputInfo{
6340 {1, 255},
6341 {0, 65791},
6342 },
6343 },
6344 },
6345 {
6346 name: "MOVWstoreconstidx1",
6347 auxType: auxSymValAndOff,
6348 argLen: 3,
6349 symEffect: SymWrite,
6350 asm: x86.AMOVW,
6351 reg: regInfo{
6352 inputs: []inputInfo{
6353 {1, 255},
6354 {0, 65791},
6355 },
6356 },
6357 },
6358 {
6359 name: "MOVWstoreconstidx2",
6360 auxType: auxSymValAndOff,
6361 argLen: 3,
6362 symEffect: SymWrite,
6363 asm: x86.AMOVW,
6364 reg: regInfo{
6365 inputs: []inputInfo{
6366 {1, 255},
6367 {0, 65791},
6368 },
6369 },
6370 },
6371 {
6372 name: "MOVLstoreconstidx1",
6373 auxType: auxSymValAndOff,
6374 argLen: 3,
6375 symEffect: SymWrite,
6376 asm: x86.AMOVL,
6377 reg: regInfo{
6378 inputs: []inputInfo{
6379 {1, 255},
6380 {0, 65791},
6381 },
6382 },
6383 },
6384 {
6385 name: "MOVLstoreconstidx4",
6386 auxType: auxSymValAndOff,
6387 argLen: 3,
6388 symEffect: SymWrite,
6389 asm: x86.AMOVL,
6390 reg: regInfo{
6391 inputs: []inputInfo{
6392 {1, 255},
6393 {0, 65791},
6394 },
6395 },
6396 },
6397 {
6398 name: "DUFFZERO",
6399 auxType: auxInt64,
6400 argLen: 3,
6401 faultOnNilArg0: true,
6402 reg: regInfo{
6403 inputs: []inputInfo{
6404 {0, 128},
6405 {1, 1},
6406 },
6407 clobbers: 130,
6408 },
6409 },
6410 {
6411 name: "REPSTOSL",
6412 argLen: 4,
6413 faultOnNilArg0: true,
6414 reg: regInfo{
6415 inputs: []inputInfo{
6416 {0, 128},
6417 {1, 2},
6418 {2, 1},
6419 },
6420 clobbers: 130,
6421 },
6422 },
6423 {
6424 name: "CALLstatic",
6425 auxType: auxCallOff,
6426 argLen: 1,
6427 clobberFlags: true,
6428 call: true,
6429 reg: regInfo{
6430 clobbers: 65519,
6431 },
6432 },
6433 {
6434 name: "CALLtail",
6435 auxType: auxCallOff,
6436 argLen: 1,
6437 clobberFlags: true,
6438 call: true,
6439 tailCall: true,
6440 reg: regInfo{
6441 clobbers: 65519,
6442 },
6443 },
6444 {
6445 name: "CALLclosure",
6446 auxType: auxCallOff,
6447 argLen: 3,
6448 clobberFlags: true,
6449 call: true,
6450 reg: regInfo{
6451 inputs: []inputInfo{
6452 {1, 4},
6453 {0, 255},
6454 },
6455 clobbers: 65519,
6456 },
6457 },
6458 {
6459 name: "CALLinter",
6460 auxType: auxCallOff,
6461 argLen: 2,
6462 clobberFlags: true,
6463 call: true,
6464 reg: regInfo{
6465 inputs: []inputInfo{
6466 {0, 239},
6467 },
6468 clobbers: 65519,
6469 },
6470 },
6471 {
6472 name: "DUFFCOPY",
6473 auxType: auxInt64,
6474 argLen: 3,
6475 clobberFlags: true,
6476 faultOnNilArg0: true,
6477 faultOnNilArg1: true,
6478 reg: regInfo{
6479 inputs: []inputInfo{
6480 {0, 128},
6481 {1, 64},
6482 },
6483 clobbers: 194,
6484 },
6485 },
6486 {
6487 name: "REPMOVSL",
6488 argLen: 4,
6489 faultOnNilArg0: true,
6490 faultOnNilArg1: true,
6491 reg: regInfo{
6492 inputs: []inputInfo{
6493 {0, 128},
6494 {1, 64},
6495 {2, 2},
6496 },
6497 clobbers: 194,
6498 },
6499 },
6500 {
6501 name: "InvertFlags",
6502 argLen: 1,
6503 reg: regInfo{},
6504 },
6505 {
6506 name: "LoweredGetG",
6507 argLen: 1,
6508 reg: regInfo{
6509 outputs: []outputInfo{
6510 {0, 239},
6511 },
6512 },
6513 },
6514 {
6515 name: "LoweredGetClosurePtr",
6516 argLen: 0,
6517 zeroWidth: true,
6518 reg: regInfo{
6519 outputs: []outputInfo{
6520 {0, 4},
6521 },
6522 },
6523 },
6524 {
6525 name: "LoweredGetCallerPC",
6526 argLen: 0,
6527 rematerializeable: true,
6528 reg: regInfo{
6529 outputs: []outputInfo{
6530 {0, 239},
6531 },
6532 },
6533 },
6534 {
6535 name: "LoweredGetCallerSP",
6536 argLen: 1,
6537 rematerializeable: true,
6538 reg: regInfo{
6539 outputs: []outputInfo{
6540 {0, 239},
6541 },
6542 },
6543 },
6544 {
6545 name: "LoweredNilCheck",
6546 argLen: 2,
6547 clobberFlags: true,
6548 nilCheck: true,
6549 faultOnNilArg0: true,
6550 reg: regInfo{
6551 inputs: []inputInfo{
6552 {0, 255},
6553 },
6554 },
6555 },
6556 {
6557 name: "LoweredWB",
6558 auxType: auxInt64,
6559 argLen: 1,
6560 clobberFlags: true,
6561 reg: regInfo{
6562 clobbers: 65280,
6563 outputs: []outputInfo{
6564 {0, 128},
6565 },
6566 },
6567 },
6568 {
6569 name: "LoweredPanicBoundsA",
6570 auxType: auxInt64,
6571 argLen: 3,
6572 call: true,
6573 reg: regInfo{
6574 inputs: []inputInfo{
6575 {0, 4},
6576 {1, 8},
6577 },
6578 },
6579 },
6580 {
6581 name: "LoweredPanicBoundsB",
6582 auxType: auxInt64,
6583 argLen: 3,
6584 call: true,
6585 reg: regInfo{
6586 inputs: []inputInfo{
6587 {0, 2},
6588 {1, 4},
6589 },
6590 },
6591 },
6592 {
6593 name: "LoweredPanicBoundsC",
6594 auxType: auxInt64,
6595 argLen: 3,
6596 call: true,
6597 reg: regInfo{
6598 inputs: []inputInfo{
6599 {0, 1},
6600 {1, 2},
6601 },
6602 },
6603 },
6604 {
6605 name: "LoweredPanicExtendA",
6606 auxType: auxInt64,
6607 argLen: 4,
6608 call: true,
6609 reg: regInfo{
6610 inputs: []inputInfo{
6611 {0, 64},
6612 {1, 4},
6613 {2, 8},
6614 },
6615 },
6616 },
6617 {
6618 name: "LoweredPanicExtendB",
6619 auxType: auxInt64,
6620 argLen: 4,
6621 call: true,
6622 reg: regInfo{
6623 inputs: []inputInfo{
6624 {0, 64},
6625 {1, 2},
6626 {2, 4},
6627 },
6628 },
6629 },
6630 {
6631 name: "LoweredPanicExtendC",
6632 auxType: auxInt64,
6633 argLen: 4,
6634 call: true,
6635 reg: regInfo{
6636 inputs: []inputInfo{
6637 {0, 64},
6638 {1, 1},
6639 {2, 2},
6640 },
6641 },
6642 },
6643 {
6644 name: "FlagEQ",
6645 argLen: 0,
6646 reg: regInfo{},
6647 },
6648 {
6649 name: "FlagLT_ULT",
6650 argLen: 0,
6651 reg: regInfo{},
6652 },
6653 {
6654 name: "FlagLT_UGT",
6655 argLen: 0,
6656 reg: regInfo{},
6657 },
6658 {
6659 name: "FlagGT_UGT",
6660 argLen: 0,
6661 reg: regInfo{},
6662 },
6663 {
6664 name: "FlagGT_ULT",
6665 argLen: 0,
6666 reg: regInfo{},
6667 },
6668 {
6669 name: "MOVSSconst1",
6670 auxType: auxFloat32,
6671 argLen: 0,
6672 reg: regInfo{
6673 outputs: []outputInfo{
6674 {0, 239},
6675 },
6676 },
6677 },
6678 {
6679 name: "MOVSDconst1",
6680 auxType: auxFloat64,
6681 argLen: 0,
6682 reg: regInfo{
6683 outputs: []outputInfo{
6684 {0, 239},
6685 },
6686 },
6687 },
6688 {
6689 name: "MOVSSconst2",
6690 argLen: 1,
6691 asm: x86.AMOVSS,
6692 reg: regInfo{
6693 inputs: []inputInfo{
6694 {0, 239},
6695 },
6696 outputs: []outputInfo{
6697 {0, 65280},
6698 },
6699 },
6700 },
6701 {
6702 name: "MOVSDconst2",
6703 argLen: 1,
6704 asm: x86.AMOVSD,
6705 reg: regInfo{
6706 inputs: []inputInfo{
6707 {0, 239},
6708 },
6709 outputs: []outputInfo{
6710 {0, 65280},
6711 },
6712 },
6713 },
6714
6715 {
6716 name: "ADDSS",
6717 argLen: 2,
6718 commutative: true,
6719 resultInArg0: true,
6720 asm: x86.AADDSS,
6721 reg: regInfo{
6722 inputs: []inputInfo{
6723 {0, 2147418112},
6724 {1, 2147418112},
6725 },
6726 outputs: []outputInfo{
6727 {0, 2147418112},
6728 },
6729 },
6730 },
6731 {
6732 name: "ADDSD",
6733 argLen: 2,
6734 commutative: true,
6735 resultInArg0: true,
6736 asm: x86.AADDSD,
6737 reg: regInfo{
6738 inputs: []inputInfo{
6739 {0, 2147418112},
6740 {1, 2147418112},
6741 },
6742 outputs: []outputInfo{
6743 {0, 2147418112},
6744 },
6745 },
6746 },
6747 {
6748 name: "SUBSS",
6749 argLen: 2,
6750 resultInArg0: true,
6751 asm: x86.ASUBSS,
6752 reg: regInfo{
6753 inputs: []inputInfo{
6754 {0, 2147418112},
6755 {1, 2147418112},
6756 },
6757 outputs: []outputInfo{
6758 {0, 2147418112},
6759 },
6760 },
6761 },
6762 {
6763 name: "SUBSD",
6764 argLen: 2,
6765 resultInArg0: true,
6766 asm: x86.ASUBSD,
6767 reg: regInfo{
6768 inputs: []inputInfo{
6769 {0, 2147418112},
6770 {1, 2147418112},
6771 },
6772 outputs: []outputInfo{
6773 {0, 2147418112},
6774 },
6775 },
6776 },
6777 {
6778 name: "MULSS",
6779 argLen: 2,
6780 commutative: true,
6781 resultInArg0: true,
6782 asm: x86.AMULSS,
6783 reg: regInfo{
6784 inputs: []inputInfo{
6785 {0, 2147418112},
6786 {1, 2147418112},
6787 },
6788 outputs: []outputInfo{
6789 {0, 2147418112},
6790 },
6791 },
6792 },
6793 {
6794 name: "MULSD",
6795 argLen: 2,
6796 commutative: true,
6797 resultInArg0: true,
6798 asm: x86.AMULSD,
6799 reg: regInfo{
6800 inputs: []inputInfo{
6801 {0, 2147418112},
6802 {1, 2147418112},
6803 },
6804 outputs: []outputInfo{
6805 {0, 2147418112},
6806 },
6807 },
6808 },
6809 {
6810 name: "DIVSS",
6811 argLen: 2,
6812 resultInArg0: true,
6813 asm: x86.ADIVSS,
6814 reg: regInfo{
6815 inputs: []inputInfo{
6816 {0, 2147418112},
6817 {1, 2147418112},
6818 },
6819 outputs: []outputInfo{
6820 {0, 2147418112},
6821 },
6822 },
6823 },
6824 {
6825 name: "DIVSD",
6826 argLen: 2,
6827 resultInArg0: true,
6828 asm: x86.ADIVSD,
6829 reg: regInfo{
6830 inputs: []inputInfo{
6831 {0, 2147418112},
6832 {1, 2147418112},
6833 },
6834 outputs: []outputInfo{
6835 {0, 2147418112},
6836 },
6837 },
6838 },
6839 {
6840 name: "MOVSSload",
6841 auxType: auxSymOff,
6842 argLen: 2,
6843 faultOnNilArg0: true,
6844 symEffect: SymRead,
6845 asm: x86.AMOVSS,
6846 reg: regInfo{
6847 inputs: []inputInfo{
6848 {0, 4295016447},
6849 },
6850 outputs: []outputInfo{
6851 {0, 2147418112},
6852 },
6853 },
6854 },
6855 {
6856 name: "MOVSDload",
6857 auxType: auxSymOff,
6858 argLen: 2,
6859 faultOnNilArg0: true,
6860 symEffect: SymRead,
6861 asm: x86.AMOVSD,
6862 reg: regInfo{
6863 inputs: []inputInfo{
6864 {0, 4295016447},
6865 },
6866 outputs: []outputInfo{
6867 {0, 2147418112},
6868 },
6869 },
6870 },
6871 {
6872 name: "MOVSSconst",
6873 auxType: auxFloat32,
6874 argLen: 0,
6875 rematerializeable: true,
6876 asm: x86.AMOVSS,
6877 reg: regInfo{
6878 outputs: []outputInfo{
6879 {0, 2147418112},
6880 },
6881 },
6882 },
6883 {
6884 name: "MOVSDconst",
6885 auxType: auxFloat64,
6886 argLen: 0,
6887 rematerializeable: true,
6888 asm: x86.AMOVSD,
6889 reg: regInfo{
6890 outputs: []outputInfo{
6891 {0, 2147418112},
6892 },
6893 },
6894 },
6895 {
6896 name: "MOVSSloadidx1",
6897 auxType: auxSymOff,
6898 argLen: 3,
6899 symEffect: SymRead,
6900 asm: x86.AMOVSS,
6901 scale: 1,
6902 reg: regInfo{
6903 inputs: []inputInfo{
6904 {1, 49151},
6905 {0, 4295016447},
6906 },
6907 outputs: []outputInfo{
6908 {0, 2147418112},
6909 },
6910 },
6911 },
6912 {
6913 name: "MOVSSloadidx4",
6914 auxType: auxSymOff,
6915 argLen: 3,
6916 symEffect: SymRead,
6917 asm: x86.AMOVSS,
6918 scale: 4,
6919 reg: regInfo{
6920 inputs: []inputInfo{
6921 {1, 49151},
6922 {0, 4295016447},
6923 },
6924 outputs: []outputInfo{
6925 {0, 2147418112},
6926 },
6927 },
6928 },
6929 {
6930 name: "MOVSDloadidx1",
6931 auxType: auxSymOff,
6932 argLen: 3,
6933 symEffect: SymRead,
6934 asm: x86.AMOVSD,
6935 scale: 1,
6936 reg: regInfo{
6937 inputs: []inputInfo{
6938 {1, 49151},
6939 {0, 4295016447},
6940 },
6941 outputs: []outputInfo{
6942 {0, 2147418112},
6943 },
6944 },
6945 },
6946 {
6947 name: "MOVSDloadidx8",
6948 auxType: auxSymOff,
6949 argLen: 3,
6950 symEffect: SymRead,
6951 asm: x86.AMOVSD,
6952 scale: 8,
6953 reg: regInfo{
6954 inputs: []inputInfo{
6955 {1, 49151},
6956 {0, 4295016447},
6957 },
6958 outputs: []outputInfo{
6959 {0, 2147418112},
6960 },
6961 },
6962 },
6963 {
6964 name: "MOVSSstore",
6965 auxType: auxSymOff,
6966 argLen: 3,
6967 faultOnNilArg0: true,
6968 symEffect: SymWrite,
6969 asm: x86.AMOVSS,
6970 reg: regInfo{
6971 inputs: []inputInfo{
6972 {1, 2147418112},
6973 {0, 4295016447},
6974 },
6975 },
6976 },
6977 {
6978 name: "MOVSDstore",
6979 auxType: auxSymOff,
6980 argLen: 3,
6981 faultOnNilArg0: true,
6982 symEffect: SymWrite,
6983 asm: x86.AMOVSD,
6984 reg: regInfo{
6985 inputs: []inputInfo{
6986 {1, 2147418112},
6987 {0, 4295016447},
6988 },
6989 },
6990 },
6991 {
6992 name: "MOVSSstoreidx1",
6993 auxType: auxSymOff,
6994 argLen: 4,
6995 symEffect: SymWrite,
6996 asm: x86.AMOVSS,
6997 scale: 1,
6998 reg: regInfo{
6999 inputs: []inputInfo{
7000 {1, 49151},
7001 {2, 2147418112},
7002 {0, 4295016447},
7003 },
7004 },
7005 },
7006 {
7007 name: "MOVSSstoreidx4",
7008 auxType: auxSymOff,
7009 argLen: 4,
7010 symEffect: SymWrite,
7011 asm: x86.AMOVSS,
7012 scale: 4,
7013 reg: regInfo{
7014 inputs: []inputInfo{
7015 {1, 49151},
7016 {2, 2147418112},
7017 {0, 4295016447},
7018 },
7019 },
7020 },
7021 {
7022 name: "MOVSDstoreidx1",
7023 auxType: auxSymOff,
7024 argLen: 4,
7025 symEffect: SymWrite,
7026 asm: x86.AMOVSD,
7027 scale: 1,
7028 reg: regInfo{
7029 inputs: []inputInfo{
7030 {1, 49151},
7031 {2, 2147418112},
7032 {0, 4295016447},
7033 },
7034 },
7035 },
7036 {
7037 name: "MOVSDstoreidx8",
7038 auxType: auxSymOff,
7039 argLen: 4,
7040 symEffect: SymWrite,
7041 asm: x86.AMOVSD,
7042 scale: 8,
7043 reg: regInfo{
7044 inputs: []inputInfo{
7045 {1, 49151},
7046 {2, 2147418112},
7047 {0, 4295016447},
7048 },
7049 },
7050 },
7051 {
7052 name: "ADDSSload",
7053 auxType: auxSymOff,
7054 argLen: 3,
7055 resultInArg0: true,
7056 faultOnNilArg1: true,
7057 symEffect: SymRead,
7058 asm: x86.AADDSS,
7059 reg: regInfo{
7060 inputs: []inputInfo{
7061 {0, 2147418112},
7062 {1, 4295032831},
7063 },
7064 outputs: []outputInfo{
7065 {0, 2147418112},
7066 },
7067 },
7068 },
7069 {
7070 name: "ADDSDload",
7071 auxType: auxSymOff,
7072 argLen: 3,
7073 resultInArg0: true,
7074 faultOnNilArg1: true,
7075 symEffect: SymRead,
7076 asm: x86.AADDSD,
7077 reg: regInfo{
7078 inputs: []inputInfo{
7079 {0, 2147418112},
7080 {1, 4295032831},
7081 },
7082 outputs: []outputInfo{
7083 {0, 2147418112},
7084 },
7085 },
7086 },
7087 {
7088 name: "SUBSSload",
7089 auxType: auxSymOff,
7090 argLen: 3,
7091 resultInArg0: true,
7092 faultOnNilArg1: true,
7093 symEffect: SymRead,
7094 asm: x86.ASUBSS,
7095 reg: regInfo{
7096 inputs: []inputInfo{
7097 {0, 2147418112},
7098 {1, 4295032831},
7099 },
7100 outputs: []outputInfo{
7101 {0, 2147418112},
7102 },
7103 },
7104 },
7105 {
7106 name: "SUBSDload",
7107 auxType: auxSymOff,
7108 argLen: 3,
7109 resultInArg0: true,
7110 faultOnNilArg1: true,
7111 symEffect: SymRead,
7112 asm: x86.ASUBSD,
7113 reg: regInfo{
7114 inputs: []inputInfo{
7115 {0, 2147418112},
7116 {1, 4295032831},
7117 },
7118 outputs: []outputInfo{
7119 {0, 2147418112},
7120 },
7121 },
7122 },
7123 {
7124 name: "MULSSload",
7125 auxType: auxSymOff,
7126 argLen: 3,
7127 resultInArg0: true,
7128 faultOnNilArg1: true,
7129 symEffect: SymRead,
7130 asm: x86.AMULSS,
7131 reg: regInfo{
7132 inputs: []inputInfo{
7133 {0, 2147418112},
7134 {1, 4295032831},
7135 },
7136 outputs: []outputInfo{
7137 {0, 2147418112},
7138 },
7139 },
7140 },
7141 {
7142 name: "MULSDload",
7143 auxType: auxSymOff,
7144 argLen: 3,
7145 resultInArg0: true,
7146 faultOnNilArg1: true,
7147 symEffect: SymRead,
7148 asm: x86.AMULSD,
7149 reg: regInfo{
7150 inputs: []inputInfo{
7151 {0, 2147418112},
7152 {1, 4295032831},
7153 },
7154 outputs: []outputInfo{
7155 {0, 2147418112},
7156 },
7157 },
7158 },
7159 {
7160 name: "DIVSSload",
7161 auxType: auxSymOff,
7162 argLen: 3,
7163 resultInArg0: true,
7164 faultOnNilArg1: true,
7165 symEffect: SymRead,
7166 asm: x86.ADIVSS,
7167 reg: regInfo{
7168 inputs: []inputInfo{
7169 {0, 2147418112},
7170 {1, 4295032831},
7171 },
7172 outputs: []outputInfo{
7173 {0, 2147418112},
7174 },
7175 },
7176 },
7177 {
7178 name: "DIVSDload",
7179 auxType: auxSymOff,
7180 argLen: 3,
7181 resultInArg0: true,
7182 faultOnNilArg1: true,
7183 symEffect: SymRead,
7184 asm: x86.ADIVSD,
7185 reg: regInfo{
7186 inputs: []inputInfo{
7187 {0, 2147418112},
7188 {1, 4295032831},
7189 },
7190 outputs: []outputInfo{
7191 {0, 2147418112},
7192 },
7193 },
7194 },
7195 {
7196 name: "ADDSSloadidx1",
7197 auxType: auxSymOff,
7198 argLen: 4,
7199 resultInArg0: true,
7200 symEffect: SymRead,
7201 asm: x86.AADDSS,
7202 scale: 1,
7203 reg: regInfo{
7204 inputs: []inputInfo{
7205 {0, 2147418112},
7206 {2, 4295016447},
7207 {1, 4295032831},
7208 },
7209 outputs: []outputInfo{
7210 {0, 2147418112},
7211 },
7212 },
7213 },
7214 {
7215 name: "ADDSSloadidx4",
7216 auxType: auxSymOff,
7217 argLen: 4,
7218 resultInArg0: true,
7219 symEffect: SymRead,
7220 asm: x86.AADDSS,
7221 scale: 4,
7222 reg: regInfo{
7223 inputs: []inputInfo{
7224 {0, 2147418112},
7225 {2, 4295016447},
7226 {1, 4295032831},
7227 },
7228 outputs: []outputInfo{
7229 {0, 2147418112},
7230 },
7231 },
7232 },
7233 {
7234 name: "ADDSDloadidx1",
7235 auxType: auxSymOff,
7236 argLen: 4,
7237 resultInArg0: true,
7238 symEffect: SymRead,
7239 asm: x86.AADDSD,
7240 scale: 1,
7241 reg: regInfo{
7242 inputs: []inputInfo{
7243 {0, 2147418112},
7244 {2, 4295016447},
7245 {1, 4295032831},
7246 },
7247 outputs: []outputInfo{
7248 {0, 2147418112},
7249 },
7250 },
7251 },
7252 {
7253 name: "ADDSDloadidx8",
7254 auxType: auxSymOff,
7255 argLen: 4,
7256 resultInArg0: true,
7257 symEffect: SymRead,
7258 asm: x86.AADDSD,
7259 scale: 8,
7260 reg: regInfo{
7261 inputs: []inputInfo{
7262 {0, 2147418112},
7263 {2, 4295016447},
7264 {1, 4295032831},
7265 },
7266 outputs: []outputInfo{
7267 {0, 2147418112},
7268 },
7269 },
7270 },
7271 {
7272 name: "SUBSSloadidx1",
7273 auxType: auxSymOff,
7274 argLen: 4,
7275 resultInArg0: true,
7276 symEffect: SymRead,
7277 asm: x86.ASUBSS,
7278 scale: 1,
7279 reg: regInfo{
7280 inputs: []inputInfo{
7281 {0, 2147418112},
7282 {2, 4295016447},
7283 {1, 4295032831},
7284 },
7285 outputs: []outputInfo{
7286 {0, 2147418112},
7287 },
7288 },
7289 },
7290 {
7291 name: "SUBSSloadidx4",
7292 auxType: auxSymOff,
7293 argLen: 4,
7294 resultInArg0: true,
7295 symEffect: SymRead,
7296 asm: x86.ASUBSS,
7297 scale: 4,
7298 reg: regInfo{
7299 inputs: []inputInfo{
7300 {0, 2147418112},
7301 {2, 4295016447},
7302 {1, 4295032831},
7303 },
7304 outputs: []outputInfo{
7305 {0, 2147418112},
7306 },
7307 },
7308 },
7309 {
7310 name: "SUBSDloadidx1",
7311 auxType: auxSymOff,
7312 argLen: 4,
7313 resultInArg0: true,
7314 symEffect: SymRead,
7315 asm: x86.ASUBSD,
7316 scale: 1,
7317 reg: regInfo{
7318 inputs: []inputInfo{
7319 {0, 2147418112},
7320 {2, 4295016447},
7321 {1, 4295032831},
7322 },
7323 outputs: []outputInfo{
7324 {0, 2147418112},
7325 },
7326 },
7327 },
7328 {
7329 name: "SUBSDloadidx8",
7330 auxType: auxSymOff,
7331 argLen: 4,
7332 resultInArg0: true,
7333 symEffect: SymRead,
7334 asm: x86.ASUBSD,
7335 scale: 8,
7336 reg: regInfo{
7337 inputs: []inputInfo{
7338 {0, 2147418112},
7339 {2, 4295016447},
7340 {1, 4295032831},
7341 },
7342 outputs: []outputInfo{
7343 {0, 2147418112},
7344 },
7345 },
7346 },
7347 {
7348 name: "MULSSloadidx1",
7349 auxType: auxSymOff,
7350 argLen: 4,
7351 resultInArg0: true,
7352 symEffect: SymRead,
7353 asm: x86.AMULSS,
7354 scale: 1,
7355 reg: regInfo{
7356 inputs: []inputInfo{
7357 {0, 2147418112},
7358 {2, 4295016447},
7359 {1, 4295032831},
7360 },
7361 outputs: []outputInfo{
7362 {0, 2147418112},
7363 },
7364 },
7365 },
7366 {
7367 name: "MULSSloadidx4",
7368 auxType: auxSymOff,
7369 argLen: 4,
7370 resultInArg0: true,
7371 symEffect: SymRead,
7372 asm: x86.AMULSS,
7373 scale: 4,
7374 reg: regInfo{
7375 inputs: []inputInfo{
7376 {0, 2147418112},
7377 {2, 4295016447},
7378 {1, 4295032831},
7379 },
7380 outputs: []outputInfo{
7381 {0, 2147418112},
7382 },
7383 },
7384 },
7385 {
7386 name: "MULSDloadidx1",
7387 auxType: auxSymOff,
7388 argLen: 4,
7389 resultInArg0: true,
7390 symEffect: SymRead,
7391 asm: x86.AMULSD,
7392 scale: 1,
7393 reg: regInfo{
7394 inputs: []inputInfo{
7395 {0, 2147418112},
7396 {2, 4295016447},
7397 {1, 4295032831},
7398 },
7399 outputs: []outputInfo{
7400 {0, 2147418112},
7401 },
7402 },
7403 },
7404 {
7405 name: "MULSDloadidx8",
7406 auxType: auxSymOff,
7407 argLen: 4,
7408 resultInArg0: true,
7409 symEffect: SymRead,
7410 asm: x86.AMULSD,
7411 scale: 8,
7412 reg: regInfo{
7413 inputs: []inputInfo{
7414 {0, 2147418112},
7415 {2, 4295016447},
7416 {1, 4295032831},
7417 },
7418 outputs: []outputInfo{
7419 {0, 2147418112},
7420 },
7421 },
7422 },
7423 {
7424 name: "DIVSSloadidx1",
7425 auxType: auxSymOff,
7426 argLen: 4,
7427 resultInArg0: true,
7428 symEffect: SymRead,
7429 asm: x86.ADIVSS,
7430 scale: 1,
7431 reg: regInfo{
7432 inputs: []inputInfo{
7433 {0, 2147418112},
7434 {2, 4295016447},
7435 {1, 4295032831},
7436 },
7437 outputs: []outputInfo{
7438 {0, 2147418112},
7439 },
7440 },
7441 },
7442 {
7443 name: "DIVSSloadidx4",
7444 auxType: auxSymOff,
7445 argLen: 4,
7446 resultInArg0: true,
7447 symEffect: SymRead,
7448 asm: x86.ADIVSS,
7449 scale: 4,
7450 reg: regInfo{
7451 inputs: []inputInfo{
7452 {0, 2147418112},
7453 {2, 4295016447},
7454 {1, 4295032831},
7455 },
7456 outputs: []outputInfo{
7457 {0, 2147418112},
7458 },
7459 },
7460 },
7461 {
7462 name: "DIVSDloadidx1",
7463 auxType: auxSymOff,
7464 argLen: 4,
7465 resultInArg0: true,
7466 symEffect: SymRead,
7467 asm: x86.ADIVSD,
7468 scale: 1,
7469 reg: regInfo{
7470 inputs: []inputInfo{
7471 {0, 2147418112},
7472 {2, 4295016447},
7473 {1, 4295032831},
7474 },
7475 outputs: []outputInfo{
7476 {0, 2147418112},
7477 },
7478 },
7479 },
7480 {
7481 name: "DIVSDloadidx8",
7482 auxType: auxSymOff,
7483 argLen: 4,
7484 resultInArg0: true,
7485 symEffect: SymRead,
7486 asm: x86.ADIVSD,
7487 scale: 8,
7488 reg: regInfo{
7489 inputs: []inputInfo{
7490 {0, 2147418112},
7491 {2, 4295016447},
7492 {1, 4295032831},
7493 },
7494 outputs: []outputInfo{
7495 {0, 2147418112},
7496 },
7497 },
7498 },
7499 {
7500 name: "ADDQ",
7501 argLen: 2,
7502 commutative: true,
7503 clobberFlags: true,
7504 asm: x86.AADDQ,
7505 reg: regInfo{
7506 inputs: []inputInfo{
7507 {1, 49135},
7508 {0, 49151},
7509 },
7510 outputs: []outputInfo{
7511 {0, 49135},
7512 },
7513 },
7514 },
7515 {
7516 name: "ADDL",
7517 argLen: 2,
7518 commutative: true,
7519 clobberFlags: true,
7520 asm: x86.AADDL,
7521 reg: regInfo{
7522 inputs: []inputInfo{
7523 {1, 49135},
7524 {0, 49151},
7525 },
7526 outputs: []outputInfo{
7527 {0, 49135},
7528 },
7529 },
7530 },
7531 {
7532 name: "ADDQconst",
7533 auxType: auxInt32,
7534 argLen: 1,
7535 clobberFlags: true,
7536 asm: x86.AADDQ,
7537 reg: regInfo{
7538 inputs: []inputInfo{
7539 {0, 49151},
7540 },
7541 outputs: []outputInfo{
7542 {0, 49135},
7543 },
7544 },
7545 },
7546 {
7547 name: "ADDLconst",
7548 auxType: auxInt32,
7549 argLen: 1,
7550 clobberFlags: true,
7551 asm: x86.AADDL,
7552 reg: regInfo{
7553 inputs: []inputInfo{
7554 {0, 49151},
7555 },
7556 outputs: []outputInfo{
7557 {0, 49135},
7558 },
7559 },
7560 },
7561 {
7562 name: "ADDQconstmodify",
7563 auxType: auxSymValAndOff,
7564 argLen: 2,
7565 clobberFlags: true,
7566 faultOnNilArg0: true,
7567 symEffect: SymRead | SymWrite,
7568 asm: x86.AADDQ,
7569 reg: regInfo{
7570 inputs: []inputInfo{
7571 {0, 4295032831},
7572 },
7573 },
7574 },
7575 {
7576 name: "ADDLconstmodify",
7577 auxType: auxSymValAndOff,
7578 argLen: 2,
7579 clobberFlags: true,
7580 faultOnNilArg0: true,
7581 symEffect: SymRead | SymWrite,
7582 asm: x86.AADDL,
7583 reg: regInfo{
7584 inputs: []inputInfo{
7585 {0, 4295032831},
7586 },
7587 },
7588 },
7589 {
7590 name: "SUBQ",
7591 argLen: 2,
7592 resultInArg0: true,
7593 clobberFlags: true,
7594 asm: x86.ASUBQ,
7595 reg: regInfo{
7596 inputs: []inputInfo{
7597 {0, 49135},
7598 {1, 49135},
7599 },
7600 outputs: []outputInfo{
7601 {0, 49135},
7602 },
7603 },
7604 },
7605 {
7606 name: "SUBL",
7607 argLen: 2,
7608 resultInArg0: true,
7609 clobberFlags: true,
7610 asm: x86.ASUBL,
7611 reg: regInfo{
7612 inputs: []inputInfo{
7613 {0, 49135},
7614 {1, 49135},
7615 },
7616 outputs: []outputInfo{
7617 {0, 49135},
7618 },
7619 },
7620 },
7621 {
7622 name: "SUBQconst",
7623 auxType: auxInt32,
7624 argLen: 1,
7625 resultInArg0: true,
7626 clobberFlags: true,
7627 asm: x86.ASUBQ,
7628 reg: regInfo{
7629 inputs: []inputInfo{
7630 {0, 49135},
7631 },
7632 outputs: []outputInfo{
7633 {0, 49135},
7634 },
7635 },
7636 },
7637 {
7638 name: "SUBLconst",
7639 auxType: auxInt32,
7640 argLen: 1,
7641 resultInArg0: true,
7642 clobberFlags: true,
7643 asm: x86.ASUBL,
7644 reg: regInfo{
7645 inputs: []inputInfo{
7646 {0, 49135},
7647 },
7648 outputs: []outputInfo{
7649 {0, 49135},
7650 },
7651 },
7652 },
7653 {
7654 name: "MULQ",
7655 argLen: 2,
7656 commutative: true,
7657 resultInArg0: true,
7658 clobberFlags: true,
7659 asm: x86.AIMULQ,
7660 reg: regInfo{
7661 inputs: []inputInfo{
7662 {0, 49135},
7663 {1, 49135},
7664 },
7665 outputs: []outputInfo{
7666 {0, 49135},
7667 },
7668 },
7669 },
7670 {
7671 name: "MULL",
7672 argLen: 2,
7673 commutative: true,
7674 resultInArg0: true,
7675 clobberFlags: true,
7676 asm: x86.AIMULL,
7677 reg: regInfo{
7678 inputs: []inputInfo{
7679 {0, 49135},
7680 {1, 49135},
7681 },
7682 outputs: []outputInfo{
7683 {0, 49135},
7684 },
7685 },
7686 },
7687 {
7688 name: "MULQconst",
7689 auxType: auxInt32,
7690 argLen: 1,
7691 clobberFlags: true,
7692 asm: x86.AIMUL3Q,
7693 reg: regInfo{
7694 inputs: []inputInfo{
7695 {0, 49135},
7696 },
7697 outputs: []outputInfo{
7698 {0, 49135},
7699 },
7700 },
7701 },
7702 {
7703 name: "MULLconst",
7704 auxType: auxInt32,
7705 argLen: 1,
7706 clobberFlags: true,
7707 asm: x86.AIMUL3L,
7708 reg: regInfo{
7709 inputs: []inputInfo{
7710 {0, 49135},
7711 },
7712 outputs: []outputInfo{
7713 {0, 49135},
7714 },
7715 },
7716 },
7717 {
7718 name: "MULLU",
7719 argLen: 2,
7720 commutative: true,
7721 clobberFlags: true,
7722 asm: x86.AMULL,
7723 reg: regInfo{
7724 inputs: []inputInfo{
7725 {0, 1},
7726 {1, 49151},
7727 },
7728 clobbers: 4,
7729 outputs: []outputInfo{
7730 {1, 0},
7731 {0, 1},
7732 },
7733 },
7734 },
7735 {
7736 name: "MULQU",
7737 argLen: 2,
7738 commutative: true,
7739 clobberFlags: true,
7740 asm: x86.AMULQ,
7741 reg: regInfo{
7742 inputs: []inputInfo{
7743 {0, 1},
7744 {1, 49151},
7745 },
7746 clobbers: 4,
7747 outputs: []outputInfo{
7748 {1, 0},
7749 {0, 1},
7750 },
7751 },
7752 },
7753 {
7754 name: "HMULQ",
7755 argLen: 2,
7756 clobberFlags: true,
7757 asm: x86.AIMULQ,
7758 reg: regInfo{
7759 inputs: []inputInfo{
7760 {0, 1},
7761 {1, 49151},
7762 },
7763 clobbers: 1,
7764 outputs: []outputInfo{
7765 {0, 4},
7766 },
7767 },
7768 },
7769 {
7770 name: "HMULL",
7771 argLen: 2,
7772 clobberFlags: true,
7773 asm: x86.AIMULL,
7774 reg: regInfo{
7775 inputs: []inputInfo{
7776 {0, 1},
7777 {1, 49151},
7778 },
7779 clobbers: 1,
7780 outputs: []outputInfo{
7781 {0, 4},
7782 },
7783 },
7784 },
7785 {
7786 name: "HMULQU",
7787 argLen: 2,
7788 clobberFlags: true,
7789 asm: x86.AMULQ,
7790 reg: regInfo{
7791 inputs: []inputInfo{
7792 {0, 1},
7793 {1, 49151},
7794 },
7795 clobbers: 1,
7796 outputs: []outputInfo{
7797 {0, 4},
7798 },
7799 },
7800 },
7801 {
7802 name: "HMULLU",
7803 argLen: 2,
7804 clobberFlags: true,
7805 asm: x86.AMULL,
7806 reg: regInfo{
7807 inputs: []inputInfo{
7808 {0, 1},
7809 {1, 49151},
7810 },
7811 clobbers: 1,
7812 outputs: []outputInfo{
7813 {0, 4},
7814 },
7815 },
7816 },
7817 {
7818 name: "AVGQU",
7819 argLen: 2,
7820 commutative: true,
7821 resultInArg0: true,
7822 clobberFlags: true,
7823 reg: regInfo{
7824 inputs: []inputInfo{
7825 {0, 49135},
7826 {1, 49135},
7827 },
7828 outputs: []outputInfo{
7829 {0, 49135},
7830 },
7831 },
7832 },
7833 {
7834 name: "DIVQ",
7835 auxType: auxBool,
7836 argLen: 2,
7837 clobberFlags: true,
7838 asm: x86.AIDIVQ,
7839 reg: regInfo{
7840 inputs: []inputInfo{
7841 {0, 1},
7842 {1, 49147},
7843 },
7844 outputs: []outputInfo{
7845 {0, 1},
7846 {1, 4},
7847 },
7848 },
7849 },
7850 {
7851 name: "DIVL",
7852 auxType: auxBool,
7853 argLen: 2,
7854 clobberFlags: true,
7855 asm: x86.AIDIVL,
7856 reg: regInfo{
7857 inputs: []inputInfo{
7858 {0, 1},
7859 {1, 49147},
7860 },
7861 outputs: []outputInfo{
7862 {0, 1},
7863 {1, 4},
7864 },
7865 },
7866 },
7867 {
7868 name: "DIVW",
7869 auxType: auxBool,
7870 argLen: 2,
7871 clobberFlags: true,
7872 asm: x86.AIDIVW,
7873 reg: regInfo{
7874 inputs: []inputInfo{
7875 {0, 1},
7876 {1, 49147},
7877 },
7878 outputs: []outputInfo{
7879 {0, 1},
7880 {1, 4},
7881 },
7882 },
7883 },
7884 {
7885 name: "DIVQU",
7886 argLen: 2,
7887 clobberFlags: true,
7888 asm: x86.ADIVQ,
7889 reg: regInfo{
7890 inputs: []inputInfo{
7891 {0, 1},
7892 {1, 49147},
7893 },
7894 outputs: []outputInfo{
7895 {0, 1},
7896 {1, 4},
7897 },
7898 },
7899 },
7900 {
7901 name: "DIVLU",
7902 argLen: 2,
7903 clobberFlags: true,
7904 asm: x86.ADIVL,
7905 reg: regInfo{
7906 inputs: []inputInfo{
7907 {0, 1},
7908 {1, 49147},
7909 },
7910 outputs: []outputInfo{
7911 {0, 1},
7912 {1, 4},
7913 },
7914 },
7915 },
7916 {
7917 name: "DIVWU",
7918 argLen: 2,
7919 clobberFlags: true,
7920 asm: x86.ADIVW,
7921 reg: regInfo{
7922 inputs: []inputInfo{
7923 {0, 1},
7924 {1, 49147},
7925 },
7926 outputs: []outputInfo{
7927 {0, 1},
7928 {1, 4},
7929 },
7930 },
7931 },
7932 {
7933 name: "NEGLflags",
7934 argLen: 1,
7935 resultInArg0: true,
7936 asm: x86.ANEGL,
7937 reg: regInfo{
7938 inputs: []inputInfo{
7939 {0, 49135},
7940 },
7941 outputs: []outputInfo{
7942 {1, 0},
7943 {0, 49135},
7944 },
7945 },
7946 },
7947 {
7948 name: "ADDQcarry",
7949 argLen: 2,
7950 commutative: true,
7951 resultInArg0: true,
7952 asm: x86.AADDQ,
7953 reg: regInfo{
7954 inputs: []inputInfo{
7955 {0, 49135},
7956 {1, 49135},
7957 },
7958 outputs: []outputInfo{
7959 {1, 0},
7960 {0, 49135},
7961 },
7962 },
7963 },
7964 {
7965 name: "ADCQ",
7966 argLen: 3,
7967 commutative: true,
7968 resultInArg0: true,
7969 asm: x86.AADCQ,
7970 reg: regInfo{
7971 inputs: []inputInfo{
7972 {0, 49135},
7973 {1, 49135},
7974 },
7975 outputs: []outputInfo{
7976 {1, 0},
7977 {0, 49135},
7978 },
7979 },
7980 },
7981 {
7982 name: "ADDQconstcarry",
7983 auxType: auxInt32,
7984 argLen: 1,
7985 resultInArg0: true,
7986 asm: x86.AADDQ,
7987 reg: regInfo{
7988 inputs: []inputInfo{
7989 {0, 49135},
7990 },
7991 outputs: []outputInfo{
7992 {1, 0},
7993 {0, 49135},
7994 },
7995 },
7996 },
7997 {
7998 name: "ADCQconst",
7999 auxType: auxInt32,
8000 argLen: 2,
8001 resultInArg0: true,
8002 asm: x86.AADCQ,
8003 reg: regInfo{
8004 inputs: []inputInfo{
8005 {0, 49135},
8006 },
8007 outputs: []outputInfo{
8008 {1, 0},
8009 {0, 49135},
8010 },
8011 },
8012 },
8013 {
8014 name: "SUBQborrow",
8015 argLen: 2,
8016 resultInArg0: true,
8017 asm: x86.ASUBQ,
8018 reg: regInfo{
8019 inputs: []inputInfo{
8020 {0, 49135},
8021 {1, 49135},
8022 },
8023 outputs: []outputInfo{
8024 {1, 0},
8025 {0, 49135},
8026 },
8027 },
8028 },
8029 {
8030 name: "SBBQ",
8031 argLen: 3,
8032 resultInArg0: true,
8033 asm: x86.ASBBQ,
8034 reg: regInfo{
8035 inputs: []inputInfo{
8036 {0, 49135},
8037 {1, 49135},
8038 },
8039 outputs: []outputInfo{
8040 {1, 0},
8041 {0, 49135},
8042 },
8043 },
8044 },
8045 {
8046 name: "SUBQconstborrow",
8047 auxType: auxInt32,
8048 argLen: 1,
8049 resultInArg0: true,
8050 asm: x86.ASUBQ,
8051 reg: regInfo{
8052 inputs: []inputInfo{
8053 {0, 49135},
8054 },
8055 outputs: []outputInfo{
8056 {1, 0},
8057 {0, 49135},
8058 },
8059 },
8060 },
8061 {
8062 name: "SBBQconst",
8063 auxType: auxInt32,
8064 argLen: 2,
8065 resultInArg0: true,
8066 asm: x86.ASBBQ,
8067 reg: regInfo{
8068 inputs: []inputInfo{
8069 {0, 49135},
8070 },
8071 outputs: []outputInfo{
8072 {1, 0},
8073 {0, 49135},
8074 },
8075 },
8076 },
8077 {
8078 name: "MULQU2",
8079 argLen: 2,
8080 commutative: true,
8081 clobberFlags: true,
8082 asm: x86.AMULQ,
8083 reg: regInfo{
8084 inputs: []inputInfo{
8085 {0, 1},
8086 {1, 49151},
8087 },
8088 outputs: []outputInfo{
8089 {0, 4},
8090 {1, 1},
8091 },
8092 },
8093 },
8094 {
8095 name: "DIVQU2",
8096 argLen: 3,
8097 clobberFlags: true,
8098 asm: x86.ADIVQ,
8099 reg: regInfo{
8100 inputs: []inputInfo{
8101 {0, 4},
8102 {1, 1},
8103 {2, 49151},
8104 },
8105 outputs: []outputInfo{
8106 {0, 1},
8107 {1, 4},
8108 },
8109 },
8110 },
8111 {
8112 name: "ANDQ",
8113 argLen: 2,
8114 commutative: true,
8115 resultInArg0: true,
8116 clobberFlags: true,
8117 asm: x86.AANDQ,
8118 reg: regInfo{
8119 inputs: []inputInfo{
8120 {0, 49135},
8121 {1, 49135},
8122 },
8123 outputs: []outputInfo{
8124 {0, 49135},
8125 },
8126 },
8127 },
8128 {
8129 name: "ANDL",
8130 argLen: 2,
8131 commutative: true,
8132 resultInArg0: true,
8133 clobberFlags: true,
8134 asm: x86.AANDL,
8135 reg: regInfo{
8136 inputs: []inputInfo{
8137 {0, 49135},
8138 {1, 49135},
8139 },
8140 outputs: []outputInfo{
8141 {0, 49135},
8142 },
8143 },
8144 },
8145 {
8146 name: "ANDQconst",
8147 auxType: auxInt32,
8148 argLen: 1,
8149 resultInArg0: true,
8150 clobberFlags: true,
8151 asm: x86.AANDQ,
8152 reg: regInfo{
8153 inputs: []inputInfo{
8154 {0, 49135},
8155 },
8156 outputs: []outputInfo{
8157 {0, 49135},
8158 },
8159 },
8160 },
8161 {
8162 name: "ANDLconst",
8163 auxType: auxInt32,
8164 argLen: 1,
8165 resultInArg0: true,
8166 clobberFlags: true,
8167 asm: x86.AANDL,
8168 reg: regInfo{
8169 inputs: []inputInfo{
8170 {0, 49135},
8171 },
8172 outputs: []outputInfo{
8173 {0, 49135},
8174 },
8175 },
8176 },
8177 {
8178 name: "ANDQconstmodify",
8179 auxType: auxSymValAndOff,
8180 argLen: 2,
8181 clobberFlags: true,
8182 faultOnNilArg0: true,
8183 symEffect: SymRead | SymWrite,
8184 asm: x86.AANDQ,
8185 reg: regInfo{
8186 inputs: []inputInfo{
8187 {0, 4295032831},
8188 },
8189 },
8190 },
8191 {
8192 name: "ANDLconstmodify",
8193 auxType: auxSymValAndOff,
8194 argLen: 2,
8195 clobberFlags: true,
8196 faultOnNilArg0: true,
8197 symEffect: SymRead | SymWrite,
8198 asm: x86.AANDL,
8199 reg: regInfo{
8200 inputs: []inputInfo{
8201 {0, 4295032831},
8202 },
8203 },
8204 },
8205 {
8206 name: "ORQ",
8207 argLen: 2,
8208 commutative: true,
8209 resultInArg0: true,
8210 clobberFlags: true,
8211 asm: x86.AORQ,
8212 reg: regInfo{
8213 inputs: []inputInfo{
8214 {0, 49135},
8215 {1, 49135},
8216 },
8217 outputs: []outputInfo{
8218 {0, 49135},
8219 },
8220 },
8221 },
8222 {
8223 name: "ORL",
8224 argLen: 2,
8225 commutative: true,
8226 resultInArg0: true,
8227 clobberFlags: true,
8228 asm: x86.AORL,
8229 reg: regInfo{
8230 inputs: []inputInfo{
8231 {0, 49135},
8232 {1, 49135},
8233 },
8234 outputs: []outputInfo{
8235 {0, 49135},
8236 },
8237 },
8238 },
8239 {
8240 name: "ORQconst",
8241 auxType: auxInt32,
8242 argLen: 1,
8243 resultInArg0: true,
8244 clobberFlags: true,
8245 asm: x86.AORQ,
8246 reg: regInfo{
8247 inputs: []inputInfo{
8248 {0, 49135},
8249 },
8250 outputs: []outputInfo{
8251 {0, 49135},
8252 },
8253 },
8254 },
8255 {
8256 name: "ORLconst",
8257 auxType: auxInt32,
8258 argLen: 1,
8259 resultInArg0: true,
8260 clobberFlags: true,
8261 asm: x86.AORL,
8262 reg: regInfo{
8263 inputs: []inputInfo{
8264 {0, 49135},
8265 },
8266 outputs: []outputInfo{
8267 {0, 49135},
8268 },
8269 },
8270 },
8271 {
8272 name: "ORQconstmodify",
8273 auxType: auxSymValAndOff,
8274 argLen: 2,
8275 clobberFlags: true,
8276 faultOnNilArg0: true,
8277 symEffect: SymRead | SymWrite,
8278 asm: x86.AORQ,
8279 reg: regInfo{
8280 inputs: []inputInfo{
8281 {0, 4295032831},
8282 },
8283 },
8284 },
8285 {
8286 name: "ORLconstmodify",
8287 auxType: auxSymValAndOff,
8288 argLen: 2,
8289 clobberFlags: true,
8290 faultOnNilArg0: true,
8291 symEffect: SymRead | SymWrite,
8292 asm: x86.AORL,
8293 reg: regInfo{
8294 inputs: []inputInfo{
8295 {0, 4295032831},
8296 },
8297 },
8298 },
8299 {
8300 name: "XORQ",
8301 argLen: 2,
8302 commutative: true,
8303 resultInArg0: true,
8304 clobberFlags: true,
8305 asm: x86.AXORQ,
8306 reg: regInfo{
8307 inputs: []inputInfo{
8308 {0, 49135},
8309 {1, 49135},
8310 },
8311 outputs: []outputInfo{
8312 {0, 49135},
8313 },
8314 },
8315 },
8316 {
8317 name: "XORL",
8318 argLen: 2,
8319 commutative: true,
8320 resultInArg0: true,
8321 clobberFlags: true,
8322 asm: x86.AXORL,
8323 reg: regInfo{
8324 inputs: []inputInfo{
8325 {0, 49135},
8326 {1, 49135},
8327 },
8328 outputs: []outputInfo{
8329 {0, 49135},
8330 },
8331 },
8332 },
8333 {
8334 name: "XORQconst",
8335 auxType: auxInt32,
8336 argLen: 1,
8337 resultInArg0: true,
8338 clobberFlags: true,
8339 asm: x86.AXORQ,
8340 reg: regInfo{
8341 inputs: []inputInfo{
8342 {0, 49135},
8343 },
8344 outputs: []outputInfo{
8345 {0, 49135},
8346 },
8347 },
8348 },
8349 {
8350 name: "XORLconst",
8351 auxType: auxInt32,
8352 argLen: 1,
8353 resultInArg0: true,
8354 clobberFlags: true,
8355 asm: x86.AXORL,
8356 reg: regInfo{
8357 inputs: []inputInfo{
8358 {0, 49135},
8359 },
8360 outputs: []outputInfo{
8361 {0, 49135},
8362 },
8363 },
8364 },
8365 {
8366 name: "XORQconstmodify",
8367 auxType: auxSymValAndOff,
8368 argLen: 2,
8369 clobberFlags: true,
8370 faultOnNilArg0: true,
8371 symEffect: SymRead | SymWrite,
8372 asm: x86.AXORQ,
8373 reg: regInfo{
8374 inputs: []inputInfo{
8375 {0, 4295032831},
8376 },
8377 },
8378 },
8379 {
8380 name: "XORLconstmodify",
8381 auxType: auxSymValAndOff,
8382 argLen: 2,
8383 clobberFlags: true,
8384 faultOnNilArg0: true,
8385 symEffect: SymRead | SymWrite,
8386 asm: x86.AXORL,
8387 reg: regInfo{
8388 inputs: []inputInfo{
8389 {0, 4295032831},
8390 },
8391 },
8392 },
8393 {
8394 name: "CMPQ",
8395 argLen: 2,
8396 asm: x86.ACMPQ,
8397 reg: regInfo{
8398 inputs: []inputInfo{
8399 {0, 49151},
8400 {1, 49151},
8401 },
8402 },
8403 },
8404 {
8405 name: "CMPL",
8406 argLen: 2,
8407 asm: x86.ACMPL,
8408 reg: regInfo{
8409 inputs: []inputInfo{
8410 {0, 49151},
8411 {1, 49151},
8412 },
8413 },
8414 },
8415 {
8416 name: "CMPW",
8417 argLen: 2,
8418 asm: x86.ACMPW,
8419 reg: regInfo{
8420 inputs: []inputInfo{
8421 {0, 49151},
8422 {1, 49151},
8423 },
8424 },
8425 },
8426 {
8427 name: "CMPB",
8428 argLen: 2,
8429 asm: x86.ACMPB,
8430 reg: regInfo{
8431 inputs: []inputInfo{
8432 {0, 49151},
8433 {1, 49151},
8434 },
8435 },
8436 },
8437 {
8438 name: "CMPQconst",
8439 auxType: auxInt32,
8440 argLen: 1,
8441 asm: x86.ACMPQ,
8442 reg: regInfo{
8443 inputs: []inputInfo{
8444 {0, 49151},
8445 },
8446 },
8447 },
8448 {
8449 name: "CMPLconst",
8450 auxType: auxInt32,
8451 argLen: 1,
8452 asm: x86.ACMPL,
8453 reg: regInfo{
8454 inputs: []inputInfo{
8455 {0, 49151},
8456 },
8457 },
8458 },
8459 {
8460 name: "CMPWconst",
8461 auxType: auxInt16,
8462 argLen: 1,
8463 asm: x86.ACMPW,
8464 reg: regInfo{
8465 inputs: []inputInfo{
8466 {0, 49151},
8467 },
8468 },
8469 },
8470 {
8471 name: "CMPBconst",
8472 auxType: auxInt8,
8473 argLen: 1,
8474 asm: x86.ACMPB,
8475 reg: regInfo{
8476 inputs: []inputInfo{
8477 {0, 49151},
8478 },
8479 },
8480 },
8481 {
8482 name: "CMPQload",
8483 auxType: auxSymOff,
8484 argLen: 3,
8485 faultOnNilArg0: true,
8486 symEffect: SymRead,
8487 asm: x86.ACMPQ,
8488 reg: regInfo{
8489 inputs: []inputInfo{
8490 {1, 49151},
8491 {0, 4295032831},
8492 },
8493 },
8494 },
8495 {
8496 name: "CMPLload",
8497 auxType: auxSymOff,
8498 argLen: 3,
8499 faultOnNilArg0: true,
8500 symEffect: SymRead,
8501 asm: x86.ACMPL,
8502 reg: regInfo{
8503 inputs: []inputInfo{
8504 {1, 49151},
8505 {0, 4295032831},
8506 },
8507 },
8508 },
8509 {
8510 name: "CMPWload",
8511 auxType: auxSymOff,
8512 argLen: 3,
8513 faultOnNilArg0: true,
8514 symEffect: SymRead,
8515 asm: x86.ACMPW,
8516 reg: regInfo{
8517 inputs: []inputInfo{
8518 {1, 49151},
8519 {0, 4295032831},
8520 },
8521 },
8522 },
8523 {
8524 name: "CMPBload",
8525 auxType: auxSymOff,
8526 argLen: 3,
8527 faultOnNilArg0: true,
8528 symEffect: SymRead,
8529 asm: x86.ACMPB,
8530 reg: regInfo{
8531 inputs: []inputInfo{
8532 {1, 49151},
8533 {0, 4295032831},
8534 },
8535 },
8536 },
8537 {
8538 name: "CMPQconstload",
8539 auxType: auxSymValAndOff,
8540 argLen: 2,
8541 faultOnNilArg0: true,
8542 symEffect: SymRead,
8543 asm: x86.ACMPQ,
8544 reg: regInfo{
8545 inputs: []inputInfo{
8546 {0, 4295032831},
8547 },
8548 },
8549 },
8550 {
8551 name: "CMPLconstload",
8552 auxType: auxSymValAndOff,
8553 argLen: 2,
8554 faultOnNilArg0: true,
8555 symEffect: SymRead,
8556 asm: x86.ACMPL,
8557 reg: regInfo{
8558 inputs: []inputInfo{
8559 {0, 4295032831},
8560 },
8561 },
8562 },
8563 {
8564 name: "CMPWconstload",
8565 auxType: auxSymValAndOff,
8566 argLen: 2,
8567 faultOnNilArg0: true,
8568 symEffect: SymRead,
8569 asm: x86.ACMPW,
8570 reg: regInfo{
8571 inputs: []inputInfo{
8572 {0, 4295032831},
8573 },
8574 },
8575 },
8576 {
8577 name: "CMPBconstload",
8578 auxType: auxSymValAndOff,
8579 argLen: 2,
8580 faultOnNilArg0: true,
8581 symEffect: SymRead,
8582 asm: x86.ACMPB,
8583 reg: regInfo{
8584 inputs: []inputInfo{
8585 {0, 4295032831},
8586 },
8587 },
8588 },
8589 {
8590 name: "CMPQloadidx8",
8591 auxType: auxSymOff,
8592 argLen: 4,
8593 symEffect: SymRead,
8594 asm: x86.ACMPQ,
8595 scale: 8,
8596 reg: regInfo{
8597 inputs: []inputInfo{
8598 {1, 49151},
8599 {2, 49151},
8600 {0, 4295032831},
8601 },
8602 },
8603 },
8604 {
8605 name: "CMPQloadidx1",
8606 auxType: auxSymOff,
8607 argLen: 4,
8608 commutative: true,
8609 symEffect: SymRead,
8610 asm: x86.ACMPQ,
8611 scale: 1,
8612 reg: regInfo{
8613 inputs: []inputInfo{
8614 {1, 49151},
8615 {2, 49151},
8616 {0, 4295032831},
8617 },
8618 },
8619 },
8620 {
8621 name: "CMPLloadidx4",
8622 auxType: auxSymOff,
8623 argLen: 4,
8624 symEffect: SymRead,
8625 asm: x86.ACMPL,
8626 scale: 4,
8627 reg: regInfo{
8628 inputs: []inputInfo{
8629 {1, 49151},
8630 {2, 49151},
8631 {0, 4295032831},
8632 },
8633 },
8634 },
8635 {
8636 name: "CMPLloadidx1",
8637 auxType: auxSymOff,
8638 argLen: 4,
8639 commutative: true,
8640 symEffect: SymRead,
8641 asm: x86.ACMPL,
8642 scale: 1,
8643 reg: regInfo{
8644 inputs: []inputInfo{
8645 {1, 49151},
8646 {2, 49151},
8647 {0, 4295032831},
8648 },
8649 },
8650 },
8651 {
8652 name: "CMPWloadidx2",
8653 auxType: auxSymOff,
8654 argLen: 4,
8655 symEffect: SymRead,
8656 asm: x86.ACMPW,
8657 scale: 2,
8658 reg: regInfo{
8659 inputs: []inputInfo{
8660 {1, 49151},
8661 {2, 49151},
8662 {0, 4295032831},
8663 },
8664 },
8665 },
8666 {
8667 name: "CMPWloadidx1",
8668 auxType: auxSymOff,
8669 argLen: 4,
8670 commutative: true,
8671 symEffect: SymRead,
8672 asm: x86.ACMPW,
8673 scale: 1,
8674 reg: regInfo{
8675 inputs: []inputInfo{
8676 {1, 49151},
8677 {2, 49151},
8678 {0, 4295032831},
8679 },
8680 },
8681 },
8682 {
8683 name: "CMPBloadidx1",
8684 auxType: auxSymOff,
8685 argLen: 4,
8686 commutative: true,
8687 symEffect: SymRead,
8688 asm: x86.ACMPB,
8689 scale: 1,
8690 reg: regInfo{
8691 inputs: []inputInfo{
8692 {1, 49151},
8693 {2, 49151},
8694 {0, 4295032831},
8695 },
8696 },
8697 },
8698 {
8699 name: "CMPQconstloadidx8",
8700 auxType: auxSymValAndOff,
8701 argLen: 3,
8702 symEffect: SymRead,
8703 asm: x86.ACMPQ,
8704 scale: 8,
8705 reg: regInfo{
8706 inputs: []inputInfo{
8707 {1, 49151},
8708 {0, 4295032831},
8709 },
8710 },
8711 },
8712 {
8713 name: "CMPQconstloadidx1",
8714 auxType: auxSymValAndOff,
8715 argLen: 3,
8716 commutative: true,
8717 symEffect: SymRead,
8718 asm: x86.ACMPQ,
8719 scale: 1,
8720 reg: regInfo{
8721 inputs: []inputInfo{
8722 {1, 49151},
8723 {0, 4295032831},
8724 },
8725 },
8726 },
8727 {
8728 name: "CMPLconstloadidx4",
8729 auxType: auxSymValAndOff,
8730 argLen: 3,
8731 symEffect: SymRead,
8732 asm: x86.ACMPL,
8733 scale: 4,
8734 reg: regInfo{
8735 inputs: []inputInfo{
8736 {1, 49151},
8737 {0, 4295032831},
8738 },
8739 },
8740 },
8741 {
8742 name: "CMPLconstloadidx1",
8743 auxType: auxSymValAndOff,
8744 argLen: 3,
8745 commutative: true,
8746 symEffect: SymRead,
8747 asm: x86.ACMPL,
8748 scale: 1,
8749 reg: regInfo{
8750 inputs: []inputInfo{
8751 {1, 49151},
8752 {0, 4295032831},
8753 },
8754 },
8755 },
8756 {
8757 name: "CMPWconstloadidx2",
8758 auxType: auxSymValAndOff,
8759 argLen: 3,
8760 symEffect: SymRead,
8761 asm: x86.ACMPW,
8762 scale: 2,
8763 reg: regInfo{
8764 inputs: []inputInfo{
8765 {1, 49151},
8766 {0, 4295032831},
8767 },
8768 },
8769 },
8770 {
8771 name: "CMPWconstloadidx1",
8772 auxType: auxSymValAndOff,
8773 argLen: 3,
8774 commutative: true,
8775 symEffect: SymRead,
8776 asm: x86.ACMPW,
8777 scale: 1,
8778 reg: regInfo{
8779 inputs: []inputInfo{
8780 {1, 49151},
8781 {0, 4295032831},
8782 },
8783 },
8784 },
8785 {
8786 name: "CMPBconstloadidx1",
8787 auxType: auxSymValAndOff,
8788 argLen: 3,
8789 commutative: true,
8790 symEffect: SymRead,
8791 asm: x86.ACMPB,
8792 scale: 1,
8793 reg: regInfo{
8794 inputs: []inputInfo{
8795 {1, 49151},
8796 {0, 4295032831},
8797 },
8798 },
8799 },
8800 {
8801 name: "UCOMISS",
8802 argLen: 2,
8803 asm: x86.AUCOMISS,
8804 reg: regInfo{
8805 inputs: []inputInfo{
8806 {0, 2147418112},
8807 {1, 2147418112},
8808 },
8809 },
8810 },
8811 {
8812 name: "UCOMISD",
8813 argLen: 2,
8814 asm: x86.AUCOMISD,
8815 reg: regInfo{
8816 inputs: []inputInfo{
8817 {0, 2147418112},
8818 {1, 2147418112},
8819 },
8820 },
8821 },
8822 {
8823 name: "BTL",
8824 argLen: 2,
8825 asm: x86.ABTL,
8826 reg: regInfo{
8827 inputs: []inputInfo{
8828 {0, 49151},
8829 {1, 49151},
8830 },
8831 },
8832 },
8833 {
8834 name: "BTQ",
8835 argLen: 2,
8836 asm: x86.ABTQ,
8837 reg: regInfo{
8838 inputs: []inputInfo{
8839 {0, 49151},
8840 {1, 49151},
8841 },
8842 },
8843 },
8844 {
8845 name: "BTCL",
8846 argLen: 2,
8847 resultInArg0: true,
8848 clobberFlags: true,
8849 asm: x86.ABTCL,
8850 reg: regInfo{
8851 inputs: []inputInfo{
8852 {0, 49135},
8853 {1, 49135},
8854 },
8855 outputs: []outputInfo{
8856 {0, 49135},
8857 },
8858 },
8859 },
8860 {
8861 name: "BTCQ",
8862 argLen: 2,
8863 resultInArg0: true,
8864 clobberFlags: true,
8865 asm: x86.ABTCQ,
8866 reg: regInfo{
8867 inputs: []inputInfo{
8868 {0, 49135},
8869 {1, 49135},
8870 },
8871 outputs: []outputInfo{
8872 {0, 49135},
8873 },
8874 },
8875 },
8876 {
8877 name: "BTRL",
8878 argLen: 2,
8879 resultInArg0: true,
8880 clobberFlags: true,
8881 asm: x86.ABTRL,
8882 reg: regInfo{
8883 inputs: []inputInfo{
8884 {0, 49135},
8885 {1, 49135},
8886 },
8887 outputs: []outputInfo{
8888 {0, 49135},
8889 },
8890 },
8891 },
8892 {
8893 name: "BTRQ",
8894 argLen: 2,
8895 resultInArg0: true,
8896 clobberFlags: true,
8897 asm: x86.ABTRQ,
8898 reg: regInfo{
8899 inputs: []inputInfo{
8900 {0, 49135},
8901 {1, 49135},
8902 },
8903 outputs: []outputInfo{
8904 {0, 49135},
8905 },
8906 },
8907 },
8908 {
8909 name: "BTSL",
8910 argLen: 2,
8911 resultInArg0: true,
8912 clobberFlags: true,
8913 asm: x86.ABTSL,
8914 reg: regInfo{
8915 inputs: []inputInfo{
8916 {0, 49135},
8917 {1, 49135},
8918 },
8919 outputs: []outputInfo{
8920 {0, 49135},
8921 },
8922 },
8923 },
8924 {
8925 name: "BTSQ",
8926 argLen: 2,
8927 resultInArg0: true,
8928 clobberFlags: true,
8929 asm: x86.ABTSQ,
8930 reg: regInfo{
8931 inputs: []inputInfo{
8932 {0, 49135},
8933 {1, 49135},
8934 },
8935 outputs: []outputInfo{
8936 {0, 49135},
8937 },
8938 },
8939 },
8940 {
8941 name: "BTLconst",
8942 auxType: auxInt8,
8943 argLen: 1,
8944 asm: x86.ABTL,
8945 reg: regInfo{
8946 inputs: []inputInfo{
8947 {0, 49151},
8948 },
8949 },
8950 },
8951 {
8952 name: "BTQconst",
8953 auxType: auxInt8,
8954 argLen: 1,
8955 asm: x86.ABTQ,
8956 reg: regInfo{
8957 inputs: []inputInfo{
8958 {0, 49151},
8959 },
8960 },
8961 },
8962 {
8963 name: "BTCQconst",
8964 auxType: auxInt8,
8965 argLen: 1,
8966 resultInArg0: true,
8967 clobberFlags: true,
8968 asm: x86.ABTCQ,
8969 reg: regInfo{
8970 inputs: []inputInfo{
8971 {0, 49135},
8972 },
8973 outputs: []outputInfo{
8974 {0, 49135},
8975 },
8976 },
8977 },
8978 {
8979 name: "BTRQconst",
8980 auxType: auxInt8,
8981 argLen: 1,
8982 resultInArg0: true,
8983 clobberFlags: true,
8984 asm: x86.ABTRQ,
8985 reg: regInfo{
8986 inputs: []inputInfo{
8987 {0, 49135},
8988 },
8989 outputs: []outputInfo{
8990 {0, 49135},
8991 },
8992 },
8993 },
8994 {
8995 name: "BTSQconst",
8996 auxType: auxInt8,
8997 argLen: 1,
8998 resultInArg0: true,
8999 clobberFlags: true,
9000 asm: x86.ABTSQ,
9001 reg: regInfo{
9002 inputs: []inputInfo{
9003 {0, 49135},
9004 },
9005 outputs: []outputInfo{
9006 {0, 49135},
9007 },
9008 },
9009 },
9010 {
9011 name: "BTSQconstmodify",
9012 auxType: auxSymValAndOff,
9013 argLen: 2,
9014 clobberFlags: true,
9015 faultOnNilArg0: true,
9016 symEffect: SymRead | SymWrite,
9017 asm: x86.ABTSQ,
9018 reg: regInfo{
9019 inputs: []inputInfo{
9020 {0, 4295032831},
9021 },
9022 },
9023 },
9024 {
9025 name: "BTRQconstmodify",
9026 auxType: auxSymValAndOff,
9027 argLen: 2,
9028 clobberFlags: true,
9029 faultOnNilArg0: true,
9030 symEffect: SymRead | SymWrite,
9031 asm: x86.ABTRQ,
9032 reg: regInfo{
9033 inputs: []inputInfo{
9034 {0, 4295032831},
9035 },
9036 },
9037 },
9038 {
9039 name: "BTCQconstmodify",
9040 auxType: auxSymValAndOff,
9041 argLen: 2,
9042 clobberFlags: true,
9043 faultOnNilArg0: true,
9044 symEffect: SymRead | SymWrite,
9045 asm: x86.ABTCQ,
9046 reg: regInfo{
9047 inputs: []inputInfo{
9048 {0, 4295032831},
9049 },
9050 },
9051 },
9052 {
9053 name: "TESTQ",
9054 argLen: 2,
9055 commutative: true,
9056 asm: x86.ATESTQ,
9057 reg: regInfo{
9058 inputs: []inputInfo{
9059 {0, 49151},
9060 {1, 49151},
9061 },
9062 },
9063 },
9064 {
9065 name: "TESTL",
9066 argLen: 2,
9067 commutative: true,
9068 asm: x86.ATESTL,
9069 reg: regInfo{
9070 inputs: []inputInfo{
9071 {0, 49151},
9072 {1, 49151},
9073 },
9074 },
9075 },
9076 {
9077 name: "TESTW",
9078 argLen: 2,
9079 commutative: true,
9080 asm: x86.ATESTW,
9081 reg: regInfo{
9082 inputs: []inputInfo{
9083 {0, 49151},
9084 {1, 49151},
9085 },
9086 },
9087 },
9088 {
9089 name: "TESTB",
9090 argLen: 2,
9091 commutative: true,
9092 asm: x86.ATESTB,
9093 reg: regInfo{
9094 inputs: []inputInfo{
9095 {0, 49151},
9096 {1, 49151},
9097 },
9098 },
9099 },
9100 {
9101 name: "TESTQconst",
9102 auxType: auxInt32,
9103 argLen: 1,
9104 asm: x86.ATESTQ,
9105 reg: regInfo{
9106 inputs: []inputInfo{
9107 {0, 49151},
9108 },
9109 },
9110 },
9111 {
9112 name: "TESTLconst",
9113 auxType: auxInt32,
9114 argLen: 1,
9115 asm: x86.ATESTL,
9116 reg: regInfo{
9117 inputs: []inputInfo{
9118 {0, 49151},
9119 },
9120 },
9121 },
9122 {
9123 name: "TESTWconst",
9124 auxType: auxInt16,
9125 argLen: 1,
9126 asm: x86.ATESTW,
9127 reg: regInfo{
9128 inputs: []inputInfo{
9129 {0, 49151},
9130 },
9131 },
9132 },
9133 {
9134 name: "TESTBconst",
9135 auxType: auxInt8,
9136 argLen: 1,
9137 asm: x86.ATESTB,
9138 reg: regInfo{
9139 inputs: []inputInfo{
9140 {0, 49151},
9141 },
9142 },
9143 },
9144 {
9145 name: "SHLQ",
9146 argLen: 2,
9147 resultInArg0: true,
9148 clobberFlags: true,
9149 asm: x86.ASHLQ,
9150 reg: regInfo{
9151 inputs: []inputInfo{
9152 {1, 2},
9153 {0, 49135},
9154 },
9155 outputs: []outputInfo{
9156 {0, 49135},
9157 },
9158 },
9159 },
9160 {
9161 name: "SHLL",
9162 argLen: 2,
9163 resultInArg0: true,
9164 clobberFlags: true,
9165 asm: x86.ASHLL,
9166 reg: regInfo{
9167 inputs: []inputInfo{
9168 {1, 2},
9169 {0, 49135},
9170 },
9171 outputs: []outputInfo{
9172 {0, 49135},
9173 },
9174 },
9175 },
9176 {
9177 name: "SHLQconst",
9178 auxType: auxInt8,
9179 argLen: 1,
9180 resultInArg0: true,
9181 clobberFlags: true,
9182 asm: x86.ASHLQ,
9183 reg: regInfo{
9184 inputs: []inputInfo{
9185 {0, 49135},
9186 },
9187 outputs: []outputInfo{
9188 {0, 49135},
9189 },
9190 },
9191 },
9192 {
9193 name: "SHLLconst",
9194 auxType: auxInt8,
9195 argLen: 1,
9196 resultInArg0: true,
9197 clobberFlags: true,
9198 asm: x86.ASHLL,
9199 reg: regInfo{
9200 inputs: []inputInfo{
9201 {0, 49135},
9202 },
9203 outputs: []outputInfo{
9204 {0, 49135},
9205 },
9206 },
9207 },
9208 {
9209 name: "SHRQ",
9210 argLen: 2,
9211 resultInArg0: true,
9212 clobberFlags: true,
9213 asm: x86.ASHRQ,
9214 reg: regInfo{
9215 inputs: []inputInfo{
9216 {1, 2},
9217 {0, 49135},
9218 },
9219 outputs: []outputInfo{
9220 {0, 49135},
9221 },
9222 },
9223 },
9224 {
9225 name: "SHRL",
9226 argLen: 2,
9227 resultInArg0: true,
9228 clobberFlags: true,
9229 asm: x86.ASHRL,
9230 reg: regInfo{
9231 inputs: []inputInfo{
9232 {1, 2},
9233 {0, 49135},
9234 },
9235 outputs: []outputInfo{
9236 {0, 49135},
9237 },
9238 },
9239 },
9240 {
9241 name: "SHRW",
9242 argLen: 2,
9243 resultInArg0: true,
9244 clobberFlags: true,
9245 asm: x86.ASHRW,
9246 reg: regInfo{
9247 inputs: []inputInfo{
9248 {1, 2},
9249 {0, 49135},
9250 },
9251 outputs: []outputInfo{
9252 {0, 49135},
9253 },
9254 },
9255 },
9256 {
9257 name: "SHRB",
9258 argLen: 2,
9259 resultInArg0: true,
9260 clobberFlags: true,
9261 asm: x86.ASHRB,
9262 reg: regInfo{
9263 inputs: []inputInfo{
9264 {1, 2},
9265 {0, 49135},
9266 },
9267 outputs: []outputInfo{
9268 {0, 49135},
9269 },
9270 },
9271 },
9272 {
9273 name: "SHRQconst",
9274 auxType: auxInt8,
9275 argLen: 1,
9276 resultInArg0: true,
9277 clobberFlags: true,
9278 asm: x86.ASHRQ,
9279 reg: regInfo{
9280 inputs: []inputInfo{
9281 {0, 49135},
9282 },
9283 outputs: []outputInfo{
9284 {0, 49135},
9285 },
9286 },
9287 },
9288 {
9289 name: "SHRLconst",
9290 auxType: auxInt8,
9291 argLen: 1,
9292 resultInArg0: true,
9293 clobberFlags: true,
9294 asm: x86.ASHRL,
9295 reg: regInfo{
9296 inputs: []inputInfo{
9297 {0, 49135},
9298 },
9299 outputs: []outputInfo{
9300 {0, 49135},
9301 },
9302 },
9303 },
9304 {
9305 name: "SHRWconst",
9306 auxType: auxInt8,
9307 argLen: 1,
9308 resultInArg0: true,
9309 clobberFlags: true,
9310 asm: x86.ASHRW,
9311 reg: regInfo{
9312 inputs: []inputInfo{
9313 {0, 49135},
9314 },
9315 outputs: []outputInfo{
9316 {0, 49135},
9317 },
9318 },
9319 },
9320 {
9321 name: "SHRBconst",
9322 auxType: auxInt8,
9323 argLen: 1,
9324 resultInArg0: true,
9325 clobberFlags: true,
9326 asm: x86.ASHRB,
9327 reg: regInfo{
9328 inputs: []inputInfo{
9329 {0, 49135},
9330 },
9331 outputs: []outputInfo{
9332 {0, 49135},
9333 },
9334 },
9335 },
9336 {
9337 name: "SARQ",
9338 argLen: 2,
9339 resultInArg0: true,
9340 clobberFlags: true,
9341 asm: x86.ASARQ,
9342 reg: regInfo{
9343 inputs: []inputInfo{
9344 {1, 2},
9345 {0, 49135},
9346 },
9347 outputs: []outputInfo{
9348 {0, 49135},
9349 },
9350 },
9351 },
9352 {
9353 name: "SARL",
9354 argLen: 2,
9355 resultInArg0: true,
9356 clobberFlags: true,
9357 asm: x86.ASARL,
9358 reg: regInfo{
9359 inputs: []inputInfo{
9360 {1, 2},
9361 {0, 49135},
9362 },
9363 outputs: []outputInfo{
9364 {0, 49135},
9365 },
9366 },
9367 },
9368 {
9369 name: "SARW",
9370 argLen: 2,
9371 resultInArg0: true,
9372 clobberFlags: true,
9373 asm: x86.ASARW,
9374 reg: regInfo{
9375 inputs: []inputInfo{
9376 {1, 2},
9377 {0, 49135},
9378 },
9379 outputs: []outputInfo{
9380 {0, 49135},
9381 },
9382 },
9383 },
9384 {
9385 name: "SARB",
9386 argLen: 2,
9387 resultInArg0: true,
9388 clobberFlags: true,
9389 asm: x86.ASARB,
9390 reg: regInfo{
9391 inputs: []inputInfo{
9392 {1, 2},
9393 {0, 49135},
9394 },
9395 outputs: []outputInfo{
9396 {0, 49135},
9397 },
9398 },
9399 },
9400 {
9401 name: "SARQconst",
9402 auxType: auxInt8,
9403 argLen: 1,
9404 resultInArg0: true,
9405 clobberFlags: true,
9406 asm: x86.ASARQ,
9407 reg: regInfo{
9408 inputs: []inputInfo{
9409 {0, 49135},
9410 },
9411 outputs: []outputInfo{
9412 {0, 49135},
9413 },
9414 },
9415 },
9416 {
9417 name: "SARLconst",
9418 auxType: auxInt8,
9419 argLen: 1,
9420 resultInArg0: true,
9421 clobberFlags: true,
9422 asm: x86.ASARL,
9423 reg: regInfo{
9424 inputs: []inputInfo{
9425 {0, 49135},
9426 },
9427 outputs: []outputInfo{
9428 {0, 49135},
9429 },
9430 },
9431 },
9432 {
9433 name: "SARWconst",
9434 auxType: auxInt8,
9435 argLen: 1,
9436 resultInArg0: true,
9437 clobberFlags: true,
9438 asm: x86.ASARW,
9439 reg: regInfo{
9440 inputs: []inputInfo{
9441 {0, 49135},
9442 },
9443 outputs: []outputInfo{
9444 {0, 49135},
9445 },
9446 },
9447 },
9448 {
9449 name: "SARBconst",
9450 auxType: auxInt8,
9451 argLen: 1,
9452 resultInArg0: true,
9453 clobberFlags: true,
9454 asm: x86.ASARB,
9455 reg: regInfo{
9456 inputs: []inputInfo{
9457 {0, 49135},
9458 },
9459 outputs: []outputInfo{
9460 {0, 49135},
9461 },
9462 },
9463 },
9464 {
9465 name: "SHRDQ",
9466 argLen: 3,
9467 resultInArg0: true,
9468 clobberFlags: true,
9469 asm: x86.ASHRQ,
9470 reg: regInfo{
9471 inputs: []inputInfo{
9472 {2, 2},
9473 {0, 49135},
9474 {1, 49135},
9475 },
9476 outputs: []outputInfo{
9477 {0, 49135},
9478 },
9479 },
9480 },
9481 {
9482 name: "SHLDQ",
9483 argLen: 3,
9484 resultInArg0: true,
9485 clobberFlags: true,
9486 asm: x86.ASHLQ,
9487 reg: regInfo{
9488 inputs: []inputInfo{
9489 {2, 2},
9490 {0, 49135},
9491 {1, 49135},
9492 },
9493 outputs: []outputInfo{
9494 {0, 49135},
9495 },
9496 },
9497 },
9498 {
9499 name: "ROLQ",
9500 argLen: 2,
9501 resultInArg0: true,
9502 clobberFlags: true,
9503 asm: x86.AROLQ,
9504 reg: regInfo{
9505 inputs: []inputInfo{
9506 {1, 2},
9507 {0, 49135},
9508 },
9509 outputs: []outputInfo{
9510 {0, 49135},
9511 },
9512 },
9513 },
9514 {
9515 name: "ROLL",
9516 argLen: 2,
9517 resultInArg0: true,
9518 clobberFlags: true,
9519 asm: x86.AROLL,
9520 reg: regInfo{
9521 inputs: []inputInfo{
9522 {1, 2},
9523 {0, 49135},
9524 },
9525 outputs: []outputInfo{
9526 {0, 49135},
9527 },
9528 },
9529 },
9530 {
9531 name: "ROLW",
9532 argLen: 2,
9533 resultInArg0: true,
9534 clobberFlags: true,
9535 asm: x86.AROLW,
9536 reg: regInfo{
9537 inputs: []inputInfo{
9538 {1, 2},
9539 {0, 49135},
9540 },
9541 outputs: []outputInfo{
9542 {0, 49135},
9543 },
9544 },
9545 },
9546 {
9547 name: "ROLB",
9548 argLen: 2,
9549 resultInArg0: true,
9550 clobberFlags: true,
9551 asm: x86.AROLB,
9552 reg: regInfo{
9553 inputs: []inputInfo{
9554 {1, 2},
9555 {0, 49135},
9556 },
9557 outputs: []outputInfo{
9558 {0, 49135},
9559 },
9560 },
9561 },
9562 {
9563 name: "RORQ",
9564 argLen: 2,
9565 resultInArg0: true,
9566 clobberFlags: true,
9567 asm: x86.ARORQ,
9568 reg: regInfo{
9569 inputs: []inputInfo{
9570 {1, 2},
9571 {0, 49135},
9572 },
9573 outputs: []outputInfo{
9574 {0, 49135},
9575 },
9576 },
9577 },
9578 {
9579 name: "RORL",
9580 argLen: 2,
9581 resultInArg0: true,
9582 clobberFlags: true,
9583 asm: x86.ARORL,
9584 reg: regInfo{
9585 inputs: []inputInfo{
9586 {1, 2},
9587 {0, 49135},
9588 },
9589 outputs: []outputInfo{
9590 {0, 49135},
9591 },
9592 },
9593 },
9594 {
9595 name: "RORW",
9596 argLen: 2,
9597 resultInArg0: true,
9598 clobberFlags: true,
9599 asm: x86.ARORW,
9600 reg: regInfo{
9601 inputs: []inputInfo{
9602 {1, 2},
9603 {0, 49135},
9604 },
9605 outputs: []outputInfo{
9606 {0, 49135},
9607 },
9608 },
9609 },
9610 {
9611 name: "RORB",
9612 argLen: 2,
9613 resultInArg0: true,
9614 clobberFlags: true,
9615 asm: x86.ARORB,
9616 reg: regInfo{
9617 inputs: []inputInfo{
9618 {1, 2},
9619 {0, 49135},
9620 },
9621 outputs: []outputInfo{
9622 {0, 49135},
9623 },
9624 },
9625 },
9626 {
9627 name: "ROLQconst",
9628 auxType: auxInt8,
9629 argLen: 1,
9630 resultInArg0: true,
9631 clobberFlags: true,
9632 asm: x86.AROLQ,
9633 reg: regInfo{
9634 inputs: []inputInfo{
9635 {0, 49135},
9636 },
9637 outputs: []outputInfo{
9638 {0, 49135},
9639 },
9640 },
9641 },
9642 {
9643 name: "ROLLconst",
9644 auxType: auxInt8,
9645 argLen: 1,
9646 resultInArg0: true,
9647 clobberFlags: true,
9648 asm: x86.AROLL,
9649 reg: regInfo{
9650 inputs: []inputInfo{
9651 {0, 49135},
9652 },
9653 outputs: []outputInfo{
9654 {0, 49135},
9655 },
9656 },
9657 },
9658 {
9659 name: "ROLWconst",
9660 auxType: auxInt8,
9661 argLen: 1,
9662 resultInArg0: true,
9663 clobberFlags: true,
9664 asm: x86.AROLW,
9665 reg: regInfo{
9666 inputs: []inputInfo{
9667 {0, 49135},
9668 },
9669 outputs: []outputInfo{
9670 {0, 49135},
9671 },
9672 },
9673 },
9674 {
9675 name: "ROLBconst",
9676 auxType: auxInt8,
9677 argLen: 1,
9678 resultInArg0: true,
9679 clobberFlags: true,
9680 asm: x86.AROLB,
9681 reg: regInfo{
9682 inputs: []inputInfo{
9683 {0, 49135},
9684 },
9685 outputs: []outputInfo{
9686 {0, 49135},
9687 },
9688 },
9689 },
9690 {
9691 name: "ADDLload",
9692 auxType: auxSymOff,
9693 argLen: 3,
9694 resultInArg0: true,
9695 clobberFlags: true,
9696 faultOnNilArg1: true,
9697 symEffect: SymRead,
9698 asm: x86.AADDL,
9699 reg: regInfo{
9700 inputs: []inputInfo{
9701 {0, 49135},
9702 {1, 4295032831},
9703 },
9704 outputs: []outputInfo{
9705 {0, 49135},
9706 },
9707 },
9708 },
9709 {
9710 name: "ADDQload",
9711 auxType: auxSymOff,
9712 argLen: 3,
9713 resultInArg0: true,
9714 clobberFlags: true,
9715 faultOnNilArg1: true,
9716 symEffect: SymRead,
9717 asm: x86.AADDQ,
9718 reg: regInfo{
9719 inputs: []inputInfo{
9720 {0, 49135},
9721 {1, 4295032831},
9722 },
9723 outputs: []outputInfo{
9724 {0, 49135},
9725 },
9726 },
9727 },
9728 {
9729 name: "SUBQload",
9730 auxType: auxSymOff,
9731 argLen: 3,
9732 resultInArg0: true,
9733 clobberFlags: true,
9734 faultOnNilArg1: true,
9735 symEffect: SymRead,
9736 asm: x86.ASUBQ,
9737 reg: regInfo{
9738 inputs: []inputInfo{
9739 {0, 49135},
9740 {1, 4295032831},
9741 },
9742 outputs: []outputInfo{
9743 {0, 49135},
9744 },
9745 },
9746 },
9747 {
9748 name: "SUBLload",
9749 auxType: auxSymOff,
9750 argLen: 3,
9751 resultInArg0: true,
9752 clobberFlags: true,
9753 faultOnNilArg1: true,
9754 symEffect: SymRead,
9755 asm: x86.ASUBL,
9756 reg: regInfo{
9757 inputs: []inputInfo{
9758 {0, 49135},
9759 {1, 4295032831},
9760 },
9761 outputs: []outputInfo{
9762 {0, 49135},
9763 },
9764 },
9765 },
9766 {
9767 name: "ANDLload",
9768 auxType: auxSymOff,
9769 argLen: 3,
9770 resultInArg0: true,
9771 clobberFlags: true,
9772 faultOnNilArg1: true,
9773 symEffect: SymRead,
9774 asm: x86.AANDL,
9775 reg: regInfo{
9776 inputs: []inputInfo{
9777 {0, 49135},
9778 {1, 4295032831},
9779 },
9780 outputs: []outputInfo{
9781 {0, 49135},
9782 },
9783 },
9784 },
9785 {
9786 name: "ANDQload",
9787 auxType: auxSymOff,
9788 argLen: 3,
9789 resultInArg0: true,
9790 clobberFlags: true,
9791 faultOnNilArg1: true,
9792 symEffect: SymRead,
9793 asm: x86.AANDQ,
9794 reg: regInfo{
9795 inputs: []inputInfo{
9796 {0, 49135},
9797 {1, 4295032831},
9798 },
9799 outputs: []outputInfo{
9800 {0, 49135},
9801 },
9802 },
9803 },
9804 {
9805 name: "ORQload",
9806 auxType: auxSymOff,
9807 argLen: 3,
9808 resultInArg0: true,
9809 clobberFlags: true,
9810 faultOnNilArg1: true,
9811 symEffect: SymRead,
9812 asm: x86.AORQ,
9813 reg: regInfo{
9814 inputs: []inputInfo{
9815 {0, 49135},
9816 {1, 4295032831},
9817 },
9818 outputs: []outputInfo{
9819 {0, 49135},
9820 },
9821 },
9822 },
9823 {
9824 name: "ORLload",
9825 auxType: auxSymOff,
9826 argLen: 3,
9827 resultInArg0: true,
9828 clobberFlags: true,
9829 faultOnNilArg1: true,
9830 symEffect: SymRead,
9831 asm: x86.AORL,
9832 reg: regInfo{
9833 inputs: []inputInfo{
9834 {0, 49135},
9835 {1, 4295032831},
9836 },
9837 outputs: []outputInfo{
9838 {0, 49135},
9839 },
9840 },
9841 },
9842 {
9843 name: "XORQload",
9844 auxType: auxSymOff,
9845 argLen: 3,
9846 resultInArg0: true,
9847 clobberFlags: true,
9848 faultOnNilArg1: true,
9849 symEffect: SymRead,
9850 asm: x86.AXORQ,
9851 reg: regInfo{
9852 inputs: []inputInfo{
9853 {0, 49135},
9854 {1, 4295032831},
9855 },
9856 outputs: []outputInfo{
9857 {0, 49135},
9858 },
9859 },
9860 },
9861 {
9862 name: "XORLload",
9863 auxType: auxSymOff,
9864 argLen: 3,
9865 resultInArg0: true,
9866 clobberFlags: true,
9867 faultOnNilArg1: true,
9868 symEffect: SymRead,
9869 asm: x86.AXORL,
9870 reg: regInfo{
9871 inputs: []inputInfo{
9872 {0, 49135},
9873 {1, 4295032831},
9874 },
9875 outputs: []outputInfo{
9876 {0, 49135},
9877 },
9878 },
9879 },
9880 {
9881 name: "ADDLloadidx1",
9882 auxType: auxSymOff,
9883 argLen: 4,
9884 resultInArg0: true,
9885 clobberFlags: true,
9886 symEffect: SymRead,
9887 asm: x86.AADDL,
9888 scale: 1,
9889 reg: regInfo{
9890 inputs: []inputInfo{
9891 {0, 49135},
9892 {2, 49151},
9893 {1, 4295032831},
9894 },
9895 outputs: []outputInfo{
9896 {0, 49135},
9897 },
9898 },
9899 },
9900 {
9901 name: "ADDLloadidx4",
9902 auxType: auxSymOff,
9903 argLen: 4,
9904 resultInArg0: true,
9905 clobberFlags: true,
9906 symEffect: SymRead,
9907 asm: x86.AADDL,
9908 scale: 4,
9909 reg: regInfo{
9910 inputs: []inputInfo{
9911 {0, 49135},
9912 {2, 49151},
9913 {1, 4295032831},
9914 },
9915 outputs: []outputInfo{
9916 {0, 49135},
9917 },
9918 },
9919 },
9920 {
9921 name: "ADDLloadidx8",
9922 auxType: auxSymOff,
9923 argLen: 4,
9924 resultInArg0: true,
9925 clobberFlags: true,
9926 symEffect: SymRead,
9927 asm: x86.AADDL,
9928 scale: 8,
9929 reg: regInfo{
9930 inputs: []inputInfo{
9931 {0, 49135},
9932 {2, 49151},
9933 {1, 4295032831},
9934 },
9935 outputs: []outputInfo{
9936 {0, 49135},
9937 },
9938 },
9939 },
9940 {
9941 name: "ADDQloadidx1",
9942 auxType: auxSymOff,
9943 argLen: 4,
9944 resultInArg0: true,
9945 clobberFlags: true,
9946 symEffect: SymRead,
9947 asm: x86.AADDQ,
9948 scale: 1,
9949 reg: regInfo{
9950 inputs: []inputInfo{
9951 {0, 49135},
9952 {2, 49151},
9953 {1, 4295032831},
9954 },
9955 outputs: []outputInfo{
9956 {0, 49135},
9957 },
9958 },
9959 },
9960 {
9961 name: "ADDQloadidx8",
9962 auxType: auxSymOff,
9963 argLen: 4,
9964 resultInArg0: true,
9965 clobberFlags: true,
9966 symEffect: SymRead,
9967 asm: x86.AADDQ,
9968 scale: 8,
9969 reg: regInfo{
9970 inputs: []inputInfo{
9971 {0, 49135},
9972 {2, 49151},
9973 {1, 4295032831},
9974 },
9975 outputs: []outputInfo{
9976 {0, 49135},
9977 },
9978 },
9979 },
9980 {
9981 name: "SUBLloadidx1",
9982 auxType: auxSymOff,
9983 argLen: 4,
9984 resultInArg0: true,
9985 clobberFlags: true,
9986 symEffect: SymRead,
9987 asm: x86.ASUBL,
9988 scale: 1,
9989 reg: regInfo{
9990 inputs: []inputInfo{
9991 {0, 49135},
9992 {2, 49151},
9993 {1, 4295032831},
9994 },
9995 outputs: []outputInfo{
9996 {0, 49135},
9997 },
9998 },
9999 },
10000 {
10001 name: "SUBLloadidx4",
10002 auxType: auxSymOff,
10003 argLen: 4,
10004 resultInArg0: true,
10005 clobberFlags: true,
10006 symEffect: SymRead,
10007 asm: x86.ASUBL,
10008 scale: 4,
10009 reg: regInfo{
10010 inputs: []inputInfo{
10011 {0, 49135},
10012 {2, 49151},
10013 {1, 4295032831},
10014 },
10015 outputs: []outputInfo{
10016 {0, 49135},
10017 },
10018 },
10019 },
10020 {
10021 name: "SUBLloadidx8",
10022 auxType: auxSymOff,
10023 argLen: 4,
10024 resultInArg0: true,
10025 clobberFlags: true,
10026 symEffect: SymRead,
10027 asm: x86.ASUBL,
10028 scale: 8,
10029 reg: regInfo{
10030 inputs: []inputInfo{
10031 {0, 49135},
10032 {2, 49151},
10033 {1, 4295032831},
10034 },
10035 outputs: []outputInfo{
10036 {0, 49135},
10037 },
10038 },
10039 },
10040 {
10041 name: "SUBQloadidx1",
10042 auxType: auxSymOff,
10043 argLen: 4,
10044 resultInArg0: true,
10045 clobberFlags: true,
10046 symEffect: SymRead,
10047 asm: x86.ASUBQ,
10048 scale: 1,
10049 reg: regInfo{
10050 inputs: []inputInfo{
10051 {0, 49135},
10052 {2, 49151},
10053 {1, 4295032831},
10054 },
10055 outputs: []outputInfo{
10056 {0, 49135},
10057 },
10058 },
10059 },
10060 {
10061 name: "SUBQloadidx8",
10062 auxType: auxSymOff,
10063 argLen: 4,
10064 resultInArg0: true,
10065 clobberFlags: true,
10066 symEffect: SymRead,
10067 asm: x86.ASUBQ,
10068 scale: 8,
10069 reg: regInfo{
10070 inputs: []inputInfo{
10071 {0, 49135},
10072 {2, 49151},
10073 {1, 4295032831},
10074 },
10075 outputs: []outputInfo{
10076 {0, 49135},
10077 },
10078 },
10079 },
10080 {
10081 name: "ANDLloadidx1",
10082 auxType: auxSymOff,
10083 argLen: 4,
10084 resultInArg0: true,
10085 clobberFlags: true,
10086 symEffect: SymRead,
10087 asm: x86.AANDL,
10088 scale: 1,
10089 reg: regInfo{
10090 inputs: []inputInfo{
10091 {0, 49135},
10092 {2, 49151},
10093 {1, 4295032831},
10094 },
10095 outputs: []outputInfo{
10096 {0, 49135},
10097 },
10098 },
10099 },
10100 {
10101 name: "ANDLloadidx4",
10102 auxType: auxSymOff,
10103 argLen: 4,
10104 resultInArg0: true,
10105 clobberFlags: true,
10106 symEffect: SymRead,
10107 asm: x86.AANDL,
10108 scale: 4,
10109 reg: regInfo{
10110 inputs: []inputInfo{
10111 {0, 49135},
10112 {2, 49151},
10113 {1, 4295032831},
10114 },
10115 outputs: []outputInfo{
10116 {0, 49135},
10117 },
10118 },
10119 },
10120 {
10121 name: "ANDLloadidx8",
10122 auxType: auxSymOff,
10123 argLen: 4,
10124 resultInArg0: true,
10125 clobberFlags: true,
10126 symEffect: SymRead,
10127 asm: x86.AANDL,
10128 scale: 8,
10129 reg: regInfo{
10130 inputs: []inputInfo{
10131 {0, 49135},
10132 {2, 49151},
10133 {1, 4295032831},
10134 },
10135 outputs: []outputInfo{
10136 {0, 49135},
10137 },
10138 },
10139 },
10140 {
10141 name: "ANDQloadidx1",
10142 auxType: auxSymOff,
10143 argLen: 4,
10144 resultInArg0: true,
10145 clobberFlags: true,
10146 symEffect: SymRead,
10147 asm: x86.AANDQ,
10148 scale: 1,
10149 reg: regInfo{
10150 inputs: []inputInfo{
10151 {0, 49135},
10152 {2, 49151},
10153 {1, 4295032831},
10154 },
10155 outputs: []outputInfo{
10156 {0, 49135},
10157 },
10158 },
10159 },
10160 {
10161 name: "ANDQloadidx8",
10162 auxType: auxSymOff,
10163 argLen: 4,
10164 resultInArg0: true,
10165 clobberFlags: true,
10166 symEffect: SymRead,
10167 asm: x86.AANDQ,
10168 scale: 8,
10169 reg: regInfo{
10170 inputs: []inputInfo{
10171 {0, 49135},
10172 {2, 49151},
10173 {1, 4295032831},
10174 },
10175 outputs: []outputInfo{
10176 {0, 49135},
10177 },
10178 },
10179 },
10180 {
10181 name: "ORLloadidx1",
10182 auxType: auxSymOff,
10183 argLen: 4,
10184 resultInArg0: true,
10185 clobberFlags: true,
10186 symEffect: SymRead,
10187 asm: x86.AORL,
10188 scale: 1,
10189 reg: regInfo{
10190 inputs: []inputInfo{
10191 {0, 49135},
10192 {2, 49151},
10193 {1, 4295032831},
10194 },
10195 outputs: []outputInfo{
10196 {0, 49135},
10197 },
10198 },
10199 },
10200 {
10201 name: "ORLloadidx4",
10202 auxType: auxSymOff,
10203 argLen: 4,
10204 resultInArg0: true,
10205 clobberFlags: true,
10206 symEffect: SymRead,
10207 asm: x86.AORL,
10208 scale: 4,
10209 reg: regInfo{
10210 inputs: []inputInfo{
10211 {0, 49135},
10212 {2, 49151},
10213 {1, 4295032831},
10214 },
10215 outputs: []outputInfo{
10216 {0, 49135},
10217 },
10218 },
10219 },
10220 {
10221 name: "ORLloadidx8",
10222 auxType: auxSymOff,
10223 argLen: 4,
10224 resultInArg0: true,
10225 clobberFlags: true,
10226 symEffect: SymRead,
10227 asm: x86.AORL,
10228 scale: 8,
10229 reg: regInfo{
10230 inputs: []inputInfo{
10231 {0, 49135},
10232 {2, 49151},
10233 {1, 4295032831},
10234 },
10235 outputs: []outputInfo{
10236 {0, 49135},
10237 },
10238 },
10239 },
10240 {
10241 name: "ORQloadidx1",
10242 auxType: auxSymOff,
10243 argLen: 4,
10244 resultInArg0: true,
10245 clobberFlags: true,
10246 symEffect: SymRead,
10247 asm: x86.AORQ,
10248 scale: 1,
10249 reg: regInfo{
10250 inputs: []inputInfo{
10251 {0, 49135},
10252 {2, 49151},
10253 {1, 4295032831},
10254 },
10255 outputs: []outputInfo{
10256 {0, 49135},
10257 },
10258 },
10259 },
10260 {
10261 name: "ORQloadidx8",
10262 auxType: auxSymOff,
10263 argLen: 4,
10264 resultInArg0: true,
10265 clobberFlags: true,
10266 symEffect: SymRead,
10267 asm: x86.AORQ,
10268 scale: 8,
10269 reg: regInfo{
10270 inputs: []inputInfo{
10271 {0, 49135},
10272 {2, 49151},
10273 {1, 4295032831},
10274 },
10275 outputs: []outputInfo{
10276 {0, 49135},
10277 },
10278 },
10279 },
10280 {
10281 name: "XORLloadidx1",
10282 auxType: auxSymOff,
10283 argLen: 4,
10284 resultInArg0: true,
10285 clobberFlags: true,
10286 symEffect: SymRead,
10287 asm: x86.AXORL,
10288 scale: 1,
10289 reg: regInfo{
10290 inputs: []inputInfo{
10291 {0, 49135},
10292 {2, 49151},
10293 {1, 4295032831},
10294 },
10295 outputs: []outputInfo{
10296 {0, 49135},
10297 },
10298 },
10299 },
10300 {
10301 name: "XORLloadidx4",
10302 auxType: auxSymOff,
10303 argLen: 4,
10304 resultInArg0: true,
10305 clobberFlags: true,
10306 symEffect: SymRead,
10307 asm: x86.AXORL,
10308 scale: 4,
10309 reg: regInfo{
10310 inputs: []inputInfo{
10311 {0, 49135},
10312 {2, 49151},
10313 {1, 4295032831},
10314 },
10315 outputs: []outputInfo{
10316 {0, 49135},
10317 },
10318 },
10319 },
10320 {
10321 name: "XORLloadidx8",
10322 auxType: auxSymOff,
10323 argLen: 4,
10324 resultInArg0: true,
10325 clobberFlags: true,
10326 symEffect: SymRead,
10327 asm: x86.AXORL,
10328 scale: 8,
10329 reg: regInfo{
10330 inputs: []inputInfo{
10331 {0, 49135},
10332 {2, 49151},
10333 {1, 4295032831},
10334 },
10335 outputs: []outputInfo{
10336 {0, 49135},
10337 },
10338 },
10339 },
10340 {
10341 name: "XORQloadidx1",
10342 auxType: auxSymOff,
10343 argLen: 4,
10344 resultInArg0: true,
10345 clobberFlags: true,
10346 symEffect: SymRead,
10347 asm: x86.AXORQ,
10348 scale: 1,
10349 reg: regInfo{
10350 inputs: []inputInfo{
10351 {0, 49135},
10352 {2, 49151},
10353 {1, 4295032831},
10354 },
10355 outputs: []outputInfo{
10356 {0, 49135},
10357 },
10358 },
10359 },
10360 {
10361 name: "XORQloadidx8",
10362 auxType: auxSymOff,
10363 argLen: 4,
10364 resultInArg0: true,
10365 clobberFlags: true,
10366 symEffect: SymRead,
10367 asm: x86.AXORQ,
10368 scale: 8,
10369 reg: regInfo{
10370 inputs: []inputInfo{
10371 {0, 49135},
10372 {2, 49151},
10373 {1, 4295032831},
10374 },
10375 outputs: []outputInfo{
10376 {0, 49135},
10377 },
10378 },
10379 },
10380 {
10381 name: "ADDQmodify",
10382 auxType: auxSymOff,
10383 argLen: 3,
10384 clobberFlags: true,
10385 faultOnNilArg0: true,
10386 symEffect: SymRead | SymWrite,
10387 asm: x86.AADDQ,
10388 reg: regInfo{
10389 inputs: []inputInfo{
10390 {1, 49151},
10391 {0, 4295032831},
10392 },
10393 },
10394 },
10395 {
10396 name: "SUBQmodify",
10397 auxType: auxSymOff,
10398 argLen: 3,
10399 clobberFlags: true,
10400 faultOnNilArg0: true,
10401 symEffect: SymRead | SymWrite,
10402 asm: x86.ASUBQ,
10403 reg: regInfo{
10404 inputs: []inputInfo{
10405 {1, 49151},
10406 {0, 4295032831},
10407 },
10408 },
10409 },
10410 {
10411 name: "ANDQmodify",
10412 auxType: auxSymOff,
10413 argLen: 3,
10414 clobberFlags: true,
10415 faultOnNilArg0: true,
10416 symEffect: SymRead | SymWrite,
10417 asm: x86.AANDQ,
10418 reg: regInfo{
10419 inputs: []inputInfo{
10420 {1, 49151},
10421 {0, 4295032831},
10422 },
10423 },
10424 },
10425 {
10426 name: "ORQmodify",
10427 auxType: auxSymOff,
10428 argLen: 3,
10429 clobberFlags: true,
10430 faultOnNilArg0: true,
10431 symEffect: SymRead | SymWrite,
10432 asm: x86.AORQ,
10433 reg: regInfo{
10434 inputs: []inputInfo{
10435 {1, 49151},
10436 {0, 4295032831},
10437 },
10438 },
10439 },
10440 {
10441 name: "XORQmodify",
10442 auxType: auxSymOff,
10443 argLen: 3,
10444 clobberFlags: true,
10445 faultOnNilArg0: true,
10446 symEffect: SymRead | SymWrite,
10447 asm: x86.AXORQ,
10448 reg: regInfo{
10449 inputs: []inputInfo{
10450 {1, 49151},
10451 {0, 4295032831},
10452 },
10453 },
10454 },
10455 {
10456 name: "ADDLmodify",
10457 auxType: auxSymOff,
10458 argLen: 3,
10459 clobberFlags: true,
10460 faultOnNilArg0: true,
10461 symEffect: SymRead | SymWrite,
10462 asm: x86.AADDL,
10463 reg: regInfo{
10464 inputs: []inputInfo{
10465 {1, 49151},
10466 {0, 4295032831},
10467 },
10468 },
10469 },
10470 {
10471 name: "SUBLmodify",
10472 auxType: auxSymOff,
10473 argLen: 3,
10474 clobberFlags: true,
10475 faultOnNilArg0: true,
10476 symEffect: SymRead | SymWrite,
10477 asm: x86.ASUBL,
10478 reg: regInfo{
10479 inputs: []inputInfo{
10480 {1, 49151},
10481 {0, 4295032831},
10482 },
10483 },
10484 },
10485 {
10486 name: "ANDLmodify",
10487 auxType: auxSymOff,
10488 argLen: 3,
10489 clobberFlags: true,
10490 faultOnNilArg0: true,
10491 symEffect: SymRead | SymWrite,
10492 asm: x86.AANDL,
10493 reg: regInfo{
10494 inputs: []inputInfo{
10495 {1, 49151},
10496 {0, 4295032831},
10497 },
10498 },
10499 },
10500 {
10501 name: "ORLmodify",
10502 auxType: auxSymOff,
10503 argLen: 3,
10504 clobberFlags: true,
10505 faultOnNilArg0: true,
10506 symEffect: SymRead | SymWrite,
10507 asm: x86.AORL,
10508 reg: regInfo{
10509 inputs: []inputInfo{
10510 {1, 49151},
10511 {0, 4295032831},
10512 },
10513 },
10514 },
10515 {
10516 name: "XORLmodify",
10517 auxType: auxSymOff,
10518 argLen: 3,
10519 clobberFlags: true,
10520 faultOnNilArg0: true,
10521 symEffect: SymRead | SymWrite,
10522 asm: x86.AXORL,
10523 reg: regInfo{
10524 inputs: []inputInfo{
10525 {1, 49151},
10526 {0, 4295032831},
10527 },
10528 },
10529 },
10530 {
10531 name: "ADDQmodifyidx1",
10532 auxType: auxSymOff,
10533 argLen: 4,
10534 clobberFlags: true,
10535 symEffect: SymRead | SymWrite,
10536 asm: x86.AADDQ,
10537 scale: 1,
10538 reg: regInfo{
10539 inputs: []inputInfo{
10540 {1, 49151},
10541 {2, 49151},
10542 {0, 4295032831},
10543 },
10544 },
10545 },
10546 {
10547 name: "ADDQmodifyidx8",
10548 auxType: auxSymOff,
10549 argLen: 4,
10550 clobberFlags: true,
10551 symEffect: SymRead | SymWrite,
10552 asm: x86.AADDQ,
10553 scale: 8,
10554 reg: regInfo{
10555 inputs: []inputInfo{
10556 {1, 49151},
10557 {2, 49151},
10558 {0, 4295032831},
10559 },
10560 },
10561 },
10562 {
10563 name: "SUBQmodifyidx1",
10564 auxType: auxSymOff,
10565 argLen: 4,
10566 clobberFlags: true,
10567 symEffect: SymRead | SymWrite,
10568 asm: x86.ASUBQ,
10569 scale: 1,
10570 reg: regInfo{
10571 inputs: []inputInfo{
10572 {1, 49151},
10573 {2, 49151},
10574 {0, 4295032831},
10575 },
10576 },
10577 },
10578 {
10579 name: "SUBQmodifyidx8",
10580 auxType: auxSymOff,
10581 argLen: 4,
10582 clobberFlags: true,
10583 symEffect: SymRead | SymWrite,
10584 asm: x86.ASUBQ,
10585 scale: 8,
10586 reg: regInfo{
10587 inputs: []inputInfo{
10588 {1, 49151},
10589 {2, 49151},
10590 {0, 4295032831},
10591 },
10592 },
10593 },
10594 {
10595 name: "ANDQmodifyidx1",
10596 auxType: auxSymOff,
10597 argLen: 4,
10598 clobberFlags: true,
10599 symEffect: SymRead | SymWrite,
10600 asm: x86.AANDQ,
10601 scale: 1,
10602 reg: regInfo{
10603 inputs: []inputInfo{
10604 {1, 49151},
10605 {2, 49151},
10606 {0, 4295032831},
10607 },
10608 },
10609 },
10610 {
10611 name: "ANDQmodifyidx8",
10612 auxType: auxSymOff,
10613 argLen: 4,
10614 clobberFlags: true,
10615 symEffect: SymRead | SymWrite,
10616 asm: x86.AANDQ,
10617 scale: 8,
10618 reg: regInfo{
10619 inputs: []inputInfo{
10620 {1, 49151},
10621 {2, 49151},
10622 {0, 4295032831},
10623 },
10624 },
10625 },
10626 {
10627 name: "ORQmodifyidx1",
10628 auxType: auxSymOff,
10629 argLen: 4,
10630 clobberFlags: true,
10631 symEffect: SymRead | SymWrite,
10632 asm: x86.AORQ,
10633 scale: 1,
10634 reg: regInfo{
10635 inputs: []inputInfo{
10636 {1, 49151},
10637 {2, 49151},
10638 {0, 4295032831},
10639 },
10640 },
10641 },
10642 {
10643 name: "ORQmodifyidx8",
10644 auxType: auxSymOff,
10645 argLen: 4,
10646 clobberFlags: true,
10647 symEffect: SymRead | SymWrite,
10648 asm: x86.AORQ,
10649 scale: 8,
10650 reg: regInfo{
10651 inputs: []inputInfo{
10652 {1, 49151},
10653 {2, 49151},
10654 {0, 4295032831},
10655 },
10656 },
10657 },
10658 {
10659 name: "XORQmodifyidx1",
10660 auxType: auxSymOff,
10661 argLen: 4,
10662 clobberFlags: true,
10663 symEffect: SymRead | SymWrite,
10664 asm: x86.AXORQ,
10665 scale: 1,
10666 reg: regInfo{
10667 inputs: []inputInfo{
10668 {1, 49151},
10669 {2, 49151},
10670 {0, 4295032831},
10671 },
10672 },
10673 },
10674 {
10675 name: "XORQmodifyidx8",
10676 auxType: auxSymOff,
10677 argLen: 4,
10678 clobberFlags: true,
10679 symEffect: SymRead | SymWrite,
10680 asm: x86.AXORQ,
10681 scale: 8,
10682 reg: regInfo{
10683 inputs: []inputInfo{
10684 {1, 49151},
10685 {2, 49151},
10686 {0, 4295032831},
10687 },
10688 },
10689 },
10690 {
10691 name: "ADDLmodifyidx1",
10692 auxType: auxSymOff,
10693 argLen: 4,
10694 clobberFlags: true,
10695 symEffect: SymRead | SymWrite,
10696 asm: x86.AADDL,
10697 scale: 1,
10698 reg: regInfo{
10699 inputs: []inputInfo{
10700 {1, 49151},
10701 {2, 49151},
10702 {0, 4295032831},
10703 },
10704 },
10705 },
10706 {
10707 name: "ADDLmodifyidx4",
10708 auxType: auxSymOff,
10709 argLen: 4,
10710 clobberFlags: true,
10711 symEffect: SymRead | SymWrite,
10712 asm: x86.AADDL,
10713 scale: 4,
10714 reg: regInfo{
10715 inputs: []inputInfo{
10716 {1, 49151},
10717 {2, 49151},
10718 {0, 4295032831},
10719 },
10720 },
10721 },
10722 {
10723 name: "ADDLmodifyidx8",
10724 auxType: auxSymOff,
10725 argLen: 4,
10726 clobberFlags: true,
10727 symEffect: SymRead | SymWrite,
10728 asm: x86.AADDL,
10729 scale: 8,
10730 reg: regInfo{
10731 inputs: []inputInfo{
10732 {1, 49151},
10733 {2, 49151},
10734 {0, 4295032831},
10735 },
10736 },
10737 },
10738 {
10739 name: "SUBLmodifyidx1",
10740 auxType: auxSymOff,
10741 argLen: 4,
10742 clobberFlags: true,
10743 symEffect: SymRead | SymWrite,
10744 asm: x86.ASUBL,
10745 scale: 1,
10746 reg: regInfo{
10747 inputs: []inputInfo{
10748 {1, 49151},
10749 {2, 49151},
10750 {0, 4295032831},
10751 },
10752 },
10753 },
10754 {
10755 name: "SUBLmodifyidx4",
10756 auxType: auxSymOff,
10757 argLen: 4,
10758 clobberFlags: true,
10759 symEffect: SymRead | SymWrite,
10760 asm: x86.ASUBL,
10761 scale: 4,
10762 reg: regInfo{
10763 inputs: []inputInfo{
10764 {1, 49151},
10765 {2, 49151},
10766 {0, 4295032831},
10767 },
10768 },
10769 },
10770 {
10771 name: "SUBLmodifyidx8",
10772 auxType: auxSymOff,
10773 argLen: 4,
10774 clobberFlags: true,
10775 symEffect: SymRead | SymWrite,
10776 asm: x86.ASUBL,
10777 scale: 8,
10778 reg: regInfo{
10779 inputs: []inputInfo{
10780 {1, 49151},
10781 {2, 49151},
10782 {0, 4295032831},
10783 },
10784 },
10785 },
10786 {
10787 name: "ANDLmodifyidx1",
10788 auxType: auxSymOff,
10789 argLen: 4,
10790 clobberFlags: true,
10791 symEffect: SymRead | SymWrite,
10792 asm: x86.AANDL,
10793 scale: 1,
10794 reg: regInfo{
10795 inputs: []inputInfo{
10796 {1, 49151},
10797 {2, 49151},
10798 {0, 4295032831},
10799 },
10800 },
10801 },
10802 {
10803 name: "ANDLmodifyidx4",
10804 auxType: auxSymOff,
10805 argLen: 4,
10806 clobberFlags: true,
10807 symEffect: SymRead | SymWrite,
10808 asm: x86.AANDL,
10809 scale: 4,
10810 reg: regInfo{
10811 inputs: []inputInfo{
10812 {1, 49151},
10813 {2, 49151},
10814 {0, 4295032831},
10815 },
10816 },
10817 },
10818 {
10819 name: "ANDLmodifyidx8",
10820 auxType: auxSymOff,
10821 argLen: 4,
10822 clobberFlags: true,
10823 symEffect: SymRead | SymWrite,
10824 asm: x86.AANDL,
10825 scale: 8,
10826 reg: regInfo{
10827 inputs: []inputInfo{
10828 {1, 49151},
10829 {2, 49151},
10830 {0, 4295032831},
10831 },
10832 },
10833 },
10834 {
10835 name: "ORLmodifyidx1",
10836 auxType: auxSymOff,
10837 argLen: 4,
10838 clobberFlags: true,
10839 symEffect: SymRead | SymWrite,
10840 asm: x86.AORL,
10841 scale: 1,
10842 reg: regInfo{
10843 inputs: []inputInfo{
10844 {1, 49151},
10845 {2, 49151},
10846 {0, 4295032831},
10847 },
10848 },
10849 },
10850 {
10851 name: "ORLmodifyidx4",
10852 auxType: auxSymOff,
10853 argLen: 4,
10854 clobberFlags: true,
10855 symEffect: SymRead | SymWrite,
10856 asm: x86.AORL,
10857 scale: 4,
10858 reg: regInfo{
10859 inputs: []inputInfo{
10860 {1, 49151},
10861 {2, 49151},
10862 {0, 4295032831},
10863 },
10864 },
10865 },
10866 {
10867 name: "ORLmodifyidx8",
10868 auxType: auxSymOff,
10869 argLen: 4,
10870 clobberFlags: true,
10871 symEffect: SymRead | SymWrite,
10872 asm: x86.AORL,
10873 scale: 8,
10874 reg: regInfo{
10875 inputs: []inputInfo{
10876 {1, 49151},
10877 {2, 49151},
10878 {0, 4295032831},
10879 },
10880 },
10881 },
10882 {
10883 name: "XORLmodifyidx1",
10884 auxType: auxSymOff,
10885 argLen: 4,
10886 clobberFlags: true,
10887 symEffect: SymRead | SymWrite,
10888 asm: x86.AXORL,
10889 scale: 1,
10890 reg: regInfo{
10891 inputs: []inputInfo{
10892 {1, 49151},
10893 {2, 49151},
10894 {0, 4295032831},
10895 },
10896 },
10897 },
10898 {
10899 name: "XORLmodifyidx4",
10900 auxType: auxSymOff,
10901 argLen: 4,
10902 clobberFlags: true,
10903 symEffect: SymRead | SymWrite,
10904 asm: x86.AXORL,
10905 scale: 4,
10906 reg: regInfo{
10907 inputs: []inputInfo{
10908 {1, 49151},
10909 {2, 49151},
10910 {0, 4295032831},
10911 },
10912 },
10913 },
10914 {
10915 name: "XORLmodifyidx8",
10916 auxType: auxSymOff,
10917 argLen: 4,
10918 clobberFlags: true,
10919 symEffect: SymRead | SymWrite,
10920 asm: x86.AXORL,
10921 scale: 8,
10922 reg: regInfo{
10923 inputs: []inputInfo{
10924 {1, 49151},
10925 {2, 49151},
10926 {0, 4295032831},
10927 },
10928 },
10929 },
10930 {
10931 name: "ADDQconstmodifyidx1",
10932 auxType: auxSymValAndOff,
10933 argLen: 3,
10934 clobberFlags: true,
10935 symEffect: SymRead | SymWrite,
10936 asm: x86.AADDQ,
10937 scale: 1,
10938 reg: regInfo{
10939 inputs: []inputInfo{
10940 {1, 49151},
10941 {0, 4295032831},
10942 },
10943 },
10944 },
10945 {
10946 name: "ADDQconstmodifyidx8",
10947 auxType: auxSymValAndOff,
10948 argLen: 3,
10949 clobberFlags: true,
10950 symEffect: SymRead | SymWrite,
10951 asm: x86.AADDQ,
10952 scale: 8,
10953 reg: regInfo{
10954 inputs: []inputInfo{
10955 {1, 49151},
10956 {0, 4295032831},
10957 },
10958 },
10959 },
10960 {
10961 name: "ANDQconstmodifyidx1",
10962 auxType: auxSymValAndOff,
10963 argLen: 3,
10964 clobberFlags: true,
10965 symEffect: SymRead | SymWrite,
10966 asm: x86.AANDQ,
10967 scale: 1,
10968 reg: regInfo{
10969 inputs: []inputInfo{
10970 {1, 49151},
10971 {0, 4295032831},
10972 },
10973 },
10974 },
10975 {
10976 name: "ANDQconstmodifyidx8",
10977 auxType: auxSymValAndOff,
10978 argLen: 3,
10979 clobberFlags: true,
10980 symEffect: SymRead | SymWrite,
10981 asm: x86.AANDQ,
10982 scale: 8,
10983 reg: regInfo{
10984 inputs: []inputInfo{
10985 {1, 49151},
10986 {0, 4295032831},
10987 },
10988 },
10989 },
10990 {
10991 name: "ORQconstmodifyidx1",
10992 auxType: auxSymValAndOff,
10993 argLen: 3,
10994 clobberFlags: true,
10995 symEffect: SymRead | SymWrite,
10996 asm: x86.AORQ,
10997 scale: 1,
10998 reg: regInfo{
10999 inputs: []inputInfo{
11000 {1, 49151},
11001 {0, 4295032831},
11002 },
11003 },
11004 },
11005 {
11006 name: "ORQconstmodifyidx8",
11007 auxType: auxSymValAndOff,
11008 argLen: 3,
11009 clobberFlags: true,
11010 symEffect: SymRead | SymWrite,
11011 asm: x86.AORQ,
11012 scale: 8,
11013 reg: regInfo{
11014 inputs: []inputInfo{
11015 {1, 49151},
11016 {0, 4295032831},
11017 },
11018 },
11019 },
11020 {
11021 name: "XORQconstmodifyidx1",
11022 auxType: auxSymValAndOff,
11023 argLen: 3,
11024 clobberFlags: true,
11025 symEffect: SymRead | SymWrite,
11026 asm: x86.AXORQ,
11027 scale: 1,
11028 reg: regInfo{
11029 inputs: []inputInfo{
11030 {1, 49151},
11031 {0, 4295032831},
11032 },
11033 },
11034 },
11035 {
11036 name: "XORQconstmodifyidx8",
11037 auxType: auxSymValAndOff,
11038 argLen: 3,
11039 clobberFlags: true,
11040 symEffect: SymRead | SymWrite,
11041 asm: x86.AXORQ,
11042 scale: 8,
11043 reg: regInfo{
11044 inputs: []inputInfo{
11045 {1, 49151},
11046 {0, 4295032831},
11047 },
11048 },
11049 },
11050 {
11051 name: "ADDLconstmodifyidx1",
11052 auxType: auxSymValAndOff,
11053 argLen: 3,
11054 clobberFlags: true,
11055 symEffect: SymRead | SymWrite,
11056 asm: x86.AADDL,
11057 scale: 1,
11058 reg: regInfo{
11059 inputs: []inputInfo{
11060 {1, 49151},
11061 {0, 4295032831},
11062 },
11063 },
11064 },
11065 {
11066 name: "ADDLconstmodifyidx4",
11067 auxType: auxSymValAndOff,
11068 argLen: 3,
11069 clobberFlags: true,
11070 symEffect: SymRead | SymWrite,
11071 asm: x86.AADDL,
11072 scale: 4,
11073 reg: regInfo{
11074 inputs: []inputInfo{
11075 {1, 49151},
11076 {0, 4295032831},
11077 },
11078 },
11079 },
11080 {
11081 name: "ADDLconstmodifyidx8",
11082 auxType: auxSymValAndOff,
11083 argLen: 3,
11084 clobberFlags: true,
11085 symEffect: SymRead | SymWrite,
11086 asm: x86.AADDL,
11087 scale: 8,
11088 reg: regInfo{
11089 inputs: []inputInfo{
11090 {1, 49151},
11091 {0, 4295032831},
11092 },
11093 },
11094 },
11095 {
11096 name: "ANDLconstmodifyidx1",
11097 auxType: auxSymValAndOff,
11098 argLen: 3,
11099 clobberFlags: true,
11100 symEffect: SymRead | SymWrite,
11101 asm: x86.AANDL,
11102 scale: 1,
11103 reg: regInfo{
11104 inputs: []inputInfo{
11105 {1, 49151},
11106 {0, 4295032831},
11107 },
11108 },
11109 },
11110 {
11111 name: "ANDLconstmodifyidx4",
11112 auxType: auxSymValAndOff,
11113 argLen: 3,
11114 clobberFlags: true,
11115 symEffect: SymRead | SymWrite,
11116 asm: x86.AANDL,
11117 scale: 4,
11118 reg: regInfo{
11119 inputs: []inputInfo{
11120 {1, 49151},
11121 {0, 4295032831},
11122 },
11123 },
11124 },
11125 {
11126 name: "ANDLconstmodifyidx8",
11127 auxType: auxSymValAndOff,
11128 argLen: 3,
11129 clobberFlags: true,
11130 symEffect: SymRead | SymWrite,
11131 asm: x86.AANDL,
11132 scale: 8,
11133 reg: regInfo{
11134 inputs: []inputInfo{
11135 {1, 49151},
11136 {0, 4295032831},
11137 },
11138 },
11139 },
11140 {
11141 name: "ORLconstmodifyidx1",
11142 auxType: auxSymValAndOff,
11143 argLen: 3,
11144 clobberFlags: true,
11145 symEffect: SymRead | SymWrite,
11146 asm: x86.AORL,
11147 scale: 1,
11148 reg: regInfo{
11149 inputs: []inputInfo{
11150 {1, 49151},
11151 {0, 4295032831},
11152 },
11153 },
11154 },
11155 {
11156 name: "ORLconstmodifyidx4",
11157 auxType: auxSymValAndOff,
11158 argLen: 3,
11159 clobberFlags: true,
11160 symEffect: SymRead | SymWrite,
11161 asm: x86.AORL,
11162 scale: 4,
11163 reg: regInfo{
11164 inputs: []inputInfo{
11165 {1, 49151},
11166 {0, 4295032831},
11167 },
11168 },
11169 },
11170 {
11171 name: "ORLconstmodifyidx8",
11172 auxType: auxSymValAndOff,
11173 argLen: 3,
11174 clobberFlags: true,
11175 symEffect: SymRead | SymWrite,
11176 asm: x86.AORL,
11177 scale: 8,
11178 reg: regInfo{
11179 inputs: []inputInfo{
11180 {1, 49151},
11181 {0, 4295032831},
11182 },
11183 },
11184 },
11185 {
11186 name: "XORLconstmodifyidx1",
11187 auxType: auxSymValAndOff,
11188 argLen: 3,
11189 clobberFlags: true,
11190 symEffect: SymRead | SymWrite,
11191 asm: x86.AXORL,
11192 scale: 1,
11193 reg: regInfo{
11194 inputs: []inputInfo{
11195 {1, 49151},
11196 {0, 4295032831},
11197 },
11198 },
11199 },
11200 {
11201 name: "XORLconstmodifyidx4",
11202 auxType: auxSymValAndOff,
11203 argLen: 3,
11204 clobberFlags: true,
11205 symEffect: SymRead | SymWrite,
11206 asm: x86.AXORL,
11207 scale: 4,
11208 reg: regInfo{
11209 inputs: []inputInfo{
11210 {1, 49151},
11211 {0, 4295032831},
11212 },
11213 },
11214 },
11215 {
11216 name: "XORLconstmodifyidx8",
11217 auxType: auxSymValAndOff,
11218 argLen: 3,
11219 clobberFlags: true,
11220 symEffect: SymRead | SymWrite,
11221 asm: x86.AXORL,
11222 scale: 8,
11223 reg: regInfo{
11224 inputs: []inputInfo{
11225 {1, 49151},
11226 {0, 4295032831},
11227 },
11228 },
11229 },
11230 {
11231 name: "NEGQ",
11232 argLen: 1,
11233 resultInArg0: true,
11234 clobberFlags: true,
11235 asm: x86.ANEGQ,
11236 reg: regInfo{
11237 inputs: []inputInfo{
11238 {0, 49135},
11239 },
11240 outputs: []outputInfo{
11241 {0, 49135},
11242 },
11243 },
11244 },
11245 {
11246 name: "NEGL",
11247 argLen: 1,
11248 resultInArg0: true,
11249 clobberFlags: true,
11250 asm: x86.ANEGL,
11251 reg: regInfo{
11252 inputs: []inputInfo{
11253 {0, 49135},
11254 },
11255 outputs: []outputInfo{
11256 {0, 49135},
11257 },
11258 },
11259 },
11260 {
11261 name: "NOTQ",
11262 argLen: 1,
11263 resultInArg0: true,
11264 asm: x86.ANOTQ,
11265 reg: regInfo{
11266 inputs: []inputInfo{
11267 {0, 49135},
11268 },
11269 outputs: []outputInfo{
11270 {0, 49135},
11271 },
11272 },
11273 },
11274 {
11275 name: "NOTL",
11276 argLen: 1,
11277 resultInArg0: true,
11278 asm: x86.ANOTL,
11279 reg: regInfo{
11280 inputs: []inputInfo{
11281 {0, 49135},
11282 },
11283 outputs: []outputInfo{
11284 {0, 49135},
11285 },
11286 },
11287 },
11288 {
11289 name: "BSFQ",
11290 argLen: 1,
11291 asm: x86.ABSFQ,
11292 reg: regInfo{
11293 inputs: []inputInfo{
11294 {0, 49135},
11295 },
11296 outputs: []outputInfo{
11297 {1, 0},
11298 {0, 49135},
11299 },
11300 },
11301 },
11302 {
11303 name: "BSFL",
11304 argLen: 1,
11305 clobberFlags: true,
11306 asm: x86.ABSFL,
11307 reg: regInfo{
11308 inputs: []inputInfo{
11309 {0, 49135},
11310 },
11311 outputs: []outputInfo{
11312 {0, 49135},
11313 },
11314 },
11315 },
11316 {
11317 name: "BSRQ",
11318 argLen: 1,
11319 asm: x86.ABSRQ,
11320 reg: regInfo{
11321 inputs: []inputInfo{
11322 {0, 49135},
11323 },
11324 outputs: []outputInfo{
11325 {1, 0},
11326 {0, 49135},
11327 },
11328 },
11329 },
11330 {
11331 name: "BSRL",
11332 argLen: 1,
11333 clobberFlags: true,
11334 asm: x86.ABSRL,
11335 reg: regInfo{
11336 inputs: []inputInfo{
11337 {0, 49135},
11338 },
11339 outputs: []outputInfo{
11340 {0, 49135},
11341 },
11342 },
11343 },
11344 {
11345 name: "CMOVQEQ",
11346 argLen: 3,
11347 resultInArg0: true,
11348 asm: x86.ACMOVQEQ,
11349 reg: regInfo{
11350 inputs: []inputInfo{
11351 {0, 49135},
11352 {1, 49135},
11353 },
11354 outputs: []outputInfo{
11355 {0, 49135},
11356 },
11357 },
11358 },
11359 {
11360 name: "CMOVQNE",
11361 argLen: 3,
11362 resultInArg0: true,
11363 asm: x86.ACMOVQNE,
11364 reg: regInfo{
11365 inputs: []inputInfo{
11366 {0, 49135},
11367 {1, 49135},
11368 },
11369 outputs: []outputInfo{
11370 {0, 49135},
11371 },
11372 },
11373 },
11374 {
11375 name: "CMOVQLT",
11376 argLen: 3,
11377 resultInArg0: true,
11378 asm: x86.ACMOVQLT,
11379 reg: regInfo{
11380 inputs: []inputInfo{
11381 {0, 49135},
11382 {1, 49135},
11383 },
11384 outputs: []outputInfo{
11385 {0, 49135},
11386 },
11387 },
11388 },
11389 {
11390 name: "CMOVQGT",
11391 argLen: 3,
11392 resultInArg0: true,
11393 asm: x86.ACMOVQGT,
11394 reg: regInfo{
11395 inputs: []inputInfo{
11396 {0, 49135},
11397 {1, 49135},
11398 },
11399 outputs: []outputInfo{
11400 {0, 49135},
11401 },
11402 },
11403 },
11404 {
11405 name: "CMOVQLE",
11406 argLen: 3,
11407 resultInArg0: true,
11408 asm: x86.ACMOVQLE,
11409 reg: regInfo{
11410 inputs: []inputInfo{
11411 {0, 49135},
11412 {1, 49135},
11413 },
11414 outputs: []outputInfo{
11415 {0, 49135},
11416 },
11417 },
11418 },
11419 {
11420 name: "CMOVQGE",
11421 argLen: 3,
11422 resultInArg0: true,
11423 asm: x86.ACMOVQGE,
11424 reg: regInfo{
11425 inputs: []inputInfo{
11426 {0, 49135},
11427 {1, 49135},
11428 },
11429 outputs: []outputInfo{
11430 {0, 49135},
11431 },
11432 },
11433 },
11434 {
11435 name: "CMOVQLS",
11436 argLen: 3,
11437 resultInArg0: true,
11438 asm: x86.ACMOVQLS,
11439 reg: regInfo{
11440 inputs: []inputInfo{
11441 {0, 49135},
11442 {1, 49135},
11443 },
11444 outputs: []outputInfo{
11445 {0, 49135},
11446 },
11447 },
11448 },
11449 {
11450 name: "CMOVQHI",
11451 argLen: 3,
11452 resultInArg0: true,
11453 asm: x86.ACMOVQHI,
11454 reg: regInfo{
11455 inputs: []inputInfo{
11456 {0, 49135},
11457 {1, 49135},
11458 },
11459 outputs: []outputInfo{
11460 {0, 49135},
11461 },
11462 },
11463 },
11464 {
11465 name: "CMOVQCC",
11466 argLen: 3,
11467 resultInArg0: true,
11468 asm: x86.ACMOVQCC,
11469 reg: regInfo{
11470 inputs: []inputInfo{
11471 {0, 49135},
11472 {1, 49135},
11473 },
11474 outputs: []outputInfo{
11475 {0, 49135},
11476 },
11477 },
11478 },
11479 {
11480 name: "CMOVQCS",
11481 argLen: 3,
11482 resultInArg0: true,
11483 asm: x86.ACMOVQCS,
11484 reg: regInfo{
11485 inputs: []inputInfo{
11486 {0, 49135},
11487 {1, 49135},
11488 },
11489 outputs: []outputInfo{
11490 {0, 49135},
11491 },
11492 },
11493 },
11494 {
11495 name: "CMOVLEQ",
11496 argLen: 3,
11497 resultInArg0: true,
11498 asm: x86.ACMOVLEQ,
11499 reg: regInfo{
11500 inputs: []inputInfo{
11501 {0, 49135},
11502 {1, 49135},
11503 },
11504 outputs: []outputInfo{
11505 {0, 49135},
11506 },
11507 },
11508 },
11509 {
11510 name: "CMOVLNE",
11511 argLen: 3,
11512 resultInArg0: true,
11513 asm: x86.ACMOVLNE,
11514 reg: regInfo{
11515 inputs: []inputInfo{
11516 {0, 49135},
11517 {1, 49135},
11518 },
11519 outputs: []outputInfo{
11520 {0, 49135},
11521 },
11522 },
11523 },
11524 {
11525 name: "CMOVLLT",
11526 argLen: 3,
11527 resultInArg0: true,
11528 asm: x86.ACMOVLLT,
11529 reg: regInfo{
11530 inputs: []inputInfo{
11531 {0, 49135},
11532 {1, 49135},
11533 },
11534 outputs: []outputInfo{
11535 {0, 49135},
11536 },
11537 },
11538 },
11539 {
11540 name: "CMOVLGT",
11541 argLen: 3,
11542 resultInArg0: true,
11543 asm: x86.ACMOVLGT,
11544 reg: regInfo{
11545 inputs: []inputInfo{
11546 {0, 49135},
11547 {1, 49135},
11548 },
11549 outputs: []outputInfo{
11550 {0, 49135},
11551 },
11552 },
11553 },
11554 {
11555 name: "CMOVLLE",
11556 argLen: 3,
11557 resultInArg0: true,
11558 asm: x86.ACMOVLLE,
11559 reg: regInfo{
11560 inputs: []inputInfo{
11561 {0, 49135},
11562 {1, 49135},
11563 },
11564 outputs: []outputInfo{
11565 {0, 49135},
11566 },
11567 },
11568 },
11569 {
11570 name: "CMOVLGE",
11571 argLen: 3,
11572 resultInArg0: true,
11573 asm: x86.ACMOVLGE,
11574 reg: regInfo{
11575 inputs: []inputInfo{
11576 {0, 49135},
11577 {1, 49135},
11578 },
11579 outputs: []outputInfo{
11580 {0, 49135},
11581 },
11582 },
11583 },
11584 {
11585 name: "CMOVLLS",
11586 argLen: 3,
11587 resultInArg0: true,
11588 asm: x86.ACMOVLLS,
11589 reg: regInfo{
11590 inputs: []inputInfo{
11591 {0, 49135},
11592 {1, 49135},
11593 },
11594 outputs: []outputInfo{
11595 {0, 49135},
11596 },
11597 },
11598 },
11599 {
11600 name: "CMOVLHI",
11601 argLen: 3,
11602 resultInArg0: true,
11603 asm: x86.ACMOVLHI,
11604 reg: regInfo{
11605 inputs: []inputInfo{
11606 {0, 49135},
11607 {1, 49135},
11608 },
11609 outputs: []outputInfo{
11610 {0, 49135},
11611 },
11612 },
11613 },
11614 {
11615 name: "CMOVLCC",
11616 argLen: 3,
11617 resultInArg0: true,
11618 asm: x86.ACMOVLCC,
11619 reg: regInfo{
11620 inputs: []inputInfo{
11621 {0, 49135},
11622 {1, 49135},
11623 },
11624 outputs: []outputInfo{
11625 {0, 49135},
11626 },
11627 },
11628 },
11629 {
11630 name: "CMOVLCS",
11631 argLen: 3,
11632 resultInArg0: true,
11633 asm: x86.ACMOVLCS,
11634 reg: regInfo{
11635 inputs: []inputInfo{
11636 {0, 49135},
11637 {1, 49135},
11638 },
11639 outputs: []outputInfo{
11640 {0, 49135},
11641 },
11642 },
11643 },
11644 {
11645 name: "CMOVWEQ",
11646 argLen: 3,
11647 resultInArg0: true,
11648 asm: x86.ACMOVWEQ,
11649 reg: regInfo{
11650 inputs: []inputInfo{
11651 {0, 49135},
11652 {1, 49135},
11653 },
11654 outputs: []outputInfo{
11655 {0, 49135},
11656 },
11657 },
11658 },
11659 {
11660 name: "CMOVWNE",
11661 argLen: 3,
11662 resultInArg0: true,
11663 asm: x86.ACMOVWNE,
11664 reg: regInfo{
11665 inputs: []inputInfo{
11666 {0, 49135},
11667 {1, 49135},
11668 },
11669 outputs: []outputInfo{
11670 {0, 49135},
11671 },
11672 },
11673 },
11674 {
11675 name: "CMOVWLT",
11676 argLen: 3,
11677 resultInArg0: true,
11678 asm: x86.ACMOVWLT,
11679 reg: regInfo{
11680 inputs: []inputInfo{
11681 {0, 49135},
11682 {1, 49135},
11683 },
11684 outputs: []outputInfo{
11685 {0, 49135},
11686 },
11687 },
11688 },
11689 {
11690 name: "CMOVWGT",
11691 argLen: 3,
11692 resultInArg0: true,
11693 asm: x86.ACMOVWGT,
11694 reg: regInfo{
11695 inputs: []inputInfo{
11696 {0, 49135},
11697 {1, 49135},
11698 },
11699 outputs: []outputInfo{
11700 {0, 49135},
11701 },
11702 },
11703 },
11704 {
11705 name: "CMOVWLE",
11706 argLen: 3,
11707 resultInArg0: true,
11708 asm: x86.ACMOVWLE,
11709 reg: regInfo{
11710 inputs: []inputInfo{
11711 {0, 49135},
11712 {1, 49135},
11713 },
11714 outputs: []outputInfo{
11715 {0, 49135},
11716 },
11717 },
11718 },
11719 {
11720 name: "CMOVWGE",
11721 argLen: 3,
11722 resultInArg0: true,
11723 asm: x86.ACMOVWGE,
11724 reg: regInfo{
11725 inputs: []inputInfo{
11726 {0, 49135},
11727 {1, 49135},
11728 },
11729 outputs: []outputInfo{
11730 {0, 49135},
11731 },
11732 },
11733 },
11734 {
11735 name: "CMOVWLS",
11736 argLen: 3,
11737 resultInArg0: true,
11738 asm: x86.ACMOVWLS,
11739 reg: regInfo{
11740 inputs: []inputInfo{
11741 {0, 49135},
11742 {1, 49135},
11743 },
11744 outputs: []outputInfo{
11745 {0, 49135},
11746 },
11747 },
11748 },
11749 {
11750 name: "CMOVWHI",
11751 argLen: 3,
11752 resultInArg0: true,
11753 asm: x86.ACMOVWHI,
11754 reg: regInfo{
11755 inputs: []inputInfo{
11756 {0, 49135},
11757 {1, 49135},
11758 },
11759 outputs: []outputInfo{
11760 {0, 49135},
11761 },
11762 },
11763 },
11764 {
11765 name: "CMOVWCC",
11766 argLen: 3,
11767 resultInArg0: true,
11768 asm: x86.ACMOVWCC,
11769 reg: regInfo{
11770 inputs: []inputInfo{
11771 {0, 49135},
11772 {1, 49135},
11773 },
11774 outputs: []outputInfo{
11775 {0, 49135},
11776 },
11777 },
11778 },
11779 {
11780 name: "CMOVWCS",
11781 argLen: 3,
11782 resultInArg0: true,
11783 asm: x86.ACMOVWCS,
11784 reg: regInfo{
11785 inputs: []inputInfo{
11786 {0, 49135},
11787 {1, 49135},
11788 },
11789 outputs: []outputInfo{
11790 {0, 49135},
11791 },
11792 },
11793 },
11794 {
11795 name: "CMOVQEQF",
11796 argLen: 3,
11797 resultInArg0: true,
11798 needIntTemp: true,
11799 asm: x86.ACMOVQNE,
11800 reg: regInfo{
11801 inputs: []inputInfo{
11802 {0, 49135},
11803 {1, 49135},
11804 },
11805 outputs: []outputInfo{
11806 {0, 49135},
11807 },
11808 },
11809 },
11810 {
11811 name: "CMOVQNEF",
11812 argLen: 3,
11813 resultInArg0: true,
11814 asm: x86.ACMOVQNE,
11815 reg: regInfo{
11816 inputs: []inputInfo{
11817 {0, 49135},
11818 {1, 49135},
11819 },
11820 outputs: []outputInfo{
11821 {0, 49135},
11822 },
11823 },
11824 },
11825 {
11826 name: "CMOVQGTF",
11827 argLen: 3,
11828 resultInArg0: true,
11829 asm: x86.ACMOVQHI,
11830 reg: regInfo{
11831 inputs: []inputInfo{
11832 {0, 49135},
11833 {1, 49135},
11834 },
11835 outputs: []outputInfo{
11836 {0, 49135},
11837 },
11838 },
11839 },
11840 {
11841 name: "CMOVQGEF",
11842 argLen: 3,
11843 resultInArg0: true,
11844 asm: x86.ACMOVQCC,
11845 reg: regInfo{
11846 inputs: []inputInfo{
11847 {0, 49135},
11848 {1, 49135},
11849 },
11850 outputs: []outputInfo{
11851 {0, 49135},
11852 },
11853 },
11854 },
11855 {
11856 name: "CMOVLEQF",
11857 argLen: 3,
11858 resultInArg0: true,
11859 needIntTemp: true,
11860 asm: x86.ACMOVLNE,
11861 reg: regInfo{
11862 inputs: []inputInfo{
11863 {0, 49135},
11864 {1, 49135},
11865 },
11866 outputs: []outputInfo{
11867 {0, 49135},
11868 },
11869 },
11870 },
11871 {
11872 name: "CMOVLNEF",
11873 argLen: 3,
11874 resultInArg0: true,
11875 asm: x86.ACMOVLNE,
11876 reg: regInfo{
11877 inputs: []inputInfo{
11878 {0, 49135},
11879 {1, 49135},
11880 },
11881 outputs: []outputInfo{
11882 {0, 49135},
11883 },
11884 },
11885 },
11886 {
11887 name: "CMOVLGTF",
11888 argLen: 3,
11889 resultInArg0: true,
11890 asm: x86.ACMOVLHI,
11891 reg: regInfo{
11892 inputs: []inputInfo{
11893 {0, 49135},
11894 {1, 49135},
11895 },
11896 outputs: []outputInfo{
11897 {0, 49135},
11898 },
11899 },
11900 },
11901 {
11902 name: "CMOVLGEF",
11903 argLen: 3,
11904 resultInArg0: true,
11905 asm: x86.ACMOVLCC,
11906 reg: regInfo{
11907 inputs: []inputInfo{
11908 {0, 49135},
11909 {1, 49135},
11910 },
11911 outputs: []outputInfo{
11912 {0, 49135},
11913 },
11914 },
11915 },
11916 {
11917 name: "CMOVWEQF",
11918 argLen: 3,
11919 resultInArg0: true,
11920 needIntTemp: true,
11921 asm: x86.ACMOVWNE,
11922 reg: regInfo{
11923 inputs: []inputInfo{
11924 {0, 49135},
11925 {1, 49135},
11926 },
11927 outputs: []outputInfo{
11928 {0, 49135},
11929 },
11930 },
11931 },
11932 {
11933 name: "CMOVWNEF",
11934 argLen: 3,
11935 resultInArg0: true,
11936 asm: x86.ACMOVWNE,
11937 reg: regInfo{
11938 inputs: []inputInfo{
11939 {0, 49135},
11940 {1, 49135},
11941 },
11942 outputs: []outputInfo{
11943 {0, 49135},
11944 },
11945 },
11946 },
11947 {
11948 name: "CMOVWGTF",
11949 argLen: 3,
11950 resultInArg0: true,
11951 asm: x86.ACMOVWHI,
11952 reg: regInfo{
11953 inputs: []inputInfo{
11954 {0, 49135},
11955 {1, 49135},
11956 },
11957 outputs: []outputInfo{
11958 {0, 49135},
11959 },
11960 },
11961 },
11962 {
11963 name: "CMOVWGEF",
11964 argLen: 3,
11965 resultInArg0: true,
11966 asm: x86.ACMOVWCC,
11967 reg: regInfo{
11968 inputs: []inputInfo{
11969 {0, 49135},
11970 {1, 49135},
11971 },
11972 outputs: []outputInfo{
11973 {0, 49135},
11974 },
11975 },
11976 },
11977 {
11978 name: "BSWAPQ",
11979 argLen: 1,
11980 resultInArg0: true,
11981 asm: x86.ABSWAPQ,
11982 reg: regInfo{
11983 inputs: []inputInfo{
11984 {0, 49135},
11985 },
11986 outputs: []outputInfo{
11987 {0, 49135},
11988 },
11989 },
11990 },
11991 {
11992 name: "BSWAPL",
11993 argLen: 1,
11994 resultInArg0: true,
11995 asm: x86.ABSWAPL,
11996 reg: regInfo{
11997 inputs: []inputInfo{
11998 {0, 49135},
11999 },
12000 outputs: []outputInfo{
12001 {0, 49135},
12002 },
12003 },
12004 },
12005 {
12006 name: "POPCNTQ",
12007 argLen: 1,
12008 clobberFlags: true,
12009 asm: x86.APOPCNTQ,
12010 reg: regInfo{
12011 inputs: []inputInfo{
12012 {0, 49135},
12013 },
12014 outputs: []outputInfo{
12015 {0, 49135},
12016 },
12017 },
12018 },
12019 {
12020 name: "POPCNTL",
12021 argLen: 1,
12022 clobberFlags: true,
12023 asm: x86.APOPCNTL,
12024 reg: regInfo{
12025 inputs: []inputInfo{
12026 {0, 49135},
12027 },
12028 outputs: []outputInfo{
12029 {0, 49135},
12030 },
12031 },
12032 },
12033 {
12034 name: "SQRTSD",
12035 argLen: 1,
12036 asm: x86.ASQRTSD,
12037 reg: regInfo{
12038 inputs: []inputInfo{
12039 {0, 2147418112},
12040 },
12041 outputs: []outputInfo{
12042 {0, 2147418112},
12043 },
12044 },
12045 },
12046 {
12047 name: "SQRTSS",
12048 argLen: 1,
12049 asm: x86.ASQRTSS,
12050 reg: regInfo{
12051 inputs: []inputInfo{
12052 {0, 2147418112},
12053 },
12054 outputs: []outputInfo{
12055 {0, 2147418112},
12056 },
12057 },
12058 },
12059 {
12060 name: "ROUNDSD",
12061 auxType: auxInt8,
12062 argLen: 1,
12063 asm: x86.AROUNDSD,
12064 reg: regInfo{
12065 inputs: []inputInfo{
12066 {0, 2147418112},
12067 },
12068 outputs: []outputInfo{
12069 {0, 2147418112},
12070 },
12071 },
12072 },
12073 {
12074 name: "LoweredRound32F",
12075 argLen: 1,
12076 resultInArg0: true,
12077 zeroWidth: true,
12078 reg: regInfo{
12079 inputs: []inputInfo{
12080 {0, 2147418112},
12081 },
12082 outputs: []outputInfo{
12083 {0, 2147418112},
12084 },
12085 },
12086 },
12087 {
12088 name: "LoweredRound64F",
12089 argLen: 1,
12090 resultInArg0: true,
12091 zeroWidth: true,
12092 reg: regInfo{
12093 inputs: []inputInfo{
12094 {0, 2147418112},
12095 },
12096 outputs: []outputInfo{
12097 {0, 2147418112},
12098 },
12099 },
12100 },
12101 {
12102 name: "VFMADD231SS",
12103 argLen: 3,
12104 resultInArg0: true,
12105 asm: x86.AVFMADD231SS,
12106 reg: regInfo{
12107 inputs: []inputInfo{
12108 {0, 2147418112},
12109 {1, 2147418112},
12110 {2, 2147418112},
12111 },
12112 outputs: []outputInfo{
12113 {0, 2147418112},
12114 },
12115 },
12116 },
12117 {
12118 name: "VFMADD231SD",
12119 argLen: 3,
12120 resultInArg0: true,
12121 asm: x86.AVFMADD231SD,
12122 reg: regInfo{
12123 inputs: []inputInfo{
12124 {0, 2147418112},
12125 {1, 2147418112},
12126 {2, 2147418112},
12127 },
12128 outputs: []outputInfo{
12129 {0, 2147418112},
12130 },
12131 },
12132 },
12133 {
12134 name: "MINSD",
12135 argLen: 2,
12136 resultInArg0: true,
12137 asm: x86.AMINSD,
12138 reg: regInfo{
12139 inputs: []inputInfo{
12140 {0, 2147418112},
12141 {1, 2147418112},
12142 },
12143 outputs: []outputInfo{
12144 {0, 2147418112},
12145 },
12146 },
12147 },
12148 {
12149 name: "MINSS",
12150 argLen: 2,
12151 resultInArg0: true,
12152 asm: x86.AMINSS,
12153 reg: regInfo{
12154 inputs: []inputInfo{
12155 {0, 2147418112},
12156 {1, 2147418112},
12157 },
12158 outputs: []outputInfo{
12159 {0, 2147418112},
12160 },
12161 },
12162 },
12163 {
12164 name: "SBBQcarrymask",
12165 argLen: 1,
12166 asm: x86.ASBBQ,
12167 reg: regInfo{
12168 outputs: []outputInfo{
12169 {0, 49135},
12170 },
12171 },
12172 },
12173 {
12174 name: "SBBLcarrymask",
12175 argLen: 1,
12176 asm: x86.ASBBL,
12177 reg: regInfo{
12178 outputs: []outputInfo{
12179 {0, 49135},
12180 },
12181 },
12182 },
12183 {
12184 name: "SETEQ",
12185 argLen: 1,
12186 asm: x86.ASETEQ,
12187 reg: regInfo{
12188 outputs: []outputInfo{
12189 {0, 49135},
12190 },
12191 },
12192 },
12193 {
12194 name: "SETNE",
12195 argLen: 1,
12196 asm: x86.ASETNE,
12197 reg: regInfo{
12198 outputs: []outputInfo{
12199 {0, 49135},
12200 },
12201 },
12202 },
12203 {
12204 name: "SETL",
12205 argLen: 1,
12206 asm: x86.ASETLT,
12207 reg: regInfo{
12208 outputs: []outputInfo{
12209 {0, 49135},
12210 },
12211 },
12212 },
12213 {
12214 name: "SETLE",
12215 argLen: 1,
12216 asm: x86.ASETLE,
12217 reg: regInfo{
12218 outputs: []outputInfo{
12219 {0, 49135},
12220 },
12221 },
12222 },
12223 {
12224 name: "SETG",
12225 argLen: 1,
12226 asm: x86.ASETGT,
12227 reg: regInfo{
12228 outputs: []outputInfo{
12229 {0, 49135},
12230 },
12231 },
12232 },
12233 {
12234 name: "SETGE",
12235 argLen: 1,
12236 asm: x86.ASETGE,
12237 reg: regInfo{
12238 outputs: []outputInfo{
12239 {0, 49135},
12240 },
12241 },
12242 },
12243 {
12244 name: "SETB",
12245 argLen: 1,
12246 asm: x86.ASETCS,
12247 reg: regInfo{
12248 outputs: []outputInfo{
12249 {0, 49135},
12250 },
12251 },
12252 },
12253 {
12254 name: "SETBE",
12255 argLen: 1,
12256 asm: x86.ASETLS,
12257 reg: regInfo{
12258 outputs: []outputInfo{
12259 {0, 49135},
12260 },
12261 },
12262 },
12263 {
12264 name: "SETA",
12265 argLen: 1,
12266 asm: x86.ASETHI,
12267 reg: regInfo{
12268 outputs: []outputInfo{
12269 {0, 49135},
12270 },
12271 },
12272 },
12273 {
12274 name: "SETAE",
12275 argLen: 1,
12276 asm: x86.ASETCC,
12277 reg: regInfo{
12278 outputs: []outputInfo{
12279 {0, 49135},
12280 },
12281 },
12282 },
12283 {
12284 name: "SETO",
12285 argLen: 1,
12286 asm: x86.ASETOS,
12287 reg: regInfo{
12288 outputs: []outputInfo{
12289 {0, 49135},
12290 },
12291 },
12292 },
12293 {
12294 name: "SETEQstore",
12295 auxType: auxSymOff,
12296 argLen: 3,
12297 faultOnNilArg0: true,
12298 symEffect: SymWrite,
12299 asm: x86.ASETEQ,
12300 reg: regInfo{
12301 inputs: []inputInfo{
12302 {0, 4295032831},
12303 },
12304 },
12305 },
12306 {
12307 name: "SETNEstore",
12308 auxType: auxSymOff,
12309 argLen: 3,
12310 faultOnNilArg0: true,
12311 symEffect: SymWrite,
12312 asm: x86.ASETNE,
12313 reg: regInfo{
12314 inputs: []inputInfo{
12315 {0, 4295032831},
12316 },
12317 },
12318 },
12319 {
12320 name: "SETLstore",
12321 auxType: auxSymOff,
12322 argLen: 3,
12323 faultOnNilArg0: true,
12324 symEffect: SymWrite,
12325 asm: x86.ASETLT,
12326 reg: regInfo{
12327 inputs: []inputInfo{
12328 {0, 4295032831},
12329 },
12330 },
12331 },
12332 {
12333 name: "SETLEstore",
12334 auxType: auxSymOff,
12335 argLen: 3,
12336 faultOnNilArg0: true,
12337 symEffect: SymWrite,
12338 asm: x86.ASETLE,
12339 reg: regInfo{
12340 inputs: []inputInfo{
12341 {0, 4295032831},
12342 },
12343 },
12344 },
12345 {
12346 name: "SETGstore",
12347 auxType: auxSymOff,
12348 argLen: 3,
12349 faultOnNilArg0: true,
12350 symEffect: SymWrite,
12351 asm: x86.ASETGT,
12352 reg: regInfo{
12353 inputs: []inputInfo{
12354 {0, 4295032831},
12355 },
12356 },
12357 },
12358 {
12359 name: "SETGEstore",
12360 auxType: auxSymOff,
12361 argLen: 3,
12362 faultOnNilArg0: true,
12363 symEffect: SymWrite,
12364 asm: x86.ASETGE,
12365 reg: regInfo{
12366 inputs: []inputInfo{
12367 {0, 4295032831},
12368 },
12369 },
12370 },
12371 {
12372 name: "SETBstore",
12373 auxType: auxSymOff,
12374 argLen: 3,
12375 faultOnNilArg0: true,
12376 symEffect: SymWrite,
12377 asm: x86.ASETCS,
12378 reg: regInfo{
12379 inputs: []inputInfo{
12380 {0, 4295032831},
12381 },
12382 },
12383 },
12384 {
12385 name: "SETBEstore",
12386 auxType: auxSymOff,
12387 argLen: 3,
12388 faultOnNilArg0: true,
12389 symEffect: SymWrite,
12390 asm: x86.ASETLS,
12391 reg: regInfo{
12392 inputs: []inputInfo{
12393 {0, 4295032831},
12394 },
12395 },
12396 },
12397 {
12398 name: "SETAstore",
12399 auxType: auxSymOff,
12400 argLen: 3,
12401 faultOnNilArg0: true,
12402 symEffect: SymWrite,
12403 asm: x86.ASETHI,
12404 reg: regInfo{
12405 inputs: []inputInfo{
12406 {0, 4295032831},
12407 },
12408 },
12409 },
12410 {
12411 name: "SETAEstore",
12412 auxType: auxSymOff,
12413 argLen: 3,
12414 faultOnNilArg0: true,
12415 symEffect: SymWrite,
12416 asm: x86.ASETCC,
12417 reg: regInfo{
12418 inputs: []inputInfo{
12419 {0, 4295032831},
12420 },
12421 },
12422 },
12423 {
12424 name: "SETEQstoreidx1",
12425 auxType: auxSymOff,
12426 argLen: 4,
12427 commutative: true,
12428 symEffect: SymWrite,
12429 asm: x86.ASETEQ,
12430 scale: 1,
12431 reg: regInfo{
12432 inputs: []inputInfo{
12433 {1, 49151},
12434 {0, 4295032831},
12435 },
12436 },
12437 },
12438 {
12439 name: "SETNEstoreidx1",
12440 auxType: auxSymOff,
12441 argLen: 4,
12442 commutative: true,
12443 symEffect: SymWrite,
12444 asm: x86.ASETNE,
12445 scale: 1,
12446 reg: regInfo{
12447 inputs: []inputInfo{
12448 {1, 49151},
12449 {0, 4295032831},
12450 },
12451 },
12452 },
12453 {
12454 name: "SETLstoreidx1",
12455 auxType: auxSymOff,
12456 argLen: 4,
12457 commutative: true,
12458 symEffect: SymWrite,
12459 asm: x86.ASETLT,
12460 scale: 1,
12461 reg: regInfo{
12462 inputs: []inputInfo{
12463 {1, 49151},
12464 {0, 4295032831},
12465 },
12466 },
12467 },
12468 {
12469 name: "SETLEstoreidx1",
12470 auxType: auxSymOff,
12471 argLen: 4,
12472 commutative: true,
12473 symEffect: SymWrite,
12474 asm: x86.ASETLE,
12475 scale: 1,
12476 reg: regInfo{
12477 inputs: []inputInfo{
12478 {1, 49151},
12479 {0, 4295032831},
12480 },
12481 },
12482 },
12483 {
12484 name: "SETGstoreidx1",
12485 auxType: auxSymOff,
12486 argLen: 4,
12487 commutative: true,
12488 symEffect: SymWrite,
12489 asm: x86.ASETGT,
12490 scale: 1,
12491 reg: regInfo{
12492 inputs: []inputInfo{
12493 {1, 49151},
12494 {0, 4295032831},
12495 },
12496 },
12497 },
12498 {
12499 name: "SETGEstoreidx1",
12500 auxType: auxSymOff,
12501 argLen: 4,
12502 commutative: true,
12503 symEffect: SymWrite,
12504 asm: x86.ASETGE,
12505 scale: 1,
12506 reg: regInfo{
12507 inputs: []inputInfo{
12508 {1, 49151},
12509 {0, 4295032831},
12510 },
12511 },
12512 },
12513 {
12514 name: "SETBstoreidx1",
12515 auxType: auxSymOff,
12516 argLen: 4,
12517 commutative: true,
12518 symEffect: SymWrite,
12519 asm: x86.ASETCS,
12520 scale: 1,
12521 reg: regInfo{
12522 inputs: []inputInfo{
12523 {1, 49151},
12524 {0, 4295032831},
12525 },
12526 },
12527 },
12528 {
12529 name: "SETBEstoreidx1",
12530 auxType: auxSymOff,
12531 argLen: 4,
12532 commutative: true,
12533 symEffect: SymWrite,
12534 asm: x86.ASETLS,
12535 scale: 1,
12536 reg: regInfo{
12537 inputs: []inputInfo{
12538 {1, 49151},
12539 {0, 4295032831},
12540 },
12541 },
12542 },
12543 {
12544 name: "SETAstoreidx1",
12545 auxType: auxSymOff,
12546 argLen: 4,
12547 commutative: true,
12548 symEffect: SymWrite,
12549 asm: x86.ASETHI,
12550 scale: 1,
12551 reg: regInfo{
12552 inputs: []inputInfo{
12553 {1, 49151},
12554 {0, 4295032831},
12555 },
12556 },
12557 },
12558 {
12559 name: "SETAEstoreidx1",
12560 auxType: auxSymOff,
12561 argLen: 4,
12562 commutative: true,
12563 symEffect: SymWrite,
12564 asm: x86.ASETCC,
12565 scale: 1,
12566 reg: regInfo{
12567 inputs: []inputInfo{
12568 {1, 49151},
12569 {0, 4295032831},
12570 },
12571 },
12572 },
12573 {
12574 name: "SETEQF",
12575 argLen: 1,
12576 clobberFlags: true,
12577 needIntTemp: true,
12578 asm: x86.ASETEQ,
12579 reg: regInfo{
12580 outputs: []outputInfo{
12581 {0, 49135},
12582 },
12583 },
12584 },
12585 {
12586 name: "SETNEF",
12587 argLen: 1,
12588 clobberFlags: true,
12589 needIntTemp: true,
12590 asm: x86.ASETNE,
12591 reg: regInfo{
12592 outputs: []outputInfo{
12593 {0, 49135},
12594 },
12595 },
12596 },
12597 {
12598 name: "SETORD",
12599 argLen: 1,
12600 asm: x86.ASETPC,
12601 reg: regInfo{
12602 outputs: []outputInfo{
12603 {0, 49135},
12604 },
12605 },
12606 },
12607 {
12608 name: "SETNAN",
12609 argLen: 1,
12610 asm: x86.ASETPS,
12611 reg: regInfo{
12612 outputs: []outputInfo{
12613 {0, 49135},
12614 },
12615 },
12616 },
12617 {
12618 name: "SETGF",
12619 argLen: 1,
12620 asm: x86.ASETHI,
12621 reg: regInfo{
12622 outputs: []outputInfo{
12623 {0, 49135},
12624 },
12625 },
12626 },
12627 {
12628 name: "SETGEF",
12629 argLen: 1,
12630 asm: x86.ASETCC,
12631 reg: regInfo{
12632 outputs: []outputInfo{
12633 {0, 49135},
12634 },
12635 },
12636 },
12637 {
12638 name: "MOVBQSX",
12639 argLen: 1,
12640 asm: x86.AMOVBQSX,
12641 reg: regInfo{
12642 inputs: []inputInfo{
12643 {0, 49135},
12644 },
12645 outputs: []outputInfo{
12646 {0, 49135},
12647 },
12648 },
12649 },
12650 {
12651 name: "MOVBQZX",
12652 argLen: 1,
12653 asm: x86.AMOVBLZX,
12654 reg: regInfo{
12655 inputs: []inputInfo{
12656 {0, 49135},
12657 },
12658 outputs: []outputInfo{
12659 {0, 49135},
12660 },
12661 },
12662 },
12663 {
12664 name: "MOVWQSX",
12665 argLen: 1,
12666 asm: x86.AMOVWQSX,
12667 reg: regInfo{
12668 inputs: []inputInfo{
12669 {0, 49135},
12670 },
12671 outputs: []outputInfo{
12672 {0, 49135},
12673 },
12674 },
12675 },
12676 {
12677 name: "MOVWQZX",
12678 argLen: 1,
12679 asm: x86.AMOVWLZX,
12680 reg: regInfo{
12681 inputs: []inputInfo{
12682 {0, 49135},
12683 },
12684 outputs: []outputInfo{
12685 {0, 49135},
12686 },
12687 },
12688 },
12689 {
12690 name: "MOVLQSX",
12691 argLen: 1,
12692 asm: x86.AMOVLQSX,
12693 reg: regInfo{
12694 inputs: []inputInfo{
12695 {0, 49135},
12696 },
12697 outputs: []outputInfo{
12698 {0, 49135},
12699 },
12700 },
12701 },
12702 {
12703 name: "MOVLQZX",
12704 argLen: 1,
12705 asm: x86.AMOVL,
12706 reg: regInfo{
12707 inputs: []inputInfo{
12708 {0, 49135},
12709 },
12710 outputs: []outputInfo{
12711 {0, 49135},
12712 },
12713 },
12714 },
12715 {
12716 name: "MOVLconst",
12717 auxType: auxInt32,
12718 argLen: 0,
12719 rematerializeable: true,
12720 asm: x86.AMOVL,
12721 reg: regInfo{
12722 outputs: []outputInfo{
12723 {0, 49135},
12724 },
12725 },
12726 },
12727 {
12728 name: "MOVQconst",
12729 auxType: auxInt64,
12730 argLen: 0,
12731 rematerializeable: true,
12732 asm: x86.AMOVQ,
12733 reg: regInfo{
12734 outputs: []outputInfo{
12735 {0, 49135},
12736 },
12737 },
12738 },
12739 {
12740 name: "CVTTSD2SL",
12741 argLen: 1,
12742 asm: x86.ACVTTSD2SL,
12743 reg: regInfo{
12744 inputs: []inputInfo{
12745 {0, 2147418112},
12746 },
12747 outputs: []outputInfo{
12748 {0, 49135},
12749 },
12750 },
12751 },
12752 {
12753 name: "CVTTSD2SQ",
12754 argLen: 1,
12755 asm: x86.ACVTTSD2SQ,
12756 reg: regInfo{
12757 inputs: []inputInfo{
12758 {0, 2147418112},
12759 },
12760 outputs: []outputInfo{
12761 {0, 49135},
12762 },
12763 },
12764 },
12765 {
12766 name: "CVTTSS2SL",
12767 argLen: 1,
12768 asm: x86.ACVTTSS2SL,
12769 reg: regInfo{
12770 inputs: []inputInfo{
12771 {0, 2147418112},
12772 },
12773 outputs: []outputInfo{
12774 {0, 49135},
12775 },
12776 },
12777 },
12778 {
12779 name: "CVTTSS2SQ",
12780 argLen: 1,
12781 asm: x86.ACVTTSS2SQ,
12782 reg: regInfo{
12783 inputs: []inputInfo{
12784 {0, 2147418112},
12785 },
12786 outputs: []outputInfo{
12787 {0, 49135},
12788 },
12789 },
12790 },
12791 {
12792 name: "CVTSL2SS",
12793 argLen: 1,
12794 asm: x86.ACVTSL2SS,
12795 reg: regInfo{
12796 inputs: []inputInfo{
12797 {0, 49135},
12798 },
12799 outputs: []outputInfo{
12800 {0, 2147418112},
12801 },
12802 },
12803 },
12804 {
12805 name: "CVTSL2SD",
12806 argLen: 1,
12807 asm: x86.ACVTSL2SD,
12808 reg: regInfo{
12809 inputs: []inputInfo{
12810 {0, 49135},
12811 },
12812 outputs: []outputInfo{
12813 {0, 2147418112},
12814 },
12815 },
12816 },
12817 {
12818 name: "CVTSQ2SS",
12819 argLen: 1,
12820 asm: x86.ACVTSQ2SS,
12821 reg: regInfo{
12822 inputs: []inputInfo{
12823 {0, 49135},
12824 },
12825 outputs: []outputInfo{
12826 {0, 2147418112},
12827 },
12828 },
12829 },
12830 {
12831 name: "CVTSQ2SD",
12832 argLen: 1,
12833 asm: x86.ACVTSQ2SD,
12834 reg: regInfo{
12835 inputs: []inputInfo{
12836 {0, 49135},
12837 },
12838 outputs: []outputInfo{
12839 {0, 2147418112},
12840 },
12841 },
12842 },
12843 {
12844 name: "CVTSD2SS",
12845 argLen: 1,
12846 asm: x86.ACVTSD2SS,
12847 reg: regInfo{
12848 inputs: []inputInfo{
12849 {0, 2147418112},
12850 },
12851 outputs: []outputInfo{
12852 {0, 2147418112},
12853 },
12854 },
12855 },
12856 {
12857 name: "CVTSS2SD",
12858 argLen: 1,
12859 asm: x86.ACVTSS2SD,
12860 reg: regInfo{
12861 inputs: []inputInfo{
12862 {0, 2147418112},
12863 },
12864 outputs: []outputInfo{
12865 {0, 2147418112},
12866 },
12867 },
12868 },
12869 {
12870 name: "MOVQi2f",
12871 argLen: 1,
12872 reg: regInfo{
12873 inputs: []inputInfo{
12874 {0, 49135},
12875 },
12876 outputs: []outputInfo{
12877 {0, 2147418112},
12878 },
12879 },
12880 },
12881 {
12882 name: "MOVQf2i",
12883 argLen: 1,
12884 reg: regInfo{
12885 inputs: []inputInfo{
12886 {0, 2147418112},
12887 },
12888 outputs: []outputInfo{
12889 {0, 49135},
12890 },
12891 },
12892 },
12893 {
12894 name: "MOVLi2f",
12895 argLen: 1,
12896 reg: regInfo{
12897 inputs: []inputInfo{
12898 {0, 49135},
12899 },
12900 outputs: []outputInfo{
12901 {0, 2147418112},
12902 },
12903 },
12904 },
12905 {
12906 name: "MOVLf2i",
12907 argLen: 1,
12908 reg: regInfo{
12909 inputs: []inputInfo{
12910 {0, 2147418112},
12911 },
12912 outputs: []outputInfo{
12913 {0, 49135},
12914 },
12915 },
12916 },
12917 {
12918 name: "PXOR",
12919 argLen: 2,
12920 commutative: true,
12921 resultInArg0: true,
12922 asm: x86.APXOR,
12923 reg: regInfo{
12924 inputs: []inputInfo{
12925 {0, 2147418112},
12926 {1, 2147418112},
12927 },
12928 outputs: []outputInfo{
12929 {0, 2147418112},
12930 },
12931 },
12932 },
12933 {
12934 name: "POR",
12935 argLen: 2,
12936 commutative: true,
12937 resultInArg0: true,
12938 asm: x86.APOR,
12939 reg: regInfo{
12940 inputs: []inputInfo{
12941 {0, 2147418112},
12942 {1, 2147418112},
12943 },
12944 outputs: []outputInfo{
12945 {0, 2147418112},
12946 },
12947 },
12948 },
12949 {
12950 name: "LEAQ",
12951 auxType: auxSymOff,
12952 argLen: 1,
12953 rematerializeable: true,
12954 symEffect: SymAddr,
12955 asm: x86.ALEAQ,
12956 reg: regInfo{
12957 inputs: []inputInfo{
12958 {0, 4295032831},
12959 },
12960 outputs: []outputInfo{
12961 {0, 49135},
12962 },
12963 },
12964 },
12965 {
12966 name: "LEAL",
12967 auxType: auxSymOff,
12968 argLen: 1,
12969 rematerializeable: true,
12970 symEffect: SymAddr,
12971 asm: x86.ALEAL,
12972 reg: regInfo{
12973 inputs: []inputInfo{
12974 {0, 4295032831},
12975 },
12976 outputs: []outputInfo{
12977 {0, 49135},
12978 },
12979 },
12980 },
12981 {
12982 name: "LEAW",
12983 auxType: auxSymOff,
12984 argLen: 1,
12985 rematerializeable: true,
12986 symEffect: SymAddr,
12987 asm: x86.ALEAW,
12988 reg: regInfo{
12989 inputs: []inputInfo{
12990 {0, 4295032831},
12991 },
12992 outputs: []outputInfo{
12993 {0, 49135},
12994 },
12995 },
12996 },
12997 {
12998 name: "LEAQ1",
12999 auxType: auxSymOff,
13000 argLen: 2,
13001 commutative: true,
13002 symEffect: SymAddr,
13003 asm: x86.ALEAQ,
13004 scale: 1,
13005 reg: regInfo{
13006 inputs: []inputInfo{
13007 {1, 49151},
13008 {0, 4295032831},
13009 },
13010 outputs: []outputInfo{
13011 {0, 49135},
13012 },
13013 },
13014 },
13015 {
13016 name: "LEAL1",
13017 auxType: auxSymOff,
13018 argLen: 2,
13019 commutative: true,
13020 symEffect: SymAddr,
13021 asm: x86.ALEAL,
13022 scale: 1,
13023 reg: regInfo{
13024 inputs: []inputInfo{
13025 {1, 49151},
13026 {0, 4295032831},
13027 },
13028 outputs: []outputInfo{
13029 {0, 49135},
13030 },
13031 },
13032 },
13033 {
13034 name: "LEAW1",
13035 auxType: auxSymOff,
13036 argLen: 2,
13037 commutative: true,
13038 symEffect: SymAddr,
13039 asm: x86.ALEAW,
13040 scale: 1,
13041 reg: regInfo{
13042 inputs: []inputInfo{
13043 {1, 49151},
13044 {0, 4295032831},
13045 },
13046 outputs: []outputInfo{
13047 {0, 49135},
13048 },
13049 },
13050 },
13051 {
13052 name: "LEAQ2",
13053 auxType: auxSymOff,
13054 argLen: 2,
13055 symEffect: SymAddr,
13056 asm: x86.ALEAQ,
13057 scale: 2,
13058 reg: regInfo{
13059 inputs: []inputInfo{
13060 {1, 49151},
13061 {0, 4295032831},
13062 },
13063 outputs: []outputInfo{
13064 {0, 49135},
13065 },
13066 },
13067 },
13068 {
13069 name: "LEAL2",
13070 auxType: auxSymOff,
13071 argLen: 2,
13072 symEffect: SymAddr,
13073 asm: x86.ALEAL,
13074 scale: 2,
13075 reg: regInfo{
13076 inputs: []inputInfo{
13077 {1, 49151},
13078 {0, 4295032831},
13079 },
13080 outputs: []outputInfo{
13081 {0, 49135},
13082 },
13083 },
13084 },
13085 {
13086 name: "LEAW2",
13087 auxType: auxSymOff,
13088 argLen: 2,
13089 symEffect: SymAddr,
13090 asm: x86.ALEAW,
13091 scale: 2,
13092 reg: regInfo{
13093 inputs: []inputInfo{
13094 {1, 49151},
13095 {0, 4295032831},
13096 },
13097 outputs: []outputInfo{
13098 {0, 49135},
13099 },
13100 },
13101 },
13102 {
13103 name: "LEAQ4",
13104 auxType: auxSymOff,
13105 argLen: 2,
13106 symEffect: SymAddr,
13107 asm: x86.ALEAQ,
13108 scale: 4,
13109 reg: regInfo{
13110 inputs: []inputInfo{
13111 {1, 49151},
13112 {0, 4295032831},
13113 },
13114 outputs: []outputInfo{
13115 {0, 49135},
13116 },
13117 },
13118 },
13119 {
13120 name: "LEAL4",
13121 auxType: auxSymOff,
13122 argLen: 2,
13123 symEffect: SymAddr,
13124 asm: x86.ALEAL,
13125 scale: 4,
13126 reg: regInfo{
13127 inputs: []inputInfo{
13128 {1, 49151},
13129 {0, 4295032831},
13130 },
13131 outputs: []outputInfo{
13132 {0, 49135},
13133 },
13134 },
13135 },
13136 {
13137 name: "LEAW4",
13138 auxType: auxSymOff,
13139 argLen: 2,
13140 symEffect: SymAddr,
13141 asm: x86.ALEAW,
13142 scale: 4,
13143 reg: regInfo{
13144 inputs: []inputInfo{
13145 {1, 49151},
13146 {0, 4295032831},
13147 },
13148 outputs: []outputInfo{
13149 {0, 49135},
13150 },
13151 },
13152 },
13153 {
13154 name: "LEAQ8",
13155 auxType: auxSymOff,
13156 argLen: 2,
13157 symEffect: SymAddr,
13158 asm: x86.ALEAQ,
13159 scale: 8,
13160 reg: regInfo{
13161 inputs: []inputInfo{
13162 {1, 49151},
13163 {0, 4295032831},
13164 },
13165 outputs: []outputInfo{
13166 {0, 49135},
13167 },
13168 },
13169 },
13170 {
13171 name: "LEAL8",
13172 auxType: auxSymOff,
13173 argLen: 2,
13174 symEffect: SymAddr,
13175 asm: x86.ALEAL,
13176 scale: 8,
13177 reg: regInfo{
13178 inputs: []inputInfo{
13179 {1, 49151},
13180 {0, 4295032831},
13181 },
13182 outputs: []outputInfo{
13183 {0, 49135},
13184 },
13185 },
13186 },
13187 {
13188 name: "LEAW8",
13189 auxType: auxSymOff,
13190 argLen: 2,
13191 symEffect: SymAddr,
13192 asm: x86.ALEAW,
13193 scale: 8,
13194 reg: regInfo{
13195 inputs: []inputInfo{
13196 {1, 49151},
13197 {0, 4295032831},
13198 },
13199 outputs: []outputInfo{
13200 {0, 49135},
13201 },
13202 },
13203 },
13204 {
13205 name: "MOVBload",
13206 auxType: auxSymOff,
13207 argLen: 2,
13208 faultOnNilArg0: true,
13209 symEffect: SymRead,
13210 asm: x86.AMOVBLZX,
13211 reg: regInfo{
13212 inputs: []inputInfo{
13213 {0, 4295032831},
13214 },
13215 outputs: []outputInfo{
13216 {0, 49135},
13217 },
13218 },
13219 },
13220 {
13221 name: "MOVBQSXload",
13222 auxType: auxSymOff,
13223 argLen: 2,
13224 faultOnNilArg0: true,
13225 symEffect: SymRead,
13226 asm: x86.AMOVBQSX,
13227 reg: regInfo{
13228 inputs: []inputInfo{
13229 {0, 4295032831},
13230 },
13231 outputs: []outputInfo{
13232 {0, 49135},
13233 },
13234 },
13235 },
13236 {
13237 name: "MOVWload",
13238 auxType: auxSymOff,
13239 argLen: 2,
13240 faultOnNilArg0: true,
13241 symEffect: SymRead,
13242 asm: x86.AMOVWLZX,
13243 reg: regInfo{
13244 inputs: []inputInfo{
13245 {0, 4295032831},
13246 },
13247 outputs: []outputInfo{
13248 {0, 49135},
13249 },
13250 },
13251 },
13252 {
13253 name: "MOVWQSXload",
13254 auxType: auxSymOff,
13255 argLen: 2,
13256 faultOnNilArg0: true,
13257 symEffect: SymRead,
13258 asm: x86.AMOVWQSX,
13259 reg: regInfo{
13260 inputs: []inputInfo{
13261 {0, 4295032831},
13262 },
13263 outputs: []outputInfo{
13264 {0, 49135},
13265 },
13266 },
13267 },
13268 {
13269 name: "MOVLload",
13270 auxType: auxSymOff,
13271 argLen: 2,
13272 faultOnNilArg0: true,
13273 symEffect: SymRead,
13274 asm: x86.AMOVL,
13275 reg: regInfo{
13276 inputs: []inputInfo{
13277 {0, 4295032831},
13278 },
13279 outputs: []outputInfo{
13280 {0, 49135},
13281 },
13282 },
13283 },
13284 {
13285 name: "MOVLQSXload",
13286 auxType: auxSymOff,
13287 argLen: 2,
13288 faultOnNilArg0: true,
13289 symEffect: SymRead,
13290 asm: x86.AMOVLQSX,
13291 reg: regInfo{
13292 inputs: []inputInfo{
13293 {0, 4295032831},
13294 },
13295 outputs: []outputInfo{
13296 {0, 49135},
13297 },
13298 },
13299 },
13300 {
13301 name: "MOVQload",
13302 auxType: auxSymOff,
13303 argLen: 2,
13304 faultOnNilArg0: true,
13305 symEffect: SymRead,
13306 asm: x86.AMOVQ,
13307 reg: regInfo{
13308 inputs: []inputInfo{
13309 {0, 4295032831},
13310 },
13311 outputs: []outputInfo{
13312 {0, 49135},
13313 },
13314 },
13315 },
13316 {
13317 name: "MOVBstore",
13318 auxType: auxSymOff,
13319 argLen: 3,
13320 faultOnNilArg0: true,
13321 symEffect: SymWrite,
13322 asm: x86.AMOVB,
13323 reg: regInfo{
13324 inputs: []inputInfo{
13325 {1, 49151},
13326 {0, 4295032831},
13327 },
13328 },
13329 },
13330 {
13331 name: "MOVWstore",
13332 auxType: auxSymOff,
13333 argLen: 3,
13334 faultOnNilArg0: true,
13335 symEffect: SymWrite,
13336 asm: x86.AMOVW,
13337 reg: regInfo{
13338 inputs: []inputInfo{
13339 {1, 49151},
13340 {0, 4295032831},
13341 },
13342 },
13343 },
13344 {
13345 name: "MOVLstore",
13346 auxType: auxSymOff,
13347 argLen: 3,
13348 faultOnNilArg0: true,
13349 symEffect: SymWrite,
13350 asm: x86.AMOVL,
13351 reg: regInfo{
13352 inputs: []inputInfo{
13353 {1, 49151},
13354 {0, 4295032831},
13355 },
13356 },
13357 },
13358 {
13359 name: "MOVQstore",
13360 auxType: auxSymOff,
13361 argLen: 3,
13362 faultOnNilArg0: true,
13363 symEffect: SymWrite,
13364 asm: x86.AMOVQ,
13365 reg: regInfo{
13366 inputs: []inputInfo{
13367 {1, 49151},
13368 {0, 4295032831},
13369 },
13370 },
13371 },
13372 {
13373 name: "MOVOload",
13374 auxType: auxSymOff,
13375 argLen: 2,
13376 faultOnNilArg0: true,
13377 symEffect: SymRead,
13378 asm: x86.AMOVUPS,
13379 reg: regInfo{
13380 inputs: []inputInfo{
13381 {0, 4295016447},
13382 },
13383 outputs: []outputInfo{
13384 {0, 2147418112},
13385 },
13386 },
13387 },
13388 {
13389 name: "MOVOstore",
13390 auxType: auxSymOff,
13391 argLen: 3,
13392 faultOnNilArg0: true,
13393 symEffect: SymWrite,
13394 asm: x86.AMOVUPS,
13395 reg: regInfo{
13396 inputs: []inputInfo{
13397 {1, 2147418112},
13398 {0, 4295016447},
13399 },
13400 },
13401 },
13402 {
13403 name: "MOVBloadidx1",
13404 auxType: auxSymOff,
13405 argLen: 3,
13406 commutative: true,
13407 symEffect: SymRead,
13408 asm: x86.AMOVBLZX,
13409 scale: 1,
13410 reg: regInfo{
13411 inputs: []inputInfo{
13412 {1, 49151},
13413 {0, 4295032831},
13414 },
13415 outputs: []outputInfo{
13416 {0, 49135},
13417 },
13418 },
13419 },
13420 {
13421 name: "MOVWloadidx1",
13422 auxType: auxSymOff,
13423 argLen: 3,
13424 commutative: true,
13425 symEffect: SymRead,
13426 asm: x86.AMOVWLZX,
13427 scale: 1,
13428 reg: regInfo{
13429 inputs: []inputInfo{
13430 {1, 49151},
13431 {0, 4295032831},
13432 },
13433 outputs: []outputInfo{
13434 {0, 49135},
13435 },
13436 },
13437 },
13438 {
13439 name: "MOVWloadidx2",
13440 auxType: auxSymOff,
13441 argLen: 3,
13442 symEffect: SymRead,
13443 asm: x86.AMOVWLZX,
13444 scale: 2,
13445 reg: regInfo{
13446 inputs: []inputInfo{
13447 {1, 49151},
13448 {0, 4295032831},
13449 },
13450 outputs: []outputInfo{
13451 {0, 49135},
13452 },
13453 },
13454 },
13455 {
13456 name: "MOVLloadidx1",
13457 auxType: auxSymOff,
13458 argLen: 3,
13459 commutative: true,
13460 symEffect: SymRead,
13461 asm: x86.AMOVL,
13462 scale: 1,
13463 reg: regInfo{
13464 inputs: []inputInfo{
13465 {1, 49151},
13466 {0, 4295032831},
13467 },
13468 outputs: []outputInfo{
13469 {0, 49135},
13470 },
13471 },
13472 },
13473 {
13474 name: "MOVLloadidx4",
13475 auxType: auxSymOff,
13476 argLen: 3,
13477 symEffect: SymRead,
13478 asm: x86.AMOVL,
13479 scale: 4,
13480 reg: regInfo{
13481 inputs: []inputInfo{
13482 {1, 49151},
13483 {0, 4295032831},
13484 },
13485 outputs: []outputInfo{
13486 {0, 49135},
13487 },
13488 },
13489 },
13490 {
13491 name: "MOVLloadidx8",
13492 auxType: auxSymOff,
13493 argLen: 3,
13494 symEffect: SymRead,
13495 asm: x86.AMOVL,
13496 scale: 8,
13497 reg: regInfo{
13498 inputs: []inputInfo{
13499 {1, 49151},
13500 {0, 4295032831},
13501 },
13502 outputs: []outputInfo{
13503 {0, 49135},
13504 },
13505 },
13506 },
13507 {
13508 name: "MOVQloadidx1",
13509 auxType: auxSymOff,
13510 argLen: 3,
13511 commutative: true,
13512 symEffect: SymRead,
13513 asm: x86.AMOVQ,
13514 scale: 1,
13515 reg: regInfo{
13516 inputs: []inputInfo{
13517 {1, 49151},
13518 {0, 4295032831},
13519 },
13520 outputs: []outputInfo{
13521 {0, 49135},
13522 },
13523 },
13524 },
13525 {
13526 name: "MOVQloadidx8",
13527 auxType: auxSymOff,
13528 argLen: 3,
13529 symEffect: SymRead,
13530 asm: x86.AMOVQ,
13531 scale: 8,
13532 reg: regInfo{
13533 inputs: []inputInfo{
13534 {1, 49151},
13535 {0, 4295032831},
13536 },
13537 outputs: []outputInfo{
13538 {0, 49135},
13539 },
13540 },
13541 },
13542 {
13543 name: "MOVBstoreidx1",
13544 auxType: auxSymOff,
13545 argLen: 4,
13546 commutative: true,
13547 symEffect: SymWrite,
13548 asm: x86.AMOVB,
13549 scale: 1,
13550 reg: regInfo{
13551 inputs: []inputInfo{
13552 {1, 49151},
13553 {2, 49151},
13554 {0, 4295032831},
13555 },
13556 },
13557 },
13558 {
13559 name: "MOVWstoreidx1",
13560 auxType: auxSymOff,
13561 argLen: 4,
13562 commutative: true,
13563 symEffect: SymWrite,
13564 asm: x86.AMOVW,
13565 scale: 1,
13566 reg: regInfo{
13567 inputs: []inputInfo{
13568 {1, 49151},
13569 {2, 49151},
13570 {0, 4295032831},
13571 },
13572 },
13573 },
13574 {
13575 name: "MOVWstoreidx2",
13576 auxType: auxSymOff,
13577 argLen: 4,
13578 symEffect: SymWrite,
13579 asm: x86.AMOVW,
13580 scale: 2,
13581 reg: regInfo{
13582 inputs: []inputInfo{
13583 {1, 49151},
13584 {2, 49151},
13585 {0, 4295032831},
13586 },
13587 },
13588 },
13589 {
13590 name: "MOVLstoreidx1",
13591 auxType: auxSymOff,
13592 argLen: 4,
13593 commutative: true,
13594 symEffect: SymWrite,
13595 asm: x86.AMOVL,
13596 scale: 1,
13597 reg: regInfo{
13598 inputs: []inputInfo{
13599 {1, 49151},
13600 {2, 49151},
13601 {0, 4295032831},
13602 },
13603 },
13604 },
13605 {
13606 name: "MOVLstoreidx4",
13607 auxType: auxSymOff,
13608 argLen: 4,
13609 symEffect: SymWrite,
13610 asm: x86.AMOVL,
13611 scale: 4,
13612 reg: regInfo{
13613 inputs: []inputInfo{
13614 {1, 49151},
13615 {2, 49151},
13616 {0, 4295032831},
13617 },
13618 },
13619 },
13620 {
13621 name: "MOVLstoreidx8",
13622 auxType: auxSymOff,
13623 argLen: 4,
13624 symEffect: SymWrite,
13625 asm: x86.AMOVL,
13626 scale: 8,
13627 reg: regInfo{
13628 inputs: []inputInfo{
13629 {1, 49151},
13630 {2, 49151},
13631 {0, 4295032831},
13632 },
13633 },
13634 },
13635 {
13636 name: "MOVQstoreidx1",
13637 auxType: auxSymOff,
13638 argLen: 4,
13639 commutative: true,
13640 symEffect: SymWrite,
13641 asm: x86.AMOVQ,
13642 scale: 1,
13643 reg: regInfo{
13644 inputs: []inputInfo{
13645 {1, 49151},
13646 {2, 49151},
13647 {0, 4295032831},
13648 },
13649 },
13650 },
13651 {
13652 name: "MOVQstoreidx8",
13653 auxType: auxSymOff,
13654 argLen: 4,
13655 symEffect: SymWrite,
13656 asm: x86.AMOVQ,
13657 scale: 8,
13658 reg: regInfo{
13659 inputs: []inputInfo{
13660 {1, 49151},
13661 {2, 49151},
13662 {0, 4295032831},
13663 },
13664 },
13665 },
13666 {
13667 name: "MOVBstoreconst",
13668 auxType: auxSymValAndOff,
13669 argLen: 2,
13670 faultOnNilArg0: true,
13671 symEffect: SymWrite,
13672 asm: x86.AMOVB,
13673 reg: regInfo{
13674 inputs: []inputInfo{
13675 {0, 4295032831},
13676 },
13677 },
13678 },
13679 {
13680 name: "MOVWstoreconst",
13681 auxType: auxSymValAndOff,
13682 argLen: 2,
13683 faultOnNilArg0: true,
13684 symEffect: SymWrite,
13685 asm: x86.AMOVW,
13686 reg: regInfo{
13687 inputs: []inputInfo{
13688 {0, 4295032831},
13689 },
13690 },
13691 },
13692 {
13693 name: "MOVLstoreconst",
13694 auxType: auxSymValAndOff,
13695 argLen: 2,
13696 faultOnNilArg0: true,
13697 symEffect: SymWrite,
13698 asm: x86.AMOVL,
13699 reg: regInfo{
13700 inputs: []inputInfo{
13701 {0, 4295032831},
13702 },
13703 },
13704 },
13705 {
13706 name: "MOVQstoreconst",
13707 auxType: auxSymValAndOff,
13708 argLen: 2,
13709 faultOnNilArg0: true,
13710 symEffect: SymWrite,
13711 asm: x86.AMOVQ,
13712 reg: regInfo{
13713 inputs: []inputInfo{
13714 {0, 4295032831},
13715 },
13716 },
13717 },
13718 {
13719 name: "MOVOstoreconst",
13720 auxType: auxSymValAndOff,
13721 argLen: 2,
13722 faultOnNilArg0: true,
13723 symEffect: SymWrite,
13724 asm: x86.AMOVUPS,
13725 reg: regInfo{
13726 inputs: []inputInfo{
13727 {0, 4295032831},
13728 },
13729 },
13730 },
13731 {
13732 name: "MOVBstoreconstidx1",
13733 auxType: auxSymValAndOff,
13734 argLen: 3,
13735 commutative: true,
13736 symEffect: SymWrite,
13737 asm: x86.AMOVB,
13738 scale: 1,
13739 reg: regInfo{
13740 inputs: []inputInfo{
13741 {1, 49151},
13742 {0, 4295032831},
13743 },
13744 },
13745 },
13746 {
13747 name: "MOVWstoreconstidx1",
13748 auxType: auxSymValAndOff,
13749 argLen: 3,
13750 commutative: true,
13751 symEffect: SymWrite,
13752 asm: x86.AMOVW,
13753 scale: 1,
13754 reg: regInfo{
13755 inputs: []inputInfo{
13756 {1, 49151},
13757 {0, 4295032831},
13758 },
13759 },
13760 },
13761 {
13762 name: "MOVWstoreconstidx2",
13763 auxType: auxSymValAndOff,
13764 argLen: 3,
13765 symEffect: SymWrite,
13766 asm: x86.AMOVW,
13767 scale: 2,
13768 reg: regInfo{
13769 inputs: []inputInfo{
13770 {1, 49151},
13771 {0, 4295032831},
13772 },
13773 },
13774 },
13775 {
13776 name: "MOVLstoreconstidx1",
13777 auxType: auxSymValAndOff,
13778 argLen: 3,
13779 commutative: true,
13780 symEffect: SymWrite,
13781 asm: x86.AMOVL,
13782 scale: 1,
13783 reg: regInfo{
13784 inputs: []inputInfo{
13785 {1, 49151},
13786 {0, 4295032831},
13787 },
13788 },
13789 },
13790 {
13791 name: "MOVLstoreconstidx4",
13792 auxType: auxSymValAndOff,
13793 argLen: 3,
13794 symEffect: SymWrite,
13795 asm: x86.AMOVL,
13796 scale: 4,
13797 reg: regInfo{
13798 inputs: []inputInfo{
13799 {1, 49151},
13800 {0, 4295032831},
13801 },
13802 },
13803 },
13804 {
13805 name: "MOVQstoreconstidx1",
13806 auxType: auxSymValAndOff,
13807 argLen: 3,
13808 commutative: true,
13809 symEffect: SymWrite,
13810 asm: x86.AMOVQ,
13811 scale: 1,
13812 reg: regInfo{
13813 inputs: []inputInfo{
13814 {1, 49151},
13815 {0, 4295032831},
13816 },
13817 },
13818 },
13819 {
13820 name: "MOVQstoreconstidx8",
13821 auxType: auxSymValAndOff,
13822 argLen: 3,
13823 symEffect: SymWrite,
13824 asm: x86.AMOVQ,
13825 scale: 8,
13826 reg: regInfo{
13827 inputs: []inputInfo{
13828 {1, 49151},
13829 {0, 4295032831},
13830 },
13831 },
13832 },
13833 {
13834 name: "DUFFZERO",
13835 auxType: auxInt64,
13836 argLen: 2,
13837 faultOnNilArg0: true,
13838 unsafePoint: true,
13839 reg: regInfo{
13840 inputs: []inputInfo{
13841 {0, 128},
13842 },
13843 clobbers: 128,
13844 },
13845 },
13846 {
13847 name: "REPSTOSQ",
13848 argLen: 4,
13849 faultOnNilArg0: true,
13850 reg: regInfo{
13851 inputs: []inputInfo{
13852 {0, 128},
13853 {1, 2},
13854 {2, 1},
13855 },
13856 clobbers: 130,
13857 },
13858 },
13859 {
13860 name: "CALLstatic",
13861 auxType: auxCallOff,
13862 argLen: -1,
13863 clobberFlags: true,
13864 call: true,
13865 reg: regInfo{
13866 clobbers: 2147483631,
13867 },
13868 },
13869 {
13870 name: "CALLtail",
13871 auxType: auxCallOff,
13872 argLen: -1,
13873 clobberFlags: true,
13874 call: true,
13875 tailCall: true,
13876 reg: regInfo{
13877 clobbers: 2147483631,
13878 },
13879 },
13880 {
13881 name: "CALLclosure",
13882 auxType: auxCallOff,
13883 argLen: -1,
13884 clobberFlags: true,
13885 call: true,
13886 reg: regInfo{
13887 inputs: []inputInfo{
13888 {1, 4},
13889 {0, 49151},
13890 },
13891 clobbers: 2147483631,
13892 },
13893 },
13894 {
13895 name: "CALLinter",
13896 auxType: auxCallOff,
13897 argLen: -1,
13898 clobberFlags: true,
13899 call: true,
13900 reg: regInfo{
13901 inputs: []inputInfo{
13902 {0, 49135},
13903 },
13904 clobbers: 2147483631,
13905 },
13906 },
13907 {
13908 name: "DUFFCOPY",
13909 auxType: auxInt64,
13910 argLen: 3,
13911 clobberFlags: true,
13912 faultOnNilArg0: true,
13913 faultOnNilArg1: true,
13914 unsafePoint: true,
13915 reg: regInfo{
13916 inputs: []inputInfo{
13917 {0, 128},
13918 {1, 64},
13919 },
13920 clobbers: 65728,
13921 },
13922 },
13923 {
13924 name: "REPMOVSQ",
13925 argLen: 4,
13926 faultOnNilArg0: true,
13927 faultOnNilArg1: true,
13928 reg: regInfo{
13929 inputs: []inputInfo{
13930 {0, 128},
13931 {1, 64},
13932 {2, 2},
13933 },
13934 clobbers: 194,
13935 },
13936 },
13937 {
13938 name: "InvertFlags",
13939 argLen: 1,
13940 reg: regInfo{},
13941 },
13942 {
13943 name: "LoweredGetG",
13944 argLen: 1,
13945 reg: regInfo{
13946 outputs: []outputInfo{
13947 {0, 49135},
13948 },
13949 },
13950 },
13951 {
13952 name: "LoweredGetClosurePtr",
13953 argLen: 0,
13954 zeroWidth: true,
13955 reg: regInfo{
13956 outputs: []outputInfo{
13957 {0, 4},
13958 },
13959 },
13960 },
13961 {
13962 name: "LoweredGetCallerPC",
13963 argLen: 0,
13964 rematerializeable: true,
13965 reg: regInfo{
13966 outputs: []outputInfo{
13967 {0, 49135},
13968 },
13969 },
13970 },
13971 {
13972 name: "LoweredGetCallerSP",
13973 argLen: 1,
13974 rematerializeable: true,
13975 reg: regInfo{
13976 outputs: []outputInfo{
13977 {0, 49135},
13978 },
13979 },
13980 },
13981 {
13982 name: "LoweredNilCheck",
13983 argLen: 2,
13984 clobberFlags: true,
13985 nilCheck: true,
13986 faultOnNilArg0: true,
13987 reg: regInfo{
13988 inputs: []inputInfo{
13989 {0, 49151},
13990 },
13991 },
13992 },
13993 {
13994 name: "LoweredWB",
13995 auxType: auxInt64,
13996 argLen: 1,
13997 clobberFlags: true,
13998 reg: regInfo{
13999 clobbers: 2147418112,
14000 outputs: []outputInfo{
14001 {0, 2048},
14002 },
14003 },
14004 },
14005 {
14006 name: "LoweredHasCPUFeature",
14007 auxType: auxSym,
14008 argLen: 0,
14009 rematerializeable: true,
14010 symEffect: SymNone,
14011 reg: regInfo{
14012 outputs: []outputInfo{
14013 {0, 49135},
14014 },
14015 },
14016 },
14017 {
14018 name: "LoweredPanicBoundsA",
14019 auxType: auxInt64,
14020 argLen: 3,
14021 call: true,
14022 reg: regInfo{
14023 inputs: []inputInfo{
14024 {0, 4},
14025 {1, 8},
14026 },
14027 },
14028 },
14029 {
14030 name: "LoweredPanicBoundsB",
14031 auxType: auxInt64,
14032 argLen: 3,
14033 call: true,
14034 reg: regInfo{
14035 inputs: []inputInfo{
14036 {0, 2},
14037 {1, 4},
14038 },
14039 },
14040 },
14041 {
14042 name: "LoweredPanicBoundsC",
14043 auxType: auxInt64,
14044 argLen: 3,
14045 call: true,
14046 reg: regInfo{
14047 inputs: []inputInfo{
14048 {0, 1},
14049 {1, 2},
14050 },
14051 },
14052 },
14053 {
14054 name: "FlagEQ",
14055 argLen: 0,
14056 reg: regInfo{},
14057 },
14058 {
14059 name: "FlagLT_ULT",
14060 argLen: 0,
14061 reg: regInfo{},
14062 },
14063 {
14064 name: "FlagLT_UGT",
14065 argLen: 0,
14066 reg: regInfo{},
14067 },
14068 {
14069 name: "FlagGT_UGT",
14070 argLen: 0,
14071 reg: regInfo{},
14072 },
14073 {
14074 name: "FlagGT_ULT",
14075 argLen: 0,
14076 reg: regInfo{},
14077 },
14078 {
14079 name: "MOVBatomicload",
14080 auxType: auxSymOff,
14081 argLen: 2,
14082 faultOnNilArg0: true,
14083 symEffect: SymRead,
14084 asm: x86.AMOVB,
14085 reg: regInfo{
14086 inputs: []inputInfo{
14087 {0, 4295032831},
14088 },
14089 outputs: []outputInfo{
14090 {0, 49135},
14091 },
14092 },
14093 },
14094 {
14095 name: "MOVLatomicload",
14096 auxType: auxSymOff,
14097 argLen: 2,
14098 faultOnNilArg0: true,
14099 symEffect: SymRead,
14100 asm: x86.AMOVL,
14101 reg: regInfo{
14102 inputs: []inputInfo{
14103 {0, 4295032831},
14104 },
14105 outputs: []outputInfo{
14106 {0, 49135},
14107 },
14108 },
14109 },
14110 {
14111 name: "MOVQatomicload",
14112 auxType: auxSymOff,
14113 argLen: 2,
14114 faultOnNilArg0: true,
14115 symEffect: SymRead,
14116 asm: x86.AMOVQ,
14117 reg: regInfo{
14118 inputs: []inputInfo{
14119 {0, 4295032831},
14120 },
14121 outputs: []outputInfo{
14122 {0, 49135},
14123 },
14124 },
14125 },
14126 {
14127 name: "XCHGB",
14128 auxType: auxSymOff,
14129 argLen: 3,
14130 resultInArg0: true,
14131 faultOnNilArg1: true,
14132 hasSideEffects: true,
14133 symEffect: SymRdWr,
14134 asm: x86.AXCHGB,
14135 reg: regInfo{
14136 inputs: []inputInfo{
14137 {0, 49135},
14138 {1, 4295032831},
14139 },
14140 outputs: []outputInfo{
14141 {0, 49135},
14142 },
14143 },
14144 },
14145 {
14146 name: "XCHGL",
14147 auxType: auxSymOff,
14148 argLen: 3,
14149 resultInArg0: true,
14150 faultOnNilArg1: true,
14151 hasSideEffects: true,
14152 symEffect: SymRdWr,
14153 asm: x86.AXCHGL,
14154 reg: regInfo{
14155 inputs: []inputInfo{
14156 {0, 49135},
14157 {1, 4295032831},
14158 },
14159 outputs: []outputInfo{
14160 {0, 49135},
14161 },
14162 },
14163 },
14164 {
14165 name: "XCHGQ",
14166 auxType: auxSymOff,
14167 argLen: 3,
14168 resultInArg0: true,
14169 faultOnNilArg1: true,
14170 hasSideEffects: true,
14171 symEffect: SymRdWr,
14172 asm: x86.AXCHGQ,
14173 reg: regInfo{
14174 inputs: []inputInfo{
14175 {0, 49135},
14176 {1, 4295032831},
14177 },
14178 outputs: []outputInfo{
14179 {0, 49135},
14180 },
14181 },
14182 },
14183 {
14184 name: "XADDLlock",
14185 auxType: auxSymOff,
14186 argLen: 3,
14187 resultInArg0: true,
14188 clobberFlags: true,
14189 faultOnNilArg1: true,
14190 hasSideEffects: true,
14191 symEffect: SymRdWr,
14192 asm: x86.AXADDL,
14193 reg: regInfo{
14194 inputs: []inputInfo{
14195 {0, 49135},
14196 {1, 4295032831},
14197 },
14198 outputs: []outputInfo{
14199 {0, 49135},
14200 },
14201 },
14202 },
14203 {
14204 name: "XADDQlock",
14205 auxType: auxSymOff,
14206 argLen: 3,
14207 resultInArg0: true,
14208 clobberFlags: true,
14209 faultOnNilArg1: true,
14210 hasSideEffects: true,
14211 symEffect: SymRdWr,
14212 asm: x86.AXADDQ,
14213 reg: regInfo{
14214 inputs: []inputInfo{
14215 {0, 49135},
14216 {1, 4295032831},
14217 },
14218 outputs: []outputInfo{
14219 {0, 49135},
14220 },
14221 },
14222 },
14223 {
14224 name: "AddTupleFirst32",
14225 argLen: 2,
14226 reg: regInfo{},
14227 },
14228 {
14229 name: "AddTupleFirst64",
14230 argLen: 2,
14231 reg: regInfo{},
14232 },
14233 {
14234 name: "CMPXCHGLlock",
14235 auxType: auxSymOff,
14236 argLen: 4,
14237 clobberFlags: true,
14238 faultOnNilArg0: true,
14239 hasSideEffects: true,
14240 symEffect: SymRdWr,
14241 asm: x86.ACMPXCHGL,
14242 reg: regInfo{
14243 inputs: []inputInfo{
14244 {1, 1},
14245 {0, 49135},
14246 {2, 49135},
14247 },
14248 clobbers: 1,
14249 outputs: []outputInfo{
14250 {1, 0},
14251 {0, 49135},
14252 },
14253 },
14254 },
14255 {
14256 name: "CMPXCHGQlock",
14257 auxType: auxSymOff,
14258 argLen: 4,
14259 clobberFlags: true,
14260 faultOnNilArg0: true,
14261 hasSideEffects: true,
14262 symEffect: SymRdWr,
14263 asm: x86.ACMPXCHGQ,
14264 reg: regInfo{
14265 inputs: []inputInfo{
14266 {1, 1},
14267 {0, 49135},
14268 {2, 49135},
14269 },
14270 clobbers: 1,
14271 outputs: []outputInfo{
14272 {1, 0},
14273 {0, 49135},
14274 },
14275 },
14276 },
14277 {
14278 name: "ANDBlock",
14279 auxType: auxSymOff,
14280 argLen: 3,
14281 clobberFlags: true,
14282 faultOnNilArg0: true,
14283 hasSideEffects: true,
14284 symEffect: SymRdWr,
14285 asm: x86.AANDB,
14286 reg: regInfo{
14287 inputs: []inputInfo{
14288 {1, 49151},
14289 {0, 4295032831},
14290 },
14291 },
14292 },
14293 {
14294 name: "ANDLlock",
14295 auxType: auxSymOff,
14296 argLen: 3,
14297 clobberFlags: true,
14298 faultOnNilArg0: true,
14299 hasSideEffects: true,
14300 symEffect: SymRdWr,
14301 asm: x86.AANDL,
14302 reg: regInfo{
14303 inputs: []inputInfo{
14304 {1, 49151},
14305 {0, 4295032831},
14306 },
14307 },
14308 },
14309 {
14310 name: "ANDQlock",
14311 auxType: auxSymOff,
14312 argLen: 3,
14313 clobberFlags: true,
14314 faultOnNilArg0: true,
14315 hasSideEffects: true,
14316 symEffect: SymRdWr,
14317 asm: x86.AANDQ,
14318 reg: regInfo{
14319 inputs: []inputInfo{
14320 {1, 49151},
14321 {0, 4295032831},
14322 },
14323 },
14324 },
14325 {
14326 name: "ORBlock",
14327 auxType: auxSymOff,
14328 argLen: 3,
14329 clobberFlags: true,
14330 faultOnNilArg0: true,
14331 hasSideEffects: true,
14332 symEffect: SymRdWr,
14333 asm: x86.AORB,
14334 reg: regInfo{
14335 inputs: []inputInfo{
14336 {1, 49151},
14337 {0, 4295032831},
14338 },
14339 },
14340 },
14341 {
14342 name: "ORLlock",
14343 auxType: auxSymOff,
14344 argLen: 3,
14345 clobberFlags: true,
14346 faultOnNilArg0: true,
14347 hasSideEffects: true,
14348 symEffect: SymRdWr,
14349 asm: x86.AORL,
14350 reg: regInfo{
14351 inputs: []inputInfo{
14352 {1, 49151},
14353 {0, 4295032831},
14354 },
14355 },
14356 },
14357 {
14358 name: "ORQlock",
14359 auxType: auxSymOff,
14360 argLen: 3,
14361 clobberFlags: true,
14362 faultOnNilArg0: true,
14363 hasSideEffects: true,
14364 symEffect: SymRdWr,
14365 asm: x86.AORQ,
14366 reg: regInfo{
14367 inputs: []inputInfo{
14368 {1, 49151},
14369 {0, 4295032831},
14370 },
14371 },
14372 },
14373 {
14374 name: "LoweredAtomicAnd64",
14375 auxType: auxSymOff,
14376 argLen: 3,
14377 resultNotInArgs: true,
14378 clobberFlags: true,
14379 needIntTemp: true,
14380 faultOnNilArg0: true,
14381 hasSideEffects: true,
14382 unsafePoint: true,
14383 symEffect: SymRdWr,
14384 asm: x86.AANDQ,
14385 reg: regInfo{
14386 inputs: []inputInfo{
14387 {0, 49134},
14388 {1, 49134},
14389 },
14390 outputs: []outputInfo{
14391 {1, 0},
14392 {0, 1},
14393 },
14394 },
14395 },
14396 {
14397 name: "LoweredAtomicAnd32",
14398 auxType: auxSymOff,
14399 argLen: 3,
14400 resultNotInArgs: true,
14401 clobberFlags: true,
14402 needIntTemp: true,
14403 faultOnNilArg0: true,
14404 hasSideEffects: true,
14405 unsafePoint: true,
14406 symEffect: SymRdWr,
14407 asm: x86.AANDL,
14408 reg: regInfo{
14409 inputs: []inputInfo{
14410 {0, 49134},
14411 {1, 49134},
14412 },
14413 outputs: []outputInfo{
14414 {1, 0},
14415 {0, 1},
14416 },
14417 },
14418 },
14419 {
14420 name: "LoweredAtomicOr64",
14421 auxType: auxSymOff,
14422 argLen: 3,
14423 resultNotInArgs: true,
14424 clobberFlags: true,
14425 needIntTemp: true,
14426 faultOnNilArg0: true,
14427 hasSideEffects: true,
14428 unsafePoint: true,
14429 symEffect: SymRdWr,
14430 asm: x86.AORQ,
14431 reg: regInfo{
14432 inputs: []inputInfo{
14433 {0, 49134},
14434 {1, 49134},
14435 },
14436 outputs: []outputInfo{
14437 {1, 0},
14438 {0, 1},
14439 },
14440 },
14441 },
14442 {
14443 name: "LoweredAtomicOr32",
14444 auxType: auxSymOff,
14445 argLen: 3,
14446 resultNotInArgs: true,
14447 clobberFlags: true,
14448 needIntTemp: true,
14449 faultOnNilArg0: true,
14450 hasSideEffects: true,
14451 unsafePoint: true,
14452 symEffect: SymRdWr,
14453 asm: x86.AORL,
14454 reg: regInfo{
14455 inputs: []inputInfo{
14456 {0, 49134},
14457 {1, 49134},
14458 },
14459 outputs: []outputInfo{
14460 {1, 0},
14461 {0, 1},
14462 },
14463 },
14464 },
14465 {
14466 name: "PrefetchT0",
14467 argLen: 2,
14468 hasSideEffects: true,
14469 asm: x86.APREFETCHT0,
14470 reg: regInfo{
14471 inputs: []inputInfo{
14472 {0, 4295032831},
14473 },
14474 },
14475 },
14476 {
14477 name: "PrefetchNTA",
14478 argLen: 2,
14479 hasSideEffects: true,
14480 asm: x86.APREFETCHNTA,
14481 reg: regInfo{
14482 inputs: []inputInfo{
14483 {0, 4295032831},
14484 },
14485 },
14486 },
14487 {
14488 name: "ANDNQ",
14489 argLen: 2,
14490 clobberFlags: true,
14491 asm: x86.AANDNQ,
14492 reg: regInfo{
14493 inputs: []inputInfo{
14494 {0, 49135},
14495 {1, 49135},
14496 },
14497 outputs: []outputInfo{
14498 {0, 49135},
14499 },
14500 },
14501 },
14502 {
14503 name: "ANDNL",
14504 argLen: 2,
14505 clobberFlags: true,
14506 asm: x86.AANDNL,
14507 reg: regInfo{
14508 inputs: []inputInfo{
14509 {0, 49135},
14510 {1, 49135},
14511 },
14512 outputs: []outputInfo{
14513 {0, 49135},
14514 },
14515 },
14516 },
14517 {
14518 name: "BLSIQ",
14519 argLen: 1,
14520 clobberFlags: true,
14521 asm: x86.ABLSIQ,
14522 reg: regInfo{
14523 inputs: []inputInfo{
14524 {0, 49135},
14525 },
14526 outputs: []outputInfo{
14527 {0, 49135},
14528 },
14529 },
14530 },
14531 {
14532 name: "BLSIL",
14533 argLen: 1,
14534 clobberFlags: true,
14535 asm: x86.ABLSIL,
14536 reg: regInfo{
14537 inputs: []inputInfo{
14538 {0, 49135},
14539 },
14540 outputs: []outputInfo{
14541 {0, 49135},
14542 },
14543 },
14544 },
14545 {
14546 name: "BLSMSKQ",
14547 argLen: 1,
14548 clobberFlags: true,
14549 asm: x86.ABLSMSKQ,
14550 reg: regInfo{
14551 inputs: []inputInfo{
14552 {0, 49135},
14553 },
14554 outputs: []outputInfo{
14555 {0, 49135},
14556 },
14557 },
14558 },
14559 {
14560 name: "BLSMSKL",
14561 argLen: 1,
14562 clobberFlags: true,
14563 asm: x86.ABLSMSKL,
14564 reg: regInfo{
14565 inputs: []inputInfo{
14566 {0, 49135},
14567 },
14568 outputs: []outputInfo{
14569 {0, 49135},
14570 },
14571 },
14572 },
14573 {
14574 name: "BLSRQ",
14575 argLen: 1,
14576 asm: x86.ABLSRQ,
14577 reg: regInfo{
14578 inputs: []inputInfo{
14579 {0, 49135},
14580 },
14581 outputs: []outputInfo{
14582 {1, 0},
14583 {0, 49135},
14584 },
14585 },
14586 },
14587 {
14588 name: "BLSRL",
14589 argLen: 1,
14590 asm: x86.ABLSRL,
14591 reg: regInfo{
14592 inputs: []inputInfo{
14593 {0, 49135},
14594 },
14595 outputs: []outputInfo{
14596 {1, 0},
14597 {0, 49135},
14598 },
14599 },
14600 },
14601 {
14602 name: "TZCNTQ",
14603 argLen: 1,
14604 clobberFlags: true,
14605 asm: x86.ATZCNTQ,
14606 reg: regInfo{
14607 inputs: []inputInfo{
14608 {0, 49135},
14609 },
14610 outputs: []outputInfo{
14611 {0, 49135},
14612 },
14613 },
14614 },
14615 {
14616 name: "TZCNTL",
14617 argLen: 1,
14618 clobberFlags: true,
14619 asm: x86.ATZCNTL,
14620 reg: regInfo{
14621 inputs: []inputInfo{
14622 {0, 49135},
14623 },
14624 outputs: []outputInfo{
14625 {0, 49135},
14626 },
14627 },
14628 },
14629 {
14630 name: "LZCNTQ",
14631 argLen: 1,
14632 clobberFlags: true,
14633 asm: x86.ALZCNTQ,
14634 reg: regInfo{
14635 inputs: []inputInfo{
14636 {0, 49135},
14637 },
14638 outputs: []outputInfo{
14639 {0, 49135},
14640 },
14641 },
14642 },
14643 {
14644 name: "LZCNTL",
14645 argLen: 1,
14646 clobberFlags: true,
14647 asm: x86.ALZCNTL,
14648 reg: regInfo{
14649 inputs: []inputInfo{
14650 {0, 49135},
14651 },
14652 outputs: []outputInfo{
14653 {0, 49135},
14654 },
14655 },
14656 },
14657 {
14658 name: "MOVBEWstore",
14659 auxType: auxSymOff,
14660 argLen: 3,
14661 faultOnNilArg0: true,
14662 symEffect: SymWrite,
14663 asm: x86.AMOVBEW,
14664 reg: regInfo{
14665 inputs: []inputInfo{
14666 {1, 49151},
14667 {0, 4295032831},
14668 },
14669 },
14670 },
14671 {
14672 name: "MOVBELload",
14673 auxType: auxSymOff,
14674 argLen: 2,
14675 faultOnNilArg0: true,
14676 symEffect: SymRead,
14677 asm: x86.AMOVBEL,
14678 reg: regInfo{
14679 inputs: []inputInfo{
14680 {0, 4295032831},
14681 },
14682 outputs: []outputInfo{
14683 {0, 49135},
14684 },
14685 },
14686 },
14687 {
14688 name: "MOVBELstore",
14689 auxType: auxSymOff,
14690 argLen: 3,
14691 faultOnNilArg0: true,
14692 symEffect: SymWrite,
14693 asm: x86.AMOVBEL,
14694 reg: regInfo{
14695 inputs: []inputInfo{
14696 {1, 49151},
14697 {0, 4295032831},
14698 },
14699 },
14700 },
14701 {
14702 name: "MOVBEQload",
14703 auxType: auxSymOff,
14704 argLen: 2,
14705 faultOnNilArg0: true,
14706 symEffect: SymRead,
14707 asm: x86.AMOVBEQ,
14708 reg: regInfo{
14709 inputs: []inputInfo{
14710 {0, 4295032831},
14711 },
14712 outputs: []outputInfo{
14713 {0, 49135},
14714 },
14715 },
14716 },
14717 {
14718 name: "MOVBEQstore",
14719 auxType: auxSymOff,
14720 argLen: 3,
14721 faultOnNilArg0: true,
14722 symEffect: SymWrite,
14723 asm: x86.AMOVBEQ,
14724 reg: regInfo{
14725 inputs: []inputInfo{
14726 {1, 49151},
14727 {0, 4295032831},
14728 },
14729 },
14730 },
14731 {
14732 name: "MOVBELloadidx1",
14733 auxType: auxSymOff,
14734 argLen: 3,
14735 commutative: true,
14736 symEffect: SymRead,
14737 asm: x86.AMOVBEL,
14738 scale: 1,
14739 reg: regInfo{
14740 inputs: []inputInfo{
14741 {1, 49151},
14742 {0, 4295032831},
14743 },
14744 outputs: []outputInfo{
14745 {0, 49135},
14746 },
14747 },
14748 },
14749 {
14750 name: "MOVBELloadidx4",
14751 auxType: auxSymOff,
14752 argLen: 3,
14753 symEffect: SymRead,
14754 asm: x86.AMOVBEL,
14755 scale: 4,
14756 reg: regInfo{
14757 inputs: []inputInfo{
14758 {1, 49151},
14759 {0, 4295032831},
14760 },
14761 outputs: []outputInfo{
14762 {0, 49135},
14763 },
14764 },
14765 },
14766 {
14767 name: "MOVBELloadidx8",
14768 auxType: auxSymOff,
14769 argLen: 3,
14770 symEffect: SymRead,
14771 asm: x86.AMOVBEL,
14772 scale: 8,
14773 reg: regInfo{
14774 inputs: []inputInfo{
14775 {1, 49151},
14776 {0, 4295032831},
14777 },
14778 outputs: []outputInfo{
14779 {0, 49135},
14780 },
14781 },
14782 },
14783 {
14784 name: "MOVBEQloadidx1",
14785 auxType: auxSymOff,
14786 argLen: 3,
14787 commutative: true,
14788 symEffect: SymRead,
14789 asm: x86.AMOVBEQ,
14790 scale: 1,
14791 reg: regInfo{
14792 inputs: []inputInfo{
14793 {1, 49151},
14794 {0, 4295032831},
14795 },
14796 outputs: []outputInfo{
14797 {0, 49135},
14798 },
14799 },
14800 },
14801 {
14802 name: "MOVBEQloadidx8",
14803 auxType: auxSymOff,
14804 argLen: 3,
14805 symEffect: SymRead,
14806 asm: x86.AMOVBEQ,
14807 scale: 8,
14808 reg: regInfo{
14809 inputs: []inputInfo{
14810 {1, 49151},
14811 {0, 4295032831},
14812 },
14813 outputs: []outputInfo{
14814 {0, 49135},
14815 },
14816 },
14817 },
14818 {
14819 name: "MOVBEWstoreidx1",
14820 auxType: auxSymOff,
14821 argLen: 4,
14822 commutative: true,
14823 symEffect: SymWrite,
14824 asm: x86.AMOVBEW,
14825 scale: 1,
14826 reg: regInfo{
14827 inputs: []inputInfo{
14828 {1, 49151},
14829 {2, 49151},
14830 {0, 4295032831},
14831 },
14832 },
14833 },
14834 {
14835 name: "MOVBEWstoreidx2",
14836 auxType: auxSymOff,
14837 argLen: 4,
14838 symEffect: SymWrite,
14839 asm: x86.AMOVBEW,
14840 scale: 2,
14841 reg: regInfo{
14842 inputs: []inputInfo{
14843 {1, 49151},
14844 {2, 49151},
14845 {0, 4295032831},
14846 },
14847 },
14848 },
14849 {
14850 name: "MOVBELstoreidx1",
14851 auxType: auxSymOff,
14852 argLen: 4,
14853 commutative: true,
14854 symEffect: SymWrite,
14855 asm: x86.AMOVBEL,
14856 scale: 1,
14857 reg: regInfo{
14858 inputs: []inputInfo{
14859 {1, 49151},
14860 {2, 49151},
14861 {0, 4295032831},
14862 },
14863 },
14864 },
14865 {
14866 name: "MOVBELstoreidx4",
14867 auxType: auxSymOff,
14868 argLen: 4,
14869 symEffect: SymWrite,
14870 asm: x86.AMOVBEL,
14871 scale: 4,
14872 reg: regInfo{
14873 inputs: []inputInfo{
14874 {1, 49151},
14875 {2, 49151},
14876 {0, 4295032831},
14877 },
14878 },
14879 },
14880 {
14881 name: "MOVBELstoreidx8",
14882 auxType: auxSymOff,
14883 argLen: 4,
14884 symEffect: SymWrite,
14885 asm: x86.AMOVBEL,
14886 scale: 8,
14887 reg: regInfo{
14888 inputs: []inputInfo{
14889 {1, 49151},
14890 {2, 49151},
14891 {0, 4295032831},
14892 },
14893 },
14894 },
14895 {
14896 name: "MOVBEQstoreidx1",
14897 auxType: auxSymOff,
14898 argLen: 4,
14899 commutative: true,
14900 symEffect: SymWrite,
14901 asm: x86.AMOVBEQ,
14902 scale: 1,
14903 reg: regInfo{
14904 inputs: []inputInfo{
14905 {1, 49151},
14906 {2, 49151},
14907 {0, 4295032831},
14908 },
14909 },
14910 },
14911 {
14912 name: "MOVBEQstoreidx8",
14913 auxType: auxSymOff,
14914 argLen: 4,
14915 symEffect: SymWrite,
14916 asm: x86.AMOVBEQ,
14917 scale: 8,
14918 reg: regInfo{
14919 inputs: []inputInfo{
14920 {1, 49151},
14921 {2, 49151},
14922 {0, 4295032831},
14923 },
14924 },
14925 },
14926 {
14927 name: "SARXQ",
14928 argLen: 2,
14929 asm: x86.ASARXQ,
14930 reg: regInfo{
14931 inputs: []inputInfo{
14932 {0, 49135},
14933 {1, 49135},
14934 },
14935 outputs: []outputInfo{
14936 {0, 49135},
14937 },
14938 },
14939 },
14940 {
14941 name: "SARXL",
14942 argLen: 2,
14943 asm: x86.ASARXL,
14944 reg: regInfo{
14945 inputs: []inputInfo{
14946 {0, 49135},
14947 {1, 49135},
14948 },
14949 outputs: []outputInfo{
14950 {0, 49135},
14951 },
14952 },
14953 },
14954 {
14955 name: "SHLXQ",
14956 argLen: 2,
14957 asm: x86.ASHLXQ,
14958 reg: regInfo{
14959 inputs: []inputInfo{
14960 {0, 49135},
14961 {1, 49135},
14962 },
14963 outputs: []outputInfo{
14964 {0, 49135},
14965 },
14966 },
14967 },
14968 {
14969 name: "SHLXL",
14970 argLen: 2,
14971 asm: x86.ASHLXL,
14972 reg: regInfo{
14973 inputs: []inputInfo{
14974 {0, 49135},
14975 {1, 49135},
14976 },
14977 outputs: []outputInfo{
14978 {0, 49135},
14979 },
14980 },
14981 },
14982 {
14983 name: "SHRXQ",
14984 argLen: 2,
14985 asm: x86.ASHRXQ,
14986 reg: regInfo{
14987 inputs: []inputInfo{
14988 {0, 49135},
14989 {1, 49135},
14990 },
14991 outputs: []outputInfo{
14992 {0, 49135},
14993 },
14994 },
14995 },
14996 {
14997 name: "SHRXL",
14998 argLen: 2,
14999 asm: x86.ASHRXL,
15000 reg: regInfo{
15001 inputs: []inputInfo{
15002 {0, 49135},
15003 {1, 49135},
15004 },
15005 outputs: []outputInfo{
15006 {0, 49135},
15007 },
15008 },
15009 },
15010 {
15011 name: "SARXLload",
15012 auxType: auxSymOff,
15013 argLen: 3,
15014 faultOnNilArg0: true,
15015 symEffect: SymRead,
15016 asm: x86.ASARXL,
15017 reg: regInfo{
15018 inputs: []inputInfo{
15019 {1, 49135},
15020 {0, 4295032831},
15021 },
15022 outputs: []outputInfo{
15023 {0, 49135},
15024 },
15025 },
15026 },
15027 {
15028 name: "SARXQload",
15029 auxType: auxSymOff,
15030 argLen: 3,
15031 faultOnNilArg0: true,
15032 symEffect: SymRead,
15033 asm: x86.ASARXQ,
15034 reg: regInfo{
15035 inputs: []inputInfo{
15036 {1, 49135},
15037 {0, 4295032831},
15038 },
15039 outputs: []outputInfo{
15040 {0, 49135},
15041 },
15042 },
15043 },
15044 {
15045 name: "SHLXLload",
15046 auxType: auxSymOff,
15047 argLen: 3,
15048 faultOnNilArg0: true,
15049 symEffect: SymRead,
15050 asm: x86.ASHLXL,
15051 reg: regInfo{
15052 inputs: []inputInfo{
15053 {1, 49135},
15054 {0, 4295032831},
15055 },
15056 outputs: []outputInfo{
15057 {0, 49135},
15058 },
15059 },
15060 },
15061 {
15062 name: "SHLXQload",
15063 auxType: auxSymOff,
15064 argLen: 3,
15065 faultOnNilArg0: true,
15066 symEffect: SymRead,
15067 asm: x86.ASHLXQ,
15068 reg: regInfo{
15069 inputs: []inputInfo{
15070 {1, 49135},
15071 {0, 4295032831},
15072 },
15073 outputs: []outputInfo{
15074 {0, 49135},
15075 },
15076 },
15077 },
15078 {
15079 name: "SHRXLload",
15080 auxType: auxSymOff,
15081 argLen: 3,
15082 faultOnNilArg0: true,
15083 symEffect: SymRead,
15084 asm: x86.ASHRXL,
15085 reg: regInfo{
15086 inputs: []inputInfo{
15087 {1, 49135},
15088 {0, 4295032831},
15089 },
15090 outputs: []outputInfo{
15091 {0, 49135},
15092 },
15093 },
15094 },
15095 {
15096 name: "SHRXQload",
15097 auxType: auxSymOff,
15098 argLen: 3,
15099 faultOnNilArg0: true,
15100 symEffect: SymRead,
15101 asm: x86.ASHRXQ,
15102 reg: regInfo{
15103 inputs: []inputInfo{
15104 {1, 49135},
15105 {0, 4295032831},
15106 },
15107 outputs: []outputInfo{
15108 {0, 49135},
15109 },
15110 },
15111 },
15112 {
15113 name: "SARXLloadidx1",
15114 auxType: auxSymOff,
15115 argLen: 4,
15116 faultOnNilArg0: true,
15117 symEffect: SymRead,
15118 asm: x86.ASARXL,
15119 scale: 1,
15120 reg: regInfo{
15121 inputs: []inputInfo{
15122 {2, 49135},
15123 {1, 49151},
15124 {0, 4295032831},
15125 },
15126 outputs: []outputInfo{
15127 {0, 49135},
15128 },
15129 },
15130 },
15131 {
15132 name: "SARXLloadidx4",
15133 auxType: auxSymOff,
15134 argLen: 4,
15135 faultOnNilArg0: true,
15136 symEffect: SymRead,
15137 asm: x86.ASARXL,
15138 scale: 4,
15139 reg: regInfo{
15140 inputs: []inputInfo{
15141 {2, 49135},
15142 {1, 49151},
15143 {0, 4295032831},
15144 },
15145 outputs: []outputInfo{
15146 {0, 49135},
15147 },
15148 },
15149 },
15150 {
15151 name: "SARXLloadidx8",
15152 auxType: auxSymOff,
15153 argLen: 4,
15154 faultOnNilArg0: true,
15155 symEffect: SymRead,
15156 asm: x86.ASARXL,
15157 scale: 8,
15158 reg: regInfo{
15159 inputs: []inputInfo{
15160 {2, 49135},
15161 {1, 49151},
15162 {0, 4295032831},
15163 },
15164 outputs: []outputInfo{
15165 {0, 49135},
15166 },
15167 },
15168 },
15169 {
15170 name: "SARXQloadidx1",
15171 auxType: auxSymOff,
15172 argLen: 4,
15173 faultOnNilArg0: true,
15174 symEffect: SymRead,
15175 asm: x86.ASARXQ,
15176 scale: 1,
15177 reg: regInfo{
15178 inputs: []inputInfo{
15179 {2, 49135},
15180 {1, 49151},
15181 {0, 4295032831},
15182 },
15183 outputs: []outputInfo{
15184 {0, 49135},
15185 },
15186 },
15187 },
15188 {
15189 name: "SARXQloadidx8",
15190 auxType: auxSymOff,
15191 argLen: 4,
15192 faultOnNilArg0: true,
15193 symEffect: SymRead,
15194 asm: x86.ASARXQ,
15195 scale: 8,
15196 reg: regInfo{
15197 inputs: []inputInfo{
15198 {2, 49135},
15199 {1, 49151},
15200 {0, 4295032831},
15201 },
15202 outputs: []outputInfo{
15203 {0, 49135},
15204 },
15205 },
15206 },
15207 {
15208 name: "SHLXLloadidx1",
15209 auxType: auxSymOff,
15210 argLen: 4,
15211 faultOnNilArg0: true,
15212 symEffect: SymRead,
15213 asm: x86.ASHLXL,
15214 scale: 1,
15215 reg: regInfo{
15216 inputs: []inputInfo{
15217 {2, 49135},
15218 {1, 49151},
15219 {0, 4295032831},
15220 },
15221 outputs: []outputInfo{
15222 {0, 49135},
15223 },
15224 },
15225 },
15226 {
15227 name: "SHLXLloadidx4",
15228 auxType: auxSymOff,
15229 argLen: 4,
15230 faultOnNilArg0: true,
15231 symEffect: SymRead,
15232 asm: x86.ASHLXL,
15233 scale: 4,
15234 reg: regInfo{
15235 inputs: []inputInfo{
15236 {2, 49135},
15237 {1, 49151},
15238 {0, 4295032831},
15239 },
15240 outputs: []outputInfo{
15241 {0, 49135},
15242 },
15243 },
15244 },
15245 {
15246 name: "SHLXLloadidx8",
15247 auxType: auxSymOff,
15248 argLen: 4,
15249 faultOnNilArg0: true,
15250 symEffect: SymRead,
15251 asm: x86.ASHLXL,
15252 scale: 8,
15253 reg: regInfo{
15254 inputs: []inputInfo{
15255 {2, 49135},
15256 {1, 49151},
15257 {0, 4295032831},
15258 },
15259 outputs: []outputInfo{
15260 {0, 49135},
15261 },
15262 },
15263 },
15264 {
15265 name: "SHLXQloadidx1",
15266 auxType: auxSymOff,
15267 argLen: 4,
15268 faultOnNilArg0: true,
15269 symEffect: SymRead,
15270 asm: x86.ASHLXQ,
15271 scale: 1,
15272 reg: regInfo{
15273 inputs: []inputInfo{
15274 {2, 49135},
15275 {1, 49151},
15276 {0, 4295032831},
15277 },
15278 outputs: []outputInfo{
15279 {0, 49135},
15280 },
15281 },
15282 },
15283 {
15284 name: "SHLXQloadidx8",
15285 auxType: auxSymOff,
15286 argLen: 4,
15287 faultOnNilArg0: true,
15288 symEffect: SymRead,
15289 asm: x86.ASHLXQ,
15290 scale: 8,
15291 reg: regInfo{
15292 inputs: []inputInfo{
15293 {2, 49135},
15294 {1, 49151},
15295 {0, 4295032831},
15296 },
15297 outputs: []outputInfo{
15298 {0, 49135},
15299 },
15300 },
15301 },
15302 {
15303 name: "SHRXLloadidx1",
15304 auxType: auxSymOff,
15305 argLen: 4,
15306 faultOnNilArg0: true,
15307 symEffect: SymRead,
15308 asm: x86.ASHRXL,
15309 scale: 1,
15310 reg: regInfo{
15311 inputs: []inputInfo{
15312 {2, 49135},
15313 {1, 49151},
15314 {0, 4295032831},
15315 },
15316 outputs: []outputInfo{
15317 {0, 49135},
15318 },
15319 },
15320 },
15321 {
15322 name: "SHRXLloadidx4",
15323 auxType: auxSymOff,
15324 argLen: 4,
15325 faultOnNilArg0: true,
15326 symEffect: SymRead,
15327 asm: x86.ASHRXL,
15328 scale: 4,
15329 reg: regInfo{
15330 inputs: []inputInfo{
15331 {2, 49135},
15332 {1, 49151},
15333 {0, 4295032831},
15334 },
15335 outputs: []outputInfo{
15336 {0, 49135},
15337 },
15338 },
15339 },
15340 {
15341 name: "SHRXLloadidx8",
15342 auxType: auxSymOff,
15343 argLen: 4,
15344 faultOnNilArg0: true,
15345 symEffect: SymRead,
15346 asm: x86.ASHRXL,
15347 scale: 8,
15348 reg: regInfo{
15349 inputs: []inputInfo{
15350 {2, 49135},
15351 {1, 49151},
15352 {0, 4295032831},
15353 },
15354 outputs: []outputInfo{
15355 {0, 49135},
15356 },
15357 },
15358 },
15359 {
15360 name: "SHRXQloadidx1",
15361 auxType: auxSymOff,
15362 argLen: 4,
15363 faultOnNilArg0: true,
15364 symEffect: SymRead,
15365 asm: x86.ASHRXQ,
15366 scale: 1,
15367 reg: regInfo{
15368 inputs: []inputInfo{
15369 {2, 49135},
15370 {1, 49151},
15371 {0, 4295032831},
15372 },
15373 outputs: []outputInfo{
15374 {0, 49135},
15375 },
15376 },
15377 },
15378 {
15379 name: "SHRXQloadidx8",
15380 auxType: auxSymOff,
15381 argLen: 4,
15382 faultOnNilArg0: true,
15383 symEffect: SymRead,
15384 asm: x86.ASHRXQ,
15385 scale: 8,
15386 reg: regInfo{
15387 inputs: []inputInfo{
15388 {2, 49135},
15389 {1, 49151},
15390 {0, 4295032831},
15391 },
15392 outputs: []outputInfo{
15393 {0, 49135},
15394 },
15395 },
15396 },
15397 {
15398 name: "PUNPCKLBW",
15399 argLen: 2,
15400 resultInArg0: true,
15401 asm: x86.APUNPCKLBW,
15402 reg: regInfo{
15403 inputs: []inputInfo{
15404 {0, 2147418112},
15405 {1, 2147418112},
15406 },
15407 outputs: []outputInfo{
15408 {0, 2147418112},
15409 },
15410 },
15411 },
15412 {
15413 name: "PSHUFLW",
15414 auxType: auxInt8,
15415 argLen: 1,
15416 asm: x86.APSHUFLW,
15417 reg: regInfo{
15418 inputs: []inputInfo{
15419 {0, 2147418112},
15420 },
15421 outputs: []outputInfo{
15422 {0, 2147418112},
15423 },
15424 },
15425 },
15426 {
15427 name: "PSHUFBbroadcast",
15428 argLen: 1,
15429 resultInArg0: true,
15430 asm: x86.APSHUFB,
15431 reg: regInfo{
15432 inputs: []inputInfo{
15433 {0, 2147418112},
15434 },
15435 outputs: []outputInfo{
15436 {0, 2147418112},
15437 },
15438 },
15439 },
15440 {
15441 name: "VPBROADCASTB",
15442 argLen: 1,
15443 asm: x86.AVPBROADCASTB,
15444 reg: regInfo{
15445 inputs: []inputInfo{
15446 {0, 49135},
15447 },
15448 outputs: []outputInfo{
15449 {0, 2147418112},
15450 },
15451 },
15452 },
15453 {
15454 name: "PSIGNB",
15455 argLen: 2,
15456 resultInArg0: true,
15457 asm: x86.APSIGNB,
15458 reg: regInfo{
15459 inputs: []inputInfo{
15460 {0, 2147418112},
15461 {1, 2147418112},
15462 },
15463 outputs: []outputInfo{
15464 {0, 2147418112},
15465 },
15466 },
15467 },
15468 {
15469 name: "PCMPEQB",
15470 argLen: 2,
15471 commutative: true,
15472 resultInArg0: true,
15473 asm: x86.APCMPEQB,
15474 reg: regInfo{
15475 inputs: []inputInfo{
15476 {0, 2147418112},
15477 {1, 2147418112},
15478 },
15479 outputs: []outputInfo{
15480 {0, 2147418112},
15481 },
15482 },
15483 },
15484 {
15485 name: "PMOVMSKB",
15486 argLen: 1,
15487 asm: x86.APMOVMSKB,
15488 reg: regInfo{
15489 inputs: []inputInfo{
15490 {0, 2147418112},
15491 },
15492 outputs: []outputInfo{
15493 {0, 49135},
15494 },
15495 },
15496 },
15497
15498 {
15499 name: "ADD",
15500 argLen: 2,
15501 commutative: true,
15502 asm: arm.AADD,
15503 reg: regInfo{
15504 inputs: []inputInfo{
15505 {0, 22527},
15506 {1, 22527},
15507 },
15508 outputs: []outputInfo{
15509 {0, 21503},
15510 },
15511 },
15512 },
15513 {
15514 name: "ADDconst",
15515 auxType: auxInt32,
15516 argLen: 1,
15517 asm: arm.AADD,
15518 reg: regInfo{
15519 inputs: []inputInfo{
15520 {0, 30719},
15521 },
15522 outputs: []outputInfo{
15523 {0, 21503},
15524 },
15525 },
15526 },
15527 {
15528 name: "SUB",
15529 argLen: 2,
15530 asm: arm.ASUB,
15531 reg: regInfo{
15532 inputs: []inputInfo{
15533 {0, 22527},
15534 {1, 22527},
15535 },
15536 outputs: []outputInfo{
15537 {0, 21503},
15538 },
15539 },
15540 },
15541 {
15542 name: "SUBconst",
15543 auxType: auxInt32,
15544 argLen: 1,
15545 asm: arm.ASUB,
15546 reg: regInfo{
15547 inputs: []inputInfo{
15548 {0, 22527},
15549 },
15550 outputs: []outputInfo{
15551 {0, 21503},
15552 },
15553 },
15554 },
15555 {
15556 name: "RSB",
15557 argLen: 2,
15558 asm: arm.ARSB,
15559 reg: regInfo{
15560 inputs: []inputInfo{
15561 {0, 22527},
15562 {1, 22527},
15563 },
15564 outputs: []outputInfo{
15565 {0, 21503},
15566 },
15567 },
15568 },
15569 {
15570 name: "RSBconst",
15571 auxType: auxInt32,
15572 argLen: 1,
15573 asm: arm.ARSB,
15574 reg: regInfo{
15575 inputs: []inputInfo{
15576 {0, 22527},
15577 },
15578 outputs: []outputInfo{
15579 {0, 21503},
15580 },
15581 },
15582 },
15583 {
15584 name: "MUL",
15585 argLen: 2,
15586 commutative: true,
15587 asm: arm.AMUL,
15588 reg: regInfo{
15589 inputs: []inputInfo{
15590 {0, 22527},
15591 {1, 22527},
15592 },
15593 outputs: []outputInfo{
15594 {0, 21503},
15595 },
15596 },
15597 },
15598 {
15599 name: "HMUL",
15600 argLen: 2,
15601 commutative: true,
15602 asm: arm.AMULL,
15603 reg: regInfo{
15604 inputs: []inputInfo{
15605 {0, 22527},
15606 {1, 22527},
15607 },
15608 outputs: []outputInfo{
15609 {0, 21503},
15610 },
15611 },
15612 },
15613 {
15614 name: "HMULU",
15615 argLen: 2,
15616 commutative: true,
15617 asm: arm.AMULLU,
15618 reg: regInfo{
15619 inputs: []inputInfo{
15620 {0, 22527},
15621 {1, 22527},
15622 },
15623 outputs: []outputInfo{
15624 {0, 21503},
15625 },
15626 },
15627 },
15628 {
15629 name: "CALLudiv",
15630 argLen: 2,
15631 clobberFlags: true,
15632 reg: regInfo{
15633 inputs: []inputInfo{
15634 {0, 2},
15635 {1, 1},
15636 },
15637 clobbers: 20492,
15638 outputs: []outputInfo{
15639 {0, 1},
15640 {1, 2},
15641 },
15642 },
15643 },
15644 {
15645 name: "ADDS",
15646 argLen: 2,
15647 commutative: true,
15648 asm: arm.AADD,
15649 reg: regInfo{
15650 inputs: []inputInfo{
15651 {0, 22527},
15652 {1, 22527},
15653 },
15654 outputs: []outputInfo{
15655 {1, 0},
15656 {0, 21503},
15657 },
15658 },
15659 },
15660 {
15661 name: "ADDSconst",
15662 auxType: auxInt32,
15663 argLen: 1,
15664 asm: arm.AADD,
15665 reg: regInfo{
15666 inputs: []inputInfo{
15667 {0, 22527},
15668 },
15669 outputs: []outputInfo{
15670 {1, 0},
15671 {0, 21503},
15672 },
15673 },
15674 },
15675 {
15676 name: "ADC",
15677 argLen: 3,
15678 commutative: true,
15679 asm: arm.AADC,
15680 reg: regInfo{
15681 inputs: []inputInfo{
15682 {0, 21503},
15683 {1, 21503},
15684 },
15685 outputs: []outputInfo{
15686 {0, 21503},
15687 },
15688 },
15689 },
15690 {
15691 name: "ADCconst",
15692 auxType: auxInt32,
15693 argLen: 2,
15694 asm: arm.AADC,
15695 reg: regInfo{
15696 inputs: []inputInfo{
15697 {0, 21503},
15698 },
15699 outputs: []outputInfo{
15700 {0, 21503},
15701 },
15702 },
15703 },
15704 {
15705 name: "SUBS",
15706 argLen: 2,
15707 asm: arm.ASUB,
15708 reg: regInfo{
15709 inputs: []inputInfo{
15710 {0, 22527},
15711 {1, 22527},
15712 },
15713 outputs: []outputInfo{
15714 {1, 0},
15715 {0, 21503},
15716 },
15717 },
15718 },
15719 {
15720 name: "SUBSconst",
15721 auxType: auxInt32,
15722 argLen: 1,
15723 asm: arm.ASUB,
15724 reg: regInfo{
15725 inputs: []inputInfo{
15726 {0, 22527},
15727 },
15728 outputs: []outputInfo{
15729 {1, 0},
15730 {0, 21503},
15731 },
15732 },
15733 },
15734 {
15735 name: "RSBSconst",
15736 auxType: auxInt32,
15737 argLen: 1,
15738 asm: arm.ARSB,
15739 reg: regInfo{
15740 inputs: []inputInfo{
15741 {0, 22527},
15742 },
15743 outputs: []outputInfo{
15744 {1, 0},
15745 {0, 21503},
15746 },
15747 },
15748 },
15749 {
15750 name: "SBC",
15751 argLen: 3,
15752 asm: arm.ASBC,
15753 reg: regInfo{
15754 inputs: []inputInfo{
15755 {0, 21503},
15756 {1, 21503},
15757 },
15758 outputs: []outputInfo{
15759 {0, 21503},
15760 },
15761 },
15762 },
15763 {
15764 name: "SBCconst",
15765 auxType: auxInt32,
15766 argLen: 2,
15767 asm: arm.ASBC,
15768 reg: regInfo{
15769 inputs: []inputInfo{
15770 {0, 21503},
15771 },
15772 outputs: []outputInfo{
15773 {0, 21503},
15774 },
15775 },
15776 },
15777 {
15778 name: "RSCconst",
15779 auxType: auxInt32,
15780 argLen: 2,
15781 asm: arm.ARSC,
15782 reg: regInfo{
15783 inputs: []inputInfo{
15784 {0, 21503},
15785 },
15786 outputs: []outputInfo{
15787 {0, 21503},
15788 },
15789 },
15790 },
15791 {
15792 name: "MULLU",
15793 argLen: 2,
15794 commutative: true,
15795 asm: arm.AMULLU,
15796 reg: regInfo{
15797 inputs: []inputInfo{
15798 {0, 22527},
15799 {1, 22527},
15800 },
15801 outputs: []outputInfo{
15802 {0, 21503},
15803 {1, 21503},
15804 },
15805 },
15806 },
15807 {
15808 name: "MULA",
15809 argLen: 3,
15810 asm: arm.AMULA,
15811 reg: regInfo{
15812 inputs: []inputInfo{
15813 {0, 21503},
15814 {1, 21503},
15815 {2, 21503},
15816 },
15817 outputs: []outputInfo{
15818 {0, 21503},
15819 },
15820 },
15821 },
15822 {
15823 name: "MULS",
15824 argLen: 3,
15825 asm: arm.AMULS,
15826 reg: regInfo{
15827 inputs: []inputInfo{
15828 {0, 21503},
15829 {1, 21503},
15830 {2, 21503},
15831 },
15832 outputs: []outputInfo{
15833 {0, 21503},
15834 },
15835 },
15836 },
15837 {
15838 name: "ADDF",
15839 argLen: 2,
15840 commutative: true,
15841 asm: arm.AADDF,
15842 reg: regInfo{
15843 inputs: []inputInfo{
15844 {0, 4294901760},
15845 {1, 4294901760},
15846 },
15847 outputs: []outputInfo{
15848 {0, 4294901760},
15849 },
15850 },
15851 },
15852 {
15853 name: "ADDD",
15854 argLen: 2,
15855 commutative: true,
15856 asm: arm.AADDD,
15857 reg: regInfo{
15858 inputs: []inputInfo{
15859 {0, 4294901760},
15860 {1, 4294901760},
15861 },
15862 outputs: []outputInfo{
15863 {0, 4294901760},
15864 },
15865 },
15866 },
15867 {
15868 name: "SUBF",
15869 argLen: 2,
15870 asm: arm.ASUBF,
15871 reg: regInfo{
15872 inputs: []inputInfo{
15873 {0, 4294901760},
15874 {1, 4294901760},
15875 },
15876 outputs: []outputInfo{
15877 {0, 4294901760},
15878 },
15879 },
15880 },
15881 {
15882 name: "SUBD",
15883 argLen: 2,
15884 asm: arm.ASUBD,
15885 reg: regInfo{
15886 inputs: []inputInfo{
15887 {0, 4294901760},
15888 {1, 4294901760},
15889 },
15890 outputs: []outputInfo{
15891 {0, 4294901760},
15892 },
15893 },
15894 },
15895 {
15896 name: "MULF",
15897 argLen: 2,
15898 commutative: true,
15899 asm: arm.AMULF,
15900 reg: regInfo{
15901 inputs: []inputInfo{
15902 {0, 4294901760},
15903 {1, 4294901760},
15904 },
15905 outputs: []outputInfo{
15906 {0, 4294901760},
15907 },
15908 },
15909 },
15910 {
15911 name: "MULD",
15912 argLen: 2,
15913 commutative: true,
15914 asm: arm.AMULD,
15915 reg: regInfo{
15916 inputs: []inputInfo{
15917 {0, 4294901760},
15918 {1, 4294901760},
15919 },
15920 outputs: []outputInfo{
15921 {0, 4294901760},
15922 },
15923 },
15924 },
15925 {
15926 name: "NMULF",
15927 argLen: 2,
15928 commutative: true,
15929 asm: arm.ANMULF,
15930 reg: regInfo{
15931 inputs: []inputInfo{
15932 {0, 4294901760},
15933 {1, 4294901760},
15934 },
15935 outputs: []outputInfo{
15936 {0, 4294901760},
15937 },
15938 },
15939 },
15940 {
15941 name: "NMULD",
15942 argLen: 2,
15943 commutative: true,
15944 asm: arm.ANMULD,
15945 reg: regInfo{
15946 inputs: []inputInfo{
15947 {0, 4294901760},
15948 {1, 4294901760},
15949 },
15950 outputs: []outputInfo{
15951 {0, 4294901760},
15952 },
15953 },
15954 },
15955 {
15956 name: "DIVF",
15957 argLen: 2,
15958 asm: arm.ADIVF,
15959 reg: regInfo{
15960 inputs: []inputInfo{
15961 {0, 4294901760},
15962 {1, 4294901760},
15963 },
15964 outputs: []outputInfo{
15965 {0, 4294901760},
15966 },
15967 },
15968 },
15969 {
15970 name: "DIVD",
15971 argLen: 2,
15972 asm: arm.ADIVD,
15973 reg: regInfo{
15974 inputs: []inputInfo{
15975 {0, 4294901760},
15976 {1, 4294901760},
15977 },
15978 outputs: []outputInfo{
15979 {0, 4294901760},
15980 },
15981 },
15982 },
15983 {
15984 name: "MULAF",
15985 argLen: 3,
15986 resultInArg0: true,
15987 asm: arm.AMULAF,
15988 reg: regInfo{
15989 inputs: []inputInfo{
15990 {0, 4294901760},
15991 {1, 4294901760},
15992 {2, 4294901760},
15993 },
15994 outputs: []outputInfo{
15995 {0, 4294901760},
15996 },
15997 },
15998 },
15999 {
16000 name: "MULAD",
16001 argLen: 3,
16002 resultInArg0: true,
16003 asm: arm.AMULAD,
16004 reg: regInfo{
16005 inputs: []inputInfo{
16006 {0, 4294901760},
16007 {1, 4294901760},
16008 {2, 4294901760},
16009 },
16010 outputs: []outputInfo{
16011 {0, 4294901760},
16012 },
16013 },
16014 },
16015 {
16016 name: "MULSF",
16017 argLen: 3,
16018 resultInArg0: true,
16019 asm: arm.AMULSF,
16020 reg: regInfo{
16021 inputs: []inputInfo{
16022 {0, 4294901760},
16023 {1, 4294901760},
16024 {2, 4294901760},
16025 },
16026 outputs: []outputInfo{
16027 {0, 4294901760},
16028 },
16029 },
16030 },
16031 {
16032 name: "MULSD",
16033 argLen: 3,
16034 resultInArg0: true,
16035 asm: arm.AMULSD,
16036 reg: regInfo{
16037 inputs: []inputInfo{
16038 {0, 4294901760},
16039 {1, 4294901760},
16040 {2, 4294901760},
16041 },
16042 outputs: []outputInfo{
16043 {0, 4294901760},
16044 },
16045 },
16046 },
16047 {
16048 name: "FMULAD",
16049 argLen: 3,
16050 resultInArg0: true,
16051 asm: arm.AFMULAD,
16052 reg: regInfo{
16053 inputs: []inputInfo{
16054 {0, 4294901760},
16055 {1, 4294901760},
16056 {2, 4294901760},
16057 },
16058 outputs: []outputInfo{
16059 {0, 4294901760},
16060 },
16061 },
16062 },
16063 {
16064 name: "AND",
16065 argLen: 2,
16066 commutative: true,
16067 asm: arm.AAND,
16068 reg: regInfo{
16069 inputs: []inputInfo{
16070 {0, 22527},
16071 {1, 22527},
16072 },
16073 outputs: []outputInfo{
16074 {0, 21503},
16075 },
16076 },
16077 },
16078 {
16079 name: "ANDconst",
16080 auxType: auxInt32,
16081 argLen: 1,
16082 asm: arm.AAND,
16083 reg: regInfo{
16084 inputs: []inputInfo{
16085 {0, 22527},
16086 },
16087 outputs: []outputInfo{
16088 {0, 21503},
16089 },
16090 },
16091 },
16092 {
16093 name: "OR",
16094 argLen: 2,
16095 commutative: true,
16096 asm: arm.AORR,
16097 reg: regInfo{
16098 inputs: []inputInfo{
16099 {0, 22527},
16100 {1, 22527},
16101 },
16102 outputs: []outputInfo{
16103 {0, 21503},
16104 },
16105 },
16106 },
16107 {
16108 name: "ORconst",
16109 auxType: auxInt32,
16110 argLen: 1,
16111 asm: arm.AORR,
16112 reg: regInfo{
16113 inputs: []inputInfo{
16114 {0, 22527},
16115 },
16116 outputs: []outputInfo{
16117 {0, 21503},
16118 },
16119 },
16120 },
16121 {
16122 name: "XOR",
16123 argLen: 2,
16124 commutative: true,
16125 asm: arm.AEOR,
16126 reg: regInfo{
16127 inputs: []inputInfo{
16128 {0, 22527},
16129 {1, 22527},
16130 },
16131 outputs: []outputInfo{
16132 {0, 21503},
16133 },
16134 },
16135 },
16136 {
16137 name: "XORconst",
16138 auxType: auxInt32,
16139 argLen: 1,
16140 asm: arm.AEOR,
16141 reg: regInfo{
16142 inputs: []inputInfo{
16143 {0, 22527},
16144 },
16145 outputs: []outputInfo{
16146 {0, 21503},
16147 },
16148 },
16149 },
16150 {
16151 name: "BIC",
16152 argLen: 2,
16153 asm: arm.ABIC,
16154 reg: regInfo{
16155 inputs: []inputInfo{
16156 {0, 22527},
16157 {1, 22527},
16158 },
16159 outputs: []outputInfo{
16160 {0, 21503},
16161 },
16162 },
16163 },
16164 {
16165 name: "BICconst",
16166 auxType: auxInt32,
16167 argLen: 1,
16168 asm: arm.ABIC,
16169 reg: regInfo{
16170 inputs: []inputInfo{
16171 {0, 22527},
16172 },
16173 outputs: []outputInfo{
16174 {0, 21503},
16175 },
16176 },
16177 },
16178 {
16179 name: "BFX",
16180 auxType: auxInt32,
16181 argLen: 1,
16182 asm: arm.ABFX,
16183 reg: regInfo{
16184 inputs: []inputInfo{
16185 {0, 22527},
16186 },
16187 outputs: []outputInfo{
16188 {0, 21503},
16189 },
16190 },
16191 },
16192 {
16193 name: "BFXU",
16194 auxType: auxInt32,
16195 argLen: 1,
16196 asm: arm.ABFXU,
16197 reg: regInfo{
16198 inputs: []inputInfo{
16199 {0, 22527},
16200 },
16201 outputs: []outputInfo{
16202 {0, 21503},
16203 },
16204 },
16205 },
16206 {
16207 name: "MVN",
16208 argLen: 1,
16209 asm: arm.AMVN,
16210 reg: regInfo{
16211 inputs: []inputInfo{
16212 {0, 22527},
16213 },
16214 outputs: []outputInfo{
16215 {0, 21503},
16216 },
16217 },
16218 },
16219 {
16220 name: "NEGF",
16221 argLen: 1,
16222 asm: arm.ANEGF,
16223 reg: regInfo{
16224 inputs: []inputInfo{
16225 {0, 4294901760},
16226 },
16227 outputs: []outputInfo{
16228 {0, 4294901760},
16229 },
16230 },
16231 },
16232 {
16233 name: "NEGD",
16234 argLen: 1,
16235 asm: arm.ANEGD,
16236 reg: regInfo{
16237 inputs: []inputInfo{
16238 {0, 4294901760},
16239 },
16240 outputs: []outputInfo{
16241 {0, 4294901760},
16242 },
16243 },
16244 },
16245 {
16246 name: "SQRTD",
16247 argLen: 1,
16248 asm: arm.ASQRTD,
16249 reg: regInfo{
16250 inputs: []inputInfo{
16251 {0, 4294901760},
16252 },
16253 outputs: []outputInfo{
16254 {0, 4294901760},
16255 },
16256 },
16257 },
16258 {
16259 name: "SQRTF",
16260 argLen: 1,
16261 asm: arm.ASQRTF,
16262 reg: regInfo{
16263 inputs: []inputInfo{
16264 {0, 4294901760},
16265 },
16266 outputs: []outputInfo{
16267 {0, 4294901760},
16268 },
16269 },
16270 },
16271 {
16272 name: "ABSD",
16273 argLen: 1,
16274 asm: arm.AABSD,
16275 reg: regInfo{
16276 inputs: []inputInfo{
16277 {0, 4294901760},
16278 },
16279 outputs: []outputInfo{
16280 {0, 4294901760},
16281 },
16282 },
16283 },
16284 {
16285 name: "CLZ",
16286 argLen: 1,
16287 asm: arm.ACLZ,
16288 reg: regInfo{
16289 inputs: []inputInfo{
16290 {0, 22527},
16291 },
16292 outputs: []outputInfo{
16293 {0, 21503},
16294 },
16295 },
16296 },
16297 {
16298 name: "REV",
16299 argLen: 1,
16300 asm: arm.AREV,
16301 reg: regInfo{
16302 inputs: []inputInfo{
16303 {0, 22527},
16304 },
16305 outputs: []outputInfo{
16306 {0, 21503},
16307 },
16308 },
16309 },
16310 {
16311 name: "REV16",
16312 argLen: 1,
16313 asm: arm.AREV16,
16314 reg: regInfo{
16315 inputs: []inputInfo{
16316 {0, 22527},
16317 },
16318 outputs: []outputInfo{
16319 {0, 21503},
16320 },
16321 },
16322 },
16323 {
16324 name: "RBIT",
16325 argLen: 1,
16326 asm: arm.ARBIT,
16327 reg: regInfo{
16328 inputs: []inputInfo{
16329 {0, 22527},
16330 },
16331 outputs: []outputInfo{
16332 {0, 21503},
16333 },
16334 },
16335 },
16336 {
16337 name: "SLL",
16338 argLen: 2,
16339 asm: arm.ASLL,
16340 reg: regInfo{
16341 inputs: []inputInfo{
16342 {0, 22527},
16343 {1, 22527},
16344 },
16345 outputs: []outputInfo{
16346 {0, 21503},
16347 },
16348 },
16349 },
16350 {
16351 name: "SLLconst",
16352 auxType: auxInt32,
16353 argLen: 1,
16354 asm: arm.ASLL,
16355 reg: regInfo{
16356 inputs: []inputInfo{
16357 {0, 22527},
16358 },
16359 outputs: []outputInfo{
16360 {0, 21503},
16361 },
16362 },
16363 },
16364 {
16365 name: "SRL",
16366 argLen: 2,
16367 asm: arm.ASRL,
16368 reg: regInfo{
16369 inputs: []inputInfo{
16370 {0, 22527},
16371 {1, 22527},
16372 },
16373 outputs: []outputInfo{
16374 {0, 21503},
16375 },
16376 },
16377 },
16378 {
16379 name: "SRLconst",
16380 auxType: auxInt32,
16381 argLen: 1,
16382 asm: arm.ASRL,
16383 reg: regInfo{
16384 inputs: []inputInfo{
16385 {0, 22527},
16386 },
16387 outputs: []outputInfo{
16388 {0, 21503},
16389 },
16390 },
16391 },
16392 {
16393 name: "SRA",
16394 argLen: 2,
16395 asm: arm.ASRA,
16396 reg: regInfo{
16397 inputs: []inputInfo{
16398 {0, 22527},
16399 {1, 22527},
16400 },
16401 outputs: []outputInfo{
16402 {0, 21503},
16403 },
16404 },
16405 },
16406 {
16407 name: "SRAconst",
16408 auxType: auxInt32,
16409 argLen: 1,
16410 asm: arm.ASRA,
16411 reg: regInfo{
16412 inputs: []inputInfo{
16413 {0, 22527},
16414 },
16415 outputs: []outputInfo{
16416 {0, 21503},
16417 },
16418 },
16419 },
16420 {
16421 name: "SRR",
16422 argLen: 2,
16423 reg: regInfo{
16424 inputs: []inputInfo{
16425 {0, 22527},
16426 {1, 22527},
16427 },
16428 outputs: []outputInfo{
16429 {0, 21503},
16430 },
16431 },
16432 },
16433 {
16434 name: "SRRconst",
16435 auxType: auxInt32,
16436 argLen: 1,
16437 reg: regInfo{
16438 inputs: []inputInfo{
16439 {0, 22527},
16440 },
16441 outputs: []outputInfo{
16442 {0, 21503},
16443 },
16444 },
16445 },
16446 {
16447 name: "ADDshiftLL",
16448 auxType: auxInt32,
16449 argLen: 2,
16450 asm: arm.AADD,
16451 reg: regInfo{
16452 inputs: []inputInfo{
16453 {0, 22527},
16454 {1, 22527},
16455 },
16456 outputs: []outputInfo{
16457 {0, 21503},
16458 },
16459 },
16460 },
16461 {
16462 name: "ADDshiftRL",
16463 auxType: auxInt32,
16464 argLen: 2,
16465 asm: arm.AADD,
16466 reg: regInfo{
16467 inputs: []inputInfo{
16468 {0, 22527},
16469 {1, 22527},
16470 },
16471 outputs: []outputInfo{
16472 {0, 21503},
16473 },
16474 },
16475 },
16476 {
16477 name: "ADDshiftRA",
16478 auxType: auxInt32,
16479 argLen: 2,
16480 asm: arm.AADD,
16481 reg: regInfo{
16482 inputs: []inputInfo{
16483 {0, 22527},
16484 {1, 22527},
16485 },
16486 outputs: []outputInfo{
16487 {0, 21503},
16488 },
16489 },
16490 },
16491 {
16492 name: "SUBshiftLL",
16493 auxType: auxInt32,
16494 argLen: 2,
16495 asm: arm.ASUB,
16496 reg: regInfo{
16497 inputs: []inputInfo{
16498 {0, 22527},
16499 {1, 22527},
16500 },
16501 outputs: []outputInfo{
16502 {0, 21503},
16503 },
16504 },
16505 },
16506 {
16507 name: "SUBshiftRL",
16508 auxType: auxInt32,
16509 argLen: 2,
16510 asm: arm.ASUB,
16511 reg: regInfo{
16512 inputs: []inputInfo{
16513 {0, 22527},
16514 {1, 22527},
16515 },
16516 outputs: []outputInfo{
16517 {0, 21503},
16518 },
16519 },
16520 },
16521 {
16522 name: "SUBshiftRA",
16523 auxType: auxInt32,
16524 argLen: 2,
16525 asm: arm.ASUB,
16526 reg: regInfo{
16527 inputs: []inputInfo{
16528 {0, 22527},
16529 {1, 22527},
16530 },
16531 outputs: []outputInfo{
16532 {0, 21503},
16533 },
16534 },
16535 },
16536 {
16537 name: "RSBshiftLL",
16538 auxType: auxInt32,
16539 argLen: 2,
16540 asm: arm.ARSB,
16541 reg: regInfo{
16542 inputs: []inputInfo{
16543 {0, 22527},
16544 {1, 22527},
16545 },
16546 outputs: []outputInfo{
16547 {0, 21503},
16548 },
16549 },
16550 },
16551 {
16552 name: "RSBshiftRL",
16553 auxType: auxInt32,
16554 argLen: 2,
16555 asm: arm.ARSB,
16556 reg: regInfo{
16557 inputs: []inputInfo{
16558 {0, 22527},
16559 {1, 22527},
16560 },
16561 outputs: []outputInfo{
16562 {0, 21503},
16563 },
16564 },
16565 },
16566 {
16567 name: "RSBshiftRA",
16568 auxType: auxInt32,
16569 argLen: 2,
16570 asm: arm.ARSB,
16571 reg: regInfo{
16572 inputs: []inputInfo{
16573 {0, 22527},
16574 {1, 22527},
16575 },
16576 outputs: []outputInfo{
16577 {0, 21503},
16578 },
16579 },
16580 },
16581 {
16582 name: "ANDshiftLL",
16583 auxType: auxInt32,
16584 argLen: 2,
16585 asm: arm.AAND,
16586 reg: regInfo{
16587 inputs: []inputInfo{
16588 {0, 22527},
16589 {1, 22527},
16590 },
16591 outputs: []outputInfo{
16592 {0, 21503},
16593 },
16594 },
16595 },
16596 {
16597 name: "ANDshiftRL",
16598 auxType: auxInt32,
16599 argLen: 2,
16600 asm: arm.AAND,
16601 reg: regInfo{
16602 inputs: []inputInfo{
16603 {0, 22527},
16604 {1, 22527},
16605 },
16606 outputs: []outputInfo{
16607 {0, 21503},
16608 },
16609 },
16610 },
16611 {
16612 name: "ANDshiftRA",
16613 auxType: auxInt32,
16614 argLen: 2,
16615 asm: arm.AAND,
16616 reg: regInfo{
16617 inputs: []inputInfo{
16618 {0, 22527},
16619 {1, 22527},
16620 },
16621 outputs: []outputInfo{
16622 {0, 21503},
16623 },
16624 },
16625 },
16626 {
16627 name: "ORshiftLL",
16628 auxType: auxInt32,
16629 argLen: 2,
16630 asm: arm.AORR,
16631 reg: regInfo{
16632 inputs: []inputInfo{
16633 {0, 22527},
16634 {1, 22527},
16635 },
16636 outputs: []outputInfo{
16637 {0, 21503},
16638 },
16639 },
16640 },
16641 {
16642 name: "ORshiftRL",
16643 auxType: auxInt32,
16644 argLen: 2,
16645 asm: arm.AORR,
16646 reg: regInfo{
16647 inputs: []inputInfo{
16648 {0, 22527},
16649 {1, 22527},
16650 },
16651 outputs: []outputInfo{
16652 {0, 21503},
16653 },
16654 },
16655 },
16656 {
16657 name: "ORshiftRA",
16658 auxType: auxInt32,
16659 argLen: 2,
16660 asm: arm.AORR,
16661 reg: regInfo{
16662 inputs: []inputInfo{
16663 {0, 22527},
16664 {1, 22527},
16665 },
16666 outputs: []outputInfo{
16667 {0, 21503},
16668 },
16669 },
16670 },
16671 {
16672 name: "XORshiftLL",
16673 auxType: auxInt32,
16674 argLen: 2,
16675 asm: arm.AEOR,
16676 reg: regInfo{
16677 inputs: []inputInfo{
16678 {0, 22527},
16679 {1, 22527},
16680 },
16681 outputs: []outputInfo{
16682 {0, 21503},
16683 },
16684 },
16685 },
16686 {
16687 name: "XORshiftRL",
16688 auxType: auxInt32,
16689 argLen: 2,
16690 asm: arm.AEOR,
16691 reg: regInfo{
16692 inputs: []inputInfo{
16693 {0, 22527},
16694 {1, 22527},
16695 },
16696 outputs: []outputInfo{
16697 {0, 21503},
16698 },
16699 },
16700 },
16701 {
16702 name: "XORshiftRA",
16703 auxType: auxInt32,
16704 argLen: 2,
16705 asm: arm.AEOR,
16706 reg: regInfo{
16707 inputs: []inputInfo{
16708 {0, 22527},
16709 {1, 22527},
16710 },
16711 outputs: []outputInfo{
16712 {0, 21503},
16713 },
16714 },
16715 },
16716 {
16717 name: "XORshiftRR",
16718 auxType: auxInt32,
16719 argLen: 2,
16720 asm: arm.AEOR,
16721 reg: regInfo{
16722 inputs: []inputInfo{
16723 {0, 22527},
16724 {1, 22527},
16725 },
16726 outputs: []outputInfo{
16727 {0, 21503},
16728 },
16729 },
16730 },
16731 {
16732 name: "BICshiftLL",
16733 auxType: auxInt32,
16734 argLen: 2,
16735 asm: arm.ABIC,
16736 reg: regInfo{
16737 inputs: []inputInfo{
16738 {0, 22527},
16739 {1, 22527},
16740 },
16741 outputs: []outputInfo{
16742 {0, 21503},
16743 },
16744 },
16745 },
16746 {
16747 name: "BICshiftRL",
16748 auxType: auxInt32,
16749 argLen: 2,
16750 asm: arm.ABIC,
16751 reg: regInfo{
16752 inputs: []inputInfo{
16753 {0, 22527},
16754 {1, 22527},
16755 },
16756 outputs: []outputInfo{
16757 {0, 21503},
16758 },
16759 },
16760 },
16761 {
16762 name: "BICshiftRA",
16763 auxType: auxInt32,
16764 argLen: 2,
16765 asm: arm.ABIC,
16766 reg: regInfo{
16767 inputs: []inputInfo{
16768 {0, 22527},
16769 {1, 22527},
16770 },
16771 outputs: []outputInfo{
16772 {0, 21503},
16773 },
16774 },
16775 },
16776 {
16777 name: "MVNshiftLL",
16778 auxType: auxInt32,
16779 argLen: 1,
16780 asm: arm.AMVN,
16781 reg: regInfo{
16782 inputs: []inputInfo{
16783 {0, 22527},
16784 },
16785 outputs: []outputInfo{
16786 {0, 21503},
16787 },
16788 },
16789 },
16790 {
16791 name: "MVNshiftRL",
16792 auxType: auxInt32,
16793 argLen: 1,
16794 asm: arm.AMVN,
16795 reg: regInfo{
16796 inputs: []inputInfo{
16797 {0, 22527},
16798 },
16799 outputs: []outputInfo{
16800 {0, 21503},
16801 },
16802 },
16803 },
16804 {
16805 name: "MVNshiftRA",
16806 auxType: auxInt32,
16807 argLen: 1,
16808 asm: arm.AMVN,
16809 reg: regInfo{
16810 inputs: []inputInfo{
16811 {0, 22527},
16812 },
16813 outputs: []outputInfo{
16814 {0, 21503},
16815 },
16816 },
16817 },
16818 {
16819 name: "ADCshiftLL",
16820 auxType: auxInt32,
16821 argLen: 3,
16822 asm: arm.AADC,
16823 reg: regInfo{
16824 inputs: []inputInfo{
16825 {0, 21503},
16826 {1, 21503},
16827 },
16828 outputs: []outputInfo{
16829 {0, 21503},
16830 },
16831 },
16832 },
16833 {
16834 name: "ADCshiftRL",
16835 auxType: auxInt32,
16836 argLen: 3,
16837 asm: arm.AADC,
16838 reg: regInfo{
16839 inputs: []inputInfo{
16840 {0, 21503},
16841 {1, 21503},
16842 },
16843 outputs: []outputInfo{
16844 {0, 21503},
16845 },
16846 },
16847 },
16848 {
16849 name: "ADCshiftRA",
16850 auxType: auxInt32,
16851 argLen: 3,
16852 asm: arm.AADC,
16853 reg: regInfo{
16854 inputs: []inputInfo{
16855 {0, 21503},
16856 {1, 21503},
16857 },
16858 outputs: []outputInfo{
16859 {0, 21503},
16860 },
16861 },
16862 },
16863 {
16864 name: "SBCshiftLL",
16865 auxType: auxInt32,
16866 argLen: 3,
16867 asm: arm.ASBC,
16868 reg: regInfo{
16869 inputs: []inputInfo{
16870 {0, 21503},
16871 {1, 21503},
16872 },
16873 outputs: []outputInfo{
16874 {0, 21503},
16875 },
16876 },
16877 },
16878 {
16879 name: "SBCshiftRL",
16880 auxType: auxInt32,
16881 argLen: 3,
16882 asm: arm.ASBC,
16883 reg: regInfo{
16884 inputs: []inputInfo{
16885 {0, 21503},
16886 {1, 21503},
16887 },
16888 outputs: []outputInfo{
16889 {0, 21503},
16890 },
16891 },
16892 },
16893 {
16894 name: "SBCshiftRA",
16895 auxType: auxInt32,
16896 argLen: 3,
16897 asm: arm.ASBC,
16898 reg: regInfo{
16899 inputs: []inputInfo{
16900 {0, 21503},
16901 {1, 21503},
16902 },
16903 outputs: []outputInfo{
16904 {0, 21503},
16905 },
16906 },
16907 },
16908 {
16909 name: "RSCshiftLL",
16910 auxType: auxInt32,
16911 argLen: 3,
16912 asm: arm.ARSC,
16913 reg: regInfo{
16914 inputs: []inputInfo{
16915 {0, 21503},
16916 {1, 21503},
16917 },
16918 outputs: []outputInfo{
16919 {0, 21503},
16920 },
16921 },
16922 },
16923 {
16924 name: "RSCshiftRL",
16925 auxType: auxInt32,
16926 argLen: 3,
16927 asm: arm.ARSC,
16928 reg: regInfo{
16929 inputs: []inputInfo{
16930 {0, 21503},
16931 {1, 21503},
16932 },
16933 outputs: []outputInfo{
16934 {0, 21503},
16935 },
16936 },
16937 },
16938 {
16939 name: "RSCshiftRA",
16940 auxType: auxInt32,
16941 argLen: 3,
16942 asm: arm.ARSC,
16943 reg: regInfo{
16944 inputs: []inputInfo{
16945 {0, 21503},
16946 {1, 21503},
16947 },
16948 outputs: []outputInfo{
16949 {0, 21503},
16950 },
16951 },
16952 },
16953 {
16954 name: "ADDSshiftLL",
16955 auxType: auxInt32,
16956 argLen: 2,
16957 asm: arm.AADD,
16958 reg: regInfo{
16959 inputs: []inputInfo{
16960 {0, 22527},
16961 {1, 22527},
16962 },
16963 outputs: []outputInfo{
16964 {1, 0},
16965 {0, 21503},
16966 },
16967 },
16968 },
16969 {
16970 name: "ADDSshiftRL",
16971 auxType: auxInt32,
16972 argLen: 2,
16973 asm: arm.AADD,
16974 reg: regInfo{
16975 inputs: []inputInfo{
16976 {0, 22527},
16977 {1, 22527},
16978 },
16979 outputs: []outputInfo{
16980 {1, 0},
16981 {0, 21503},
16982 },
16983 },
16984 },
16985 {
16986 name: "ADDSshiftRA",
16987 auxType: auxInt32,
16988 argLen: 2,
16989 asm: arm.AADD,
16990 reg: regInfo{
16991 inputs: []inputInfo{
16992 {0, 22527},
16993 {1, 22527},
16994 },
16995 outputs: []outputInfo{
16996 {1, 0},
16997 {0, 21503},
16998 },
16999 },
17000 },
17001 {
17002 name: "SUBSshiftLL",
17003 auxType: auxInt32,
17004 argLen: 2,
17005 asm: arm.ASUB,
17006 reg: regInfo{
17007 inputs: []inputInfo{
17008 {0, 22527},
17009 {1, 22527},
17010 },
17011 outputs: []outputInfo{
17012 {1, 0},
17013 {0, 21503},
17014 },
17015 },
17016 },
17017 {
17018 name: "SUBSshiftRL",
17019 auxType: auxInt32,
17020 argLen: 2,
17021 asm: arm.ASUB,
17022 reg: regInfo{
17023 inputs: []inputInfo{
17024 {0, 22527},
17025 {1, 22527},
17026 },
17027 outputs: []outputInfo{
17028 {1, 0},
17029 {0, 21503},
17030 },
17031 },
17032 },
17033 {
17034 name: "SUBSshiftRA",
17035 auxType: auxInt32,
17036 argLen: 2,
17037 asm: arm.ASUB,
17038 reg: regInfo{
17039 inputs: []inputInfo{
17040 {0, 22527},
17041 {1, 22527},
17042 },
17043 outputs: []outputInfo{
17044 {1, 0},
17045 {0, 21503},
17046 },
17047 },
17048 },
17049 {
17050 name: "RSBSshiftLL",
17051 auxType: auxInt32,
17052 argLen: 2,
17053 asm: arm.ARSB,
17054 reg: regInfo{
17055 inputs: []inputInfo{
17056 {0, 22527},
17057 {1, 22527},
17058 },
17059 outputs: []outputInfo{
17060 {1, 0},
17061 {0, 21503},
17062 },
17063 },
17064 },
17065 {
17066 name: "RSBSshiftRL",
17067 auxType: auxInt32,
17068 argLen: 2,
17069 asm: arm.ARSB,
17070 reg: regInfo{
17071 inputs: []inputInfo{
17072 {0, 22527},
17073 {1, 22527},
17074 },
17075 outputs: []outputInfo{
17076 {1, 0},
17077 {0, 21503},
17078 },
17079 },
17080 },
17081 {
17082 name: "RSBSshiftRA",
17083 auxType: auxInt32,
17084 argLen: 2,
17085 asm: arm.ARSB,
17086 reg: regInfo{
17087 inputs: []inputInfo{
17088 {0, 22527},
17089 {1, 22527},
17090 },
17091 outputs: []outputInfo{
17092 {1, 0},
17093 {0, 21503},
17094 },
17095 },
17096 },
17097 {
17098 name: "ADDshiftLLreg",
17099 argLen: 3,
17100 asm: arm.AADD,
17101 reg: regInfo{
17102 inputs: []inputInfo{
17103 {0, 21503},
17104 {1, 21503},
17105 {2, 21503},
17106 },
17107 outputs: []outputInfo{
17108 {0, 21503},
17109 },
17110 },
17111 },
17112 {
17113 name: "ADDshiftRLreg",
17114 argLen: 3,
17115 asm: arm.AADD,
17116 reg: regInfo{
17117 inputs: []inputInfo{
17118 {0, 21503},
17119 {1, 21503},
17120 {2, 21503},
17121 },
17122 outputs: []outputInfo{
17123 {0, 21503},
17124 },
17125 },
17126 },
17127 {
17128 name: "ADDshiftRAreg",
17129 argLen: 3,
17130 asm: arm.AADD,
17131 reg: regInfo{
17132 inputs: []inputInfo{
17133 {0, 21503},
17134 {1, 21503},
17135 {2, 21503},
17136 },
17137 outputs: []outputInfo{
17138 {0, 21503},
17139 },
17140 },
17141 },
17142 {
17143 name: "SUBshiftLLreg",
17144 argLen: 3,
17145 asm: arm.ASUB,
17146 reg: regInfo{
17147 inputs: []inputInfo{
17148 {0, 21503},
17149 {1, 21503},
17150 {2, 21503},
17151 },
17152 outputs: []outputInfo{
17153 {0, 21503},
17154 },
17155 },
17156 },
17157 {
17158 name: "SUBshiftRLreg",
17159 argLen: 3,
17160 asm: arm.ASUB,
17161 reg: regInfo{
17162 inputs: []inputInfo{
17163 {0, 21503},
17164 {1, 21503},
17165 {2, 21503},
17166 },
17167 outputs: []outputInfo{
17168 {0, 21503},
17169 },
17170 },
17171 },
17172 {
17173 name: "SUBshiftRAreg",
17174 argLen: 3,
17175 asm: arm.ASUB,
17176 reg: regInfo{
17177 inputs: []inputInfo{
17178 {0, 21503},
17179 {1, 21503},
17180 {2, 21503},
17181 },
17182 outputs: []outputInfo{
17183 {0, 21503},
17184 },
17185 },
17186 },
17187 {
17188 name: "RSBshiftLLreg",
17189 argLen: 3,
17190 asm: arm.ARSB,
17191 reg: regInfo{
17192 inputs: []inputInfo{
17193 {0, 21503},
17194 {1, 21503},
17195 {2, 21503},
17196 },
17197 outputs: []outputInfo{
17198 {0, 21503},
17199 },
17200 },
17201 },
17202 {
17203 name: "RSBshiftRLreg",
17204 argLen: 3,
17205 asm: arm.ARSB,
17206 reg: regInfo{
17207 inputs: []inputInfo{
17208 {0, 21503},
17209 {1, 21503},
17210 {2, 21503},
17211 },
17212 outputs: []outputInfo{
17213 {0, 21503},
17214 },
17215 },
17216 },
17217 {
17218 name: "RSBshiftRAreg",
17219 argLen: 3,
17220 asm: arm.ARSB,
17221 reg: regInfo{
17222 inputs: []inputInfo{
17223 {0, 21503},
17224 {1, 21503},
17225 {2, 21503},
17226 },
17227 outputs: []outputInfo{
17228 {0, 21503},
17229 },
17230 },
17231 },
17232 {
17233 name: "ANDshiftLLreg",
17234 argLen: 3,
17235 asm: arm.AAND,
17236 reg: regInfo{
17237 inputs: []inputInfo{
17238 {0, 21503},
17239 {1, 21503},
17240 {2, 21503},
17241 },
17242 outputs: []outputInfo{
17243 {0, 21503},
17244 },
17245 },
17246 },
17247 {
17248 name: "ANDshiftRLreg",
17249 argLen: 3,
17250 asm: arm.AAND,
17251 reg: regInfo{
17252 inputs: []inputInfo{
17253 {0, 21503},
17254 {1, 21503},
17255 {2, 21503},
17256 },
17257 outputs: []outputInfo{
17258 {0, 21503},
17259 },
17260 },
17261 },
17262 {
17263 name: "ANDshiftRAreg",
17264 argLen: 3,
17265 asm: arm.AAND,
17266 reg: regInfo{
17267 inputs: []inputInfo{
17268 {0, 21503},
17269 {1, 21503},
17270 {2, 21503},
17271 },
17272 outputs: []outputInfo{
17273 {0, 21503},
17274 },
17275 },
17276 },
17277 {
17278 name: "ORshiftLLreg",
17279 argLen: 3,
17280 asm: arm.AORR,
17281 reg: regInfo{
17282 inputs: []inputInfo{
17283 {0, 21503},
17284 {1, 21503},
17285 {2, 21503},
17286 },
17287 outputs: []outputInfo{
17288 {0, 21503},
17289 },
17290 },
17291 },
17292 {
17293 name: "ORshiftRLreg",
17294 argLen: 3,
17295 asm: arm.AORR,
17296 reg: regInfo{
17297 inputs: []inputInfo{
17298 {0, 21503},
17299 {1, 21503},
17300 {2, 21503},
17301 },
17302 outputs: []outputInfo{
17303 {0, 21503},
17304 },
17305 },
17306 },
17307 {
17308 name: "ORshiftRAreg",
17309 argLen: 3,
17310 asm: arm.AORR,
17311 reg: regInfo{
17312 inputs: []inputInfo{
17313 {0, 21503},
17314 {1, 21503},
17315 {2, 21503},
17316 },
17317 outputs: []outputInfo{
17318 {0, 21503},
17319 },
17320 },
17321 },
17322 {
17323 name: "XORshiftLLreg",
17324 argLen: 3,
17325 asm: arm.AEOR,
17326 reg: regInfo{
17327 inputs: []inputInfo{
17328 {0, 21503},
17329 {1, 21503},
17330 {2, 21503},
17331 },
17332 outputs: []outputInfo{
17333 {0, 21503},
17334 },
17335 },
17336 },
17337 {
17338 name: "XORshiftRLreg",
17339 argLen: 3,
17340 asm: arm.AEOR,
17341 reg: regInfo{
17342 inputs: []inputInfo{
17343 {0, 21503},
17344 {1, 21503},
17345 {2, 21503},
17346 },
17347 outputs: []outputInfo{
17348 {0, 21503},
17349 },
17350 },
17351 },
17352 {
17353 name: "XORshiftRAreg",
17354 argLen: 3,
17355 asm: arm.AEOR,
17356 reg: regInfo{
17357 inputs: []inputInfo{
17358 {0, 21503},
17359 {1, 21503},
17360 {2, 21503},
17361 },
17362 outputs: []outputInfo{
17363 {0, 21503},
17364 },
17365 },
17366 },
17367 {
17368 name: "BICshiftLLreg",
17369 argLen: 3,
17370 asm: arm.ABIC,
17371 reg: regInfo{
17372 inputs: []inputInfo{
17373 {0, 21503},
17374 {1, 21503},
17375 {2, 21503},
17376 },
17377 outputs: []outputInfo{
17378 {0, 21503},
17379 },
17380 },
17381 },
17382 {
17383 name: "BICshiftRLreg",
17384 argLen: 3,
17385 asm: arm.ABIC,
17386 reg: regInfo{
17387 inputs: []inputInfo{
17388 {0, 21503},
17389 {1, 21503},
17390 {2, 21503},
17391 },
17392 outputs: []outputInfo{
17393 {0, 21503},
17394 },
17395 },
17396 },
17397 {
17398 name: "BICshiftRAreg",
17399 argLen: 3,
17400 asm: arm.ABIC,
17401 reg: regInfo{
17402 inputs: []inputInfo{
17403 {0, 21503},
17404 {1, 21503},
17405 {2, 21503},
17406 },
17407 outputs: []outputInfo{
17408 {0, 21503},
17409 },
17410 },
17411 },
17412 {
17413 name: "MVNshiftLLreg",
17414 argLen: 2,
17415 asm: arm.AMVN,
17416 reg: regInfo{
17417 inputs: []inputInfo{
17418 {0, 22527},
17419 {1, 22527},
17420 },
17421 outputs: []outputInfo{
17422 {0, 21503},
17423 },
17424 },
17425 },
17426 {
17427 name: "MVNshiftRLreg",
17428 argLen: 2,
17429 asm: arm.AMVN,
17430 reg: regInfo{
17431 inputs: []inputInfo{
17432 {0, 22527},
17433 {1, 22527},
17434 },
17435 outputs: []outputInfo{
17436 {0, 21503},
17437 },
17438 },
17439 },
17440 {
17441 name: "MVNshiftRAreg",
17442 argLen: 2,
17443 asm: arm.AMVN,
17444 reg: regInfo{
17445 inputs: []inputInfo{
17446 {0, 22527},
17447 {1, 22527},
17448 },
17449 outputs: []outputInfo{
17450 {0, 21503},
17451 },
17452 },
17453 },
17454 {
17455 name: "ADCshiftLLreg",
17456 argLen: 4,
17457 asm: arm.AADC,
17458 reg: regInfo{
17459 inputs: []inputInfo{
17460 {0, 21503},
17461 {1, 21503},
17462 {2, 21503},
17463 },
17464 outputs: []outputInfo{
17465 {0, 21503},
17466 },
17467 },
17468 },
17469 {
17470 name: "ADCshiftRLreg",
17471 argLen: 4,
17472 asm: arm.AADC,
17473 reg: regInfo{
17474 inputs: []inputInfo{
17475 {0, 21503},
17476 {1, 21503},
17477 {2, 21503},
17478 },
17479 outputs: []outputInfo{
17480 {0, 21503},
17481 },
17482 },
17483 },
17484 {
17485 name: "ADCshiftRAreg",
17486 argLen: 4,
17487 asm: arm.AADC,
17488 reg: regInfo{
17489 inputs: []inputInfo{
17490 {0, 21503},
17491 {1, 21503},
17492 {2, 21503},
17493 },
17494 outputs: []outputInfo{
17495 {0, 21503},
17496 },
17497 },
17498 },
17499 {
17500 name: "SBCshiftLLreg",
17501 argLen: 4,
17502 asm: arm.ASBC,
17503 reg: regInfo{
17504 inputs: []inputInfo{
17505 {0, 21503},
17506 {1, 21503},
17507 {2, 21503},
17508 },
17509 outputs: []outputInfo{
17510 {0, 21503},
17511 },
17512 },
17513 },
17514 {
17515 name: "SBCshiftRLreg",
17516 argLen: 4,
17517 asm: arm.ASBC,
17518 reg: regInfo{
17519 inputs: []inputInfo{
17520 {0, 21503},
17521 {1, 21503},
17522 {2, 21503},
17523 },
17524 outputs: []outputInfo{
17525 {0, 21503},
17526 },
17527 },
17528 },
17529 {
17530 name: "SBCshiftRAreg",
17531 argLen: 4,
17532 asm: arm.ASBC,
17533 reg: regInfo{
17534 inputs: []inputInfo{
17535 {0, 21503},
17536 {1, 21503},
17537 {2, 21503},
17538 },
17539 outputs: []outputInfo{
17540 {0, 21503},
17541 },
17542 },
17543 },
17544 {
17545 name: "RSCshiftLLreg",
17546 argLen: 4,
17547 asm: arm.ARSC,
17548 reg: regInfo{
17549 inputs: []inputInfo{
17550 {0, 21503},
17551 {1, 21503},
17552 {2, 21503},
17553 },
17554 outputs: []outputInfo{
17555 {0, 21503},
17556 },
17557 },
17558 },
17559 {
17560 name: "RSCshiftRLreg",
17561 argLen: 4,
17562 asm: arm.ARSC,
17563 reg: regInfo{
17564 inputs: []inputInfo{
17565 {0, 21503},
17566 {1, 21503},
17567 {2, 21503},
17568 },
17569 outputs: []outputInfo{
17570 {0, 21503},
17571 },
17572 },
17573 },
17574 {
17575 name: "RSCshiftRAreg",
17576 argLen: 4,
17577 asm: arm.ARSC,
17578 reg: regInfo{
17579 inputs: []inputInfo{
17580 {0, 21503},
17581 {1, 21503},
17582 {2, 21503},
17583 },
17584 outputs: []outputInfo{
17585 {0, 21503},
17586 },
17587 },
17588 },
17589 {
17590 name: "ADDSshiftLLreg",
17591 argLen: 3,
17592 asm: arm.AADD,
17593 reg: regInfo{
17594 inputs: []inputInfo{
17595 {0, 21503},
17596 {1, 21503},
17597 {2, 21503},
17598 },
17599 outputs: []outputInfo{
17600 {1, 0},
17601 {0, 21503},
17602 },
17603 },
17604 },
17605 {
17606 name: "ADDSshiftRLreg",
17607 argLen: 3,
17608 asm: arm.AADD,
17609 reg: regInfo{
17610 inputs: []inputInfo{
17611 {0, 21503},
17612 {1, 21503},
17613 {2, 21503},
17614 },
17615 outputs: []outputInfo{
17616 {1, 0},
17617 {0, 21503},
17618 },
17619 },
17620 },
17621 {
17622 name: "ADDSshiftRAreg",
17623 argLen: 3,
17624 asm: arm.AADD,
17625 reg: regInfo{
17626 inputs: []inputInfo{
17627 {0, 21503},
17628 {1, 21503},
17629 {2, 21503},
17630 },
17631 outputs: []outputInfo{
17632 {1, 0},
17633 {0, 21503},
17634 },
17635 },
17636 },
17637 {
17638 name: "SUBSshiftLLreg",
17639 argLen: 3,
17640 asm: arm.ASUB,
17641 reg: regInfo{
17642 inputs: []inputInfo{
17643 {0, 21503},
17644 {1, 21503},
17645 {2, 21503},
17646 },
17647 outputs: []outputInfo{
17648 {1, 0},
17649 {0, 21503},
17650 },
17651 },
17652 },
17653 {
17654 name: "SUBSshiftRLreg",
17655 argLen: 3,
17656 asm: arm.ASUB,
17657 reg: regInfo{
17658 inputs: []inputInfo{
17659 {0, 21503},
17660 {1, 21503},
17661 {2, 21503},
17662 },
17663 outputs: []outputInfo{
17664 {1, 0},
17665 {0, 21503},
17666 },
17667 },
17668 },
17669 {
17670 name: "SUBSshiftRAreg",
17671 argLen: 3,
17672 asm: arm.ASUB,
17673 reg: regInfo{
17674 inputs: []inputInfo{
17675 {0, 21503},
17676 {1, 21503},
17677 {2, 21503},
17678 },
17679 outputs: []outputInfo{
17680 {1, 0},
17681 {0, 21503},
17682 },
17683 },
17684 },
17685 {
17686 name: "RSBSshiftLLreg",
17687 argLen: 3,
17688 asm: arm.ARSB,
17689 reg: regInfo{
17690 inputs: []inputInfo{
17691 {0, 21503},
17692 {1, 21503},
17693 {2, 21503},
17694 },
17695 outputs: []outputInfo{
17696 {1, 0},
17697 {0, 21503},
17698 },
17699 },
17700 },
17701 {
17702 name: "RSBSshiftRLreg",
17703 argLen: 3,
17704 asm: arm.ARSB,
17705 reg: regInfo{
17706 inputs: []inputInfo{
17707 {0, 21503},
17708 {1, 21503},
17709 {2, 21503},
17710 },
17711 outputs: []outputInfo{
17712 {1, 0},
17713 {0, 21503},
17714 },
17715 },
17716 },
17717 {
17718 name: "RSBSshiftRAreg",
17719 argLen: 3,
17720 asm: arm.ARSB,
17721 reg: regInfo{
17722 inputs: []inputInfo{
17723 {0, 21503},
17724 {1, 21503},
17725 {2, 21503},
17726 },
17727 outputs: []outputInfo{
17728 {1, 0},
17729 {0, 21503},
17730 },
17731 },
17732 },
17733 {
17734 name: "CMP",
17735 argLen: 2,
17736 asm: arm.ACMP,
17737 reg: regInfo{
17738 inputs: []inputInfo{
17739 {0, 22527},
17740 {1, 22527},
17741 },
17742 },
17743 },
17744 {
17745 name: "CMPconst",
17746 auxType: auxInt32,
17747 argLen: 1,
17748 asm: arm.ACMP,
17749 reg: regInfo{
17750 inputs: []inputInfo{
17751 {0, 22527},
17752 },
17753 },
17754 },
17755 {
17756 name: "CMN",
17757 argLen: 2,
17758 commutative: true,
17759 asm: arm.ACMN,
17760 reg: regInfo{
17761 inputs: []inputInfo{
17762 {0, 22527},
17763 {1, 22527},
17764 },
17765 },
17766 },
17767 {
17768 name: "CMNconst",
17769 auxType: auxInt32,
17770 argLen: 1,
17771 asm: arm.ACMN,
17772 reg: regInfo{
17773 inputs: []inputInfo{
17774 {0, 22527},
17775 },
17776 },
17777 },
17778 {
17779 name: "TST",
17780 argLen: 2,
17781 commutative: true,
17782 asm: arm.ATST,
17783 reg: regInfo{
17784 inputs: []inputInfo{
17785 {0, 22527},
17786 {1, 22527},
17787 },
17788 },
17789 },
17790 {
17791 name: "TSTconst",
17792 auxType: auxInt32,
17793 argLen: 1,
17794 asm: arm.ATST,
17795 reg: regInfo{
17796 inputs: []inputInfo{
17797 {0, 22527},
17798 },
17799 },
17800 },
17801 {
17802 name: "TEQ",
17803 argLen: 2,
17804 commutative: true,
17805 asm: arm.ATEQ,
17806 reg: regInfo{
17807 inputs: []inputInfo{
17808 {0, 22527},
17809 {1, 22527},
17810 },
17811 },
17812 },
17813 {
17814 name: "TEQconst",
17815 auxType: auxInt32,
17816 argLen: 1,
17817 asm: arm.ATEQ,
17818 reg: regInfo{
17819 inputs: []inputInfo{
17820 {0, 22527},
17821 },
17822 },
17823 },
17824 {
17825 name: "CMPF",
17826 argLen: 2,
17827 asm: arm.ACMPF,
17828 reg: regInfo{
17829 inputs: []inputInfo{
17830 {0, 4294901760},
17831 {1, 4294901760},
17832 },
17833 },
17834 },
17835 {
17836 name: "CMPD",
17837 argLen: 2,
17838 asm: arm.ACMPD,
17839 reg: regInfo{
17840 inputs: []inputInfo{
17841 {0, 4294901760},
17842 {1, 4294901760},
17843 },
17844 },
17845 },
17846 {
17847 name: "CMPshiftLL",
17848 auxType: auxInt32,
17849 argLen: 2,
17850 asm: arm.ACMP,
17851 reg: regInfo{
17852 inputs: []inputInfo{
17853 {0, 22527},
17854 {1, 22527},
17855 },
17856 },
17857 },
17858 {
17859 name: "CMPshiftRL",
17860 auxType: auxInt32,
17861 argLen: 2,
17862 asm: arm.ACMP,
17863 reg: regInfo{
17864 inputs: []inputInfo{
17865 {0, 22527},
17866 {1, 22527},
17867 },
17868 },
17869 },
17870 {
17871 name: "CMPshiftRA",
17872 auxType: auxInt32,
17873 argLen: 2,
17874 asm: arm.ACMP,
17875 reg: regInfo{
17876 inputs: []inputInfo{
17877 {0, 22527},
17878 {1, 22527},
17879 },
17880 },
17881 },
17882 {
17883 name: "CMNshiftLL",
17884 auxType: auxInt32,
17885 argLen: 2,
17886 asm: arm.ACMN,
17887 reg: regInfo{
17888 inputs: []inputInfo{
17889 {0, 22527},
17890 {1, 22527},
17891 },
17892 },
17893 },
17894 {
17895 name: "CMNshiftRL",
17896 auxType: auxInt32,
17897 argLen: 2,
17898 asm: arm.ACMN,
17899 reg: regInfo{
17900 inputs: []inputInfo{
17901 {0, 22527},
17902 {1, 22527},
17903 },
17904 },
17905 },
17906 {
17907 name: "CMNshiftRA",
17908 auxType: auxInt32,
17909 argLen: 2,
17910 asm: arm.ACMN,
17911 reg: regInfo{
17912 inputs: []inputInfo{
17913 {0, 22527},
17914 {1, 22527},
17915 },
17916 },
17917 },
17918 {
17919 name: "TSTshiftLL",
17920 auxType: auxInt32,
17921 argLen: 2,
17922 asm: arm.ATST,
17923 reg: regInfo{
17924 inputs: []inputInfo{
17925 {0, 22527},
17926 {1, 22527},
17927 },
17928 },
17929 },
17930 {
17931 name: "TSTshiftRL",
17932 auxType: auxInt32,
17933 argLen: 2,
17934 asm: arm.ATST,
17935 reg: regInfo{
17936 inputs: []inputInfo{
17937 {0, 22527},
17938 {1, 22527},
17939 },
17940 },
17941 },
17942 {
17943 name: "TSTshiftRA",
17944 auxType: auxInt32,
17945 argLen: 2,
17946 asm: arm.ATST,
17947 reg: regInfo{
17948 inputs: []inputInfo{
17949 {0, 22527},
17950 {1, 22527},
17951 },
17952 },
17953 },
17954 {
17955 name: "TEQshiftLL",
17956 auxType: auxInt32,
17957 argLen: 2,
17958 asm: arm.ATEQ,
17959 reg: regInfo{
17960 inputs: []inputInfo{
17961 {0, 22527},
17962 {1, 22527},
17963 },
17964 },
17965 },
17966 {
17967 name: "TEQshiftRL",
17968 auxType: auxInt32,
17969 argLen: 2,
17970 asm: arm.ATEQ,
17971 reg: regInfo{
17972 inputs: []inputInfo{
17973 {0, 22527},
17974 {1, 22527},
17975 },
17976 },
17977 },
17978 {
17979 name: "TEQshiftRA",
17980 auxType: auxInt32,
17981 argLen: 2,
17982 asm: arm.ATEQ,
17983 reg: regInfo{
17984 inputs: []inputInfo{
17985 {0, 22527},
17986 {1, 22527},
17987 },
17988 },
17989 },
17990 {
17991 name: "CMPshiftLLreg",
17992 argLen: 3,
17993 asm: arm.ACMP,
17994 reg: regInfo{
17995 inputs: []inputInfo{
17996 {0, 21503},
17997 {1, 21503},
17998 {2, 21503},
17999 },
18000 },
18001 },
18002 {
18003 name: "CMPshiftRLreg",
18004 argLen: 3,
18005 asm: arm.ACMP,
18006 reg: regInfo{
18007 inputs: []inputInfo{
18008 {0, 21503},
18009 {1, 21503},
18010 {2, 21503},
18011 },
18012 },
18013 },
18014 {
18015 name: "CMPshiftRAreg",
18016 argLen: 3,
18017 asm: arm.ACMP,
18018 reg: regInfo{
18019 inputs: []inputInfo{
18020 {0, 21503},
18021 {1, 21503},
18022 {2, 21503},
18023 },
18024 },
18025 },
18026 {
18027 name: "CMNshiftLLreg",
18028 argLen: 3,
18029 asm: arm.ACMN,
18030 reg: regInfo{
18031 inputs: []inputInfo{
18032 {0, 21503},
18033 {1, 21503},
18034 {2, 21503},
18035 },
18036 },
18037 },
18038 {
18039 name: "CMNshiftRLreg",
18040 argLen: 3,
18041 asm: arm.ACMN,
18042 reg: regInfo{
18043 inputs: []inputInfo{
18044 {0, 21503},
18045 {1, 21503},
18046 {2, 21503},
18047 },
18048 },
18049 },
18050 {
18051 name: "CMNshiftRAreg",
18052 argLen: 3,
18053 asm: arm.ACMN,
18054 reg: regInfo{
18055 inputs: []inputInfo{
18056 {0, 21503},
18057 {1, 21503},
18058 {2, 21503},
18059 },
18060 },
18061 },
18062 {
18063 name: "TSTshiftLLreg",
18064 argLen: 3,
18065 asm: arm.ATST,
18066 reg: regInfo{
18067 inputs: []inputInfo{
18068 {0, 21503},
18069 {1, 21503},
18070 {2, 21503},
18071 },
18072 },
18073 },
18074 {
18075 name: "TSTshiftRLreg",
18076 argLen: 3,
18077 asm: arm.ATST,
18078 reg: regInfo{
18079 inputs: []inputInfo{
18080 {0, 21503},
18081 {1, 21503},
18082 {2, 21503},
18083 },
18084 },
18085 },
18086 {
18087 name: "TSTshiftRAreg",
18088 argLen: 3,
18089 asm: arm.ATST,
18090 reg: regInfo{
18091 inputs: []inputInfo{
18092 {0, 21503},
18093 {1, 21503},
18094 {2, 21503},
18095 },
18096 },
18097 },
18098 {
18099 name: "TEQshiftLLreg",
18100 argLen: 3,
18101 asm: arm.ATEQ,
18102 reg: regInfo{
18103 inputs: []inputInfo{
18104 {0, 21503},
18105 {1, 21503},
18106 {2, 21503},
18107 },
18108 },
18109 },
18110 {
18111 name: "TEQshiftRLreg",
18112 argLen: 3,
18113 asm: arm.ATEQ,
18114 reg: regInfo{
18115 inputs: []inputInfo{
18116 {0, 21503},
18117 {1, 21503},
18118 {2, 21503},
18119 },
18120 },
18121 },
18122 {
18123 name: "TEQshiftRAreg",
18124 argLen: 3,
18125 asm: arm.ATEQ,
18126 reg: regInfo{
18127 inputs: []inputInfo{
18128 {0, 21503},
18129 {1, 21503},
18130 {2, 21503},
18131 },
18132 },
18133 },
18134 {
18135 name: "CMPF0",
18136 argLen: 1,
18137 asm: arm.ACMPF,
18138 reg: regInfo{
18139 inputs: []inputInfo{
18140 {0, 4294901760},
18141 },
18142 },
18143 },
18144 {
18145 name: "CMPD0",
18146 argLen: 1,
18147 asm: arm.ACMPD,
18148 reg: regInfo{
18149 inputs: []inputInfo{
18150 {0, 4294901760},
18151 },
18152 },
18153 },
18154 {
18155 name: "MOVWconst",
18156 auxType: auxInt32,
18157 argLen: 0,
18158 rematerializeable: true,
18159 asm: arm.AMOVW,
18160 reg: regInfo{
18161 outputs: []outputInfo{
18162 {0, 21503},
18163 },
18164 },
18165 },
18166 {
18167 name: "MOVFconst",
18168 auxType: auxFloat64,
18169 argLen: 0,
18170 rematerializeable: true,
18171 asm: arm.AMOVF,
18172 reg: regInfo{
18173 outputs: []outputInfo{
18174 {0, 4294901760},
18175 },
18176 },
18177 },
18178 {
18179 name: "MOVDconst",
18180 auxType: auxFloat64,
18181 argLen: 0,
18182 rematerializeable: true,
18183 asm: arm.AMOVD,
18184 reg: regInfo{
18185 outputs: []outputInfo{
18186 {0, 4294901760},
18187 },
18188 },
18189 },
18190 {
18191 name: "MOVWaddr",
18192 auxType: auxSymOff,
18193 argLen: 1,
18194 rematerializeable: true,
18195 symEffect: SymAddr,
18196 asm: arm.AMOVW,
18197 reg: regInfo{
18198 inputs: []inputInfo{
18199 {0, 4294975488},
18200 },
18201 outputs: []outputInfo{
18202 {0, 21503},
18203 },
18204 },
18205 },
18206 {
18207 name: "MOVBload",
18208 auxType: auxSymOff,
18209 argLen: 2,
18210 faultOnNilArg0: true,
18211 symEffect: SymRead,
18212 asm: arm.AMOVB,
18213 reg: regInfo{
18214 inputs: []inputInfo{
18215 {0, 4294998015},
18216 },
18217 outputs: []outputInfo{
18218 {0, 21503},
18219 },
18220 },
18221 },
18222 {
18223 name: "MOVBUload",
18224 auxType: auxSymOff,
18225 argLen: 2,
18226 faultOnNilArg0: true,
18227 symEffect: SymRead,
18228 asm: arm.AMOVBU,
18229 reg: regInfo{
18230 inputs: []inputInfo{
18231 {0, 4294998015},
18232 },
18233 outputs: []outputInfo{
18234 {0, 21503},
18235 },
18236 },
18237 },
18238 {
18239 name: "MOVHload",
18240 auxType: auxSymOff,
18241 argLen: 2,
18242 faultOnNilArg0: true,
18243 symEffect: SymRead,
18244 asm: arm.AMOVH,
18245 reg: regInfo{
18246 inputs: []inputInfo{
18247 {0, 4294998015},
18248 },
18249 outputs: []outputInfo{
18250 {0, 21503},
18251 },
18252 },
18253 },
18254 {
18255 name: "MOVHUload",
18256 auxType: auxSymOff,
18257 argLen: 2,
18258 faultOnNilArg0: true,
18259 symEffect: SymRead,
18260 asm: arm.AMOVHU,
18261 reg: regInfo{
18262 inputs: []inputInfo{
18263 {0, 4294998015},
18264 },
18265 outputs: []outputInfo{
18266 {0, 21503},
18267 },
18268 },
18269 },
18270 {
18271 name: "MOVWload",
18272 auxType: auxSymOff,
18273 argLen: 2,
18274 faultOnNilArg0: true,
18275 symEffect: SymRead,
18276 asm: arm.AMOVW,
18277 reg: regInfo{
18278 inputs: []inputInfo{
18279 {0, 4294998015},
18280 },
18281 outputs: []outputInfo{
18282 {0, 21503},
18283 },
18284 },
18285 },
18286 {
18287 name: "MOVFload",
18288 auxType: auxSymOff,
18289 argLen: 2,
18290 faultOnNilArg0: true,
18291 symEffect: SymRead,
18292 asm: arm.AMOVF,
18293 reg: regInfo{
18294 inputs: []inputInfo{
18295 {0, 4294998015},
18296 },
18297 outputs: []outputInfo{
18298 {0, 4294901760},
18299 },
18300 },
18301 },
18302 {
18303 name: "MOVDload",
18304 auxType: auxSymOff,
18305 argLen: 2,
18306 faultOnNilArg0: true,
18307 symEffect: SymRead,
18308 asm: arm.AMOVD,
18309 reg: regInfo{
18310 inputs: []inputInfo{
18311 {0, 4294998015},
18312 },
18313 outputs: []outputInfo{
18314 {0, 4294901760},
18315 },
18316 },
18317 },
18318 {
18319 name: "MOVBstore",
18320 auxType: auxSymOff,
18321 argLen: 3,
18322 faultOnNilArg0: true,
18323 symEffect: SymWrite,
18324 asm: arm.AMOVB,
18325 reg: regInfo{
18326 inputs: []inputInfo{
18327 {1, 22527},
18328 {0, 4294998015},
18329 },
18330 },
18331 },
18332 {
18333 name: "MOVHstore",
18334 auxType: auxSymOff,
18335 argLen: 3,
18336 faultOnNilArg0: true,
18337 symEffect: SymWrite,
18338 asm: arm.AMOVH,
18339 reg: regInfo{
18340 inputs: []inputInfo{
18341 {1, 22527},
18342 {0, 4294998015},
18343 },
18344 },
18345 },
18346 {
18347 name: "MOVWstore",
18348 auxType: auxSymOff,
18349 argLen: 3,
18350 faultOnNilArg0: true,
18351 symEffect: SymWrite,
18352 asm: arm.AMOVW,
18353 reg: regInfo{
18354 inputs: []inputInfo{
18355 {1, 22527},
18356 {0, 4294998015},
18357 },
18358 },
18359 },
18360 {
18361 name: "MOVFstore",
18362 auxType: auxSymOff,
18363 argLen: 3,
18364 faultOnNilArg0: true,
18365 symEffect: SymWrite,
18366 asm: arm.AMOVF,
18367 reg: regInfo{
18368 inputs: []inputInfo{
18369 {0, 4294998015},
18370 {1, 4294901760},
18371 },
18372 },
18373 },
18374 {
18375 name: "MOVDstore",
18376 auxType: auxSymOff,
18377 argLen: 3,
18378 faultOnNilArg0: true,
18379 symEffect: SymWrite,
18380 asm: arm.AMOVD,
18381 reg: regInfo{
18382 inputs: []inputInfo{
18383 {0, 4294998015},
18384 {1, 4294901760},
18385 },
18386 },
18387 },
18388 {
18389 name: "MOVWloadidx",
18390 argLen: 3,
18391 asm: arm.AMOVW,
18392 reg: regInfo{
18393 inputs: []inputInfo{
18394 {1, 22527},
18395 {0, 4294998015},
18396 },
18397 outputs: []outputInfo{
18398 {0, 21503},
18399 },
18400 },
18401 },
18402 {
18403 name: "MOVWloadshiftLL",
18404 auxType: auxInt32,
18405 argLen: 3,
18406 asm: arm.AMOVW,
18407 reg: regInfo{
18408 inputs: []inputInfo{
18409 {1, 22527},
18410 {0, 4294998015},
18411 },
18412 outputs: []outputInfo{
18413 {0, 21503},
18414 },
18415 },
18416 },
18417 {
18418 name: "MOVWloadshiftRL",
18419 auxType: auxInt32,
18420 argLen: 3,
18421 asm: arm.AMOVW,
18422 reg: regInfo{
18423 inputs: []inputInfo{
18424 {1, 22527},
18425 {0, 4294998015},
18426 },
18427 outputs: []outputInfo{
18428 {0, 21503},
18429 },
18430 },
18431 },
18432 {
18433 name: "MOVWloadshiftRA",
18434 auxType: auxInt32,
18435 argLen: 3,
18436 asm: arm.AMOVW,
18437 reg: regInfo{
18438 inputs: []inputInfo{
18439 {1, 22527},
18440 {0, 4294998015},
18441 },
18442 outputs: []outputInfo{
18443 {0, 21503},
18444 },
18445 },
18446 },
18447 {
18448 name: "MOVBUloadidx",
18449 argLen: 3,
18450 asm: arm.AMOVBU,
18451 reg: regInfo{
18452 inputs: []inputInfo{
18453 {1, 22527},
18454 {0, 4294998015},
18455 },
18456 outputs: []outputInfo{
18457 {0, 21503},
18458 },
18459 },
18460 },
18461 {
18462 name: "MOVBloadidx",
18463 argLen: 3,
18464 asm: arm.AMOVB,
18465 reg: regInfo{
18466 inputs: []inputInfo{
18467 {1, 22527},
18468 {0, 4294998015},
18469 },
18470 outputs: []outputInfo{
18471 {0, 21503},
18472 },
18473 },
18474 },
18475 {
18476 name: "MOVHUloadidx",
18477 argLen: 3,
18478 asm: arm.AMOVHU,
18479 reg: regInfo{
18480 inputs: []inputInfo{
18481 {1, 22527},
18482 {0, 4294998015},
18483 },
18484 outputs: []outputInfo{
18485 {0, 21503},
18486 },
18487 },
18488 },
18489 {
18490 name: "MOVHloadidx",
18491 argLen: 3,
18492 asm: arm.AMOVH,
18493 reg: regInfo{
18494 inputs: []inputInfo{
18495 {1, 22527},
18496 {0, 4294998015},
18497 },
18498 outputs: []outputInfo{
18499 {0, 21503},
18500 },
18501 },
18502 },
18503 {
18504 name: "MOVWstoreidx",
18505 argLen: 4,
18506 asm: arm.AMOVW,
18507 reg: regInfo{
18508 inputs: []inputInfo{
18509 {1, 22527},
18510 {2, 22527},
18511 {0, 4294998015},
18512 },
18513 },
18514 },
18515 {
18516 name: "MOVWstoreshiftLL",
18517 auxType: auxInt32,
18518 argLen: 4,
18519 asm: arm.AMOVW,
18520 reg: regInfo{
18521 inputs: []inputInfo{
18522 {1, 22527},
18523 {2, 22527},
18524 {0, 4294998015},
18525 },
18526 },
18527 },
18528 {
18529 name: "MOVWstoreshiftRL",
18530 auxType: auxInt32,
18531 argLen: 4,
18532 asm: arm.AMOVW,
18533 reg: regInfo{
18534 inputs: []inputInfo{
18535 {1, 22527},
18536 {2, 22527},
18537 {0, 4294998015},
18538 },
18539 },
18540 },
18541 {
18542 name: "MOVWstoreshiftRA",
18543 auxType: auxInt32,
18544 argLen: 4,
18545 asm: arm.AMOVW,
18546 reg: regInfo{
18547 inputs: []inputInfo{
18548 {1, 22527},
18549 {2, 22527},
18550 {0, 4294998015},
18551 },
18552 },
18553 },
18554 {
18555 name: "MOVBstoreidx",
18556 argLen: 4,
18557 asm: arm.AMOVB,
18558 reg: regInfo{
18559 inputs: []inputInfo{
18560 {1, 22527},
18561 {2, 22527},
18562 {0, 4294998015},
18563 },
18564 },
18565 },
18566 {
18567 name: "MOVHstoreidx",
18568 argLen: 4,
18569 asm: arm.AMOVH,
18570 reg: regInfo{
18571 inputs: []inputInfo{
18572 {1, 22527},
18573 {2, 22527},
18574 {0, 4294998015},
18575 },
18576 },
18577 },
18578 {
18579 name: "MOVBreg",
18580 argLen: 1,
18581 asm: arm.AMOVBS,
18582 reg: regInfo{
18583 inputs: []inputInfo{
18584 {0, 22527},
18585 },
18586 outputs: []outputInfo{
18587 {0, 21503},
18588 },
18589 },
18590 },
18591 {
18592 name: "MOVBUreg",
18593 argLen: 1,
18594 asm: arm.AMOVBU,
18595 reg: regInfo{
18596 inputs: []inputInfo{
18597 {0, 22527},
18598 },
18599 outputs: []outputInfo{
18600 {0, 21503},
18601 },
18602 },
18603 },
18604 {
18605 name: "MOVHreg",
18606 argLen: 1,
18607 asm: arm.AMOVHS,
18608 reg: regInfo{
18609 inputs: []inputInfo{
18610 {0, 22527},
18611 },
18612 outputs: []outputInfo{
18613 {0, 21503},
18614 },
18615 },
18616 },
18617 {
18618 name: "MOVHUreg",
18619 argLen: 1,
18620 asm: arm.AMOVHU,
18621 reg: regInfo{
18622 inputs: []inputInfo{
18623 {0, 22527},
18624 },
18625 outputs: []outputInfo{
18626 {0, 21503},
18627 },
18628 },
18629 },
18630 {
18631 name: "MOVWreg",
18632 argLen: 1,
18633 asm: arm.AMOVW,
18634 reg: regInfo{
18635 inputs: []inputInfo{
18636 {0, 22527},
18637 },
18638 outputs: []outputInfo{
18639 {0, 21503},
18640 },
18641 },
18642 },
18643 {
18644 name: "MOVWnop",
18645 argLen: 1,
18646 resultInArg0: true,
18647 reg: regInfo{
18648 inputs: []inputInfo{
18649 {0, 21503},
18650 },
18651 outputs: []outputInfo{
18652 {0, 21503},
18653 },
18654 },
18655 },
18656 {
18657 name: "MOVWF",
18658 argLen: 1,
18659 asm: arm.AMOVWF,
18660 reg: regInfo{
18661 inputs: []inputInfo{
18662 {0, 21503},
18663 },
18664 clobbers: 2147483648,
18665 outputs: []outputInfo{
18666 {0, 4294901760},
18667 },
18668 },
18669 },
18670 {
18671 name: "MOVWD",
18672 argLen: 1,
18673 asm: arm.AMOVWD,
18674 reg: regInfo{
18675 inputs: []inputInfo{
18676 {0, 21503},
18677 },
18678 clobbers: 2147483648,
18679 outputs: []outputInfo{
18680 {0, 4294901760},
18681 },
18682 },
18683 },
18684 {
18685 name: "MOVWUF",
18686 argLen: 1,
18687 asm: arm.AMOVWF,
18688 reg: regInfo{
18689 inputs: []inputInfo{
18690 {0, 21503},
18691 },
18692 clobbers: 2147483648,
18693 outputs: []outputInfo{
18694 {0, 4294901760},
18695 },
18696 },
18697 },
18698 {
18699 name: "MOVWUD",
18700 argLen: 1,
18701 asm: arm.AMOVWD,
18702 reg: regInfo{
18703 inputs: []inputInfo{
18704 {0, 21503},
18705 },
18706 clobbers: 2147483648,
18707 outputs: []outputInfo{
18708 {0, 4294901760},
18709 },
18710 },
18711 },
18712 {
18713 name: "MOVFW",
18714 argLen: 1,
18715 asm: arm.AMOVFW,
18716 reg: regInfo{
18717 inputs: []inputInfo{
18718 {0, 4294901760},
18719 },
18720 clobbers: 2147483648,
18721 outputs: []outputInfo{
18722 {0, 21503},
18723 },
18724 },
18725 },
18726 {
18727 name: "MOVDW",
18728 argLen: 1,
18729 asm: arm.AMOVDW,
18730 reg: regInfo{
18731 inputs: []inputInfo{
18732 {0, 4294901760},
18733 },
18734 clobbers: 2147483648,
18735 outputs: []outputInfo{
18736 {0, 21503},
18737 },
18738 },
18739 },
18740 {
18741 name: "MOVFWU",
18742 argLen: 1,
18743 asm: arm.AMOVFW,
18744 reg: regInfo{
18745 inputs: []inputInfo{
18746 {0, 4294901760},
18747 },
18748 clobbers: 2147483648,
18749 outputs: []outputInfo{
18750 {0, 21503},
18751 },
18752 },
18753 },
18754 {
18755 name: "MOVDWU",
18756 argLen: 1,
18757 asm: arm.AMOVDW,
18758 reg: regInfo{
18759 inputs: []inputInfo{
18760 {0, 4294901760},
18761 },
18762 clobbers: 2147483648,
18763 outputs: []outputInfo{
18764 {0, 21503},
18765 },
18766 },
18767 },
18768 {
18769 name: "MOVFD",
18770 argLen: 1,
18771 asm: arm.AMOVFD,
18772 reg: regInfo{
18773 inputs: []inputInfo{
18774 {0, 4294901760},
18775 },
18776 outputs: []outputInfo{
18777 {0, 4294901760},
18778 },
18779 },
18780 },
18781 {
18782 name: "MOVDF",
18783 argLen: 1,
18784 asm: arm.AMOVDF,
18785 reg: regInfo{
18786 inputs: []inputInfo{
18787 {0, 4294901760},
18788 },
18789 outputs: []outputInfo{
18790 {0, 4294901760},
18791 },
18792 },
18793 },
18794 {
18795 name: "CMOVWHSconst",
18796 auxType: auxInt32,
18797 argLen: 2,
18798 resultInArg0: true,
18799 asm: arm.AMOVW,
18800 reg: regInfo{
18801 inputs: []inputInfo{
18802 {0, 21503},
18803 },
18804 outputs: []outputInfo{
18805 {0, 21503},
18806 },
18807 },
18808 },
18809 {
18810 name: "CMOVWLSconst",
18811 auxType: auxInt32,
18812 argLen: 2,
18813 resultInArg0: true,
18814 asm: arm.AMOVW,
18815 reg: regInfo{
18816 inputs: []inputInfo{
18817 {0, 21503},
18818 },
18819 outputs: []outputInfo{
18820 {0, 21503},
18821 },
18822 },
18823 },
18824 {
18825 name: "SRAcond",
18826 argLen: 3,
18827 asm: arm.ASRA,
18828 reg: regInfo{
18829 inputs: []inputInfo{
18830 {0, 21503},
18831 {1, 21503},
18832 },
18833 outputs: []outputInfo{
18834 {0, 21503},
18835 },
18836 },
18837 },
18838 {
18839 name: "CALLstatic",
18840 auxType: auxCallOff,
18841 argLen: 1,
18842 clobberFlags: true,
18843 call: true,
18844 reg: regInfo{
18845 clobbers: 4294924287,
18846 },
18847 },
18848 {
18849 name: "CALLtail",
18850 auxType: auxCallOff,
18851 argLen: 1,
18852 clobberFlags: true,
18853 call: true,
18854 tailCall: true,
18855 reg: regInfo{
18856 clobbers: 4294924287,
18857 },
18858 },
18859 {
18860 name: "CALLclosure",
18861 auxType: auxCallOff,
18862 argLen: 3,
18863 clobberFlags: true,
18864 call: true,
18865 reg: regInfo{
18866 inputs: []inputInfo{
18867 {1, 128},
18868 {0, 29695},
18869 },
18870 clobbers: 4294924287,
18871 },
18872 },
18873 {
18874 name: "CALLinter",
18875 auxType: auxCallOff,
18876 argLen: 2,
18877 clobberFlags: true,
18878 call: true,
18879 reg: regInfo{
18880 inputs: []inputInfo{
18881 {0, 21503},
18882 },
18883 clobbers: 4294924287,
18884 },
18885 },
18886 {
18887 name: "LoweredNilCheck",
18888 argLen: 2,
18889 nilCheck: true,
18890 faultOnNilArg0: true,
18891 reg: regInfo{
18892 inputs: []inputInfo{
18893 {0, 22527},
18894 },
18895 },
18896 },
18897 {
18898 name: "Equal",
18899 argLen: 1,
18900 reg: regInfo{
18901 outputs: []outputInfo{
18902 {0, 21503},
18903 },
18904 },
18905 },
18906 {
18907 name: "NotEqual",
18908 argLen: 1,
18909 reg: regInfo{
18910 outputs: []outputInfo{
18911 {0, 21503},
18912 },
18913 },
18914 },
18915 {
18916 name: "LessThan",
18917 argLen: 1,
18918 reg: regInfo{
18919 outputs: []outputInfo{
18920 {0, 21503},
18921 },
18922 },
18923 },
18924 {
18925 name: "LessEqual",
18926 argLen: 1,
18927 reg: regInfo{
18928 outputs: []outputInfo{
18929 {0, 21503},
18930 },
18931 },
18932 },
18933 {
18934 name: "GreaterThan",
18935 argLen: 1,
18936 reg: regInfo{
18937 outputs: []outputInfo{
18938 {0, 21503},
18939 },
18940 },
18941 },
18942 {
18943 name: "GreaterEqual",
18944 argLen: 1,
18945 reg: regInfo{
18946 outputs: []outputInfo{
18947 {0, 21503},
18948 },
18949 },
18950 },
18951 {
18952 name: "LessThanU",
18953 argLen: 1,
18954 reg: regInfo{
18955 outputs: []outputInfo{
18956 {0, 21503},
18957 },
18958 },
18959 },
18960 {
18961 name: "LessEqualU",
18962 argLen: 1,
18963 reg: regInfo{
18964 outputs: []outputInfo{
18965 {0, 21503},
18966 },
18967 },
18968 },
18969 {
18970 name: "GreaterThanU",
18971 argLen: 1,
18972 reg: regInfo{
18973 outputs: []outputInfo{
18974 {0, 21503},
18975 },
18976 },
18977 },
18978 {
18979 name: "GreaterEqualU",
18980 argLen: 1,
18981 reg: regInfo{
18982 outputs: []outputInfo{
18983 {0, 21503},
18984 },
18985 },
18986 },
18987 {
18988 name: "DUFFZERO",
18989 auxType: auxInt64,
18990 argLen: 3,
18991 faultOnNilArg0: true,
18992 reg: regInfo{
18993 inputs: []inputInfo{
18994 {0, 2},
18995 {1, 1},
18996 },
18997 clobbers: 20482,
18998 },
18999 },
19000 {
19001 name: "DUFFCOPY",
19002 auxType: auxInt64,
19003 argLen: 3,
19004 faultOnNilArg0: true,
19005 faultOnNilArg1: true,
19006 reg: regInfo{
19007 inputs: []inputInfo{
19008 {0, 4},
19009 {1, 2},
19010 },
19011 clobbers: 20487,
19012 },
19013 },
19014 {
19015 name: "LoweredZero",
19016 auxType: auxInt64,
19017 argLen: 4,
19018 clobberFlags: true,
19019 faultOnNilArg0: true,
19020 reg: regInfo{
19021 inputs: []inputInfo{
19022 {0, 2},
19023 {1, 21503},
19024 {2, 21503},
19025 },
19026 clobbers: 2,
19027 },
19028 },
19029 {
19030 name: "LoweredMove",
19031 auxType: auxInt64,
19032 argLen: 4,
19033 clobberFlags: true,
19034 faultOnNilArg0: true,
19035 faultOnNilArg1: true,
19036 reg: regInfo{
19037 inputs: []inputInfo{
19038 {0, 4},
19039 {1, 2},
19040 {2, 21503},
19041 },
19042 clobbers: 6,
19043 },
19044 },
19045 {
19046 name: "LoweredGetClosurePtr",
19047 argLen: 0,
19048 zeroWidth: true,
19049 reg: regInfo{
19050 outputs: []outputInfo{
19051 {0, 128},
19052 },
19053 },
19054 },
19055 {
19056 name: "LoweredGetCallerSP",
19057 argLen: 1,
19058 rematerializeable: true,
19059 reg: regInfo{
19060 outputs: []outputInfo{
19061 {0, 21503},
19062 },
19063 },
19064 },
19065 {
19066 name: "LoweredGetCallerPC",
19067 argLen: 0,
19068 rematerializeable: true,
19069 reg: regInfo{
19070 outputs: []outputInfo{
19071 {0, 21503},
19072 },
19073 },
19074 },
19075 {
19076 name: "LoweredPanicBoundsA",
19077 auxType: auxInt64,
19078 argLen: 3,
19079 call: true,
19080 reg: regInfo{
19081 inputs: []inputInfo{
19082 {0, 4},
19083 {1, 8},
19084 },
19085 },
19086 },
19087 {
19088 name: "LoweredPanicBoundsB",
19089 auxType: auxInt64,
19090 argLen: 3,
19091 call: true,
19092 reg: regInfo{
19093 inputs: []inputInfo{
19094 {0, 2},
19095 {1, 4},
19096 },
19097 },
19098 },
19099 {
19100 name: "LoweredPanicBoundsC",
19101 auxType: auxInt64,
19102 argLen: 3,
19103 call: true,
19104 reg: regInfo{
19105 inputs: []inputInfo{
19106 {0, 1},
19107 {1, 2},
19108 },
19109 },
19110 },
19111 {
19112 name: "LoweredPanicExtendA",
19113 auxType: auxInt64,
19114 argLen: 4,
19115 call: true,
19116 reg: regInfo{
19117 inputs: []inputInfo{
19118 {0, 16},
19119 {1, 4},
19120 {2, 8},
19121 },
19122 },
19123 },
19124 {
19125 name: "LoweredPanicExtendB",
19126 auxType: auxInt64,
19127 argLen: 4,
19128 call: true,
19129 reg: regInfo{
19130 inputs: []inputInfo{
19131 {0, 16},
19132 {1, 2},
19133 {2, 4},
19134 },
19135 },
19136 },
19137 {
19138 name: "LoweredPanicExtendC",
19139 auxType: auxInt64,
19140 argLen: 4,
19141 call: true,
19142 reg: regInfo{
19143 inputs: []inputInfo{
19144 {0, 16},
19145 {1, 1},
19146 {2, 2},
19147 },
19148 },
19149 },
19150 {
19151 name: "FlagConstant",
19152 auxType: auxFlagConstant,
19153 argLen: 0,
19154 reg: regInfo{},
19155 },
19156 {
19157 name: "InvertFlags",
19158 argLen: 1,
19159 reg: regInfo{},
19160 },
19161 {
19162 name: "LoweredWB",
19163 auxType: auxInt64,
19164 argLen: 1,
19165 clobberFlags: true,
19166 reg: regInfo{
19167 clobbers: 4294922240,
19168 outputs: []outputInfo{
19169 {0, 256},
19170 },
19171 },
19172 },
19173
19174 {
19175 name: "ADCSflags",
19176 argLen: 3,
19177 commutative: true,
19178 asm: arm64.AADCS,
19179 reg: regInfo{
19180 inputs: []inputInfo{
19181 {0, 335544319},
19182 {1, 335544319},
19183 },
19184 outputs: []outputInfo{
19185 {1, 0},
19186 {0, 335544319},
19187 },
19188 },
19189 },
19190 {
19191 name: "ADCzerocarry",
19192 argLen: 1,
19193 asm: arm64.AADC,
19194 reg: regInfo{
19195 outputs: []outputInfo{
19196 {0, 335544319},
19197 },
19198 },
19199 },
19200 {
19201 name: "ADD",
19202 argLen: 2,
19203 commutative: true,
19204 asm: arm64.AADD,
19205 reg: regInfo{
19206 inputs: []inputInfo{
19207 {0, 402653183},
19208 {1, 402653183},
19209 },
19210 outputs: []outputInfo{
19211 {0, 335544319},
19212 },
19213 },
19214 },
19215 {
19216 name: "ADDconst",
19217 auxType: auxInt64,
19218 argLen: 1,
19219 asm: arm64.AADD,
19220 reg: regInfo{
19221 inputs: []inputInfo{
19222 {0, 1476395007},
19223 },
19224 outputs: []outputInfo{
19225 {0, 335544319},
19226 },
19227 },
19228 },
19229 {
19230 name: "ADDSconstflags",
19231 auxType: auxInt64,
19232 argLen: 1,
19233 asm: arm64.AADDS,
19234 reg: regInfo{
19235 inputs: []inputInfo{
19236 {0, 402653183},
19237 },
19238 outputs: []outputInfo{
19239 {1, 0},
19240 {0, 335544319},
19241 },
19242 },
19243 },
19244 {
19245 name: "ADDSflags",
19246 argLen: 2,
19247 commutative: true,
19248 asm: arm64.AADDS,
19249 reg: regInfo{
19250 inputs: []inputInfo{
19251 {0, 335544319},
19252 {1, 335544319},
19253 },
19254 outputs: []outputInfo{
19255 {1, 0},
19256 {0, 335544319},
19257 },
19258 },
19259 },
19260 {
19261 name: "SUB",
19262 argLen: 2,
19263 asm: arm64.ASUB,
19264 reg: regInfo{
19265 inputs: []inputInfo{
19266 {0, 402653183},
19267 {1, 402653183},
19268 },
19269 outputs: []outputInfo{
19270 {0, 335544319},
19271 },
19272 },
19273 },
19274 {
19275 name: "SUBconst",
19276 auxType: auxInt64,
19277 argLen: 1,
19278 asm: arm64.ASUB,
19279 reg: regInfo{
19280 inputs: []inputInfo{
19281 {0, 402653183},
19282 },
19283 outputs: []outputInfo{
19284 {0, 335544319},
19285 },
19286 },
19287 },
19288 {
19289 name: "SBCSflags",
19290 argLen: 3,
19291 asm: arm64.ASBCS,
19292 reg: regInfo{
19293 inputs: []inputInfo{
19294 {0, 335544319},
19295 {1, 335544319},
19296 },
19297 outputs: []outputInfo{
19298 {1, 0},
19299 {0, 335544319},
19300 },
19301 },
19302 },
19303 {
19304 name: "SUBSflags",
19305 argLen: 2,
19306 asm: arm64.ASUBS,
19307 reg: regInfo{
19308 inputs: []inputInfo{
19309 {0, 335544319},
19310 {1, 335544319},
19311 },
19312 outputs: []outputInfo{
19313 {1, 0},
19314 {0, 335544319},
19315 },
19316 },
19317 },
19318 {
19319 name: "MUL",
19320 argLen: 2,
19321 commutative: true,
19322 asm: arm64.AMUL,
19323 reg: regInfo{
19324 inputs: []inputInfo{
19325 {0, 402653183},
19326 {1, 402653183},
19327 },
19328 outputs: []outputInfo{
19329 {0, 335544319},
19330 },
19331 },
19332 },
19333 {
19334 name: "MULW",
19335 argLen: 2,
19336 commutative: true,
19337 asm: arm64.AMULW,
19338 reg: regInfo{
19339 inputs: []inputInfo{
19340 {0, 402653183},
19341 {1, 402653183},
19342 },
19343 outputs: []outputInfo{
19344 {0, 335544319},
19345 },
19346 },
19347 },
19348 {
19349 name: "MNEG",
19350 argLen: 2,
19351 commutative: true,
19352 asm: arm64.AMNEG,
19353 reg: regInfo{
19354 inputs: []inputInfo{
19355 {0, 402653183},
19356 {1, 402653183},
19357 },
19358 outputs: []outputInfo{
19359 {0, 335544319},
19360 },
19361 },
19362 },
19363 {
19364 name: "MNEGW",
19365 argLen: 2,
19366 commutative: true,
19367 asm: arm64.AMNEGW,
19368 reg: regInfo{
19369 inputs: []inputInfo{
19370 {0, 402653183},
19371 {1, 402653183},
19372 },
19373 outputs: []outputInfo{
19374 {0, 335544319},
19375 },
19376 },
19377 },
19378 {
19379 name: "MULH",
19380 argLen: 2,
19381 commutative: true,
19382 asm: arm64.ASMULH,
19383 reg: regInfo{
19384 inputs: []inputInfo{
19385 {0, 402653183},
19386 {1, 402653183},
19387 },
19388 outputs: []outputInfo{
19389 {0, 335544319},
19390 },
19391 },
19392 },
19393 {
19394 name: "UMULH",
19395 argLen: 2,
19396 commutative: true,
19397 asm: arm64.AUMULH,
19398 reg: regInfo{
19399 inputs: []inputInfo{
19400 {0, 402653183},
19401 {1, 402653183},
19402 },
19403 outputs: []outputInfo{
19404 {0, 335544319},
19405 },
19406 },
19407 },
19408 {
19409 name: "MULL",
19410 argLen: 2,
19411 commutative: true,
19412 asm: arm64.ASMULL,
19413 reg: regInfo{
19414 inputs: []inputInfo{
19415 {0, 402653183},
19416 {1, 402653183},
19417 },
19418 outputs: []outputInfo{
19419 {0, 335544319},
19420 },
19421 },
19422 },
19423 {
19424 name: "UMULL",
19425 argLen: 2,
19426 commutative: true,
19427 asm: arm64.AUMULL,
19428 reg: regInfo{
19429 inputs: []inputInfo{
19430 {0, 402653183},
19431 {1, 402653183},
19432 },
19433 outputs: []outputInfo{
19434 {0, 335544319},
19435 },
19436 },
19437 },
19438 {
19439 name: "DIV",
19440 argLen: 2,
19441 asm: arm64.ASDIV,
19442 reg: regInfo{
19443 inputs: []inputInfo{
19444 {0, 402653183},
19445 {1, 402653183},
19446 },
19447 outputs: []outputInfo{
19448 {0, 335544319},
19449 },
19450 },
19451 },
19452 {
19453 name: "UDIV",
19454 argLen: 2,
19455 asm: arm64.AUDIV,
19456 reg: regInfo{
19457 inputs: []inputInfo{
19458 {0, 402653183},
19459 {1, 402653183},
19460 },
19461 outputs: []outputInfo{
19462 {0, 335544319},
19463 },
19464 },
19465 },
19466 {
19467 name: "DIVW",
19468 argLen: 2,
19469 asm: arm64.ASDIVW,
19470 reg: regInfo{
19471 inputs: []inputInfo{
19472 {0, 402653183},
19473 {1, 402653183},
19474 },
19475 outputs: []outputInfo{
19476 {0, 335544319},
19477 },
19478 },
19479 },
19480 {
19481 name: "UDIVW",
19482 argLen: 2,
19483 asm: arm64.AUDIVW,
19484 reg: regInfo{
19485 inputs: []inputInfo{
19486 {0, 402653183},
19487 {1, 402653183},
19488 },
19489 outputs: []outputInfo{
19490 {0, 335544319},
19491 },
19492 },
19493 },
19494 {
19495 name: "MOD",
19496 argLen: 2,
19497 asm: arm64.AREM,
19498 reg: regInfo{
19499 inputs: []inputInfo{
19500 {0, 402653183},
19501 {1, 402653183},
19502 },
19503 outputs: []outputInfo{
19504 {0, 335544319},
19505 },
19506 },
19507 },
19508 {
19509 name: "UMOD",
19510 argLen: 2,
19511 asm: arm64.AUREM,
19512 reg: regInfo{
19513 inputs: []inputInfo{
19514 {0, 402653183},
19515 {1, 402653183},
19516 },
19517 outputs: []outputInfo{
19518 {0, 335544319},
19519 },
19520 },
19521 },
19522 {
19523 name: "MODW",
19524 argLen: 2,
19525 asm: arm64.AREMW,
19526 reg: regInfo{
19527 inputs: []inputInfo{
19528 {0, 402653183},
19529 {1, 402653183},
19530 },
19531 outputs: []outputInfo{
19532 {0, 335544319},
19533 },
19534 },
19535 },
19536 {
19537 name: "UMODW",
19538 argLen: 2,
19539 asm: arm64.AUREMW,
19540 reg: regInfo{
19541 inputs: []inputInfo{
19542 {0, 402653183},
19543 {1, 402653183},
19544 },
19545 outputs: []outputInfo{
19546 {0, 335544319},
19547 },
19548 },
19549 },
19550 {
19551 name: "FADDS",
19552 argLen: 2,
19553 commutative: true,
19554 asm: arm64.AFADDS,
19555 reg: regInfo{
19556 inputs: []inputInfo{
19557 {0, 9223372034707292160},
19558 {1, 9223372034707292160},
19559 },
19560 outputs: []outputInfo{
19561 {0, 9223372034707292160},
19562 },
19563 },
19564 },
19565 {
19566 name: "FADDD",
19567 argLen: 2,
19568 commutative: true,
19569 asm: arm64.AFADDD,
19570 reg: regInfo{
19571 inputs: []inputInfo{
19572 {0, 9223372034707292160},
19573 {1, 9223372034707292160},
19574 },
19575 outputs: []outputInfo{
19576 {0, 9223372034707292160},
19577 },
19578 },
19579 },
19580 {
19581 name: "FSUBS",
19582 argLen: 2,
19583 asm: arm64.AFSUBS,
19584 reg: regInfo{
19585 inputs: []inputInfo{
19586 {0, 9223372034707292160},
19587 {1, 9223372034707292160},
19588 },
19589 outputs: []outputInfo{
19590 {0, 9223372034707292160},
19591 },
19592 },
19593 },
19594 {
19595 name: "FSUBD",
19596 argLen: 2,
19597 asm: arm64.AFSUBD,
19598 reg: regInfo{
19599 inputs: []inputInfo{
19600 {0, 9223372034707292160},
19601 {1, 9223372034707292160},
19602 },
19603 outputs: []outputInfo{
19604 {0, 9223372034707292160},
19605 },
19606 },
19607 },
19608 {
19609 name: "FMULS",
19610 argLen: 2,
19611 commutative: true,
19612 asm: arm64.AFMULS,
19613 reg: regInfo{
19614 inputs: []inputInfo{
19615 {0, 9223372034707292160},
19616 {1, 9223372034707292160},
19617 },
19618 outputs: []outputInfo{
19619 {0, 9223372034707292160},
19620 },
19621 },
19622 },
19623 {
19624 name: "FMULD",
19625 argLen: 2,
19626 commutative: true,
19627 asm: arm64.AFMULD,
19628 reg: regInfo{
19629 inputs: []inputInfo{
19630 {0, 9223372034707292160},
19631 {1, 9223372034707292160},
19632 },
19633 outputs: []outputInfo{
19634 {0, 9223372034707292160},
19635 },
19636 },
19637 },
19638 {
19639 name: "FNMULS",
19640 argLen: 2,
19641 commutative: true,
19642 asm: arm64.AFNMULS,
19643 reg: regInfo{
19644 inputs: []inputInfo{
19645 {0, 9223372034707292160},
19646 {1, 9223372034707292160},
19647 },
19648 outputs: []outputInfo{
19649 {0, 9223372034707292160},
19650 },
19651 },
19652 },
19653 {
19654 name: "FNMULD",
19655 argLen: 2,
19656 commutative: true,
19657 asm: arm64.AFNMULD,
19658 reg: regInfo{
19659 inputs: []inputInfo{
19660 {0, 9223372034707292160},
19661 {1, 9223372034707292160},
19662 },
19663 outputs: []outputInfo{
19664 {0, 9223372034707292160},
19665 },
19666 },
19667 },
19668 {
19669 name: "FDIVS",
19670 argLen: 2,
19671 asm: arm64.AFDIVS,
19672 reg: regInfo{
19673 inputs: []inputInfo{
19674 {0, 9223372034707292160},
19675 {1, 9223372034707292160},
19676 },
19677 outputs: []outputInfo{
19678 {0, 9223372034707292160},
19679 },
19680 },
19681 },
19682 {
19683 name: "FDIVD",
19684 argLen: 2,
19685 asm: arm64.AFDIVD,
19686 reg: regInfo{
19687 inputs: []inputInfo{
19688 {0, 9223372034707292160},
19689 {1, 9223372034707292160},
19690 },
19691 outputs: []outputInfo{
19692 {0, 9223372034707292160},
19693 },
19694 },
19695 },
19696 {
19697 name: "AND",
19698 argLen: 2,
19699 commutative: true,
19700 asm: arm64.AAND,
19701 reg: regInfo{
19702 inputs: []inputInfo{
19703 {0, 402653183},
19704 {1, 402653183},
19705 },
19706 outputs: []outputInfo{
19707 {0, 335544319},
19708 },
19709 },
19710 },
19711 {
19712 name: "ANDconst",
19713 auxType: auxInt64,
19714 argLen: 1,
19715 asm: arm64.AAND,
19716 reg: regInfo{
19717 inputs: []inputInfo{
19718 {0, 402653183},
19719 },
19720 outputs: []outputInfo{
19721 {0, 335544319},
19722 },
19723 },
19724 },
19725 {
19726 name: "OR",
19727 argLen: 2,
19728 commutative: true,
19729 asm: arm64.AORR,
19730 reg: regInfo{
19731 inputs: []inputInfo{
19732 {0, 402653183},
19733 {1, 402653183},
19734 },
19735 outputs: []outputInfo{
19736 {0, 335544319},
19737 },
19738 },
19739 },
19740 {
19741 name: "ORconst",
19742 auxType: auxInt64,
19743 argLen: 1,
19744 asm: arm64.AORR,
19745 reg: regInfo{
19746 inputs: []inputInfo{
19747 {0, 402653183},
19748 },
19749 outputs: []outputInfo{
19750 {0, 335544319},
19751 },
19752 },
19753 },
19754 {
19755 name: "XOR",
19756 argLen: 2,
19757 commutative: true,
19758 asm: arm64.AEOR,
19759 reg: regInfo{
19760 inputs: []inputInfo{
19761 {0, 402653183},
19762 {1, 402653183},
19763 },
19764 outputs: []outputInfo{
19765 {0, 335544319},
19766 },
19767 },
19768 },
19769 {
19770 name: "XORconst",
19771 auxType: auxInt64,
19772 argLen: 1,
19773 asm: arm64.AEOR,
19774 reg: regInfo{
19775 inputs: []inputInfo{
19776 {0, 402653183},
19777 },
19778 outputs: []outputInfo{
19779 {0, 335544319},
19780 },
19781 },
19782 },
19783 {
19784 name: "BIC",
19785 argLen: 2,
19786 asm: arm64.ABIC,
19787 reg: regInfo{
19788 inputs: []inputInfo{
19789 {0, 402653183},
19790 {1, 402653183},
19791 },
19792 outputs: []outputInfo{
19793 {0, 335544319},
19794 },
19795 },
19796 },
19797 {
19798 name: "EON",
19799 argLen: 2,
19800 asm: arm64.AEON,
19801 reg: regInfo{
19802 inputs: []inputInfo{
19803 {0, 402653183},
19804 {1, 402653183},
19805 },
19806 outputs: []outputInfo{
19807 {0, 335544319},
19808 },
19809 },
19810 },
19811 {
19812 name: "ORN",
19813 argLen: 2,
19814 asm: arm64.AORN,
19815 reg: regInfo{
19816 inputs: []inputInfo{
19817 {0, 402653183},
19818 {1, 402653183},
19819 },
19820 outputs: []outputInfo{
19821 {0, 335544319},
19822 },
19823 },
19824 },
19825 {
19826 name: "MVN",
19827 argLen: 1,
19828 asm: arm64.AMVN,
19829 reg: regInfo{
19830 inputs: []inputInfo{
19831 {0, 402653183},
19832 },
19833 outputs: []outputInfo{
19834 {0, 335544319},
19835 },
19836 },
19837 },
19838 {
19839 name: "NEG",
19840 argLen: 1,
19841 asm: arm64.ANEG,
19842 reg: regInfo{
19843 inputs: []inputInfo{
19844 {0, 402653183},
19845 },
19846 outputs: []outputInfo{
19847 {0, 335544319},
19848 },
19849 },
19850 },
19851 {
19852 name: "NEGSflags",
19853 argLen: 1,
19854 asm: arm64.ANEGS,
19855 reg: regInfo{
19856 inputs: []inputInfo{
19857 {0, 402653183},
19858 },
19859 outputs: []outputInfo{
19860 {1, 0},
19861 {0, 335544319},
19862 },
19863 },
19864 },
19865 {
19866 name: "NGCzerocarry",
19867 argLen: 1,
19868 asm: arm64.ANGC,
19869 reg: regInfo{
19870 outputs: []outputInfo{
19871 {0, 335544319},
19872 },
19873 },
19874 },
19875 {
19876 name: "FABSD",
19877 argLen: 1,
19878 asm: arm64.AFABSD,
19879 reg: regInfo{
19880 inputs: []inputInfo{
19881 {0, 9223372034707292160},
19882 },
19883 outputs: []outputInfo{
19884 {0, 9223372034707292160},
19885 },
19886 },
19887 },
19888 {
19889 name: "FNEGS",
19890 argLen: 1,
19891 asm: arm64.AFNEGS,
19892 reg: regInfo{
19893 inputs: []inputInfo{
19894 {0, 9223372034707292160},
19895 },
19896 outputs: []outputInfo{
19897 {0, 9223372034707292160},
19898 },
19899 },
19900 },
19901 {
19902 name: "FNEGD",
19903 argLen: 1,
19904 asm: arm64.AFNEGD,
19905 reg: regInfo{
19906 inputs: []inputInfo{
19907 {0, 9223372034707292160},
19908 },
19909 outputs: []outputInfo{
19910 {0, 9223372034707292160},
19911 },
19912 },
19913 },
19914 {
19915 name: "FSQRTD",
19916 argLen: 1,
19917 asm: arm64.AFSQRTD,
19918 reg: regInfo{
19919 inputs: []inputInfo{
19920 {0, 9223372034707292160},
19921 },
19922 outputs: []outputInfo{
19923 {0, 9223372034707292160},
19924 },
19925 },
19926 },
19927 {
19928 name: "FSQRTS",
19929 argLen: 1,
19930 asm: arm64.AFSQRTS,
19931 reg: regInfo{
19932 inputs: []inputInfo{
19933 {0, 9223372034707292160},
19934 },
19935 outputs: []outputInfo{
19936 {0, 9223372034707292160},
19937 },
19938 },
19939 },
19940 {
19941 name: "FMIND",
19942 argLen: 2,
19943 asm: arm64.AFMIND,
19944 reg: regInfo{
19945 inputs: []inputInfo{
19946 {0, 9223372034707292160},
19947 {1, 9223372034707292160},
19948 },
19949 outputs: []outputInfo{
19950 {0, 9223372034707292160},
19951 },
19952 },
19953 },
19954 {
19955 name: "FMINS",
19956 argLen: 2,
19957 asm: arm64.AFMINS,
19958 reg: regInfo{
19959 inputs: []inputInfo{
19960 {0, 9223372034707292160},
19961 {1, 9223372034707292160},
19962 },
19963 outputs: []outputInfo{
19964 {0, 9223372034707292160},
19965 },
19966 },
19967 },
19968 {
19969 name: "FMAXD",
19970 argLen: 2,
19971 asm: arm64.AFMAXD,
19972 reg: regInfo{
19973 inputs: []inputInfo{
19974 {0, 9223372034707292160},
19975 {1, 9223372034707292160},
19976 },
19977 outputs: []outputInfo{
19978 {0, 9223372034707292160},
19979 },
19980 },
19981 },
19982 {
19983 name: "FMAXS",
19984 argLen: 2,
19985 asm: arm64.AFMAXS,
19986 reg: regInfo{
19987 inputs: []inputInfo{
19988 {0, 9223372034707292160},
19989 {1, 9223372034707292160},
19990 },
19991 outputs: []outputInfo{
19992 {0, 9223372034707292160},
19993 },
19994 },
19995 },
19996 {
19997 name: "REV",
19998 argLen: 1,
19999 asm: arm64.AREV,
20000 reg: regInfo{
20001 inputs: []inputInfo{
20002 {0, 402653183},
20003 },
20004 outputs: []outputInfo{
20005 {0, 335544319},
20006 },
20007 },
20008 },
20009 {
20010 name: "REVW",
20011 argLen: 1,
20012 asm: arm64.AREVW,
20013 reg: regInfo{
20014 inputs: []inputInfo{
20015 {0, 402653183},
20016 },
20017 outputs: []outputInfo{
20018 {0, 335544319},
20019 },
20020 },
20021 },
20022 {
20023 name: "REV16",
20024 argLen: 1,
20025 asm: arm64.AREV16,
20026 reg: regInfo{
20027 inputs: []inputInfo{
20028 {0, 402653183},
20029 },
20030 outputs: []outputInfo{
20031 {0, 335544319},
20032 },
20033 },
20034 },
20035 {
20036 name: "REV16W",
20037 argLen: 1,
20038 asm: arm64.AREV16W,
20039 reg: regInfo{
20040 inputs: []inputInfo{
20041 {0, 402653183},
20042 },
20043 outputs: []outputInfo{
20044 {0, 335544319},
20045 },
20046 },
20047 },
20048 {
20049 name: "RBIT",
20050 argLen: 1,
20051 asm: arm64.ARBIT,
20052 reg: regInfo{
20053 inputs: []inputInfo{
20054 {0, 402653183},
20055 },
20056 outputs: []outputInfo{
20057 {0, 335544319},
20058 },
20059 },
20060 },
20061 {
20062 name: "RBITW",
20063 argLen: 1,
20064 asm: arm64.ARBITW,
20065 reg: regInfo{
20066 inputs: []inputInfo{
20067 {0, 402653183},
20068 },
20069 outputs: []outputInfo{
20070 {0, 335544319},
20071 },
20072 },
20073 },
20074 {
20075 name: "CLZ",
20076 argLen: 1,
20077 asm: arm64.ACLZ,
20078 reg: regInfo{
20079 inputs: []inputInfo{
20080 {0, 402653183},
20081 },
20082 outputs: []outputInfo{
20083 {0, 335544319},
20084 },
20085 },
20086 },
20087 {
20088 name: "CLZW",
20089 argLen: 1,
20090 asm: arm64.ACLZW,
20091 reg: regInfo{
20092 inputs: []inputInfo{
20093 {0, 402653183},
20094 },
20095 outputs: []outputInfo{
20096 {0, 335544319},
20097 },
20098 },
20099 },
20100 {
20101 name: "VCNT",
20102 argLen: 1,
20103 asm: arm64.AVCNT,
20104 reg: regInfo{
20105 inputs: []inputInfo{
20106 {0, 9223372034707292160},
20107 },
20108 outputs: []outputInfo{
20109 {0, 9223372034707292160},
20110 },
20111 },
20112 },
20113 {
20114 name: "VUADDLV",
20115 argLen: 1,
20116 asm: arm64.AVUADDLV,
20117 reg: regInfo{
20118 inputs: []inputInfo{
20119 {0, 9223372034707292160},
20120 },
20121 outputs: []outputInfo{
20122 {0, 9223372034707292160},
20123 },
20124 },
20125 },
20126 {
20127 name: "LoweredRound32F",
20128 argLen: 1,
20129 resultInArg0: true,
20130 zeroWidth: true,
20131 reg: regInfo{
20132 inputs: []inputInfo{
20133 {0, 9223372034707292160},
20134 },
20135 outputs: []outputInfo{
20136 {0, 9223372034707292160},
20137 },
20138 },
20139 },
20140 {
20141 name: "LoweredRound64F",
20142 argLen: 1,
20143 resultInArg0: true,
20144 zeroWidth: true,
20145 reg: regInfo{
20146 inputs: []inputInfo{
20147 {0, 9223372034707292160},
20148 },
20149 outputs: []outputInfo{
20150 {0, 9223372034707292160},
20151 },
20152 },
20153 },
20154 {
20155 name: "FMADDS",
20156 argLen: 3,
20157 asm: arm64.AFMADDS,
20158 reg: regInfo{
20159 inputs: []inputInfo{
20160 {0, 9223372034707292160},
20161 {1, 9223372034707292160},
20162 {2, 9223372034707292160},
20163 },
20164 outputs: []outputInfo{
20165 {0, 9223372034707292160},
20166 },
20167 },
20168 },
20169 {
20170 name: "FMADDD",
20171 argLen: 3,
20172 asm: arm64.AFMADDD,
20173 reg: regInfo{
20174 inputs: []inputInfo{
20175 {0, 9223372034707292160},
20176 {1, 9223372034707292160},
20177 {2, 9223372034707292160},
20178 },
20179 outputs: []outputInfo{
20180 {0, 9223372034707292160},
20181 },
20182 },
20183 },
20184 {
20185 name: "FNMADDS",
20186 argLen: 3,
20187 asm: arm64.AFNMADDS,
20188 reg: regInfo{
20189 inputs: []inputInfo{
20190 {0, 9223372034707292160},
20191 {1, 9223372034707292160},
20192 {2, 9223372034707292160},
20193 },
20194 outputs: []outputInfo{
20195 {0, 9223372034707292160},
20196 },
20197 },
20198 },
20199 {
20200 name: "FNMADDD",
20201 argLen: 3,
20202 asm: arm64.AFNMADDD,
20203 reg: regInfo{
20204 inputs: []inputInfo{
20205 {0, 9223372034707292160},
20206 {1, 9223372034707292160},
20207 {2, 9223372034707292160},
20208 },
20209 outputs: []outputInfo{
20210 {0, 9223372034707292160},
20211 },
20212 },
20213 },
20214 {
20215 name: "FMSUBS",
20216 argLen: 3,
20217 asm: arm64.AFMSUBS,
20218 reg: regInfo{
20219 inputs: []inputInfo{
20220 {0, 9223372034707292160},
20221 {1, 9223372034707292160},
20222 {2, 9223372034707292160},
20223 },
20224 outputs: []outputInfo{
20225 {0, 9223372034707292160},
20226 },
20227 },
20228 },
20229 {
20230 name: "FMSUBD",
20231 argLen: 3,
20232 asm: arm64.AFMSUBD,
20233 reg: regInfo{
20234 inputs: []inputInfo{
20235 {0, 9223372034707292160},
20236 {1, 9223372034707292160},
20237 {2, 9223372034707292160},
20238 },
20239 outputs: []outputInfo{
20240 {0, 9223372034707292160},
20241 },
20242 },
20243 },
20244 {
20245 name: "FNMSUBS",
20246 argLen: 3,
20247 asm: arm64.AFNMSUBS,
20248 reg: regInfo{
20249 inputs: []inputInfo{
20250 {0, 9223372034707292160},
20251 {1, 9223372034707292160},
20252 {2, 9223372034707292160},
20253 },
20254 outputs: []outputInfo{
20255 {0, 9223372034707292160},
20256 },
20257 },
20258 },
20259 {
20260 name: "FNMSUBD",
20261 argLen: 3,
20262 asm: arm64.AFNMSUBD,
20263 reg: regInfo{
20264 inputs: []inputInfo{
20265 {0, 9223372034707292160},
20266 {1, 9223372034707292160},
20267 {2, 9223372034707292160},
20268 },
20269 outputs: []outputInfo{
20270 {0, 9223372034707292160},
20271 },
20272 },
20273 },
20274 {
20275 name: "MADD",
20276 argLen: 3,
20277 asm: arm64.AMADD,
20278 reg: regInfo{
20279 inputs: []inputInfo{
20280 {0, 402653183},
20281 {1, 402653183},
20282 {2, 402653183},
20283 },
20284 outputs: []outputInfo{
20285 {0, 335544319},
20286 },
20287 },
20288 },
20289 {
20290 name: "MADDW",
20291 argLen: 3,
20292 asm: arm64.AMADDW,
20293 reg: regInfo{
20294 inputs: []inputInfo{
20295 {0, 402653183},
20296 {1, 402653183},
20297 {2, 402653183},
20298 },
20299 outputs: []outputInfo{
20300 {0, 335544319},
20301 },
20302 },
20303 },
20304 {
20305 name: "MSUB",
20306 argLen: 3,
20307 asm: arm64.AMSUB,
20308 reg: regInfo{
20309 inputs: []inputInfo{
20310 {0, 402653183},
20311 {1, 402653183},
20312 {2, 402653183},
20313 },
20314 outputs: []outputInfo{
20315 {0, 335544319},
20316 },
20317 },
20318 },
20319 {
20320 name: "MSUBW",
20321 argLen: 3,
20322 asm: arm64.AMSUBW,
20323 reg: regInfo{
20324 inputs: []inputInfo{
20325 {0, 402653183},
20326 {1, 402653183},
20327 {2, 402653183},
20328 },
20329 outputs: []outputInfo{
20330 {0, 335544319},
20331 },
20332 },
20333 },
20334 {
20335 name: "SLL",
20336 argLen: 2,
20337 asm: arm64.ALSL,
20338 reg: regInfo{
20339 inputs: []inputInfo{
20340 {0, 402653183},
20341 {1, 402653183},
20342 },
20343 outputs: []outputInfo{
20344 {0, 335544319},
20345 },
20346 },
20347 },
20348 {
20349 name: "SLLconst",
20350 auxType: auxInt64,
20351 argLen: 1,
20352 asm: arm64.ALSL,
20353 reg: regInfo{
20354 inputs: []inputInfo{
20355 {0, 402653183},
20356 },
20357 outputs: []outputInfo{
20358 {0, 335544319},
20359 },
20360 },
20361 },
20362 {
20363 name: "SRL",
20364 argLen: 2,
20365 asm: arm64.ALSR,
20366 reg: regInfo{
20367 inputs: []inputInfo{
20368 {0, 402653183},
20369 {1, 402653183},
20370 },
20371 outputs: []outputInfo{
20372 {0, 335544319},
20373 },
20374 },
20375 },
20376 {
20377 name: "SRLconst",
20378 auxType: auxInt64,
20379 argLen: 1,
20380 asm: arm64.ALSR,
20381 reg: regInfo{
20382 inputs: []inputInfo{
20383 {0, 402653183},
20384 },
20385 outputs: []outputInfo{
20386 {0, 335544319},
20387 },
20388 },
20389 },
20390 {
20391 name: "SRA",
20392 argLen: 2,
20393 asm: arm64.AASR,
20394 reg: regInfo{
20395 inputs: []inputInfo{
20396 {0, 402653183},
20397 {1, 402653183},
20398 },
20399 outputs: []outputInfo{
20400 {0, 335544319},
20401 },
20402 },
20403 },
20404 {
20405 name: "SRAconst",
20406 auxType: auxInt64,
20407 argLen: 1,
20408 asm: arm64.AASR,
20409 reg: regInfo{
20410 inputs: []inputInfo{
20411 {0, 402653183},
20412 },
20413 outputs: []outputInfo{
20414 {0, 335544319},
20415 },
20416 },
20417 },
20418 {
20419 name: "ROR",
20420 argLen: 2,
20421 asm: arm64.AROR,
20422 reg: regInfo{
20423 inputs: []inputInfo{
20424 {0, 402653183},
20425 {1, 402653183},
20426 },
20427 outputs: []outputInfo{
20428 {0, 335544319},
20429 },
20430 },
20431 },
20432 {
20433 name: "RORW",
20434 argLen: 2,
20435 asm: arm64.ARORW,
20436 reg: regInfo{
20437 inputs: []inputInfo{
20438 {0, 402653183},
20439 {1, 402653183},
20440 },
20441 outputs: []outputInfo{
20442 {0, 335544319},
20443 },
20444 },
20445 },
20446 {
20447 name: "RORconst",
20448 auxType: auxInt64,
20449 argLen: 1,
20450 asm: arm64.AROR,
20451 reg: regInfo{
20452 inputs: []inputInfo{
20453 {0, 402653183},
20454 },
20455 outputs: []outputInfo{
20456 {0, 335544319},
20457 },
20458 },
20459 },
20460 {
20461 name: "RORWconst",
20462 auxType: auxInt64,
20463 argLen: 1,
20464 asm: arm64.ARORW,
20465 reg: regInfo{
20466 inputs: []inputInfo{
20467 {0, 402653183},
20468 },
20469 outputs: []outputInfo{
20470 {0, 335544319},
20471 },
20472 },
20473 },
20474 {
20475 name: "EXTRconst",
20476 auxType: auxInt64,
20477 argLen: 2,
20478 asm: arm64.AEXTR,
20479 reg: regInfo{
20480 inputs: []inputInfo{
20481 {0, 402653183},
20482 {1, 402653183},
20483 },
20484 outputs: []outputInfo{
20485 {0, 335544319},
20486 },
20487 },
20488 },
20489 {
20490 name: "EXTRWconst",
20491 auxType: auxInt64,
20492 argLen: 2,
20493 asm: arm64.AEXTRW,
20494 reg: regInfo{
20495 inputs: []inputInfo{
20496 {0, 402653183},
20497 {1, 402653183},
20498 },
20499 outputs: []outputInfo{
20500 {0, 335544319},
20501 },
20502 },
20503 },
20504 {
20505 name: "CMP",
20506 argLen: 2,
20507 asm: arm64.ACMP,
20508 reg: regInfo{
20509 inputs: []inputInfo{
20510 {0, 402653183},
20511 {1, 402653183},
20512 },
20513 },
20514 },
20515 {
20516 name: "CMPconst",
20517 auxType: auxInt64,
20518 argLen: 1,
20519 asm: arm64.ACMP,
20520 reg: regInfo{
20521 inputs: []inputInfo{
20522 {0, 402653183},
20523 },
20524 },
20525 },
20526 {
20527 name: "CMPW",
20528 argLen: 2,
20529 asm: arm64.ACMPW,
20530 reg: regInfo{
20531 inputs: []inputInfo{
20532 {0, 402653183},
20533 {1, 402653183},
20534 },
20535 },
20536 },
20537 {
20538 name: "CMPWconst",
20539 auxType: auxInt32,
20540 argLen: 1,
20541 asm: arm64.ACMPW,
20542 reg: regInfo{
20543 inputs: []inputInfo{
20544 {0, 402653183},
20545 },
20546 },
20547 },
20548 {
20549 name: "CMN",
20550 argLen: 2,
20551 commutative: true,
20552 asm: arm64.ACMN,
20553 reg: regInfo{
20554 inputs: []inputInfo{
20555 {0, 402653183},
20556 {1, 402653183},
20557 },
20558 },
20559 },
20560 {
20561 name: "CMNconst",
20562 auxType: auxInt64,
20563 argLen: 1,
20564 asm: arm64.ACMN,
20565 reg: regInfo{
20566 inputs: []inputInfo{
20567 {0, 402653183},
20568 },
20569 },
20570 },
20571 {
20572 name: "CMNW",
20573 argLen: 2,
20574 commutative: true,
20575 asm: arm64.ACMNW,
20576 reg: regInfo{
20577 inputs: []inputInfo{
20578 {0, 402653183},
20579 {1, 402653183},
20580 },
20581 },
20582 },
20583 {
20584 name: "CMNWconst",
20585 auxType: auxInt32,
20586 argLen: 1,
20587 asm: arm64.ACMNW,
20588 reg: regInfo{
20589 inputs: []inputInfo{
20590 {0, 402653183},
20591 },
20592 },
20593 },
20594 {
20595 name: "TST",
20596 argLen: 2,
20597 commutative: true,
20598 asm: arm64.ATST,
20599 reg: regInfo{
20600 inputs: []inputInfo{
20601 {0, 402653183},
20602 {1, 402653183},
20603 },
20604 },
20605 },
20606 {
20607 name: "TSTconst",
20608 auxType: auxInt64,
20609 argLen: 1,
20610 asm: arm64.ATST,
20611 reg: regInfo{
20612 inputs: []inputInfo{
20613 {0, 402653183},
20614 },
20615 },
20616 },
20617 {
20618 name: "TSTW",
20619 argLen: 2,
20620 commutative: true,
20621 asm: arm64.ATSTW,
20622 reg: regInfo{
20623 inputs: []inputInfo{
20624 {0, 402653183},
20625 {1, 402653183},
20626 },
20627 },
20628 },
20629 {
20630 name: "TSTWconst",
20631 auxType: auxInt32,
20632 argLen: 1,
20633 asm: arm64.ATSTW,
20634 reg: regInfo{
20635 inputs: []inputInfo{
20636 {0, 402653183},
20637 },
20638 },
20639 },
20640 {
20641 name: "FCMPS",
20642 argLen: 2,
20643 asm: arm64.AFCMPS,
20644 reg: regInfo{
20645 inputs: []inputInfo{
20646 {0, 9223372034707292160},
20647 {1, 9223372034707292160},
20648 },
20649 },
20650 },
20651 {
20652 name: "FCMPD",
20653 argLen: 2,
20654 asm: arm64.AFCMPD,
20655 reg: regInfo{
20656 inputs: []inputInfo{
20657 {0, 9223372034707292160},
20658 {1, 9223372034707292160},
20659 },
20660 },
20661 },
20662 {
20663 name: "FCMPS0",
20664 argLen: 1,
20665 asm: arm64.AFCMPS,
20666 reg: regInfo{
20667 inputs: []inputInfo{
20668 {0, 9223372034707292160},
20669 },
20670 },
20671 },
20672 {
20673 name: "FCMPD0",
20674 argLen: 1,
20675 asm: arm64.AFCMPD,
20676 reg: regInfo{
20677 inputs: []inputInfo{
20678 {0, 9223372034707292160},
20679 },
20680 },
20681 },
20682 {
20683 name: "MVNshiftLL",
20684 auxType: auxInt64,
20685 argLen: 1,
20686 asm: arm64.AMVN,
20687 reg: regInfo{
20688 inputs: []inputInfo{
20689 {0, 402653183},
20690 },
20691 outputs: []outputInfo{
20692 {0, 335544319},
20693 },
20694 },
20695 },
20696 {
20697 name: "MVNshiftRL",
20698 auxType: auxInt64,
20699 argLen: 1,
20700 asm: arm64.AMVN,
20701 reg: regInfo{
20702 inputs: []inputInfo{
20703 {0, 402653183},
20704 },
20705 outputs: []outputInfo{
20706 {0, 335544319},
20707 },
20708 },
20709 },
20710 {
20711 name: "MVNshiftRA",
20712 auxType: auxInt64,
20713 argLen: 1,
20714 asm: arm64.AMVN,
20715 reg: regInfo{
20716 inputs: []inputInfo{
20717 {0, 402653183},
20718 },
20719 outputs: []outputInfo{
20720 {0, 335544319},
20721 },
20722 },
20723 },
20724 {
20725 name: "MVNshiftRO",
20726 auxType: auxInt64,
20727 argLen: 1,
20728 asm: arm64.AMVN,
20729 reg: regInfo{
20730 inputs: []inputInfo{
20731 {0, 402653183},
20732 },
20733 outputs: []outputInfo{
20734 {0, 335544319},
20735 },
20736 },
20737 },
20738 {
20739 name: "NEGshiftLL",
20740 auxType: auxInt64,
20741 argLen: 1,
20742 asm: arm64.ANEG,
20743 reg: regInfo{
20744 inputs: []inputInfo{
20745 {0, 402653183},
20746 },
20747 outputs: []outputInfo{
20748 {0, 335544319},
20749 },
20750 },
20751 },
20752 {
20753 name: "NEGshiftRL",
20754 auxType: auxInt64,
20755 argLen: 1,
20756 asm: arm64.ANEG,
20757 reg: regInfo{
20758 inputs: []inputInfo{
20759 {0, 402653183},
20760 },
20761 outputs: []outputInfo{
20762 {0, 335544319},
20763 },
20764 },
20765 },
20766 {
20767 name: "NEGshiftRA",
20768 auxType: auxInt64,
20769 argLen: 1,
20770 asm: arm64.ANEG,
20771 reg: regInfo{
20772 inputs: []inputInfo{
20773 {0, 402653183},
20774 },
20775 outputs: []outputInfo{
20776 {0, 335544319},
20777 },
20778 },
20779 },
20780 {
20781 name: "ADDshiftLL",
20782 auxType: auxInt64,
20783 argLen: 2,
20784 asm: arm64.AADD,
20785 reg: regInfo{
20786 inputs: []inputInfo{
20787 {0, 402653183},
20788 {1, 402653183},
20789 },
20790 outputs: []outputInfo{
20791 {0, 335544319},
20792 },
20793 },
20794 },
20795 {
20796 name: "ADDshiftRL",
20797 auxType: auxInt64,
20798 argLen: 2,
20799 asm: arm64.AADD,
20800 reg: regInfo{
20801 inputs: []inputInfo{
20802 {0, 402653183},
20803 {1, 402653183},
20804 },
20805 outputs: []outputInfo{
20806 {0, 335544319},
20807 },
20808 },
20809 },
20810 {
20811 name: "ADDshiftRA",
20812 auxType: auxInt64,
20813 argLen: 2,
20814 asm: arm64.AADD,
20815 reg: regInfo{
20816 inputs: []inputInfo{
20817 {0, 402653183},
20818 {1, 402653183},
20819 },
20820 outputs: []outputInfo{
20821 {0, 335544319},
20822 },
20823 },
20824 },
20825 {
20826 name: "SUBshiftLL",
20827 auxType: auxInt64,
20828 argLen: 2,
20829 asm: arm64.ASUB,
20830 reg: regInfo{
20831 inputs: []inputInfo{
20832 {0, 402653183},
20833 {1, 402653183},
20834 },
20835 outputs: []outputInfo{
20836 {0, 335544319},
20837 },
20838 },
20839 },
20840 {
20841 name: "SUBshiftRL",
20842 auxType: auxInt64,
20843 argLen: 2,
20844 asm: arm64.ASUB,
20845 reg: regInfo{
20846 inputs: []inputInfo{
20847 {0, 402653183},
20848 {1, 402653183},
20849 },
20850 outputs: []outputInfo{
20851 {0, 335544319},
20852 },
20853 },
20854 },
20855 {
20856 name: "SUBshiftRA",
20857 auxType: auxInt64,
20858 argLen: 2,
20859 asm: arm64.ASUB,
20860 reg: regInfo{
20861 inputs: []inputInfo{
20862 {0, 402653183},
20863 {1, 402653183},
20864 },
20865 outputs: []outputInfo{
20866 {0, 335544319},
20867 },
20868 },
20869 },
20870 {
20871 name: "ANDshiftLL",
20872 auxType: auxInt64,
20873 argLen: 2,
20874 asm: arm64.AAND,
20875 reg: regInfo{
20876 inputs: []inputInfo{
20877 {0, 402653183},
20878 {1, 402653183},
20879 },
20880 outputs: []outputInfo{
20881 {0, 335544319},
20882 },
20883 },
20884 },
20885 {
20886 name: "ANDshiftRL",
20887 auxType: auxInt64,
20888 argLen: 2,
20889 asm: arm64.AAND,
20890 reg: regInfo{
20891 inputs: []inputInfo{
20892 {0, 402653183},
20893 {1, 402653183},
20894 },
20895 outputs: []outputInfo{
20896 {0, 335544319},
20897 },
20898 },
20899 },
20900 {
20901 name: "ANDshiftRA",
20902 auxType: auxInt64,
20903 argLen: 2,
20904 asm: arm64.AAND,
20905 reg: regInfo{
20906 inputs: []inputInfo{
20907 {0, 402653183},
20908 {1, 402653183},
20909 },
20910 outputs: []outputInfo{
20911 {0, 335544319},
20912 },
20913 },
20914 },
20915 {
20916 name: "ANDshiftRO",
20917 auxType: auxInt64,
20918 argLen: 2,
20919 asm: arm64.AAND,
20920 reg: regInfo{
20921 inputs: []inputInfo{
20922 {0, 402653183},
20923 {1, 402653183},
20924 },
20925 outputs: []outputInfo{
20926 {0, 335544319},
20927 },
20928 },
20929 },
20930 {
20931 name: "ORshiftLL",
20932 auxType: auxInt64,
20933 argLen: 2,
20934 asm: arm64.AORR,
20935 reg: regInfo{
20936 inputs: []inputInfo{
20937 {0, 402653183},
20938 {1, 402653183},
20939 },
20940 outputs: []outputInfo{
20941 {0, 335544319},
20942 },
20943 },
20944 },
20945 {
20946 name: "ORshiftRL",
20947 auxType: auxInt64,
20948 argLen: 2,
20949 asm: arm64.AORR,
20950 reg: regInfo{
20951 inputs: []inputInfo{
20952 {0, 402653183},
20953 {1, 402653183},
20954 },
20955 outputs: []outputInfo{
20956 {0, 335544319},
20957 },
20958 },
20959 },
20960 {
20961 name: "ORshiftRA",
20962 auxType: auxInt64,
20963 argLen: 2,
20964 asm: arm64.AORR,
20965 reg: regInfo{
20966 inputs: []inputInfo{
20967 {0, 402653183},
20968 {1, 402653183},
20969 },
20970 outputs: []outputInfo{
20971 {0, 335544319},
20972 },
20973 },
20974 },
20975 {
20976 name: "ORshiftRO",
20977 auxType: auxInt64,
20978 argLen: 2,
20979 asm: arm64.AORR,
20980 reg: regInfo{
20981 inputs: []inputInfo{
20982 {0, 402653183},
20983 {1, 402653183},
20984 },
20985 outputs: []outputInfo{
20986 {0, 335544319},
20987 },
20988 },
20989 },
20990 {
20991 name: "XORshiftLL",
20992 auxType: auxInt64,
20993 argLen: 2,
20994 asm: arm64.AEOR,
20995 reg: regInfo{
20996 inputs: []inputInfo{
20997 {0, 402653183},
20998 {1, 402653183},
20999 },
21000 outputs: []outputInfo{
21001 {0, 335544319},
21002 },
21003 },
21004 },
21005 {
21006 name: "XORshiftRL",
21007 auxType: auxInt64,
21008 argLen: 2,
21009 asm: arm64.AEOR,
21010 reg: regInfo{
21011 inputs: []inputInfo{
21012 {0, 402653183},
21013 {1, 402653183},
21014 },
21015 outputs: []outputInfo{
21016 {0, 335544319},
21017 },
21018 },
21019 },
21020 {
21021 name: "XORshiftRA",
21022 auxType: auxInt64,
21023 argLen: 2,
21024 asm: arm64.AEOR,
21025 reg: regInfo{
21026 inputs: []inputInfo{
21027 {0, 402653183},
21028 {1, 402653183},
21029 },
21030 outputs: []outputInfo{
21031 {0, 335544319},
21032 },
21033 },
21034 },
21035 {
21036 name: "XORshiftRO",
21037 auxType: auxInt64,
21038 argLen: 2,
21039 asm: arm64.AEOR,
21040 reg: regInfo{
21041 inputs: []inputInfo{
21042 {0, 402653183},
21043 {1, 402653183},
21044 },
21045 outputs: []outputInfo{
21046 {0, 335544319},
21047 },
21048 },
21049 },
21050 {
21051 name: "BICshiftLL",
21052 auxType: auxInt64,
21053 argLen: 2,
21054 asm: arm64.ABIC,
21055 reg: regInfo{
21056 inputs: []inputInfo{
21057 {0, 402653183},
21058 {1, 402653183},
21059 },
21060 outputs: []outputInfo{
21061 {0, 335544319},
21062 },
21063 },
21064 },
21065 {
21066 name: "BICshiftRL",
21067 auxType: auxInt64,
21068 argLen: 2,
21069 asm: arm64.ABIC,
21070 reg: regInfo{
21071 inputs: []inputInfo{
21072 {0, 402653183},
21073 {1, 402653183},
21074 },
21075 outputs: []outputInfo{
21076 {0, 335544319},
21077 },
21078 },
21079 },
21080 {
21081 name: "BICshiftRA",
21082 auxType: auxInt64,
21083 argLen: 2,
21084 asm: arm64.ABIC,
21085 reg: regInfo{
21086 inputs: []inputInfo{
21087 {0, 402653183},
21088 {1, 402653183},
21089 },
21090 outputs: []outputInfo{
21091 {0, 335544319},
21092 },
21093 },
21094 },
21095 {
21096 name: "BICshiftRO",
21097 auxType: auxInt64,
21098 argLen: 2,
21099 asm: arm64.ABIC,
21100 reg: regInfo{
21101 inputs: []inputInfo{
21102 {0, 402653183},
21103 {1, 402653183},
21104 },
21105 outputs: []outputInfo{
21106 {0, 335544319},
21107 },
21108 },
21109 },
21110 {
21111 name: "EONshiftLL",
21112 auxType: auxInt64,
21113 argLen: 2,
21114 asm: arm64.AEON,
21115 reg: regInfo{
21116 inputs: []inputInfo{
21117 {0, 402653183},
21118 {1, 402653183},
21119 },
21120 outputs: []outputInfo{
21121 {0, 335544319},
21122 },
21123 },
21124 },
21125 {
21126 name: "EONshiftRL",
21127 auxType: auxInt64,
21128 argLen: 2,
21129 asm: arm64.AEON,
21130 reg: regInfo{
21131 inputs: []inputInfo{
21132 {0, 402653183},
21133 {1, 402653183},
21134 },
21135 outputs: []outputInfo{
21136 {0, 335544319},
21137 },
21138 },
21139 },
21140 {
21141 name: "EONshiftRA",
21142 auxType: auxInt64,
21143 argLen: 2,
21144 asm: arm64.AEON,
21145 reg: regInfo{
21146 inputs: []inputInfo{
21147 {0, 402653183},
21148 {1, 402653183},
21149 },
21150 outputs: []outputInfo{
21151 {0, 335544319},
21152 },
21153 },
21154 },
21155 {
21156 name: "EONshiftRO",
21157 auxType: auxInt64,
21158 argLen: 2,
21159 asm: arm64.AEON,
21160 reg: regInfo{
21161 inputs: []inputInfo{
21162 {0, 402653183},
21163 {1, 402653183},
21164 },
21165 outputs: []outputInfo{
21166 {0, 335544319},
21167 },
21168 },
21169 },
21170 {
21171 name: "ORNshiftLL",
21172 auxType: auxInt64,
21173 argLen: 2,
21174 asm: arm64.AORN,
21175 reg: regInfo{
21176 inputs: []inputInfo{
21177 {0, 402653183},
21178 {1, 402653183},
21179 },
21180 outputs: []outputInfo{
21181 {0, 335544319},
21182 },
21183 },
21184 },
21185 {
21186 name: "ORNshiftRL",
21187 auxType: auxInt64,
21188 argLen: 2,
21189 asm: arm64.AORN,
21190 reg: regInfo{
21191 inputs: []inputInfo{
21192 {0, 402653183},
21193 {1, 402653183},
21194 },
21195 outputs: []outputInfo{
21196 {0, 335544319},
21197 },
21198 },
21199 },
21200 {
21201 name: "ORNshiftRA",
21202 auxType: auxInt64,
21203 argLen: 2,
21204 asm: arm64.AORN,
21205 reg: regInfo{
21206 inputs: []inputInfo{
21207 {0, 402653183},
21208 {1, 402653183},
21209 },
21210 outputs: []outputInfo{
21211 {0, 335544319},
21212 },
21213 },
21214 },
21215 {
21216 name: "ORNshiftRO",
21217 auxType: auxInt64,
21218 argLen: 2,
21219 asm: arm64.AORN,
21220 reg: regInfo{
21221 inputs: []inputInfo{
21222 {0, 402653183},
21223 {1, 402653183},
21224 },
21225 outputs: []outputInfo{
21226 {0, 335544319},
21227 },
21228 },
21229 },
21230 {
21231 name: "CMPshiftLL",
21232 auxType: auxInt64,
21233 argLen: 2,
21234 asm: arm64.ACMP,
21235 reg: regInfo{
21236 inputs: []inputInfo{
21237 {0, 402653183},
21238 {1, 402653183},
21239 },
21240 },
21241 },
21242 {
21243 name: "CMPshiftRL",
21244 auxType: auxInt64,
21245 argLen: 2,
21246 asm: arm64.ACMP,
21247 reg: regInfo{
21248 inputs: []inputInfo{
21249 {0, 402653183},
21250 {1, 402653183},
21251 },
21252 },
21253 },
21254 {
21255 name: "CMPshiftRA",
21256 auxType: auxInt64,
21257 argLen: 2,
21258 asm: arm64.ACMP,
21259 reg: regInfo{
21260 inputs: []inputInfo{
21261 {0, 402653183},
21262 {1, 402653183},
21263 },
21264 },
21265 },
21266 {
21267 name: "CMNshiftLL",
21268 auxType: auxInt64,
21269 argLen: 2,
21270 asm: arm64.ACMN,
21271 reg: regInfo{
21272 inputs: []inputInfo{
21273 {0, 402653183},
21274 {1, 402653183},
21275 },
21276 },
21277 },
21278 {
21279 name: "CMNshiftRL",
21280 auxType: auxInt64,
21281 argLen: 2,
21282 asm: arm64.ACMN,
21283 reg: regInfo{
21284 inputs: []inputInfo{
21285 {0, 402653183},
21286 {1, 402653183},
21287 },
21288 },
21289 },
21290 {
21291 name: "CMNshiftRA",
21292 auxType: auxInt64,
21293 argLen: 2,
21294 asm: arm64.ACMN,
21295 reg: regInfo{
21296 inputs: []inputInfo{
21297 {0, 402653183},
21298 {1, 402653183},
21299 },
21300 },
21301 },
21302 {
21303 name: "TSTshiftLL",
21304 auxType: auxInt64,
21305 argLen: 2,
21306 asm: arm64.ATST,
21307 reg: regInfo{
21308 inputs: []inputInfo{
21309 {0, 402653183},
21310 {1, 402653183},
21311 },
21312 },
21313 },
21314 {
21315 name: "TSTshiftRL",
21316 auxType: auxInt64,
21317 argLen: 2,
21318 asm: arm64.ATST,
21319 reg: regInfo{
21320 inputs: []inputInfo{
21321 {0, 402653183},
21322 {1, 402653183},
21323 },
21324 },
21325 },
21326 {
21327 name: "TSTshiftRA",
21328 auxType: auxInt64,
21329 argLen: 2,
21330 asm: arm64.ATST,
21331 reg: regInfo{
21332 inputs: []inputInfo{
21333 {0, 402653183},
21334 {1, 402653183},
21335 },
21336 },
21337 },
21338 {
21339 name: "TSTshiftRO",
21340 auxType: auxInt64,
21341 argLen: 2,
21342 asm: arm64.ATST,
21343 reg: regInfo{
21344 inputs: []inputInfo{
21345 {0, 402653183},
21346 {1, 402653183},
21347 },
21348 },
21349 },
21350 {
21351 name: "BFI",
21352 auxType: auxARM64BitField,
21353 argLen: 2,
21354 resultInArg0: true,
21355 asm: arm64.ABFI,
21356 reg: regInfo{
21357 inputs: []inputInfo{
21358 {0, 335544319},
21359 {1, 335544319},
21360 },
21361 outputs: []outputInfo{
21362 {0, 335544319},
21363 },
21364 },
21365 },
21366 {
21367 name: "BFXIL",
21368 auxType: auxARM64BitField,
21369 argLen: 2,
21370 resultInArg0: true,
21371 asm: arm64.ABFXIL,
21372 reg: regInfo{
21373 inputs: []inputInfo{
21374 {0, 335544319},
21375 {1, 335544319},
21376 },
21377 outputs: []outputInfo{
21378 {0, 335544319},
21379 },
21380 },
21381 },
21382 {
21383 name: "SBFIZ",
21384 auxType: auxARM64BitField,
21385 argLen: 1,
21386 asm: arm64.ASBFIZ,
21387 reg: regInfo{
21388 inputs: []inputInfo{
21389 {0, 402653183},
21390 },
21391 outputs: []outputInfo{
21392 {0, 335544319},
21393 },
21394 },
21395 },
21396 {
21397 name: "SBFX",
21398 auxType: auxARM64BitField,
21399 argLen: 1,
21400 asm: arm64.ASBFX,
21401 reg: regInfo{
21402 inputs: []inputInfo{
21403 {0, 402653183},
21404 },
21405 outputs: []outputInfo{
21406 {0, 335544319},
21407 },
21408 },
21409 },
21410 {
21411 name: "UBFIZ",
21412 auxType: auxARM64BitField,
21413 argLen: 1,
21414 asm: arm64.AUBFIZ,
21415 reg: regInfo{
21416 inputs: []inputInfo{
21417 {0, 402653183},
21418 },
21419 outputs: []outputInfo{
21420 {0, 335544319},
21421 },
21422 },
21423 },
21424 {
21425 name: "UBFX",
21426 auxType: auxARM64BitField,
21427 argLen: 1,
21428 asm: arm64.AUBFX,
21429 reg: regInfo{
21430 inputs: []inputInfo{
21431 {0, 402653183},
21432 },
21433 outputs: []outputInfo{
21434 {0, 335544319},
21435 },
21436 },
21437 },
21438 {
21439 name: "MOVDconst",
21440 auxType: auxInt64,
21441 argLen: 0,
21442 rematerializeable: true,
21443 asm: arm64.AMOVD,
21444 reg: regInfo{
21445 outputs: []outputInfo{
21446 {0, 335544319},
21447 },
21448 },
21449 },
21450 {
21451 name: "FMOVSconst",
21452 auxType: auxFloat64,
21453 argLen: 0,
21454 rematerializeable: true,
21455 asm: arm64.AFMOVS,
21456 reg: regInfo{
21457 outputs: []outputInfo{
21458 {0, 9223372034707292160},
21459 },
21460 },
21461 },
21462 {
21463 name: "FMOVDconst",
21464 auxType: auxFloat64,
21465 argLen: 0,
21466 rematerializeable: true,
21467 asm: arm64.AFMOVD,
21468 reg: regInfo{
21469 outputs: []outputInfo{
21470 {0, 9223372034707292160},
21471 },
21472 },
21473 },
21474 {
21475 name: "MOVDaddr",
21476 auxType: auxSymOff,
21477 argLen: 1,
21478 rematerializeable: true,
21479 symEffect: SymAddr,
21480 asm: arm64.AMOVD,
21481 reg: regInfo{
21482 inputs: []inputInfo{
21483 {0, 9223372037928517632},
21484 },
21485 outputs: []outputInfo{
21486 {0, 335544319},
21487 },
21488 },
21489 },
21490 {
21491 name: "MOVBload",
21492 auxType: auxSymOff,
21493 argLen: 2,
21494 faultOnNilArg0: true,
21495 symEffect: SymRead,
21496 asm: arm64.AMOVB,
21497 reg: regInfo{
21498 inputs: []inputInfo{
21499 {0, 9223372038331170815},
21500 },
21501 outputs: []outputInfo{
21502 {0, 335544319},
21503 },
21504 },
21505 },
21506 {
21507 name: "MOVBUload",
21508 auxType: auxSymOff,
21509 argLen: 2,
21510 faultOnNilArg0: true,
21511 symEffect: SymRead,
21512 asm: arm64.AMOVBU,
21513 reg: regInfo{
21514 inputs: []inputInfo{
21515 {0, 9223372038331170815},
21516 },
21517 outputs: []outputInfo{
21518 {0, 335544319},
21519 },
21520 },
21521 },
21522 {
21523 name: "MOVHload",
21524 auxType: auxSymOff,
21525 argLen: 2,
21526 faultOnNilArg0: true,
21527 symEffect: SymRead,
21528 asm: arm64.AMOVH,
21529 reg: regInfo{
21530 inputs: []inputInfo{
21531 {0, 9223372038331170815},
21532 },
21533 outputs: []outputInfo{
21534 {0, 335544319},
21535 },
21536 },
21537 },
21538 {
21539 name: "MOVHUload",
21540 auxType: auxSymOff,
21541 argLen: 2,
21542 faultOnNilArg0: true,
21543 symEffect: SymRead,
21544 asm: arm64.AMOVHU,
21545 reg: regInfo{
21546 inputs: []inputInfo{
21547 {0, 9223372038331170815},
21548 },
21549 outputs: []outputInfo{
21550 {0, 335544319},
21551 },
21552 },
21553 },
21554 {
21555 name: "MOVWload",
21556 auxType: auxSymOff,
21557 argLen: 2,
21558 faultOnNilArg0: true,
21559 symEffect: SymRead,
21560 asm: arm64.AMOVW,
21561 reg: regInfo{
21562 inputs: []inputInfo{
21563 {0, 9223372038331170815},
21564 },
21565 outputs: []outputInfo{
21566 {0, 335544319},
21567 },
21568 },
21569 },
21570 {
21571 name: "MOVWUload",
21572 auxType: auxSymOff,
21573 argLen: 2,
21574 faultOnNilArg0: true,
21575 symEffect: SymRead,
21576 asm: arm64.AMOVWU,
21577 reg: regInfo{
21578 inputs: []inputInfo{
21579 {0, 9223372038331170815},
21580 },
21581 outputs: []outputInfo{
21582 {0, 335544319},
21583 },
21584 },
21585 },
21586 {
21587 name: "MOVDload",
21588 auxType: auxSymOff,
21589 argLen: 2,
21590 faultOnNilArg0: true,
21591 symEffect: SymRead,
21592 asm: arm64.AMOVD,
21593 reg: regInfo{
21594 inputs: []inputInfo{
21595 {0, 9223372038331170815},
21596 },
21597 outputs: []outputInfo{
21598 {0, 335544319},
21599 },
21600 },
21601 },
21602 {
21603 name: "FMOVSload",
21604 auxType: auxSymOff,
21605 argLen: 2,
21606 faultOnNilArg0: true,
21607 symEffect: SymRead,
21608 asm: arm64.AFMOVS,
21609 reg: regInfo{
21610 inputs: []inputInfo{
21611 {0, 9223372038331170815},
21612 },
21613 outputs: []outputInfo{
21614 {0, 9223372034707292160},
21615 },
21616 },
21617 },
21618 {
21619 name: "FMOVDload",
21620 auxType: auxSymOff,
21621 argLen: 2,
21622 faultOnNilArg0: true,
21623 symEffect: SymRead,
21624 asm: arm64.AFMOVD,
21625 reg: regInfo{
21626 inputs: []inputInfo{
21627 {0, 9223372038331170815},
21628 },
21629 outputs: []outputInfo{
21630 {0, 9223372034707292160},
21631 },
21632 },
21633 },
21634 {
21635 name: "LDP",
21636 auxType: auxSymOff,
21637 argLen: 2,
21638 faultOnNilArg0: true,
21639 symEffect: SymRead,
21640 asm: arm64.ALDP,
21641 reg: regInfo{
21642 inputs: []inputInfo{
21643 {0, 9223372038331170815},
21644 },
21645 outputs: []outputInfo{
21646 {0, 402653183},
21647 {1, 402653183},
21648 },
21649 },
21650 },
21651 {
21652 name: "LDPW",
21653 auxType: auxSymOff,
21654 argLen: 2,
21655 faultOnNilArg0: true,
21656 symEffect: SymRead,
21657 asm: arm64.ALDPW,
21658 reg: regInfo{
21659 inputs: []inputInfo{
21660 {0, 9223372038331170815},
21661 },
21662 outputs: []outputInfo{
21663 {0, 402653183},
21664 {1, 402653183},
21665 },
21666 },
21667 },
21668 {
21669 name: "LDPSW",
21670 auxType: auxSymOff,
21671 argLen: 2,
21672 faultOnNilArg0: true,
21673 symEffect: SymRead,
21674 asm: arm64.ALDPSW,
21675 reg: regInfo{
21676 inputs: []inputInfo{
21677 {0, 9223372038331170815},
21678 },
21679 outputs: []outputInfo{
21680 {0, 402653183},
21681 {1, 402653183},
21682 },
21683 },
21684 },
21685 {
21686 name: "FLDPD",
21687 auxType: auxSymOff,
21688 argLen: 2,
21689 faultOnNilArg0: true,
21690 symEffect: SymRead,
21691 asm: arm64.AFLDPD,
21692 reg: regInfo{
21693 inputs: []inputInfo{
21694 {0, 9223372038331170815},
21695 },
21696 outputs: []outputInfo{
21697 {0, 9223372034707292160},
21698 {1, 9223372034707292160},
21699 },
21700 },
21701 },
21702 {
21703 name: "FLDPS",
21704 auxType: auxSymOff,
21705 argLen: 2,
21706 faultOnNilArg0: true,
21707 symEffect: SymRead,
21708 asm: arm64.AFLDPS,
21709 reg: regInfo{
21710 inputs: []inputInfo{
21711 {0, 9223372038331170815},
21712 },
21713 outputs: []outputInfo{
21714 {0, 9223372034707292160},
21715 {1, 9223372034707292160},
21716 },
21717 },
21718 },
21719 {
21720 name: "MOVDloadidx",
21721 argLen: 3,
21722 asm: arm64.AMOVD,
21723 reg: regInfo{
21724 inputs: []inputInfo{
21725 {1, 402653183},
21726 {0, 9223372038331170815},
21727 },
21728 outputs: []outputInfo{
21729 {0, 335544319},
21730 },
21731 },
21732 },
21733 {
21734 name: "MOVWloadidx",
21735 argLen: 3,
21736 asm: arm64.AMOVW,
21737 reg: regInfo{
21738 inputs: []inputInfo{
21739 {1, 402653183},
21740 {0, 9223372038331170815},
21741 },
21742 outputs: []outputInfo{
21743 {0, 335544319},
21744 },
21745 },
21746 },
21747 {
21748 name: "MOVWUloadidx",
21749 argLen: 3,
21750 asm: arm64.AMOVWU,
21751 reg: regInfo{
21752 inputs: []inputInfo{
21753 {1, 402653183},
21754 {0, 9223372038331170815},
21755 },
21756 outputs: []outputInfo{
21757 {0, 335544319},
21758 },
21759 },
21760 },
21761 {
21762 name: "MOVHloadidx",
21763 argLen: 3,
21764 asm: arm64.AMOVH,
21765 reg: regInfo{
21766 inputs: []inputInfo{
21767 {1, 402653183},
21768 {0, 9223372038331170815},
21769 },
21770 outputs: []outputInfo{
21771 {0, 335544319},
21772 },
21773 },
21774 },
21775 {
21776 name: "MOVHUloadidx",
21777 argLen: 3,
21778 asm: arm64.AMOVHU,
21779 reg: regInfo{
21780 inputs: []inputInfo{
21781 {1, 402653183},
21782 {0, 9223372038331170815},
21783 },
21784 outputs: []outputInfo{
21785 {0, 335544319},
21786 },
21787 },
21788 },
21789 {
21790 name: "MOVBloadidx",
21791 argLen: 3,
21792 asm: arm64.AMOVB,
21793 reg: regInfo{
21794 inputs: []inputInfo{
21795 {1, 402653183},
21796 {0, 9223372038331170815},
21797 },
21798 outputs: []outputInfo{
21799 {0, 335544319},
21800 },
21801 },
21802 },
21803 {
21804 name: "MOVBUloadidx",
21805 argLen: 3,
21806 asm: arm64.AMOVBU,
21807 reg: regInfo{
21808 inputs: []inputInfo{
21809 {1, 402653183},
21810 {0, 9223372038331170815},
21811 },
21812 outputs: []outputInfo{
21813 {0, 335544319},
21814 },
21815 },
21816 },
21817 {
21818 name: "FMOVSloadidx",
21819 argLen: 3,
21820 asm: arm64.AFMOVS,
21821 reg: regInfo{
21822 inputs: []inputInfo{
21823 {1, 402653183},
21824 {0, 9223372038331170815},
21825 },
21826 outputs: []outputInfo{
21827 {0, 9223372034707292160},
21828 },
21829 },
21830 },
21831 {
21832 name: "FMOVDloadidx",
21833 argLen: 3,
21834 asm: arm64.AFMOVD,
21835 reg: regInfo{
21836 inputs: []inputInfo{
21837 {1, 402653183},
21838 {0, 9223372038331170815},
21839 },
21840 outputs: []outputInfo{
21841 {0, 9223372034707292160},
21842 },
21843 },
21844 },
21845 {
21846 name: "MOVHloadidx2",
21847 argLen: 3,
21848 asm: arm64.AMOVH,
21849 reg: regInfo{
21850 inputs: []inputInfo{
21851 {1, 402653183},
21852 {0, 9223372038331170815},
21853 },
21854 outputs: []outputInfo{
21855 {0, 335544319},
21856 },
21857 },
21858 },
21859 {
21860 name: "MOVHUloadidx2",
21861 argLen: 3,
21862 asm: arm64.AMOVHU,
21863 reg: regInfo{
21864 inputs: []inputInfo{
21865 {1, 402653183},
21866 {0, 9223372038331170815},
21867 },
21868 outputs: []outputInfo{
21869 {0, 335544319},
21870 },
21871 },
21872 },
21873 {
21874 name: "MOVWloadidx4",
21875 argLen: 3,
21876 asm: arm64.AMOVW,
21877 reg: regInfo{
21878 inputs: []inputInfo{
21879 {1, 402653183},
21880 {0, 9223372038331170815},
21881 },
21882 outputs: []outputInfo{
21883 {0, 335544319},
21884 },
21885 },
21886 },
21887 {
21888 name: "MOVWUloadidx4",
21889 argLen: 3,
21890 asm: arm64.AMOVWU,
21891 reg: regInfo{
21892 inputs: []inputInfo{
21893 {1, 402653183},
21894 {0, 9223372038331170815},
21895 },
21896 outputs: []outputInfo{
21897 {0, 335544319},
21898 },
21899 },
21900 },
21901 {
21902 name: "MOVDloadidx8",
21903 argLen: 3,
21904 asm: arm64.AMOVD,
21905 reg: regInfo{
21906 inputs: []inputInfo{
21907 {1, 402653183},
21908 {0, 9223372038331170815},
21909 },
21910 outputs: []outputInfo{
21911 {0, 335544319},
21912 },
21913 },
21914 },
21915 {
21916 name: "FMOVSloadidx4",
21917 argLen: 3,
21918 asm: arm64.AFMOVS,
21919 reg: regInfo{
21920 inputs: []inputInfo{
21921 {1, 402653183},
21922 {0, 9223372038331170815},
21923 },
21924 outputs: []outputInfo{
21925 {0, 9223372034707292160},
21926 },
21927 },
21928 },
21929 {
21930 name: "FMOVDloadidx8",
21931 argLen: 3,
21932 asm: arm64.AFMOVD,
21933 reg: regInfo{
21934 inputs: []inputInfo{
21935 {1, 402653183},
21936 {0, 9223372038331170815},
21937 },
21938 outputs: []outputInfo{
21939 {0, 9223372034707292160},
21940 },
21941 },
21942 },
21943 {
21944 name: "MOVBstore",
21945 auxType: auxSymOff,
21946 argLen: 3,
21947 faultOnNilArg0: true,
21948 symEffect: SymWrite,
21949 asm: arm64.AMOVB,
21950 reg: regInfo{
21951 inputs: []inputInfo{
21952 {1, 939524095},
21953 {0, 9223372038331170815},
21954 },
21955 },
21956 },
21957 {
21958 name: "MOVHstore",
21959 auxType: auxSymOff,
21960 argLen: 3,
21961 faultOnNilArg0: true,
21962 symEffect: SymWrite,
21963 asm: arm64.AMOVH,
21964 reg: regInfo{
21965 inputs: []inputInfo{
21966 {1, 939524095},
21967 {0, 9223372038331170815},
21968 },
21969 },
21970 },
21971 {
21972 name: "MOVWstore",
21973 auxType: auxSymOff,
21974 argLen: 3,
21975 faultOnNilArg0: true,
21976 symEffect: SymWrite,
21977 asm: arm64.AMOVW,
21978 reg: regInfo{
21979 inputs: []inputInfo{
21980 {1, 939524095},
21981 {0, 9223372038331170815},
21982 },
21983 },
21984 },
21985 {
21986 name: "MOVDstore",
21987 auxType: auxSymOff,
21988 argLen: 3,
21989 faultOnNilArg0: true,
21990 symEffect: SymWrite,
21991 asm: arm64.AMOVD,
21992 reg: regInfo{
21993 inputs: []inputInfo{
21994 {1, 939524095},
21995 {0, 9223372038331170815},
21996 },
21997 },
21998 },
21999 {
22000 name: "FMOVSstore",
22001 auxType: auxSymOff,
22002 argLen: 3,
22003 faultOnNilArg0: true,
22004 symEffect: SymWrite,
22005 asm: arm64.AFMOVS,
22006 reg: regInfo{
22007 inputs: []inputInfo{
22008 {0, 9223372038331170815},
22009 {1, 9223372034707292160},
22010 },
22011 },
22012 },
22013 {
22014 name: "FMOVDstore",
22015 auxType: auxSymOff,
22016 argLen: 3,
22017 faultOnNilArg0: true,
22018 symEffect: SymWrite,
22019 asm: arm64.AFMOVD,
22020 reg: regInfo{
22021 inputs: []inputInfo{
22022 {0, 9223372038331170815},
22023 {1, 9223372034707292160},
22024 },
22025 },
22026 },
22027 {
22028 name: "STP",
22029 auxType: auxSymOff,
22030 argLen: 4,
22031 faultOnNilArg0: true,
22032 symEffect: SymWrite,
22033 asm: arm64.ASTP,
22034 reg: regInfo{
22035 inputs: []inputInfo{
22036 {1, 939524095},
22037 {2, 939524095},
22038 {0, 9223372038331170815},
22039 },
22040 },
22041 },
22042 {
22043 name: "STPW",
22044 auxType: auxSymOff,
22045 argLen: 4,
22046 faultOnNilArg0: true,
22047 symEffect: SymWrite,
22048 asm: arm64.ASTPW,
22049 reg: regInfo{
22050 inputs: []inputInfo{
22051 {1, 939524095},
22052 {2, 939524095},
22053 {0, 9223372038331170815},
22054 },
22055 },
22056 },
22057 {
22058 name: "FSTPD",
22059 auxType: auxSymOff,
22060 argLen: 4,
22061 faultOnNilArg0: true,
22062 symEffect: SymWrite,
22063 asm: arm64.AFSTPD,
22064 reg: regInfo{
22065 inputs: []inputInfo{
22066 {0, 9223372038331170815},
22067 {1, 9223372034707292160},
22068 {2, 9223372034707292160},
22069 },
22070 },
22071 },
22072 {
22073 name: "FSTPS",
22074 auxType: auxSymOff,
22075 argLen: 4,
22076 faultOnNilArg0: true,
22077 symEffect: SymWrite,
22078 asm: arm64.AFSTPS,
22079 reg: regInfo{
22080 inputs: []inputInfo{
22081 {0, 9223372038331170815},
22082 {1, 9223372034707292160},
22083 {2, 9223372034707292160},
22084 },
22085 },
22086 },
22087 {
22088 name: "MOVBstoreidx",
22089 argLen: 4,
22090 asm: arm64.AMOVB,
22091 reg: regInfo{
22092 inputs: []inputInfo{
22093 {1, 939524095},
22094 {2, 939524095},
22095 {0, 9223372038331170815},
22096 },
22097 },
22098 },
22099 {
22100 name: "MOVHstoreidx",
22101 argLen: 4,
22102 asm: arm64.AMOVH,
22103 reg: regInfo{
22104 inputs: []inputInfo{
22105 {1, 939524095},
22106 {2, 939524095},
22107 {0, 9223372038331170815},
22108 },
22109 },
22110 },
22111 {
22112 name: "MOVWstoreidx",
22113 argLen: 4,
22114 asm: arm64.AMOVW,
22115 reg: regInfo{
22116 inputs: []inputInfo{
22117 {1, 939524095},
22118 {2, 939524095},
22119 {0, 9223372038331170815},
22120 },
22121 },
22122 },
22123 {
22124 name: "MOVDstoreidx",
22125 argLen: 4,
22126 asm: arm64.AMOVD,
22127 reg: regInfo{
22128 inputs: []inputInfo{
22129 {1, 939524095},
22130 {2, 939524095},
22131 {0, 9223372038331170815},
22132 },
22133 },
22134 },
22135 {
22136 name: "FMOVSstoreidx",
22137 argLen: 4,
22138 asm: arm64.AFMOVS,
22139 reg: regInfo{
22140 inputs: []inputInfo{
22141 {1, 402653183},
22142 {0, 9223372038331170815},
22143 {2, 9223372034707292160},
22144 },
22145 },
22146 },
22147 {
22148 name: "FMOVDstoreidx",
22149 argLen: 4,
22150 asm: arm64.AFMOVD,
22151 reg: regInfo{
22152 inputs: []inputInfo{
22153 {1, 402653183},
22154 {0, 9223372038331170815},
22155 {2, 9223372034707292160},
22156 },
22157 },
22158 },
22159 {
22160 name: "MOVHstoreidx2",
22161 argLen: 4,
22162 asm: arm64.AMOVH,
22163 reg: regInfo{
22164 inputs: []inputInfo{
22165 {1, 939524095},
22166 {2, 939524095},
22167 {0, 9223372038331170815},
22168 },
22169 },
22170 },
22171 {
22172 name: "MOVWstoreidx4",
22173 argLen: 4,
22174 asm: arm64.AMOVW,
22175 reg: regInfo{
22176 inputs: []inputInfo{
22177 {1, 939524095},
22178 {2, 939524095},
22179 {0, 9223372038331170815},
22180 },
22181 },
22182 },
22183 {
22184 name: "MOVDstoreidx8",
22185 argLen: 4,
22186 asm: arm64.AMOVD,
22187 reg: regInfo{
22188 inputs: []inputInfo{
22189 {1, 939524095},
22190 {2, 939524095},
22191 {0, 9223372038331170815},
22192 },
22193 },
22194 },
22195 {
22196 name: "FMOVSstoreidx4",
22197 argLen: 4,
22198 asm: arm64.AFMOVS,
22199 reg: regInfo{
22200 inputs: []inputInfo{
22201 {1, 402653183},
22202 {0, 9223372038331170815},
22203 {2, 9223372034707292160},
22204 },
22205 },
22206 },
22207 {
22208 name: "FMOVDstoreidx8",
22209 argLen: 4,
22210 asm: arm64.AFMOVD,
22211 reg: regInfo{
22212 inputs: []inputInfo{
22213 {1, 402653183},
22214 {0, 9223372038331170815},
22215 {2, 9223372034707292160},
22216 },
22217 },
22218 },
22219 {
22220 name: "FMOVDgpfp",
22221 argLen: 1,
22222 asm: arm64.AFMOVD,
22223 reg: regInfo{
22224 inputs: []inputInfo{
22225 {0, 335544319},
22226 },
22227 outputs: []outputInfo{
22228 {0, 9223372034707292160},
22229 },
22230 },
22231 },
22232 {
22233 name: "FMOVDfpgp",
22234 argLen: 1,
22235 asm: arm64.AFMOVD,
22236 reg: regInfo{
22237 inputs: []inputInfo{
22238 {0, 9223372034707292160},
22239 },
22240 outputs: []outputInfo{
22241 {0, 335544319},
22242 },
22243 },
22244 },
22245 {
22246 name: "FMOVSgpfp",
22247 argLen: 1,
22248 asm: arm64.AFMOVS,
22249 reg: regInfo{
22250 inputs: []inputInfo{
22251 {0, 335544319},
22252 },
22253 outputs: []outputInfo{
22254 {0, 9223372034707292160},
22255 },
22256 },
22257 },
22258 {
22259 name: "FMOVSfpgp",
22260 argLen: 1,
22261 asm: arm64.AFMOVS,
22262 reg: regInfo{
22263 inputs: []inputInfo{
22264 {0, 9223372034707292160},
22265 },
22266 outputs: []outputInfo{
22267 {0, 335544319},
22268 },
22269 },
22270 },
22271 {
22272 name: "MOVBreg",
22273 argLen: 1,
22274 asm: arm64.AMOVB,
22275 reg: regInfo{
22276 inputs: []inputInfo{
22277 {0, 402653183},
22278 },
22279 outputs: []outputInfo{
22280 {0, 335544319},
22281 },
22282 },
22283 },
22284 {
22285 name: "MOVBUreg",
22286 argLen: 1,
22287 asm: arm64.AMOVBU,
22288 reg: regInfo{
22289 inputs: []inputInfo{
22290 {0, 402653183},
22291 },
22292 outputs: []outputInfo{
22293 {0, 335544319},
22294 },
22295 },
22296 },
22297 {
22298 name: "MOVHreg",
22299 argLen: 1,
22300 asm: arm64.AMOVH,
22301 reg: regInfo{
22302 inputs: []inputInfo{
22303 {0, 402653183},
22304 },
22305 outputs: []outputInfo{
22306 {0, 335544319},
22307 },
22308 },
22309 },
22310 {
22311 name: "MOVHUreg",
22312 argLen: 1,
22313 asm: arm64.AMOVHU,
22314 reg: regInfo{
22315 inputs: []inputInfo{
22316 {0, 402653183},
22317 },
22318 outputs: []outputInfo{
22319 {0, 335544319},
22320 },
22321 },
22322 },
22323 {
22324 name: "MOVWreg",
22325 argLen: 1,
22326 asm: arm64.AMOVW,
22327 reg: regInfo{
22328 inputs: []inputInfo{
22329 {0, 402653183},
22330 },
22331 outputs: []outputInfo{
22332 {0, 335544319},
22333 },
22334 },
22335 },
22336 {
22337 name: "MOVWUreg",
22338 argLen: 1,
22339 asm: arm64.AMOVWU,
22340 reg: regInfo{
22341 inputs: []inputInfo{
22342 {0, 402653183},
22343 },
22344 outputs: []outputInfo{
22345 {0, 335544319},
22346 },
22347 },
22348 },
22349 {
22350 name: "MOVDreg",
22351 argLen: 1,
22352 asm: arm64.AMOVD,
22353 reg: regInfo{
22354 inputs: []inputInfo{
22355 {0, 402653183},
22356 },
22357 outputs: []outputInfo{
22358 {0, 335544319},
22359 },
22360 },
22361 },
22362 {
22363 name: "MOVDnop",
22364 argLen: 1,
22365 resultInArg0: true,
22366 reg: regInfo{
22367 inputs: []inputInfo{
22368 {0, 335544319},
22369 },
22370 outputs: []outputInfo{
22371 {0, 335544319},
22372 },
22373 },
22374 },
22375 {
22376 name: "SCVTFWS",
22377 argLen: 1,
22378 asm: arm64.ASCVTFWS,
22379 reg: regInfo{
22380 inputs: []inputInfo{
22381 {0, 335544319},
22382 },
22383 outputs: []outputInfo{
22384 {0, 9223372034707292160},
22385 },
22386 },
22387 },
22388 {
22389 name: "SCVTFWD",
22390 argLen: 1,
22391 asm: arm64.ASCVTFWD,
22392 reg: regInfo{
22393 inputs: []inputInfo{
22394 {0, 335544319},
22395 },
22396 outputs: []outputInfo{
22397 {0, 9223372034707292160},
22398 },
22399 },
22400 },
22401 {
22402 name: "UCVTFWS",
22403 argLen: 1,
22404 asm: arm64.AUCVTFWS,
22405 reg: regInfo{
22406 inputs: []inputInfo{
22407 {0, 335544319},
22408 },
22409 outputs: []outputInfo{
22410 {0, 9223372034707292160},
22411 },
22412 },
22413 },
22414 {
22415 name: "UCVTFWD",
22416 argLen: 1,
22417 asm: arm64.AUCVTFWD,
22418 reg: regInfo{
22419 inputs: []inputInfo{
22420 {0, 335544319},
22421 },
22422 outputs: []outputInfo{
22423 {0, 9223372034707292160},
22424 },
22425 },
22426 },
22427 {
22428 name: "SCVTFS",
22429 argLen: 1,
22430 asm: arm64.ASCVTFS,
22431 reg: regInfo{
22432 inputs: []inputInfo{
22433 {0, 335544319},
22434 },
22435 outputs: []outputInfo{
22436 {0, 9223372034707292160},
22437 },
22438 },
22439 },
22440 {
22441 name: "SCVTFD",
22442 argLen: 1,
22443 asm: arm64.ASCVTFD,
22444 reg: regInfo{
22445 inputs: []inputInfo{
22446 {0, 335544319},
22447 },
22448 outputs: []outputInfo{
22449 {0, 9223372034707292160},
22450 },
22451 },
22452 },
22453 {
22454 name: "UCVTFS",
22455 argLen: 1,
22456 asm: arm64.AUCVTFS,
22457 reg: regInfo{
22458 inputs: []inputInfo{
22459 {0, 335544319},
22460 },
22461 outputs: []outputInfo{
22462 {0, 9223372034707292160},
22463 },
22464 },
22465 },
22466 {
22467 name: "UCVTFD",
22468 argLen: 1,
22469 asm: arm64.AUCVTFD,
22470 reg: regInfo{
22471 inputs: []inputInfo{
22472 {0, 335544319},
22473 },
22474 outputs: []outputInfo{
22475 {0, 9223372034707292160},
22476 },
22477 },
22478 },
22479 {
22480 name: "FCVTZSSW",
22481 argLen: 1,
22482 asm: arm64.AFCVTZSSW,
22483 reg: regInfo{
22484 inputs: []inputInfo{
22485 {0, 9223372034707292160},
22486 },
22487 outputs: []outputInfo{
22488 {0, 335544319},
22489 },
22490 },
22491 },
22492 {
22493 name: "FCVTZSDW",
22494 argLen: 1,
22495 asm: arm64.AFCVTZSDW,
22496 reg: regInfo{
22497 inputs: []inputInfo{
22498 {0, 9223372034707292160},
22499 },
22500 outputs: []outputInfo{
22501 {0, 335544319},
22502 },
22503 },
22504 },
22505 {
22506 name: "FCVTZUSW",
22507 argLen: 1,
22508 asm: arm64.AFCVTZUSW,
22509 reg: regInfo{
22510 inputs: []inputInfo{
22511 {0, 9223372034707292160},
22512 },
22513 outputs: []outputInfo{
22514 {0, 335544319},
22515 },
22516 },
22517 },
22518 {
22519 name: "FCVTZUDW",
22520 argLen: 1,
22521 asm: arm64.AFCVTZUDW,
22522 reg: regInfo{
22523 inputs: []inputInfo{
22524 {0, 9223372034707292160},
22525 },
22526 outputs: []outputInfo{
22527 {0, 335544319},
22528 },
22529 },
22530 },
22531 {
22532 name: "FCVTZSS",
22533 argLen: 1,
22534 asm: arm64.AFCVTZSS,
22535 reg: regInfo{
22536 inputs: []inputInfo{
22537 {0, 9223372034707292160},
22538 },
22539 outputs: []outputInfo{
22540 {0, 335544319},
22541 },
22542 },
22543 },
22544 {
22545 name: "FCVTZSD",
22546 argLen: 1,
22547 asm: arm64.AFCVTZSD,
22548 reg: regInfo{
22549 inputs: []inputInfo{
22550 {0, 9223372034707292160},
22551 },
22552 outputs: []outputInfo{
22553 {0, 335544319},
22554 },
22555 },
22556 },
22557 {
22558 name: "FCVTZUS",
22559 argLen: 1,
22560 asm: arm64.AFCVTZUS,
22561 reg: regInfo{
22562 inputs: []inputInfo{
22563 {0, 9223372034707292160},
22564 },
22565 outputs: []outputInfo{
22566 {0, 335544319},
22567 },
22568 },
22569 },
22570 {
22571 name: "FCVTZUD",
22572 argLen: 1,
22573 asm: arm64.AFCVTZUD,
22574 reg: regInfo{
22575 inputs: []inputInfo{
22576 {0, 9223372034707292160},
22577 },
22578 outputs: []outputInfo{
22579 {0, 335544319},
22580 },
22581 },
22582 },
22583 {
22584 name: "FCVTSD",
22585 argLen: 1,
22586 asm: arm64.AFCVTSD,
22587 reg: regInfo{
22588 inputs: []inputInfo{
22589 {0, 9223372034707292160},
22590 },
22591 outputs: []outputInfo{
22592 {0, 9223372034707292160},
22593 },
22594 },
22595 },
22596 {
22597 name: "FCVTDS",
22598 argLen: 1,
22599 asm: arm64.AFCVTDS,
22600 reg: regInfo{
22601 inputs: []inputInfo{
22602 {0, 9223372034707292160},
22603 },
22604 outputs: []outputInfo{
22605 {0, 9223372034707292160},
22606 },
22607 },
22608 },
22609 {
22610 name: "FRINTAD",
22611 argLen: 1,
22612 asm: arm64.AFRINTAD,
22613 reg: regInfo{
22614 inputs: []inputInfo{
22615 {0, 9223372034707292160},
22616 },
22617 outputs: []outputInfo{
22618 {0, 9223372034707292160},
22619 },
22620 },
22621 },
22622 {
22623 name: "FRINTMD",
22624 argLen: 1,
22625 asm: arm64.AFRINTMD,
22626 reg: regInfo{
22627 inputs: []inputInfo{
22628 {0, 9223372034707292160},
22629 },
22630 outputs: []outputInfo{
22631 {0, 9223372034707292160},
22632 },
22633 },
22634 },
22635 {
22636 name: "FRINTND",
22637 argLen: 1,
22638 asm: arm64.AFRINTND,
22639 reg: regInfo{
22640 inputs: []inputInfo{
22641 {0, 9223372034707292160},
22642 },
22643 outputs: []outputInfo{
22644 {0, 9223372034707292160},
22645 },
22646 },
22647 },
22648 {
22649 name: "FRINTPD",
22650 argLen: 1,
22651 asm: arm64.AFRINTPD,
22652 reg: regInfo{
22653 inputs: []inputInfo{
22654 {0, 9223372034707292160},
22655 },
22656 outputs: []outputInfo{
22657 {0, 9223372034707292160},
22658 },
22659 },
22660 },
22661 {
22662 name: "FRINTZD",
22663 argLen: 1,
22664 asm: arm64.AFRINTZD,
22665 reg: regInfo{
22666 inputs: []inputInfo{
22667 {0, 9223372034707292160},
22668 },
22669 outputs: []outputInfo{
22670 {0, 9223372034707292160},
22671 },
22672 },
22673 },
22674 {
22675 name: "CSEL",
22676 auxType: auxCCop,
22677 argLen: 3,
22678 asm: arm64.ACSEL,
22679 reg: regInfo{
22680 inputs: []inputInfo{
22681 {0, 335544319},
22682 {1, 335544319},
22683 },
22684 outputs: []outputInfo{
22685 {0, 335544319},
22686 },
22687 },
22688 },
22689 {
22690 name: "CSEL0",
22691 auxType: auxCCop,
22692 argLen: 2,
22693 asm: arm64.ACSEL,
22694 reg: regInfo{
22695 inputs: []inputInfo{
22696 {0, 402653183},
22697 },
22698 outputs: []outputInfo{
22699 {0, 335544319},
22700 },
22701 },
22702 },
22703 {
22704 name: "CSINC",
22705 auxType: auxCCop,
22706 argLen: 3,
22707 asm: arm64.ACSINC,
22708 reg: regInfo{
22709 inputs: []inputInfo{
22710 {0, 335544319},
22711 {1, 335544319},
22712 },
22713 outputs: []outputInfo{
22714 {0, 335544319},
22715 },
22716 },
22717 },
22718 {
22719 name: "CSINV",
22720 auxType: auxCCop,
22721 argLen: 3,
22722 asm: arm64.ACSINV,
22723 reg: regInfo{
22724 inputs: []inputInfo{
22725 {0, 335544319},
22726 {1, 335544319},
22727 },
22728 outputs: []outputInfo{
22729 {0, 335544319},
22730 },
22731 },
22732 },
22733 {
22734 name: "CSNEG",
22735 auxType: auxCCop,
22736 argLen: 3,
22737 asm: arm64.ACSNEG,
22738 reg: regInfo{
22739 inputs: []inputInfo{
22740 {0, 335544319},
22741 {1, 335544319},
22742 },
22743 outputs: []outputInfo{
22744 {0, 335544319},
22745 },
22746 },
22747 },
22748 {
22749 name: "CSETM",
22750 auxType: auxCCop,
22751 argLen: 1,
22752 asm: arm64.ACSETM,
22753 reg: regInfo{
22754 outputs: []outputInfo{
22755 {0, 335544319},
22756 },
22757 },
22758 },
22759 {
22760 name: "CALLstatic",
22761 auxType: auxCallOff,
22762 argLen: -1,
22763 clobberFlags: true,
22764 call: true,
22765 reg: regInfo{
22766 clobbers: 9223372035109945343,
22767 },
22768 },
22769 {
22770 name: "CALLtail",
22771 auxType: auxCallOff,
22772 argLen: -1,
22773 clobberFlags: true,
22774 call: true,
22775 tailCall: true,
22776 reg: regInfo{
22777 clobbers: 9223372035109945343,
22778 },
22779 },
22780 {
22781 name: "CALLclosure",
22782 auxType: auxCallOff,
22783 argLen: -1,
22784 clobberFlags: true,
22785 call: true,
22786 reg: regInfo{
22787 inputs: []inputInfo{
22788 {1, 33554432},
22789 {0, 1409286143},
22790 },
22791 clobbers: 9223372035109945343,
22792 },
22793 },
22794 {
22795 name: "CALLinter",
22796 auxType: auxCallOff,
22797 argLen: -1,
22798 clobberFlags: true,
22799 call: true,
22800 reg: regInfo{
22801 inputs: []inputInfo{
22802 {0, 335544319},
22803 },
22804 clobbers: 9223372035109945343,
22805 },
22806 },
22807 {
22808 name: "LoweredNilCheck",
22809 argLen: 2,
22810 nilCheck: true,
22811 faultOnNilArg0: true,
22812 reg: regInfo{
22813 inputs: []inputInfo{
22814 {0, 402653183},
22815 },
22816 },
22817 },
22818 {
22819 name: "Equal",
22820 argLen: 1,
22821 reg: regInfo{
22822 outputs: []outputInfo{
22823 {0, 335544319},
22824 },
22825 },
22826 },
22827 {
22828 name: "NotEqual",
22829 argLen: 1,
22830 reg: regInfo{
22831 outputs: []outputInfo{
22832 {0, 335544319},
22833 },
22834 },
22835 },
22836 {
22837 name: "LessThan",
22838 argLen: 1,
22839 reg: regInfo{
22840 outputs: []outputInfo{
22841 {0, 335544319},
22842 },
22843 },
22844 },
22845 {
22846 name: "LessEqual",
22847 argLen: 1,
22848 reg: regInfo{
22849 outputs: []outputInfo{
22850 {0, 335544319},
22851 },
22852 },
22853 },
22854 {
22855 name: "GreaterThan",
22856 argLen: 1,
22857 reg: regInfo{
22858 outputs: []outputInfo{
22859 {0, 335544319},
22860 },
22861 },
22862 },
22863 {
22864 name: "GreaterEqual",
22865 argLen: 1,
22866 reg: regInfo{
22867 outputs: []outputInfo{
22868 {0, 335544319},
22869 },
22870 },
22871 },
22872 {
22873 name: "LessThanU",
22874 argLen: 1,
22875 reg: regInfo{
22876 outputs: []outputInfo{
22877 {0, 335544319},
22878 },
22879 },
22880 },
22881 {
22882 name: "LessEqualU",
22883 argLen: 1,
22884 reg: regInfo{
22885 outputs: []outputInfo{
22886 {0, 335544319},
22887 },
22888 },
22889 },
22890 {
22891 name: "GreaterThanU",
22892 argLen: 1,
22893 reg: regInfo{
22894 outputs: []outputInfo{
22895 {0, 335544319},
22896 },
22897 },
22898 },
22899 {
22900 name: "GreaterEqualU",
22901 argLen: 1,
22902 reg: regInfo{
22903 outputs: []outputInfo{
22904 {0, 335544319},
22905 },
22906 },
22907 },
22908 {
22909 name: "LessThanF",
22910 argLen: 1,
22911 reg: regInfo{
22912 outputs: []outputInfo{
22913 {0, 335544319},
22914 },
22915 },
22916 },
22917 {
22918 name: "LessEqualF",
22919 argLen: 1,
22920 reg: regInfo{
22921 outputs: []outputInfo{
22922 {0, 335544319},
22923 },
22924 },
22925 },
22926 {
22927 name: "GreaterThanF",
22928 argLen: 1,
22929 reg: regInfo{
22930 outputs: []outputInfo{
22931 {0, 335544319},
22932 },
22933 },
22934 },
22935 {
22936 name: "GreaterEqualF",
22937 argLen: 1,
22938 reg: regInfo{
22939 outputs: []outputInfo{
22940 {0, 335544319},
22941 },
22942 },
22943 },
22944 {
22945 name: "NotLessThanF",
22946 argLen: 1,
22947 reg: regInfo{
22948 outputs: []outputInfo{
22949 {0, 335544319},
22950 },
22951 },
22952 },
22953 {
22954 name: "NotLessEqualF",
22955 argLen: 1,
22956 reg: regInfo{
22957 outputs: []outputInfo{
22958 {0, 335544319},
22959 },
22960 },
22961 },
22962 {
22963 name: "NotGreaterThanF",
22964 argLen: 1,
22965 reg: regInfo{
22966 outputs: []outputInfo{
22967 {0, 335544319},
22968 },
22969 },
22970 },
22971 {
22972 name: "NotGreaterEqualF",
22973 argLen: 1,
22974 reg: regInfo{
22975 outputs: []outputInfo{
22976 {0, 335544319},
22977 },
22978 },
22979 },
22980 {
22981 name: "LessThanNoov",
22982 argLen: 1,
22983 reg: regInfo{
22984 outputs: []outputInfo{
22985 {0, 335544319},
22986 },
22987 },
22988 },
22989 {
22990 name: "GreaterEqualNoov",
22991 argLen: 1,
22992 reg: regInfo{
22993 outputs: []outputInfo{
22994 {0, 335544319},
22995 },
22996 },
22997 },
22998 {
22999 name: "DUFFZERO",
23000 auxType: auxInt64,
23001 argLen: 2,
23002 faultOnNilArg0: true,
23003 unsafePoint: true,
23004 reg: regInfo{
23005 inputs: []inputInfo{
23006 {0, 524288},
23007 },
23008 clobbers: 269156352,
23009 },
23010 },
23011 {
23012 name: "LoweredZero",
23013 argLen: 3,
23014 clobberFlags: true,
23015 faultOnNilArg0: true,
23016 reg: regInfo{
23017 inputs: []inputInfo{
23018 {0, 65536},
23019 {1, 335544319},
23020 },
23021 clobbers: 65536,
23022 },
23023 },
23024 {
23025 name: "DUFFCOPY",
23026 auxType: auxInt64,
23027 argLen: 3,
23028 faultOnNilArg0: true,
23029 faultOnNilArg1: true,
23030 unsafePoint: true,
23031 reg: regInfo{
23032 inputs: []inputInfo{
23033 {0, 1048576},
23034 {1, 524288},
23035 },
23036 clobbers: 303759360,
23037 },
23038 },
23039 {
23040 name: "LoweredMove",
23041 argLen: 4,
23042 clobberFlags: true,
23043 faultOnNilArg0: true,
23044 faultOnNilArg1: true,
23045 reg: regInfo{
23046 inputs: []inputInfo{
23047 {0, 131072},
23048 {1, 65536},
23049 {2, 318767103},
23050 },
23051 clobbers: 16973824,
23052 },
23053 },
23054 {
23055 name: "LoweredGetClosurePtr",
23056 argLen: 0,
23057 zeroWidth: true,
23058 reg: regInfo{
23059 outputs: []outputInfo{
23060 {0, 33554432},
23061 },
23062 },
23063 },
23064 {
23065 name: "LoweredGetCallerSP",
23066 argLen: 1,
23067 rematerializeable: true,
23068 reg: regInfo{
23069 outputs: []outputInfo{
23070 {0, 335544319},
23071 },
23072 },
23073 },
23074 {
23075 name: "LoweredGetCallerPC",
23076 argLen: 0,
23077 rematerializeable: true,
23078 reg: regInfo{
23079 outputs: []outputInfo{
23080 {0, 335544319},
23081 },
23082 },
23083 },
23084 {
23085 name: "FlagConstant",
23086 auxType: auxFlagConstant,
23087 argLen: 0,
23088 reg: regInfo{},
23089 },
23090 {
23091 name: "InvertFlags",
23092 argLen: 1,
23093 reg: regInfo{},
23094 },
23095 {
23096 name: "LDAR",
23097 argLen: 2,
23098 faultOnNilArg0: true,
23099 asm: arm64.ALDAR,
23100 reg: regInfo{
23101 inputs: []inputInfo{
23102 {0, 9223372038331170815},
23103 },
23104 outputs: []outputInfo{
23105 {0, 335544319},
23106 },
23107 },
23108 },
23109 {
23110 name: "LDARB",
23111 argLen: 2,
23112 faultOnNilArg0: true,
23113 asm: arm64.ALDARB,
23114 reg: regInfo{
23115 inputs: []inputInfo{
23116 {0, 9223372038331170815},
23117 },
23118 outputs: []outputInfo{
23119 {0, 335544319},
23120 },
23121 },
23122 },
23123 {
23124 name: "LDARW",
23125 argLen: 2,
23126 faultOnNilArg0: true,
23127 asm: arm64.ALDARW,
23128 reg: regInfo{
23129 inputs: []inputInfo{
23130 {0, 9223372038331170815},
23131 },
23132 outputs: []outputInfo{
23133 {0, 335544319},
23134 },
23135 },
23136 },
23137 {
23138 name: "STLRB",
23139 argLen: 3,
23140 faultOnNilArg0: true,
23141 hasSideEffects: true,
23142 asm: arm64.ASTLRB,
23143 reg: regInfo{
23144 inputs: []inputInfo{
23145 {1, 939524095},
23146 {0, 9223372038331170815},
23147 },
23148 },
23149 },
23150 {
23151 name: "STLR",
23152 argLen: 3,
23153 faultOnNilArg0: true,
23154 hasSideEffects: true,
23155 asm: arm64.ASTLR,
23156 reg: regInfo{
23157 inputs: []inputInfo{
23158 {1, 939524095},
23159 {0, 9223372038331170815},
23160 },
23161 },
23162 },
23163 {
23164 name: "STLRW",
23165 argLen: 3,
23166 faultOnNilArg0: true,
23167 hasSideEffects: true,
23168 asm: arm64.ASTLRW,
23169 reg: regInfo{
23170 inputs: []inputInfo{
23171 {1, 939524095},
23172 {0, 9223372038331170815},
23173 },
23174 },
23175 },
23176 {
23177 name: "LoweredAtomicExchange64",
23178 argLen: 3,
23179 resultNotInArgs: true,
23180 faultOnNilArg0: true,
23181 hasSideEffects: true,
23182 unsafePoint: true,
23183 reg: regInfo{
23184 inputs: []inputInfo{
23185 {1, 939524095},
23186 {0, 9223372038331170815},
23187 },
23188 outputs: []outputInfo{
23189 {0, 335544319},
23190 },
23191 },
23192 },
23193 {
23194 name: "LoweredAtomicExchange32",
23195 argLen: 3,
23196 resultNotInArgs: true,
23197 faultOnNilArg0: true,
23198 hasSideEffects: true,
23199 unsafePoint: true,
23200 reg: regInfo{
23201 inputs: []inputInfo{
23202 {1, 939524095},
23203 {0, 9223372038331170815},
23204 },
23205 outputs: []outputInfo{
23206 {0, 335544319},
23207 },
23208 },
23209 },
23210 {
23211 name: "LoweredAtomicExchange8",
23212 argLen: 3,
23213 resultNotInArgs: true,
23214 faultOnNilArg0: true,
23215 hasSideEffects: true,
23216 unsafePoint: true,
23217 reg: regInfo{
23218 inputs: []inputInfo{
23219 {1, 939524095},
23220 {0, 9223372038331170815},
23221 },
23222 outputs: []outputInfo{
23223 {0, 335544319},
23224 },
23225 },
23226 },
23227 {
23228 name: "LoweredAtomicExchange64Variant",
23229 argLen: 3,
23230 resultNotInArgs: true,
23231 faultOnNilArg0: true,
23232 hasSideEffects: true,
23233 reg: regInfo{
23234 inputs: []inputInfo{
23235 {1, 939524095},
23236 {0, 9223372038331170815},
23237 },
23238 outputs: []outputInfo{
23239 {0, 335544319},
23240 },
23241 },
23242 },
23243 {
23244 name: "LoweredAtomicExchange32Variant",
23245 argLen: 3,
23246 resultNotInArgs: true,
23247 faultOnNilArg0: true,
23248 hasSideEffects: true,
23249 reg: regInfo{
23250 inputs: []inputInfo{
23251 {1, 939524095},
23252 {0, 9223372038331170815},
23253 },
23254 outputs: []outputInfo{
23255 {0, 335544319},
23256 },
23257 },
23258 },
23259 {
23260 name: "LoweredAtomicExchange8Variant",
23261 argLen: 3,
23262 resultNotInArgs: true,
23263 faultOnNilArg0: true,
23264 hasSideEffects: true,
23265 unsafePoint: true,
23266 reg: regInfo{
23267 inputs: []inputInfo{
23268 {1, 939524095},
23269 {0, 9223372038331170815},
23270 },
23271 outputs: []outputInfo{
23272 {0, 335544319},
23273 },
23274 },
23275 },
23276 {
23277 name: "LoweredAtomicAdd64",
23278 argLen: 3,
23279 resultNotInArgs: true,
23280 faultOnNilArg0: true,
23281 hasSideEffects: true,
23282 unsafePoint: true,
23283 reg: regInfo{
23284 inputs: []inputInfo{
23285 {1, 939524095},
23286 {0, 9223372038331170815},
23287 },
23288 outputs: []outputInfo{
23289 {0, 335544319},
23290 },
23291 },
23292 },
23293 {
23294 name: "LoweredAtomicAdd32",
23295 argLen: 3,
23296 resultNotInArgs: true,
23297 faultOnNilArg0: true,
23298 hasSideEffects: true,
23299 unsafePoint: true,
23300 reg: regInfo{
23301 inputs: []inputInfo{
23302 {1, 939524095},
23303 {0, 9223372038331170815},
23304 },
23305 outputs: []outputInfo{
23306 {0, 335544319},
23307 },
23308 },
23309 },
23310 {
23311 name: "LoweredAtomicAdd64Variant",
23312 argLen: 3,
23313 resultNotInArgs: true,
23314 faultOnNilArg0: true,
23315 hasSideEffects: true,
23316 reg: regInfo{
23317 inputs: []inputInfo{
23318 {1, 939524095},
23319 {0, 9223372038331170815},
23320 },
23321 outputs: []outputInfo{
23322 {0, 335544319},
23323 },
23324 },
23325 },
23326 {
23327 name: "LoweredAtomicAdd32Variant",
23328 argLen: 3,
23329 resultNotInArgs: true,
23330 faultOnNilArg0: true,
23331 hasSideEffects: true,
23332 reg: regInfo{
23333 inputs: []inputInfo{
23334 {1, 939524095},
23335 {0, 9223372038331170815},
23336 },
23337 outputs: []outputInfo{
23338 {0, 335544319},
23339 },
23340 },
23341 },
23342 {
23343 name: "LoweredAtomicCas64",
23344 argLen: 4,
23345 resultNotInArgs: true,
23346 clobberFlags: true,
23347 faultOnNilArg0: true,
23348 hasSideEffects: true,
23349 unsafePoint: true,
23350 reg: regInfo{
23351 inputs: []inputInfo{
23352 {1, 939524095},
23353 {2, 939524095},
23354 {0, 9223372038331170815},
23355 },
23356 outputs: []outputInfo{
23357 {0, 335544319},
23358 },
23359 },
23360 },
23361 {
23362 name: "LoweredAtomicCas32",
23363 argLen: 4,
23364 resultNotInArgs: true,
23365 clobberFlags: true,
23366 faultOnNilArg0: true,
23367 hasSideEffects: true,
23368 unsafePoint: true,
23369 reg: regInfo{
23370 inputs: []inputInfo{
23371 {1, 939524095},
23372 {2, 939524095},
23373 {0, 9223372038331170815},
23374 },
23375 outputs: []outputInfo{
23376 {0, 335544319},
23377 },
23378 },
23379 },
23380 {
23381 name: "LoweredAtomicCas64Variant",
23382 argLen: 4,
23383 resultNotInArgs: true,
23384 clobberFlags: true,
23385 faultOnNilArg0: true,
23386 hasSideEffects: true,
23387 unsafePoint: true,
23388 reg: regInfo{
23389 inputs: []inputInfo{
23390 {1, 939524095},
23391 {2, 939524095},
23392 {0, 9223372038331170815},
23393 },
23394 outputs: []outputInfo{
23395 {0, 335544319},
23396 },
23397 },
23398 },
23399 {
23400 name: "LoweredAtomicCas32Variant",
23401 argLen: 4,
23402 resultNotInArgs: true,
23403 clobberFlags: true,
23404 faultOnNilArg0: true,
23405 hasSideEffects: true,
23406 unsafePoint: true,
23407 reg: regInfo{
23408 inputs: []inputInfo{
23409 {1, 939524095},
23410 {2, 939524095},
23411 {0, 9223372038331170815},
23412 },
23413 outputs: []outputInfo{
23414 {0, 335544319},
23415 },
23416 },
23417 },
23418 {
23419 name: "LoweredAtomicAnd8",
23420 argLen: 3,
23421 resultNotInArgs: true,
23422 needIntTemp: true,
23423 faultOnNilArg0: true,
23424 hasSideEffects: true,
23425 unsafePoint: true,
23426 asm: arm64.AAND,
23427 reg: regInfo{
23428 inputs: []inputInfo{
23429 {1, 939524095},
23430 {0, 9223372038331170815},
23431 },
23432 outputs: []outputInfo{
23433 {0, 335544319},
23434 },
23435 },
23436 },
23437 {
23438 name: "LoweredAtomicOr8",
23439 argLen: 3,
23440 resultNotInArgs: true,
23441 needIntTemp: true,
23442 faultOnNilArg0: true,
23443 hasSideEffects: true,
23444 unsafePoint: true,
23445 asm: arm64.AORR,
23446 reg: regInfo{
23447 inputs: []inputInfo{
23448 {1, 939524095},
23449 {0, 9223372038331170815},
23450 },
23451 outputs: []outputInfo{
23452 {0, 335544319},
23453 },
23454 },
23455 },
23456 {
23457 name: "LoweredAtomicAnd64",
23458 argLen: 3,
23459 resultNotInArgs: true,
23460 needIntTemp: true,
23461 faultOnNilArg0: true,
23462 hasSideEffects: true,
23463 unsafePoint: true,
23464 asm: arm64.AAND,
23465 reg: regInfo{
23466 inputs: []inputInfo{
23467 {1, 939524095},
23468 {0, 9223372038331170815},
23469 },
23470 outputs: []outputInfo{
23471 {0, 335544319},
23472 },
23473 },
23474 },
23475 {
23476 name: "LoweredAtomicOr64",
23477 argLen: 3,
23478 resultNotInArgs: true,
23479 needIntTemp: true,
23480 faultOnNilArg0: true,
23481 hasSideEffects: true,
23482 unsafePoint: true,
23483 asm: arm64.AORR,
23484 reg: regInfo{
23485 inputs: []inputInfo{
23486 {1, 939524095},
23487 {0, 9223372038331170815},
23488 },
23489 outputs: []outputInfo{
23490 {0, 335544319},
23491 },
23492 },
23493 },
23494 {
23495 name: "LoweredAtomicAnd32",
23496 argLen: 3,
23497 resultNotInArgs: true,
23498 needIntTemp: true,
23499 faultOnNilArg0: true,
23500 hasSideEffects: true,
23501 unsafePoint: true,
23502 asm: arm64.AAND,
23503 reg: regInfo{
23504 inputs: []inputInfo{
23505 {1, 939524095},
23506 {0, 9223372038331170815},
23507 },
23508 outputs: []outputInfo{
23509 {0, 335544319},
23510 },
23511 },
23512 },
23513 {
23514 name: "LoweredAtomicOr32",
23515 argLen: 3,
23516 resultNotInArgs: true,
23517 needIntTemp: true,
23518 faultOnNilArg0: true,
23519 hasSideEffects: true,
23520 unsafePoint: true,
23521 asm: arm64.AORR,
23522 reg: regInfo{
23523 inputs: []inputInfo{
23524 {1, 939524095},
23525 {0, 9223372038331170815},
23526 },
23527 outputs: []outputInfo{
23528 {0, 335544319},
23529 },
23530 },
23531 },
23532 {
23533 name: "LoweredAtomicAnd8Variant",
23534 argLen: 3,
23535 resultNotInArgs: true,
23536 faultOnNilArg0: true,
23537 hasSideEffects: true,
23538 unsafePoint: true,
23539 reg: regInfo{
23540 inputs: []inputInfo{
23541 {1, 939524095},
23542 {0, 9223372038331170815},
23543 },
23544 outputs: []outputInfo{
23545 {0, 335544319},
23546 },
23547 },
23548 },
23549 {
23550 name: "LoweredAtomicOr8Variant",
23551 argLen: 3,
23552 resultNotInArgs: true,
23553 faultOnNilArg0: true,
23554 hasSideEffects: true,
23555 reg: regInfo{
23556 inputs: []inputInfo{
23557 {1, 939524095},
23558 {0, 9223372038331170815},
23559 },
23560 outputs: []outputInfo{
23561 {0, 335544319},
23562 },
23563 },
23564 },
23565 {
23566 name: "LoweredAtomicAnd64Variant",
23567 argLen: 3,
23568 resultNotInArgs: true,
23569 faultOnNilArg0: true,
23570 hasSideEffects: true,
23571 unsafePoint: true,
23572 reg: regInfo{
23573 inputs: []inputInfo{
23574 {1, 939524095},
23575 {0, 9223372038331170815},
23576 },
23577 outputs: []outputInfo{
23578 {0, 335544319},
23579 },
23580 },
23581 },
23582 {
23583 name: "LoweredAtomicOr64Variant",
23584 argLen: 3,
23585 resultNotInArgs: true,
23586 faultOnNilArg0: true,
23587 hasSideEffects: true,
23588 reg: regInfo{
23589 inputs: []inputInfo{
23590 {1, 939524095},
23591 {0, 9223372038331170815},
23592 },
23593 outputs: []outputInfo{
23594 {0, 335544319},
23595 },
23596 },
23597 },
23598 {
23599 name: "LoweredAtomicAnd32Variant",
23600 argLen: 3,
23601 resultNotInArgs: true,
23602 faultOnNilArg0: true,
23603 hasSideEffects: true,
23604 unsafePoint: true,
23605 reg: regInfo{
23606 inputs: []inputInfo{
23607 {1, 939524095},
23608 {0, 9223372038331170815},
23609 },
23610 outputs: []outputInfo{
23611 {0, 335544319},
23612 },
23613 },
23614 },
23615 {
23616 name: "LoweredAtomicOr32Variant",
23617 argLen: 3,
23618 resultNotInArgs: true,
23619 faultOnNilArg0: true,
23620 hasSideEffects: true,
23621 reg: regInfo{
23622 inputs: []inputInfo{
23623 {1, 939524095},
23624 {0, 9223372038331170815},
23625 },
23626 outputs: []outputInfo{
23627 {0, 335544319},
23628 },
23629 },
23630 },
23631 {
23632 name: "LoweredWB",
23633 auxType: auxInt64,
23634 argLen: 1,
23635 clobberFlags: true,
23636 reg: regInfo{
23637 clobbers: 9223372034975924224,
23638 outputs: []outputInfo{
23639 {0, 16777216},
23640 },
23641 },
23642 },
23643 {
23644 name: "LoweredPanicBoundsA",
23645 auxType: auxInt64,
23646 argLen: 3,
23647 call: true,
23648 reg: regInfo{
23649 inputs: []inputInfo{
23650 {0, 4},
23651 {1, 8},
23652 },
23653 },
23654 },
23655 {
23656 name: "LoweredPanicBoundsB",
23657 auxType: auxInt64,
23658 argLen: 3,
23659 call: true,
23660 reg: regInfo{
23661 inputs: []inputInfo{
23662 {0, 2},
23663 {1, 4},
23664 },
23665 },
23666 },
23667 {
23668 name: "LoweredPanicBoundsC",
23669 auxType: auxInt64,
23670 argLen: 3,
23671 call: true,
23672 reg: regInfo{
23673 inputs: []inputInfo{
23674 {0, 1},
23675 {1, 2},
23676 },
23677 },
23678 },
23679 {
23680 name: "PRFM",
23681 auxType: auxInt64,
23682 argLen: 2,
23683 hasSideEffects: true,
23684 asm: arm64.APRFM,
23685 reg: regInfo{
23686 inputs: []inputInfo{
23687 {0, 9223372038331170815},
23688 },
23689 },
23690 },
23691 {
23692 name: "DMB",
23693 auxType: auxInt64,
23694 argLen: 1,
23695 hasSideEffects: true,
23696 asm: arm64.ADMB,
23697 reg: regInfo{},
23698 },
23699 {
23700 name: "ZERO",
23701 argLen: 0,
23702 zeroWidth: true,
23703 fixedReg: true,
23704 reg: regInfo{},
23705 },
23706
23707 {
23708 name: "NEGV",
23709 argLen: 1,
23710 reg: regInfo{
23711 inputs: []inputInfo{
23712 {0, 1073741816},
23713 },
23714 outputs: []outputInfo{
23715 {0, 1071644664},
23716 },
23717 },
23718 },
23719 {
23720 name: "NEGF",
23721 argLen: 1,
23722 asm: loong64.ANEGF,
23723 reg: regInfo{
23724 inputs: []inputInfo{
23725 {0, 4611686017353646080},
23726 },
23727 outputs: []outputInfo{
23728 {0, 4611686017353646080},
23729 },
23730 },
23731 },
23732 {
23733 name: "NEGD",
23734 argLen: 1,
23735 asm: loong64.ANEGD,
23736 reg: regInfo{
23737 inputs: []inputInfo{
23738 {0, 4611686017353646080},
23739 },
23740 outputs: []outputInfo{
23741 {0, 4611686017353646080},
23742 },
23743 },
23744 },
23745 {
23746 name: "SQRTD",
23747 argLen: 1,
23748 asm: loong64.ASQRTD,
23749 reg: regInfo{
23750 inputs: []inputInfo{
23751 {0, 4611686017353646080},
23752 },
23753 outputs: []outputInfo{
23754 {0, 4611686017353646080},
23755 },
23756 },
23757 },
23758 {
23759 name: "SQRTF",
23760 argLen: 1,
23761 asm: loong64.ASQRTF,
23762 reg: regInfo{
23763 inputs: []inputInfo{
23764 {0, 4611686017353646080},
23765 },
23766 outputs: []outputInfo{
23767 {0, 4611686017353646080},
23768 },
23769 },
23770 },
23771 {
23772 name: "ABSD",
23773 argLen: 1,
23774 asm: loong64.AABSD,
23775 reg: regInfo{
23776 inputs: []inputInfo{
23777 {0, 4611686017353646080},
23778 },
23779 outputs: []outputInfo{
23780 {0, 4611686017353646080},
23781 },
23782 },
23783 },
23784 {
23785 name: "CLZW",
23786 argLen: 1,
23787 asm: loong64.ACLZW,
23788 reg: regInfo{
23789 inputs: []inputInfo{
23790 {0, 1073741816},
23791 },
23792 outputs: []outputInfo{
23793 {0, 1071644664},
23794 },
23795 },
23796 },
23797 {
23798 name: "CLZV",
23799 argLen: 1,
23800 asm: loong64.ACLZV,
23801 reg: regInfo{
23802 inputs: []inputInfo{
23803 {0, 1073741816},
23804 },
23805 outputs: []outputInfo{
23806 {0, 1071644664},
23807 },
23808 },
23809 },
23810 {
23811 name: "CTZW",
23812 argLen: 1,
23813 asm: loong64.ACTZW,
23814 reg: regInfo{
23815 inputs: []inputInfo{
23816 {0, 1073741816},
23817 },
23818 outputs: []outputInfo{
23819 {0, 1071644664},
23820 },
23821 },
23822 },
23823 {
23824 name: "CTZV",
23825 argLen: 1,
23826 asm: loong64.ACTZV,
23827 reg: regInfo{
23828 inputs: []inputInfo{
23829 {0, 1073741816},
23830 },
23831 outputs: []outputInfo{
23832 {0, 1071644664},
23833 },
23834 },
23835 },
23836 {
23837 name: "REVB2H",
23838 argLen: 1,
23839 asm: loong64.AREVB2H,
23840 reg: regInfo{
23841 inputs: []inputInfo{
23842 {0, 1073741816},
23843 },
23844 outputs: []outputInfo{
23845 {0, 1071644664},
23846 },
23847 },
23848 },
23849 {
23850 name: "REVB2W",
23851 argLen: 1,
23852 asm: loong64.AREVB2W,
23853 reg: regInfo{
23854 inputs: []inputInfo{
23855 {0, 1073741816},
23856 },
23857 outputs: []outputInfo{
23858 {0, 1071644664},
23859 },
23860 },
23861 },
23862 {
23863 name: "REVBV",
23864 argLen: 1,
23865 asm: loong64.AREVBV,
23866 reg: regInfo{
23867 inputs: []inputInfo{
23868 {0, 1073741816},
23869 },
23870 outputs: []outputInfo{
23871 {0, 1071644664},
23872 },
23873 },
23874 },
23875 {
23876 name: "BITREV4B",
23877 argLen: 1,
23878 asm: loong64.ABITREV4B,
23879 reg: regInfo{
23880 inputs: []inputInfo{
23881 {0, 1073741816},
23882 },
23883 outputs: []outputInfo{
23884 {0, 1071644664},
23885 },
23886 },
23887 },
23888 {
23889 name: "BITREVW",
23890 argLen: 1,
23891 asm: loong64.ABITREVW,
23892 reg: regInfo{
23893 inputs: []inputInfo{
23894 {0, 1073741816},
23895 },
23896 outputs: []outputInfo{
23897 {0, 1071644664},
23898 },
23899 },
23900 },
23901 {
23902 name: "BITREVV",
23903 argLen: 1,
23904 asm: loong64.ABITREVV,
23905 reg: regInfo{
23906 inputs: []inputInfo{
23907 {0, 1073741816},
23908 },
23909 outputs: []outputInfo{
23910 {0, 1071644664},
23911 },
23912 },
23913 },
23914 {
23915 name: "VPCNT64",
23916 argLen: 1,
23917 asm: loong64.AVPCNTV,
23918 reg: regInfo{
23919 inputs: []inputInfo{
23920 {0, 4611686017353646080},
23921 },
23922 outputs: []outputInfo{
23923 {0, 4611686017353646080},
23924 },
23925 },
23926 },
23927 {
23928 name: "VPCNT32",
23929 argLen: 1,
23930 asm: loong64.AVPCNTW,
23931 reg: regInfo{
23932 inputs: []inputInfo{
23933 {0, 4611686017353646080},
23934 },
23935 outputs: []outputInfo{
23936 {0, 4611686017353646080},
23937 },
23938 },
23939 },
23940 {
23941 name: "VPCNT16",
23942 argLen: 1,
23943 asm: loong64.AVPCNTH,
23944 reg: regInfo{
23945 inputs: []inputInfo{
23946 {0, 4611686017353646080},
23947 },
23948 outputs: []outputInfo{
23949 {0, 4611686017353646080},
23950 },
23951 },
23952 },
23953 {
23954 name: "ADDV",
23955 argLen: 2,
23956 commutative: true,
23957 asm: loong64.AADDVU,
23958 reg: regInfo{
23959 inputs: []inputInfo{
23960 {0, 1073741816},
23961 {1, 1073741816},
23962 },
23963 outputs: []outputInfo{
23964 {0, 1071644664},
23965 },
23966 },
23967 },
23968 {
23969 name: "ADDVconst",
23970 auxType: auxInt64,
23971 argLen: 1,
23972 asm: loong64.AADDVU,
23973 reg: regInfo{
23974 inputs: []inputInfo{
23975 {0, 1073741820},
23976 },
23977 outputs: []outputInfo{
23978 {0, 1071644664},
23979 },
23980 },
23981 },
23982 {
23983 name: "SUBV",
23984 argLen: 2,
23985 asm: loong64.ASUBVU,
23986 reg: regInfo{
23987 inputs: []inputInfo{
23988 {0, 1073741816},
23989 {1, 1073741816},
23990 },
23991 outputs: []outputInfo{
23992 {0, 1071644664},
23993 },
23994 },
23995 },
23996 {
23997 name: "SUBVconst",
23998 auxType: auxInt64,
23999 argLen: 1,
24000 asm: loong64.ASUBVU,
24001 reg: regInfo{
24002 inputs: []inputInfo{
24003 {0, 1073741816},
24004 },
24005 outputs: []outputInfo{
24006 {0, 1071644664},
24007 },
24008 },
24009 },
24010 {
24011 name: "MULV",
24012 argLen: 2,
24013 commutative: true,
24014 asm: loong64.AMULV,
24015 reg: regInfo{
24016 inputs: []inputInfo{
24017 {0, 1073741816},
24018 {1, 1073741816},
24019 },
24020 outputs: []outputInfo{
24021 {0, 1071644664},
24022 },
24023 },
24024 },
24025 {
24026 name: "MULHV",
24027 argLen: 2,
24028 commutative: true,
24029 asm: loong64.AMULHV,
24030 reg: regInfo{
24031 inputs: []inputInfo{
24032 {0, 1073741816},
24033 {1, 1073741816},
24034 },
24035 outputs: []outputInfo{
24036 {0, 1071644664},
24037 },
24038 },
24039 },
24040 {
24041 name: "MULHVU",
24042 argLen: 2,
24043 commutative: true,
24044 asm: loong64.AMULHVU,
24045 reg: regInfo{
24046 inputs: []inputInfo{
24047 {0, 1073741816},
24048 {1, 1073741816},
24049 },
24050 outputs: []outputInfo{
24051 {0, 1071644664},
24052 },
24053 },
24054 },
24055 {
24056 name: "DIVV",
24057 argLen: 2,
24058 asm: loong64.ADIVV,
24059 reg: regInfo{
24060 inputs: []inputInfo{
24061 {0, 1073741816},
24062 {1, 1073741816},
24063 },
24064 outputs: []outputInfo{
24065 {0, 1071644664},
24066 },
24067 },
24068 },
24069 {
24070 name: "DIVVU",
24071 argLen: 2,
24072 asm: loong64.ADIVVU,
24073 reg: regInfo{
24074 inputs: []inputInfo{
24075 {0, 1073741816},
24076 {1, 1073741816},
24077 },
24078 outputs: []outputInfo{
24079 {0, 1071644664},
24080 },
24081 },
24082 },
24083 {
24084 name: "REMV",
24085 argLen: 2,
24086 asm: loong64.AREMV,
24087 reg: regInfo{
24088 inputs: []inputInfo{
24089 {0, 1073741816},
24090 {1, 1073741816},
24091 },
24092 outputs: []outputInfo{
24093 {0, 1071644664},
24094 },
24095 },
24096 },
24097 {
24098 name: "REMVU",
24099 argLen: 2,
24100 asm: loong64.AREMVU,
24101 reg: regInfo{
24102 inputs: []inputInfo{
24103 {0, 1073741816},
24104 {1, 1073741816},
24105 },
24106 outputs: []outputInfo{
24107 {0, 1071644664},
24108 },
24109 },
24110 },
24111 {
24112 name: "ADDF",
24113 argLen: 2,
24114 commutative: true,
24115 asm: loong64.AADDF,
24116 reg: regInfo{
24117 inputs: []inputInfo{
24118 {0, 4611686017353646080},
24119 {1, 4611686017353646080},
24120 },
24121 outputs: []outputInfo{
24122 {0, 4611686017353646080},
24123 },
24124 },
24125 },
24126 {
24127 name: "ADDD",
24128 argLen: 2,
24129 commutative: true,
24130 asm: loong64.AADDD,
24131 reg: regInfo{
24132 inputs: []inputInfo{
24133 {0, 4611686017353646080},
24134 {1, 4611686017353646080},
24135 },
24136 outputs: []outputInfo{
24137 {0, 4611686017353646080},
24138 },
24139 },
24140 },
24141 {
24142 name: "SUBF",
24143 argLen: 2,
24144 asm: loong64.ASUBF,
24145 reg: regInfo{
24146 inputs: []inputInfo{
24147 {0, 4611686017353646080},
24148 {1, 4611686017353646080},
24149 },
24150 outputs: []outputInfo{
24151 {0, 4611686017353646080},
24152 },
24153 },
24154 },
24155 {
24156 name: "SUBD",
24157 argLen: 2,
24158 asm: loong64.ASUBD,
24159 reg: regInfo{
24160 inputs: []inputInfo{
24161 {0, 4611686017353646080},
24162 {1, 4611686017353646080},
24163 },
24164 outputs: []outputInfo{
24165 {0, 4611686017353646080},
24166 },
24167 },
24168 },
24169 {
24170 name: "MULF",
24171 argLen: 2,
24172 commutative: true,
24173 asm: loong64.AMULF,
24174 reg: regInfo{
24175 inputs: []inputInfo{
24176 {0, 4611686017353646080},
24177 {1, 4611686017353646080},
24178 },
24179 outputs: []outputInfo{
24180 {0, 4611686017353646080},
24181 },
24182 },
24183 },
24184 {
24185 name: "MULD",
24186 argLen: 2,
24187 commutative: true,
24188 asm: loong64.AMULD,
24189 reg: regInfo{
24190 inputs: []inputInfo{
24191 {0, 4611686017353646080},
24192 {1, 4611686017353646080},
24193 },
24194 outputs: []outputInfo{
24195 {0, 4611686017353646080},
24196 },
24197 },
24198 },
24199 {
24200 name: "DIVF",
24201 argLen: 2,
24202 asm: loong64.ADIVF,
24203 reg: regInfo{
24204 inputs: []inputInfo{
24205 {0, 4611686017353646080},
24206 {1, 4611686017353646080},
24207 },
24208 outputs: []outputInfo{
24209 {0, 4611686017353646080},
24210 },
24211 },
24212 },
24213 {
24214 name: "DIVD",
24215 argLen: 2,
24216 asm: loong64.ADIVD,
24217 reg: regInfo{
24218 inputs: []inputInfo{
24219 {0, 4611686017353646080},
24220 {1, 4611686017353646080},
24221 },
24222 outputs: []outputInfo{
24223 {0, 4611686017353646080},
24224 },
24225 },
24226 },
24227 {
24228 name: "AND",
24229 argLen: 2,
24230 commutative: true,
24231 asm: loong64.AAND,
24232 reg: regInfo{
24233 inputs: []inputInfo{
24234 {0, 1073741816},
24235 {1, 1073741816},
24236 },
24237 outputs: []outputInfo{
24238 {0, 1071644664},
24239 },
24240 },
24241 },
24242 {
24243 name: "ANDconst",
24244 auxType: auxInt64,
24245 argLen: 1,
24246 asm: loong64.AAND,
24247 reg: regInfo{
24248 inputs: []inputInfo{
24249 {0, 1073741816},
24250 },
24251 outputs: []outputInfo{
24252 {0, 1071644664},
24253 },
24254 },
24255 },
24256 {
24257 name: "OR",
24258 argLen: 2,
24259 commutative: true,
24260 asm: loong64.AOR,
24261 reg: regInfo{
24262 inputs: []inputInfo{
24263 {0, 1073741816},
24264 {1, 1073741816},
24265 },
24266 outputs: []outputInfo{
24267 {0, 1071644664},
24268 },
24269 },
24270 },
24271 {
24272 name: "ORconst",
24273 auxType: auxInt64,
24274 argLen: 1,
24275 asm: loong64.AOR,
24276 reg: regInfo{
24277 inputs: []inputInfo{
24278 {0, 1073741816},
24279 },
24280 outputs: []outputInfo{
24281 {0, 1071644664},
24282 },
24283 },
24284 },
24285 {
24286 name: "XOR",
24287 argLen: 2,
24288 commutative: true,
24289 asm: loong64.AXOR,
24290 reg: regInfo{
24291 inputs: []inputInfo{
24292 {0, 1073741816},
24293 {1, 1073741816},
24294 },
24295 outputs: []outputInfo{
24296 {0, 1071644664},
24297 },
24298 },
24299 },
24300 {
24301 name: "XORconst",
24302 auxType: auxInt64,
24303 argLen: 1,
24304 asm: loong64.AXOR,
24305 reg: regInfo{
24306 inputs: []inputInfo{
24307 {0, 1073741816},
24308 },
24309 outputs: []outputInfo{
24310 {0, 1071644664},
24311 },
24312 },
24313 },
24314 {
24315 name: "NOR",
24316 argLen: 2,
24317 commutative: true,
24318 asm: loong64.ANOR,
24319 reg: regInfo{
24320 inputs: []inputInfo{
24321 {0, 1073741816},
24322 {1, 1073741816},
24323 },
24324 outputs: []outputInfo{
24325 {0, 1071644664},
24326 },
24327 },
24328 },
24329 {
24330 name: "NORconst",
24331 auxType: auxInt64,
24332 argLen: 1,
24333 asm: loong64.ANOR,
24334 reg: regInfo{
24335 inputs: []inputInfo{
24336 {0, 1073741816},
24337 },
24338 outputs: []outputInfo{
24339 {0, 1071644664},
24340 },
24341 },
24342 },
24343 {
24344 name: "FMADDF",
24345 argLen: 3,
24346 commutative: true,
24347 asm: loong64.AFMADDF,
24348 reg: regInfo{
24349 inputs: []inputInfo{
24350 {0, 4611686017353646080},
24351 {1, 4611686017353646080},
24352 {2, 4611686017353646080},
24353 },
24354 outputs: []outputInfo{
24355 {0, 4611686017353646080},
24356 },
24357 },
24358 },
24359 {
24360 name: "FMADDD",
24361 argLen: 3,
24362 commutative: true,
24363 asm: loong64.AFMADDD,
24364 reg: regInfo{
24365 inputs: []inputInfo{
24366 {0, 4611686017353646080},
24367 {1, 4611686017353646080},
24368 {2, 4611686017353646080},
24369 },
24370 outputs: []outputInfo{
24371 {0, 4611686017353646080},
24372 },
24373 },
24374 },
24375 {
24376 name: "FMSUBF",
24377 argLen: 3,
24378 commutative: true,
24379 asm: loong64.AFMSUBF,
24380 reg: regInfo{
24381 inputs: []inputInfo{
24382 {0, 4611686017353646080},
24383 {1, 4611686017353646080},
24384 {2, 4611686017353646080},
24385 },
24386 outputs: []outputInfo{
24387 {0, 4611686017353646080},
24388 },
24389 },
24390 },
24391 {
24392 name: "FMSUBD",
24393 argLen: 3,
24394 commutative: true,
24395 asm: loong64.AFMSUBD,
24396 reg: regInfo{
24397 inputs: []inputInfo{
24398 {0, 4611686017353646080},
24399 {1, 4611686017353646080},
24400 {2, 4611686017353646080},
24401 },
24402 outputs: []outputInfo{
24403 {0, 4611686017353646080},
24404 },
24405 },
24406 },
24407 {
24408 name: "FNMADDF",
24409 argLen: 3,
24410 commutative: true,
24411 asm: loong64.AFNMADDF,
24412 reg: regInfo{
24413 inputs: []inputInfo{
24414 {0, 4611686017353646080},
24415 {1, 4611686017353646080},
24416 {2, 4611686017353646080},
24417 },
24418 outputs: []outputInfo{
24419 {0, 4611686017353646080},
24420 },
24421 },
24422 },
24423 {
24424 name: "FNMADDD",
24425 argLen: 3,
24426 commutative: true,
24427 asm: loong64.AFNMADDD,
24428 reg: regInfo{
24429 inputs: []inputInfo{
24430 {0, 4611686017353646080},
24431 {1, 4611686017353646080},
24432 {2, 4611686017353646080},
24433 },
24434 outputs: []outputInfo{
24435 {0, 4611686017353646080},
24436 },
24437 },
24438 },
24439 {
24440 name: "FNMSUBF",
24441 argLen: 3,
24442 commutative: true,
24443 asm: loong64.AFNMSUBF,
24444 reg: regInfo{
24445 inputs: []inputInfo{
24446 {0, 4611686017353646080},
24447 {1, 4611686017353646080},
24448 {2, 4611686017353646080},
24449 },
24450 outputs: []outputInfo{
24451 {0, 4611686017353646080},
24452 },
24453 },
24454 },
24455 {
24456 name: "FNMSUBD",
24457 argLen: 3,
24458 commutative: true,
24459 asm: loong64.AFNMSUBD,
24460 reg: regInfo{
24461 inputs: []inputInfo{
24462 {0, 4611686017353646080},
24463 {1, 4611686017353646080},
24464 {2, 4611686017353646080},
24465 },
24466 outputs: []outputInfo{
24467 {0, 4611686017353646080},
24468 },
24469 },
24470 },
24471 {
24472 name: "FMINF",
24473 argLen: 2,
24474 commutative: true,
24475 resultNotInArgs: true,
24476 asm: loong64.AFMINF,
24477 reg: regInfo{
24478 inputs: []inputInfo{
24479 {0, 4611686017353646080},
24480 {1, 4611686017353646080},
24481 },
24482 outputs: []outputInfo{
24483 {0, 4611686017353646080},
24484 },
24485 },
24486 },
24487 {
24488 name: "FMIND",
24489 argLen: 2,
24490 commutative: true,
24491 resultNotInArgs: true,
24492 asm: loong64.AFMIND,
24493 reg: regInfo{
24494 inputs: []inputInfo{
24495 {0, 4611686017353646080},
24496 {1, 4611686017353646080},
24497 },
24498 outputs: []outputInfo{
24499 {0, 4611686017353646080},
24500 },
24501 },
24502 },
24503 {
24504 name: "FMAXF",
24505 argLen: 2,
24506 commutative: true,
24507 resultNotInArgs: true,
24508 asm: loong64.AFMAXF,
24509 reg: regInfo{
24510 inputs: []inputInfo{
24511 {0, 4611686017353646080},
24512 {1, 4611686017353646080},
24513 },
24514 outputs: []outputInfo{
24515 {0, 4611686017353646080},
24516 },
24517 },
24518 },
24519 {
24520 name: "FMAXD",
24521 argLen: 2,
24522 commutative: true,
24523 resultNotInArgs: true,
24524 asm: loong64.AFMAXD,
24525 reg: regInfo{
24526 inputs: []inputInfo{
24527 {0, 4611686017353646080},
24528 {1, 4611686017353646080},
24529 },
24530 outputs: []outputInfo{
24531 {0, 4611686017353646080},
24532 },
24533 },
24534 },
24535 {
24536 name: "MASKEQZ",
24537 argLen: 2,
24538 asm: loong64.AMASKEQZ,
24539 reg: regInfo{
24540 inputs: []inputInfo{
24541 {0, 1073741816},
24542 {1, 1073741816},
24543 },
24544 outputs: []outputInfo{
24545 {0, 1071644664},
24546 },
24547 },
24548 },
24549 {
24550 name: "MASKNEZ",
24551 argLen: 2,
24552 asm: loong64.AMASKNEZ,
24553 reg: regInfo{
24554 inputs: []inputInfo{
24555 {0, 1073741816},
24556 {1, 1073741816},
24557 },
24558 outputs: []outputInfo{
24559 {0, 1071644664},
24560 },
24561 },
24562 },
24563 {
24564 name: "FCOPYSGD",
24565 argLen: 2,
24566 asm: loong64.AFCOPYSGD,
24567 reg: regInfo{
24568 inputs: []inputInfo{
24569 {0, 4611686017353646080},
24570 {1, 4611686017353646080},
24571 },
24572 outputs: []outputInfo{
24573 {0, 4611686017353646080},
24574 },
24575 },
24576 },
24577 {
24578 name: "SLL",
24579 argLen: 2,
24580 asm: loong64.ASLL,
24581 reg: regInfo{
24582 inputs: []inputInfo{
24583 {0, 1073741816},
24584 {1, 1073741816},
24585 },
24586 outputs: []outputInfo{
24587 {0, 1071644664},
24588 },
24589 },
24590 },
24591 {
24592 name: "SLLV",
24593 argLen: 2,
24594 asm: loong64.ASLLV,
24595 reg: regInfo{
24596 inputs: []inputInfo{
24597 {0, 1073741816},
24598 {1, 1073741816},
24599 },
24600 outputs: []outputInfo{
24601 {0, 1071644664},
24602 },
24603 },
24604 },
24605 {
24606 name: "SLLconst",
24607 auxType: auxInt64,
24608 argLen: 1,
24609 asm: loong64.ASLL,
24610 reg: regInfo{
24611 inputs: []inputInfo{
24612 {0, 1073741816},
24613 },
24614 outputs: []outputInfo{
24615 {0, 1071644664},
24616 },
24617 },
24618 },
24619 {
24620 name: "SLLVconst",
24621 auxType: auxInt64,
24622 argLen: 1,
24623 asm: loong64.ASLLV,
24624 reg: regInfo{
24625 inputs: []inputInfo{
24626 {0, 1073741816},
24627 },
24628 outputs: []outputInfo{
24629 {0, 1071644664},
24630 },
24631 },
24632 },
24633 {
24634 name: "SRL",
24635 argLen: 2,
24636 asm: loong64.ASRL,
24637 reg: regInfo{
24638 inputs: []inputInfo{
24639 {0, 1073741816},
24640 {1, 1073741816},
24641 },
24642 outputs: []outputInfo{
24643 {0, 1071644664},
24644 },
24645 },
24646 },
24647 {
24648 name: "SRLV",
24649 argLen: 2,
24650 asm: loong64.ASRLV,
24651 reg: regInfo{
24652 inputs: []inputInfo{
24653 {0, 1073741816},
24654 {1, 1073741816},
24655 },
24656 outputs: []outputInfo{
24657 {0, 1071644664},
24658 },
24659 },
24660 },
24661 {
24662 name: "SRLconst",
24663 auxType: auxInt64,
24664 argLen: 1,
24665 asm: loong64.ASRL,
24666 reg: regInfo{
24667 inputs: []inputInfo{
24668 {0, 1073741816},
24669 },
24670 outputs: []outputInfo{
24671 {0, 1071644664},
24672 },
24673 },
24674 },
24675 {
24676 name: "SRLVconst",
24677 auxType: auxInt64,
24678 argLen: 1,
24679 asm: loong64.ASRLV,
24680 reg: regInfo{
24681 inputs: []inputInfo{
24682 {0, 1073741816},
24683 },
24684 outputs: []outputInfo{
24685 {0, 1071644664},
24686 },
24687 },
24688 },
24689 {
24690 name: "SRA",
24691 argLen: 2,
24692 asm: loong64.ASRA,
24693 reg: regInfo{
24694 inputs: []inputInfo{
24695 {0, 1073741816},
24696 {1, 1073741816},
24697 },
24698 outputs: []outputInfo{
24699 {0, 1071644664},
24700 },
24701 },
24702 },
24703 {
24704 name: "SRAV",
24705 argLen: 2,
24706 asm: loong64.ASRAV,
24707 reg: regInfo{
24708 inputs: []inputInfo{
24709 {0, 1073741816},
24710 {1, 1073741816},
24711 },
24712 outputs: []outputInfo{
24713 {0, 1071644664},
24714 },
24715 },
24716 },
24717 {
24718 name: "SRAconst",
24719 auxType: auxInt64,
24720 argLen: 1,
24721 asm: loong64.ASRA,
24722 reg: regInfo{
24723 inputs: []inputInfo{
24724 {0, 1073741816},
24725 },
24726 outputs: []outputInfo{
24727 {0, 1071644664},
24728 },
24729 },
24730 },
24731 {
24732 name: "SRAVconst",
24733 auxType: auxInt64,
24734 argLen: 1,
24735 asm: loong64.ASRAV,
24736 reg: regInfo{
24737 inputs: []inputInfo{
24738 {0, 1073741816},
24739 },
24740 outputs: []outputInfo{
24741 {0, 1071644664},
24742 },
24743 },
24744 },
24745 {
24746 name: "ROTR",
24747 argLen: 2,
24748 asm: loong64.AROTR,
24749 reg: regInfo{
24750 inputs: []inputInfo{
24751 {0, 1073741816},
24752 {1, 1073741816},
24753 },
24754 outputs: []outputInfo{
24755 {0, 1071644664},
24756 },
24757 },
24758 },
24759 {
24760 name: "ROTRV",
24761 argLen: 2,
24762 asm: loong64.AROTRV,
24763 reg: regInfo{
24764 inputs: []inputInfo{
24765 {0, 1073741816},
24766 {1, 1073741816},
24767 },
24768 outputs: []outputInfo{
24769 {0, 1071644664},
24770 },
24771 },
24772 },
24773 {
24774 name: "ROTRconst",
24775 auxType: auxInt64,
24776 argLen: 1,
24777 asm: loong64.AROTR,
24778 reg: regInfo{
24779 inputs: []inputInfo{
24780 {0, 1073741816},
24781 },
24782 outputs: []outputInfo{
24783 {0, 1071644664},
24784 },
24785 },
24786 },
24787 {
24788 name: "ROTRVconst",
24789 auxType: auxInt64,
24790 argLen: 1,
24791 asm: loong64.AROTRV,
24792 reg: regInfo{
24793 inputs: []inputInfo{
24794 {0, 1073741816},
24795 },
24796 outputs: []outputInfo{
24797 {0, 1071644664},
24798 },
24799 },
24800 },
24801 {
24802 name: "SGT",
24803 argLen: 2,
24804 asm: loong64.ASGT,
24805 reg: regInfo{
24806 inputs: []inputInfo{
24807 {0, 1073741816},
24808 {1, 1073741816},
24809 },
24810 outputs: []outputInfo{
24811 {0, 1071644664},
24812 },
24813 },
24814 },
24815 {
24816 name: "SGTconst",
24817 auxType: auxInt64,
24818 argLen: 1,
24819 asm: loong64.ASGT,
24820 reg: regInfo{
24821 inputs: []inputInfo{
24822 {0, 1073741816},
24823 },
24824 outputs: []outputInfo{
24825 {0, 1071644664},
24826 },
24827 },
24828 },
24829 {
24830 name: "SGTU",
24831 argLen: 2,
24832 asm: loong64.ASGTU,
24833 reg: regInfo{
24834 inputs: []inputInfo{
24835 {0, 1073741816},
24836 {1, 1073741816},
24837 },
24838 outputs: []outputInfo{
24839 {0, 1071644664},
24840 },
24841 },
24842 },
24843 {
24844 name: "SGTUconst",
24845 auxType: auxInt64,
24846 argLen: 1,
24847 asm: loong64.ASGTU,
24848 reg: regInfo{
24849 inputs: []inputInfo{
24850 {0, 1073741816},
24851 },
24852 outputs: []outputInfo{
24853 {0, 1071644664},
24854 },
24855 },
24856 },
24857 {
24858 name: "CMPEQF",
24859 argLen: 2,
24860 asm: loong64.ACMPEQF,
24861 reg: regInfo{
24862 inputs: []inputInfo{
24863 {0, 4611686017353646080},
24864 {1, 4611686017353646080},
24865 },
24866 },
24867 },
24868 {
24869 name: "CMPEQD",
24870 argLen: 2,
24871 asm: loong64.ACMPEQD,
24872 reg: regInfo{
24873 inputs: []inputInfo{
24874 {0, 4611686017353646080},
24875 {1, 4611686017353646080},
24876 },
24877 },
24878 },
24879 {
24880 name: "CMPGEF",
24881 argLen: 2,
24882 asm: loong64.ACMPGEF,
24883 reg: regInfo{
24884 inputs: []inputInfo{
24885 {0, 4611686017353646080},
24886 {1, 4611686017353646080},
24887 },
24888 },
24889 },
24890 {
24891 name: "CMPGED",
24892 argLen: 2,
24893 asm: loong64.ACMPGED,
24894 reg: regInfo{
24895 inputs: []inputInfo{
24896 {0, 4611686017353646080},
24897 {1, 4611686017353646080},
24898 },
24899 },
24900 },
24901 {
24902 name: "CMPGTF",
24903 argLen: 2,
24904 asm: loong64.ACMPGTF,
24905 reg: regInfo{
24906 inputs: []inputInfo{
24907 {0, 4611686017353646080},
24908 {1, 4611686017353646080},
24909 },
24910 },
24911 },
24912 {
24913 name: "CMPGTD",
24914 argLen: 2,
24915 asm: loong64.ACMPGTD,
24916 reg: regInfo{
24917 inputs: []inputInfo{
24918 {0, 4611686017353646080},
24919 {1, 4611686017353646080},
24920 },
24921 },
24922 },
24923 {
24924 name: "BSTRPICKW",
24925 auxType: auxInt64,
24926 argLen: 1,
24927 asm: loong64.ABSTRPICKW,
24928 reg: regInfo{
24929 inputs: []inputInfo{
24930 {0, 1073741816},
24931 },
24932 outputs: []outputInfo{
24933 {0, 1071644664},
24934 },
24935 },
24936 },
24937 {
24938 name: "BSTRPICKV",
24939 auxType: auxInt64,
24940 argLen: 1,
24941 asm: loong64.ABSTRPICKV,
24942 reg: regInfo{
24943 inputs: []inputInfo{
24944 {0, 1073741816},
24945 },
24946 outputs: []outputInfo{
24947 {0, 1071644664},
24948 },
24949 },
24950 },
24951 {
24952 name: "MOVVconst",
24953 auxType: auxInt64,
24954 argLen: 0,
24955 rematerializeable: true,
24956 asm: loong64.AMOVV,
24957 reg: regInfo{
24958 outputs: []outputInfo{
24959 {0, 1071644664},
24960 },
24961 },
24962 },
24963 {
24964 name: "MOVFconst",
24965 auxType: auxFloat64,
24966 argLen: 0,
24967 rematerializeable: true,
24968 asm: loong64.AMOVF,
24969 reg: regInfo{
24970 outputs: []outputInfo{
24971 {0, 4611686017353646080},
24972 },
24973 },
24974 },
24975 {
24976 name: "MOVDconst",
24977 auxType: auxFloat64,
24978 argLen: 0,
24979 rematerializeable: true,
24980 asm: loong64.AMOVD,
24981 reg: regInfo{
24982 outputs: []outputInfo{
24983 {0, 4611686017353646080},
24984 },
24985 },
24986 },
24987 {
24988 name: "MOVVaddr",
24989 auxType: auxSymOff,
24990 argLen: 1,
24991 rematerializeable: true,
24992 symEffect: SymAddr,
24993 asm: loong64.AMOVV,
24994 reg: regInfo{
24995 inputs: []inputInfo{
24996 {0, 4611686018427387908},
24997 },
24998 outputs: []outputInfo{
24999 {0, 1071644664},
25000 },
25001 },
25002 },
25003 {
25004 name: "MOVBload",
25005 auxType: auxSymOff,
25006 argLen: 2,
25007 faultOnNilArg0: true,
25008 symEffect: SymRead,
25009 asm: loong64.AMOVB,
25010 reg: regInfo{
25011 inputs: []inputInfo{
25012 {0, 4611686019501129724},
25013 },
25014 outputs: []outputInfo{
25015 {0, 1071644664},
25016 },
25017 },
25018 },
25019 {
25020 name: "MOVBUload",
25021 auxType: auxSymOff,
25022 argLen: 2,
25023 faultOnNilArg0: true,
25024 symEffect: SymRead,
25025 asm: loong64.AMOVBU,
25026 reg: regInfo{
25027 inputs: []inputInfo{
25028 {0, 4611686019501129724},
25029 },
25030 outputs: []outputInfo{
25031 {0, 1071644664},
25032 },
25033 },
25034 },
25035 {
25036 name: "MOVHload",
25037 auxType: auxSymOff,
25038 argLen: 2,
25039 faultOnNilArg0: true,
25040 symEffect: SymRead,
25041 asm: loong64.AMOVH,
25042 reg: regInfo{
25043 inputs: []inputInfo{
25044 {0, 4611686019501129724},
25045 },
25046 outputs: []outputInfo{
25047 {0, 1071644664},
25048 },
25049 },
25050 },
25051 {
25052 name: "MOVHUload",
25053 auxType: auxSymOff,
25054 argLen: 2,
25055 faultOnNilArg0: true,
25056 symEffect: SymRead,
25057 asm: loong64.AMOVHU,
25058 reg: regInfo{
25059 inputs: []inputInfo{
25060 {0, 4611686019501129724},
25061 },
25062 outputs: []outputInfo{
25063 {0, 1071644664},
25064 },
25065 },
25066 },
25067 {
25068 name: "MOVWload",
25069 auxType: auxSymOff,
25070 argLen: 2,
25071 faultOnNilArg0: true,
25072 symEffect: SymRead,
25073 asm: loong64.AMOVW,
25074 reg: regInfo{
25075 inputs: []inputInfo{
25076 {0, 4611686019501129724},
25077 },
25078 outputs: []outputInfo{
25079 {0, 1071644664},
25080 },
25081 },
25082 },
25083 {
25084 name: "MOVWUload",
25085 auxType: auxSymOff,
25086 argLen: 2,
25087 faultOnNilArg0: true,
25088 symEffect: SymRead,
25089 asm: loong64.AMOVWU,
25090 reg: regInfo{
25091 inputs: []inputInfo{
25092 {0, 4611686019501129724},
25093 },
25094 outputs: []outputInfo{
25095 {0, 1071644664},
25096 },
25097 },
25098 },
25099 {
25100 name: "MOVVload",
25101 auxType: auxSymOff,
25102 argLen: 2,
25103 faultOnNilArg0: true,
25104 symEffect: SymRead,
25105 asm: loong64.AMOVV,
25106 reg: regInfo{
25107 inputs: []inputInfo{
25108 {0, 4611686019501129724},
25109 },
25110 outputs: []outputInfo{
25111 {0, 1071644664},
25112 },
25113 },
25114 },
25115 {
25116 name: "MOVFload",
25117 auxType: auxSymOff,
25118 argLen: 2,
25119 faultOnNilArg0: true,
25120 symEffect: SymRead,
25121 asm: loong64.AMOVF,
25122 reg: regInfo{
25123 inputs: []inputInfo{
25124 {0, 4611686019501129724},
25125 },
25126 outputs: []outputInfo{
25127 {0, 4611686017353646080},
25128 },
25129 },
25130 },
25131 {
25132 name: "MOVDload",
25133 auxType: auxSymOff,
25134 argLen: 2,
25135 faultOnNilArg0: true,
25136 symEffect: SymRead,
25137 asm: loong64.AMOVD,
25138 reg: regInfo{
25139 inputs: []inputInfo{
25140 {0, 4611686019501129724},
25141 },
25142 outputs: []outputInfo{
25143 {0, 4611686017353646080},
25144 },
25145 },
25146 },
25147 {
25148 name: "MOVVloadidx",
25149 argLen: 3,
25150 asm: loong64.AMOVV,
25151 reg: regInfo{
25152 inputs: []inputInfo{
25153 {1, 1073741816},
25154 {0, 4611686019501129724},
25155 },
25156 outputs: []outputInfo{
25157 {0, 1071644664},
25158 },
25159 },
25160 },
25161 {
25162 name: "MOVWloadidx",
25163 argLen: 3,
25164 asm: loong64.AMOVW,
25165 reg: regInfo{
25166 inputs: []inputInfo{
25167 {1, 1073741816},
25168 {0, 4611686019501129724},
25169 },
25170 outputs: []outputInfo{
25171 {0, 1071644664},
25172 },
25173 },
25174 },
25175 {
25176 name: "MOVWUloadidx",
25177 argLen: 3,
25178 asm: loong64.AMOVWU,
25179 reg: regInfo{
25180 inputs: []inputInfo{
25181 {1, 1073741816},
25182 {0, 4611686019501129724},
25183 },
25184 outputs: []outputInfo{
25185 {0, 1071644664},
25186 },
25187 },
25188 },
25189 {
25190 name: "MOVHloadidx",
25191 argLen: 3,
25192 asm: loong64.AMOVH,
25193 reg: regInfo{
25194 inputs: []inputInfo{
25195 {1, 1073741816},
25196 {0, 4611686019501129724},
25197 },
25198 outputs: []outputInfo{
25199 {0, 1071644664},
25200 },
25201 },
25202 },
25203 {
25204 name: "MOVHUloadidx",
25205 argLen: 3,
25206 asm: loong64.AMOVHU,
25207 reg: regInfo{
25208 inputs: []inputInfo{
25209 {1, 1073741816},
25210 {0, 4611686019501129724},
25211 },
25212 outputs: []outputInfo{
25213 {0, 1071644664},
25214 },
25215 },
25216 },
25217 {
25218 name: "MOVBloadidx",
25219 argLen: 3,
25220 asm: loong64.AMOVB,
25221 reg: regInfo{
25222 inputs: []inputInfo{
25223 {1, 1073741816},
25224 {0, 4611686019501129724},
25225 },
25226 outputs: []outputInfo{
25227 {0, 1071644664},
25228 },
25229 },
25230 },
25231 {
25232 name: "MOVBUloadidx",
25233 argLen: 3,
25234 asm: loong64.AMOVBU,
25235 reg: regInfo{
25236 inputs: []inputInfo{
25237 {1, 1073741816},
25238 {0, 4611686019501129724},
25239 },
25240 outputs: []outputInfo{
25241 {0, 1071644664},
25242 },
25243 },
25244 },
25245 {
25246 name: "MOVFloadidx",
25247 argLen: 3,
25248 asm: loong64.AMOVF,
25249 reg: regInfo{
25250 inputs: []inputInfo{
25251 {1, 1073741816},
25252 {0, 4611686019501129724},
25253 },
25254 outputs: []outputInfo{
25255 {0, 4611686017353646080},
25256 },
25257 },
25258 },
25259 {
25260 name: "MOVDloadidx",
25261 argLen: 3,
25262 asm: loong64.AMOVD,
25263 reg: regInfo{
25264 inputs: []inputInfo{
25265 {1, 1073741816},
25266 {0, 4611686019501129724},
25267 },
25268 outputs: []outputInfo{
25269 {0, 4611686017353646080},
25270 },
25271 },
25272 },
25273 {
25274 name: "MOVBstore",
25275 auxType: auxSymOff,
25276 argLen: 3,
25277 faultOnNilArg0: true,
25278 symEffect: SymWrite,
25279 asm: loong64.AMOVB,
25280 reg: regInfo{
25281 inputs: []inputInfo{
25282 {1, 1073741816},
25283 {0, 4611686019501129724},
25284 },
25285 },
25286 },
25287 {
25288 name: "MOVHstore",
25289 auxType: auxSymOff,
25290 argLen: 3,
25291 faultOnNilArg0: true,
25292 symEffect: SymWrite,
25293 asm: loong64.AMOVH,
25294 reg: regInfo{
25295 inputs: []inputInfo{
25296 {1, 1073741816},
25297 {0, 4611686019501129724},
25298 },
25299 },
25300 },
25301 {
25302 name: "MOVWstore",
25303 auxType: auxSymOff,
25304 argLen: 3,
25305 faultOnNilArg0: true,
25306 symEffect: SymWrite,
25307 asm: loong64.AMOVW,
25308 reg: regInfo{
25309 inputs: []inputInfo{
25310 {1, 1073741816},
25311 {0, 4611686019501129724},
25312 },
25313 },
25314 },
25315 {
25316 name: "MOVVstore",
25317 auxType: auxSymOff,
25318 argLen: 3,
25319 faultOnNilArg0: true,
25320 symEffect: SymWrite,
25321 asm: loong64.AMOVV,
25322 reg: regInfo{
25323 inputs: []inputInfo{
25324 {1, 1073741816},
25325 {0, 4611686019501129724},
25326 },
25327 },
25328 },
25329 {
25330 name: "MOVFstore",
25331 auxType: auxSymOff,
25332 argLen: 3,
25333 faultOnNilArg0: true,
25334 symEffect: SymWrite,
25335 asm: loong64.AMOVF,
25336 reg: regInfo{
25337 inputs: []inputInfo{
25338 {0, 4611686019501129724},
25339 {1, 4611686017353646080},
25340 },
25341 },
25342 },
25343 {
25344 name: "MOVDstore",
25345 auxType: auxSymOff,
25346 argLen: 3,
25347 faultOnNilArg0: true,
25348 symEffect: SymWrite,
25349 asm: loong64.AMOVD,
25350 reg: regInfo{
25351 inputs: []inputInfo{
25352 {0, 4611686019501129724},
25353 {1, 4611686017353646080},
25354 },
25355 },
25356 },
25357 {
25358 name: "MOVBstoreidx",
25359 argLen: 4,
25360 asm: loong64.AMOVB,
25361 reg: regInfo{
25362 inputs: []inputInfo{
25363 {1, 1073741816},
25364 {2, 1073741816},
25365 {0, 4611686019501129724},
25366 },
25367 },
25368 },
25369 {
25370 name: "MOVHstoreidx",
25371 argLen: 4,
25372 asm: loong64.AMOVH,
25373 reg: regInfo{
25374 inputs: []inputInfo{
25375 {1, 1073741816},
25376 {2, 1073741816},
25377 {0, 4611686019501129724},
25378 },
25379 },
25380 },
25381 {
25382 name: "MOVWstoreidx",
25383 argLen: 4,
25384 asm: loong64.AMOVW,
25385 reg: regInfo{
25386 inputs: []inputInfo{
25387 {1, 1073741816},
25388 {2, 1073741816},
25389 {0, 4611686019501129724},
25390 },
25391 },
25392 },
25393 {
25394 name: "MOVVstoreidx",
25395 argLen: 4,
25396 asm: loong64.AMOVV,
25397 reg: regInfo{
25398 inputs: []inputInfo{
25399 {1, 1073741816},
25400 {2, 1073741816},
25401 {0, 4611686019501129724},
25402 },
25403 },
25404 },
25405 {
25406 name: "MOVFstoreidx",
25407 argLen: 4,
25408 asm: loong64.AMOVF,
25409 reg: regInfo{
25410 inputs: []inputInfo{
25411 {1, 1073741816},
25412 {0, 4611686019501129724},
25413 {2, 4611686017353646080},
25414 },
25415 },
25416 },
25417 {
25418 name: "MOVDstoreidx",
25419 argLen: 4,
25420 asm: loong64.AMOVD,
25421 reg: regInfo{
25422 inputs: []inputInfo{
25423 {1, 1073741816},
25424 {0, 4611686019501129724},
25425 {2, 4611686017353646080},
25426 },
25427 },
25428 },
25429 {
25430 name: "MOVBstorezero",
25431 auxType: auxSymOff,
25432 argLen: 2,
25433 faultOnNilArg0: true,
25434 symEffect: SymWrite,
25435 asm: loong64.AMOVB,
25436 reg: regInfo{
25437 inputs: []inputInfo{
25438 {0, 4611686019501129724},
25439 },
25440 },
25441 },
25442 {
25443 name: "MOVHstorezero",
25444 auxType: auxSymOff,
25445 argLen: 2,
25446 faultOnNilArg0: true,
25447 symEffect: SymWrite,
25448 asm: loong64.AMOVH,
25449 reg: regInfo{
25450 inputs: []inputInfo{
25451 {0, 4611686019501129724},
25452 },
25453 },
25454 },
25455 {
25456 name: "MOVWstorezero",
25457 auxType: auxSymOff,
25458 argLen: 2,
25459 faultOnNilArg0: true,
25460 symEffect: SymWrite,
25461 asm: loong64.AMOVW,
25462 reg: regInfo{
25463 inputs: []inputInfo{
25464 {0, 4611686019501129724},
25465 },
25466 },
25467 },
25468 {
25469 name: "MOVVstorezero",
25470 auxType: auxSymOff,
25471 argLen: 2,
25472 faultOnNilArg0: true,
25473 symEffect: SymWrite,
25474 asm: loong64.AMOVV,
25475 reg: regInfo{
25476 inputs: []inputInfo{
25477 {0, 4611686019501129724},
25478 },
25479 },
25480 },
25481 {
25482 name: "MOVBstorezeroidx",
25483 argLen: 3,
25484 asm: loong64.AMOVB,
25485 reg: regInfo{
25486 inputs: []inputInfo{
25487 {1, 1073741816},
25488 {0, 4611686019501129724},
25489 },
25490 },
25491 },
25492 {
25493 name: "MOVHstorezeroidx",
25494 argLen: 3,
25495 asm: loong64.AMOVH,
25496 reg: regInfo{
25497 inputs: []inputInfo{
25498 {1, 1073741816},
25499 {0, 4611686019501129724},
25500 },
25501 },
25502 },
25503 {
25504 name: "MOVWstorezeroidx",
25505 argLen: 3,
25506 asm: loong64.AMOVW,
25507 reg: regInfo{
25508 inputs: []inputInfo{
25509 {1, 1073741816},
25510 {0, 4611686019501129724},
25511 },
25512 },
25513 },
25514 {
25515 name: "MOVVstorezeroidx",
25516 argLen: 3,
25517 asm: loong64.AMOVV,
25518 reg: regInfo{
25519 inputs: []inputInfo{
25520 {1, 1073741816},
25521 {0, 4611686019501129724},
25522 },
25523 },
25524 },
25525 {
25526 name: "MOVWfpgp",
25527 argLen: 1,
25528 asm: loong64.AMOVW,
25529 reg: regInfo{
25530 inputs: []inputInfo{
25531 {0, 4611686017353646080},
25532 },
25533 outputs: []outputInfo{
25534 {0, 1071644664},
25535 },
25536 },
25537 },
25538 {
25539 name: "MOVWgpfp",
25540 argLen: 1,
25541 asm: loong64.AMOVW,
25542 reg: regInfo{
25543 inputs: []inputInfo{
25544 {0, 1071644664},
25545 },
25546 outputs: []outputInfo{
25547 {0, 4611686017353646080},
25548 },
25549 },
25550 },
25551 {
25552 name: "MOVVfpgp",
25553 argLen: 1,
25554 asm: loong64.AMOVV,
25555 reg: regInfo{
25556 inputs: []inputInfo{
25557 {0, 4611686017353646080},
25558 },
25559 outputs: []outputInfo{
25560 {0, 1071644664},
25561 },
25562 },
25563 },
25564 {
25565 name: "MOVVgpfp",
25566 argLen: 1,
25567 asm: loong64.AMOVV,
25568 reg: regInfo{
25569 inputs: []inputInfo{
25570 {0, 1071644664},
25571 },
25572 outputs: []outputInfo{
25573 {0, 4611686017353646080},
25574 },
25575 },
25576 },
25577 {
25578 name: "MOVBreg",
25579 argLen: 1,
25580 asm: loong64.AMOVB,
25581 reg: regInfo{
25582 inputs: []inputInfo{
25583 {0, 1073741816},
25584 },
25585 outputs: []outputInfo{
25586 {0, 1071644664},
25587 },
25588 },
25589 },
25590 {
25591 name: "MOVBUreg",
25592 argLen: 1,
25593 asm: loong64.AMOVBU,
25594 reg: regInfo{
25595 inputs: []inputInfo{
25596 {0, 1073741816},
25597 },
25598 outputs: []outputInfo{
25599 {0, 1071644664},
25600 },
25601 },
25602 },
25603 {
25604 name: "MOVHreg",
25605 argLen: 1,
25606 asm: loong64.AMOVH,
25607 reg: regInfo{
25608 inputs: []inputInfo{
25609 {0, 1073741816},
25610 },
25611 outputs: []outputInfo{
25612 {0, 1071644664},
25613 },
25614 },
25615 },
25616 {
25617 name: "MOVHUreg",
25618 argLen: 1,
25619 asm: loong64.AMOVHU,
25620 reg: regInfo{
25621 inputs: []inputInfo{
25622 {0, 1073741816},
25623 },
25624 outputs: []outputInfo{
25625 {0, 1071644664},
25626 },
25627 },
25628 },
25629 {
25630 name: "MOVWreg",
25631 argLen: 1,
25632 asm: loong64.AMOVW,
25633 reg: regInfo{
25634 inputs: []inputInfo{
25635 {0, 1073741816},
25636 },
25637 outputs: []outputInfo{
25638 {0, 1071644664},
25639 },
25640 },
25641 },
25642 {
25643 name: "MOVWUreg",
25644 argLen: 1,
25645 asm: loong64.AMOVWU,
25646 reg: regInfo{
25647 inputs: []inputInfo{
25648 {0, 1073741816},
25649 },
25650 outputs: []outputInfo{
25651 {0, 1071644664},
25652 },
25653 },
25654 },
25655 {
25656 name: "MOVVreg",
25657 argLen: 1,
25658 asm: loong64.AMOVV,
25659 reg: regInfo{
25660 inputs: []inputInfo{
25661 {0, 1073741816},
25662 },
25663 outputs: []outputInfo{
25664 {0, 1071644664},
25665 },
25666 },
25667 },
25668 {
25669 name: "MOVVnop",
25670 argLen: 1,
25671 resultInArg0: true,
25672 reg: regInfo{
25673 inputs: []inputInfo{
25674 {0, 1071644664},
25675 },
25676 outputs: []outputInfo{
25677 {0, 1071644664},
25678 },
25679 },
25680 },
25681 {
25682 name: "MOVWF",
25683 argLen: 1,
25684 asm: loong64.AMOVWF,
25685 reg: regInfo{
25686 inputs: []inputInfo{
25687 {0, 4611686017353646080},
25688 },
25689 outputs: []outputInfo{
25690 {0, 4611686017353646080},
25691 },
25692 },
25693 },
25694 {
25695 name: "MOVWD",
25696 argLen: 1,
25697 asm: loong64.AMOVWD,
25698 reg: regInfo{
25699 inputs: []inputInfo{
25700 {0, 4611686017353646080},
25701 },
25702 outputs: []outputInfo{
25703 {0, 4611686017353646080},
25704 },
25705 },
25706 },
25707 {
25708 name: "MOVVF",
25709 argLen: 1,
25710 asm: loong64.AMOVVF,
25711 reg: regInfo{
25712 inputs: []inputInfo{
25713 {0, 4611686017353646080},
25714 },
25715 outputs: []outputInfo{
25716 {0, 4611686017353646080},
25717 },
25718 },
25719 },
25720 {
25721 name: "MOVVD",
25722 argLen: 1,
25723 asm: loong64.AMOVVD,
25724 reg: regInfo{
25725 inputs: []inputInfo{
25726 {0, 4611686017353646080},
25727 },
25728 outputs: []outputInfo{
25729 {0, 4611686017353646080},
25730 },
25731 },
25732 },
25733 {
25734 name: "TRUNCFW",
25735 argLen: 1,
25736 asm: loong64.ATRUNCFW,
25737 reg: regInfo{
25738 inputs: []inputInfo{
25739 {0, 4611686017353646080},
25740 },
25741 outputs: []outputInfo{
25742 {0, 4611686017353646080},
25743 },
25744 },
25745 },
25746 {
25747 name: "TRUNCDW",
25748 argLen: 1,
25749 asm: loong64.ATRUNCDW,
25750 reg: regInfo{
25751 inputs: []inputInfo{
25752 {0, 4611686017353646080},
25753 },
25754 outputs: []outputInfo{
25755 {0, 4611686017353646080},
25756 },
25757 },
25758 },
25759 {
25760 name: "TRUNCFV",
25761 argLen: 1,
25762 asm: loong64.ATRUNCFV,
25763 reg: regInfo{
25764 inputs: []inputInfo{
25765 {0, 4611686017353646080},
25766 },
25767 outputs: []outputInfo{
25768 {0, 4611686017353646080},
25769 },
25770 },
25771 },
25772 {
25773 name: "TRUNCDV",
25774 argLen: 1,
25775 asm: loong64.ATRUNCDV,
25776 reg: regInfo{
25777 inputs: []inputInfo{
25778 {0, 4611686017353646080},
25779 },
25780 outputs: []outputInfo{
25781 {0, 4611686017353646080},
25782 },
25783 },
25784 },
25785 {
25786 name: "MOVFD",
25787 argLen: 1,
25788 asm: loong64.AMOVFD,
25789 reg: regInfo{
25790 inputs: []inputInfo{
25791 {0, 4611686017353646080},
25792 },
25793 outputs: []outputInfo{
25794 {0, 4611686017353646080},
25795 },
25796 },
25797 },
25798 {
25799 name: "MOVDF",
25800 argLen: 1,
25801 asm: loong64.AMOVDF,
25802 reg: regInfo{
25803 inputs: []inputInfo{
25804 {0, 4611686017353646080},
25805 },
25806 outputs: []outputInfo{
25807 {0, 4611686017353646080},
25808 },
25809 },
25810 },
25811 {
25812 name: "LoweredRound32F",
25813 argLen: 1,
25814 resultInArg0: true,
25815 reg: regInfo{
25816 inputs: []inputInfo{
25817 {0, 4611686017353646080},
25818 },
25819 outputs: []outputInfo{
25820 {0, 4611686017353646080},
25821 },
25822 },
25823 },
25824 {
25825 name: "LoweredRound64F",
25826 argLen: 1,
25827 resultInArg0: true,
25828 reg: regInfo{
25829 inputs: []inputInfo{
25830 {0, 4611686017353646080},
25831 },
25832 outputs: []outputInfo{
25833 {0, 4611686017353646080},
25834 },
25835 },
25836 },
25837 {
25838 name: "CALLstatic",
25839 auxType: auxCallOff,
25840 argLen: -1,
25841 clobberFlags: true,
25842 call: true,
25843 reg: regInfo{
25844 clobbers: 4611686018427387896,
25845 },
25846 },
25847 {
25848 name: "CALLtail",
25849 auxType: auxCallOff,
25850 argLen: -1,
25851 clobberFlags: true,
25852 call: true,
25853 tailCall: true,
25854 reg: regInfo{
25855 clobbers: 4611686018427387896,
25856 },
25857 },
25858 {
25859 name: "CALLclosure",
25860 auxType: auxCallOff,
25861 argLen: -1,
25862 clobberFlags: true,
25863 call: true,
25864 reg: regInfo{
25865 inputs: []inputInfo{
25866 {1, 268435456},
25867 {0, 1071644668},
25868 },
25869 clobbers: 4611686018427387896,
25870 },
25871 },
25872 {
25873 name: "CALLinter",
25874 auxType: auxCallOff,
25875 argLen: -1,
25876 clobberFlags: true,
25877 call: true,
25878 reg: regInfo{
25879 inputs: []inputInfo{
25880 {0, 1071644664},
25881 },
25882 clobbers: 4611686018427387896,
25883 },
25884 },
25885 {
25886 name: "DUFFZERO",
25887 auxType: auxInt64,
25888 argLen: 2,
25889 faultOnNilArg0: true,
25890 reg: regInfo{
25891 inputs: []inputInfo{
25892 {0, 524288},
25893 },
25894 clobbers: 524290,
25895 },
25896 },
25897 {
25898 name: "DUFFCOPY",
25899 auxType: auxInt64,
25900 argLen: 3,
25901 faultOnNilArg0: true,
25902 faultOnNilArg1: true,
25903 reg: regInfo{
25904 inputs: []inputInfo{
25905 {0, 1048576},
25906 {1, 524288},
25907 },
25908 clobbers: 1572866,
25909 },
25910 },
25911 {
25912 name: "LoweredZero",
25913 auxType: auxInt64,
25914 argLen: 3,
25915 faultOnNilArg0: true,
25916 reg: regInfo{
25917 inputs: []inputInfo{
25918 {0, 524288},
25919 {1, 1071644664},
25920 },
25921 clobbers: 524288,
25922 },
25923 },
25924 {
25925 name: "LoweredMove",
25926 auxType: auxInt64,
25927 argLen: 4,
25928 faultOnNilArg0: true,
25929 faultOnNilArg1: true,
25930 reg: regInfo{
25931 inputs: []inputInfo{
25932 {0, 1048576},
25933 {1, 524288},
25934 {2, 1071644664},
25935 },
25936 clobbers: 1572864,
25937 },
25938 },
25939 {
25940 name: "LoweredAtomicLoad8",
25941 argLen: 2,
25942 faultOnNilArg0: true,
25943 reg: regInfo{
25944 inputs: []inputInfo{
25945 {0, 4611686019501129724},
25946 },
25947 outputs: []outputInfo{
25948 {0, 1071644664},
25949 },
25950 },
25951 },
25952 {
25953 name: "LoweredAtomicLoad32",
25954 argLen: 2,
25955 faultOnNilArg0: true,
25956 reg: regInfo{
25957 inputs: []inputInfo{
25958 {0, 4611686019501129724},
25959 },
25960 outputs: []outputInfo{
25961 {0, 1071644664},
25962 },
25963 },
25964 },
25965 {
25966 name: "LoweredAtomicLoad64",
25967 argLen: 2,
25968 faultOnNilArg0: true,
25969 reg: regInfo{
25970 inputs: []inputInfo{
25971 {0, 4611686019501129724},
25972 },
25973 outputs: []outputInfo{
25974 {0, 1071644664},
25975 },
25976 },
25977 },
25978 {
25979 name: "LoweredAtomicStore8",
25980 argLen: 3,
25981 faultOnNilArg0: true,
25982 hasSideEffects: true,
25983 reg: regInfo{
25984 inputs: []inputInfo{
25985 {1, 1073741816},
25986 {0, 4611686019501129724},
25987 },
25988 },
25989 },
25990 {
25991 name: "LoweredAtomicStore32",
25992 argLen: 3,
25993 faultOnNilArg0: true,
25994 hasSideEffects: true,
25995 reg: regInfo{
25996 inputs: []inputInfo{
25997 {1, 1073741816},
25998 {0, 4611686019501129724},
25999 },
26000 },
26001 },
26002 {
26003 name: "LoweredAtomicStore64",
26004 argLen: 3,
26005 faultOnNilArg0: true,
26006 hasSideEffects: true,
26007 reg: regInfo{
26008 inputs: []inputInfo{
26009 {1, 1073741816},
26010 {0, 4611686019501129724},
26011 },
26012 },
26013 },
26014 {
26015 name: "LoweredAtomicStore8Variant",
26016 argLen: 3,
26017 faultOnNilArg0: true,
26018 hasSideEffects: true,
26019 reg: regInfo{
26020 inputs: []inputInfo{
26021 {1, 1073741816},
26022 {0, 4611686019501129724},
26023 },
26024 },
26025 },
26026 {
26027 name: "LoweredAtomicStore32Variant",
26028 argLen: 3,
26029 faultOnNilArg0: true,
26030 hasSideEffects: true,
26031 reg: regInfo{
26032 inputs: []inputInfo{
26033 {1, 1073741816},
26034 {0, 4611686019501129724},
26035 },
26036 },
26037 },
26038 {
26039 name: "LoweredAtomicStore64Variant",
26040 argLen: 3,
26041 faultOnNilArg0: true,
26042 hasSideEffects: true,
26043 reg: regInfo{
26044 inputs: []inputInfo{
26045 {1, 1073741816},
26046 {0, 4611686019501129724},
26047 },
26048 },
26049 },
26050 {
26051 name: "LoweredAtomicExchange32",
26052 argLen: 3,
26053 resultNotInArgs: true,
26054 faultOnNilArg0: true,
26055 hasSideEffects: true,
26056 reg: regInfo{
26057 inputs: []inputInfo{
26058 {1, 1073741816},
26059 {0, 4611686019501129724},
26060 },
26061 outputs: []outputInfo{
26062 {0, 1071644664},
26063 },
26064 },
26065 },
26066 {
26067 name: "LoweredAtomicExchange64",
26068 argLen: 3,
26069 resultNotInArgs: true,
26070 faultOnNilArg0: true,
26071 hasSideEffects: true,
26072 reg: regInfo{
26073 inputs: []inputInfo{
26074 {1, 1073741816},
26075 {0, 4611686019501129724},
26076 },
26077 outputs: []outputInfo{
26078 {0, 1071644664},
26079 },
26080 },
26081 },
26082 {
26083 name: "LoweredAtomicExchange8Variant",
26084 argLen: 3,
26085 resultNotInArgs: true,
26086 faultOnNilArg0: true,
26087 hasSideEffects: true,
26088 reg: regInfo{
26089 inputs: []inputInfo{
26090 {1, 1073741816},
26091 {0, 4611686019501129724},
26092 },
26093 outputs: []outputInfo{
26094 {0, 1071644664},
26095 },
26096 },
26097 },
26098 {
26099 name: "LoweredAtomicAdd32",
26100 argLen: 3,
26101 resultNotInArgs: true,
26102 faultOnNilArg0: true,
26103 hasSideEffects: true,
26104 reg: regInfo{
26105 inputs: []inputInfo{
26106 {1, 1073741816},
26107 {0, 4611686019501129724},
26108 },
26109 outputs: []outputInfo{
26110 {0, 1071644664},
26111 },
26112 },
26113 },
26114 {
26115 name: "LoweredAtomicAdd64",
26116 argLen: 3,
26117 resultNotInArgs: true,
26118 faultOnNilArg0: true,
26119 hasSideEffects: true,
26120 reg: regInfo{
26121 inputs: []inputInfo{
26122 {1, 1073741816},
26123 {0, 4611686019501129724},
26124 },
26125 outputs: []outputInfo{
26126 {0, 1071644664},
26127 },
26128 },
26129 },
26130 {
26131 name: "LoweredAtomicCas32",
26132 argLen: 4,
26133 resultNotInArgs: true,
26134 faultOnNilArg0: true,
26135 hasSideEffects: true,
26136 unsafePoint: true,
26137 reg: regInfo{
26138 inputs: []inputInfo{
26139 {1, 1073741816},
26140 {2, 1073741816},
26141 {0, 4611686019501129724},
26142 },
26143 outputs: []outputInfo{
26144 {0, 1071644664},
26145 },
26146 },
26147 },
26148 {
26149 name: "LoweredAtomicCas64",
26150 argLen: 4,
26151 resultNotInArgs: true,
26152 faultOnNilArg0: true,
26153 hasSideEffects: true,
26154 unsafePoint: true,
26155 reg: regInfo{
26156 inputs: []inputInfo{
26157 {1, 1073741816},
26158 {2, 1073741816},
26159 {0, 4611686019501129724},
26160 },
26161 outputs: []outputInfo{
26162 {0, 1071644664},
26163 },
26164 },
26165 },
26166 {
26167 name: "LoweredAtomicCas64Variant",
26168 argLen: 4,
26169 resultNotInArgs: true,
26170 faultOnNilArg0: true,
26171 hasSideEffects: true,
26172 unsafePoint: true,
26173 reg: regInfo{
26174 inputs: []inputInfo{
26175 {1, 1073741816},
26176 {2, 1073741816},
26177 {0, 4611686019501129724},
26178 },
26179 outputs: []outputInfo{
26180 {0, 1071644664},
26181 },
26182 },
26183 },
26184 {
26185 name: "LoweredAtomicCas32Variant",
26186 argLen: 4,
26187 resultNotInArgs: true,
26188 faultOnNilArg0: true,
26189 hasSideEffects: true,
26190 unsafePoint: true,
26191 reg: regInfo{
26192 inputs: []inputInfo{
26193 {1, 1073741816},
26194 {2, 1073741816},
26195 {0, 4611686019501129724},
26196 },
26197 outputs: []outputInfo{
26198 {0, 1071644664},
26199 },
26200 },
26201 },
26202 {
26203 name: "LoweredAtomicAnd32",
26204 argLen: 3,
26205 resultNotInArgs: true,
26206 faultOnNilArg0: true,
26207 hasSideEffects: true,
26208 asm: loong64.AAMANDDBW,
26209 reg: regInfo{
26210 inputs: []inputInfo{
26211 {1, 1073741816},
26212 {0, 4611686019501129724},
26213 },
26214 outputs: []outputInfo{
26215 {0, 1071644664},
26216 },
26217 },
26218 },
26219 {
26220 name: "LoweredAtomicOr32",
26221 argLen: 3,
26222 resultNotInArgs: true,
26223 faultOnNilArg0: true,
26224 hasSideEffects: true,
26225 asm: loong64.AAMORDBW,
26226 reg: regInfo{
26227 inputs: []inputInfo{
26228 {1, 1073741816},
26229 {0, 4611686019501129724},
26230 },
26231 outputs: []outputInfo{
26232 {0, 1071644664},
26233 },
26234 },
26235 },
26236 {
26237 name: "LoweredAtomicAnd32value",
26238 argLen: 3,
26239 resultNotInArgs: true,
26240 faultOnNilArg0: true,
26241 hasSideEffects: true,
26242 asm: loong64.AAMANDDBW,
26243 reg: regInfo{
26244 inputs: []inputInfo{
26245 {1, 1073741816},
26246 {0, 4611686019501129724},
26247 },
26248 outputs: []outputInfo{
26249 {0, 1071644664},
26250 },
26251 },
26252 },
26253 {
26254 name: "LoweredAtomicAnd64value",
26255 argLen: 3,
26256 resultNotInArgs: true,
26257 faultOnNilArg0: true,
26258 hasSideEffects: true,
26259 asm: loong64.AAMANDDBV,
26260 reg: regInfo{
26261 inputs: []inputInfo{
26262 {1, 1073741816},
26263 {0, 4611686019501129724},
26264 },
26265 outputs: []outputInfo{
26266 {0, 1071644664},
26267 },
26268 },
26269 },
26270 {
26271 name: "LoweredAtomicOr32value",
26272 argLen: 3,
26273 resultNotInArgs: true,
26274 faultOnNilArg0: true,
26275 hasSideEffects: true,
26276 asm: loong64.AAMORDBW,
26277 reg: regInfo{
26278 inputs: []inputInfo{
26279 {1, 1073741816},
26280 {0, 4611686019501129724},
26281 },
26282 outputs: []outputInfo{
26283 {0, 1071644664},
26284 },
26285 },
26286 },
26287 {
26288 name: "LoweredAtomicOr64value",
26289 argLen: 3,
26290 resultNotInArgs: true,
26291 faultOnNilArg0: true,
26292 hasSideEffects: true,
26293 asm: loong64.AAMORDBV,
26294 reg: regInfo{
26295 inputs: []inputInfo{
26296 {1, 1073741816},
26297 {0, 4611686019501129724},
26298 },
26299 outputs: []outputInfo{
26300 {0, 1071644664},
26301 },
26302 },
26303 },
26304 {
26305 name: "LoweredNilCheck",
26306 argLen: 2,
26307 nilCheck: true,
26308 faultOnNilArg0: true,
26309 reg: regInfo{
26310 inputs: []inputInfo{
26311 {0, 1073741816},
26312 },
26313 },
26314 },
26315 {
26316 name: "FPFlagTrue",
26317 argLen: 1,
26318 reg: regInfo{
26319 outputs: []outputInfo{
26320 {0, 1071644664},
26321 },
26322 },
26323 },
26324 {
26325 name: "FPFlagFalse",
26326 argLen: 1,
26327 reg: regInfo{
26328 outputs: []outputInfo{
26329 {0, 1071644664},
26330 },
26331 },
26332 },
26333 {
26334 name: "LoweredGetClosurePtr",
26335 argLen: 0,
26336 zeroWidth: true,
26337 reg: regInfo{
26338 outputs: []outputInfo{
26339 {0, 268435456},
26340 },
26341 },
26342 },
26343 {
26344 name: "LoweredGetCallerSP",
26345 argLen: 1,
26346 rematerializeable: true,
26347 reg: regInfo{
26348 outputs: []outputInfo{
26349 {0, 1071644664},
26350 },
26351 },
26352 },
26353 {
26354 name: "LoweredGetCallerPC",
26355 argLen: 0,
26356 rematerializeable: true,
26357 reg: regInfo{
26358 outputs: []outputInfo{
26359 {0, 1071644664},
26360 },
26361 },
26362 },
26363 {
26364 name: "LoweredWB",
26365 auxType: auxInt64,
26366 argLen: 1,
26367 clobberFlags: true,
26368 reg: regInfo{
26369 clobbers: 4611686017353646082,
26370 outputs: []outputInfo{
26371 {0, 268435456},
26372 },
26373 },
26374 },
26375 {
26376 name: "LoweredPubBarrier",
26377 argLen: 1,
26378 hasSideEffects: true,
26379 asm: loong64.ADBAR,
26380 reg: regInfo{},
26381 },
26382 {
26383 name: "LoweredPanicBoundsA",
26384 auxType: auxInt64,
26385 argLen: 3,
26386 call: true,
26387 reg: regInfo{
26388 inputs: []inputInfo{
26389 {0, 4194304},
26390 {1, 8388608},
26391 },
26392 },
26393 },
26394 {
26395 name: "LoweredPanicBoundsB",
26396 auxType: auxInt64,
26397 argLen: 3,
26398 call: true,
26399 reg: regInfo{
26400 inputs: []inputInfo{
26401 {0, 1048576},
26402 {1, 4194304},
26403 },
26404 },
26405 },
26406 {
26407 name: "LoweredPanicBoundsC",
26408 auxType: auxInt64,
26409 argLen: 3,
26410 call: true,
26411 reg: regInfo{
26412 inputs: []inputInfo{
26413 {0, 524288},
26414 {1, 1048576},
26415 },
26416 },
26417 },
26418
26419 {
26420 name: "ADD",
26421 argLen: 2,
26422 commutative: true,
26423 asm: mips.AADDU,
26424 reg: regInfo{
26425 inputs: []inputInfo{
26426 {0, 469762046},
26427 {1, 469762046},
26428 },
26429 outputs: []outputInfo{
26430 {0, 335544318},
26431 },
26432 },
26433 },
26434 {
26435 name: "ADDconst",
26436 auxType: auxInt32,
26437 argLen: 1,
26438 asm: mips.AADDU,
26439 reg: regInfo{
26440 inputs: []inputInfo{
26441 {0, 536870910},
26442 },
26443 outputs: []outputInfo{
26444 {0, 335544318},
26445 },
26446 },
26447 },
26448 {
26449 name: "SUB",
26450 argLen: 2,
26451 asm: mips.ASUBU,
26452 reg: regInfo{
26453 inputs: []inputInfo{
26454 {0, 469762046},
26455 {1, 469762046},
26456 },
26457 outputs: []outputInfo{
26458 {0, 335544318},
26459 },
26460 },
26461 },
26462 {
26463 name: "SUBconst",
26464 auxType: auxInt32,
26465 argLen: 1,
26466 asm: mips.ASUBU,
26467 reg: regInfo{
26468 inputs: []inputInfo{
26469 {0, 469762046},
26470 },
26471 outputs: []outputInfo{
26472 {0, 335544318},
26473 },
26474 },
26475 },
26476 {
26477 name: "MUL",
26478 argLen: 2,
26479 commutative: true,
26480 asm: mips.AMUL,
26481 reg: regInfo{
26482 inputs: []inputInfo{
26483 {0, 469762046},
26484 {1, 469762046},
26485 },
26486 clobbers: 105553116266496,
26487 outputs: []outputInfo{
26488 {0, 335544318},
26489 },
26490 },
26491 },
26492 {
26493 name: "MULT",
26494 argLen: 2,
26495 commutative: true,
26496 asm: mips.AMUL,
26497 reg: regInfo{
26498 inputs: []inputInfo{
26499 {0, 469762046},
26500 {1, 469762046},
26501 },
26502 outputs: []outputInfo{
26503 {0, 35184372088832},
26504 {1, 70368744177664},
26505 },
26506 },
26507 },
26508 {
26509 name: "MULTU",
26510 argLen: 2,
26511 commutative: true,
26512 asm: mips.AMULU,
26513 reg: regInfo{
26514 inputs: []inputInfo{
26515 {0, 469762046},
26516 {1, 469762046},
26517 },
26518 outputs: []outputInfo{
26519 {0, 35184372088832},
26520 {1, 70368744177664},
26521 },
26522 },
26523 },
26524 {
26525 name: "DIV",
26526 argLen: 2,
26527 asm: mips.ADIV,
26528 reg: regInfo{
26529 inputs: []inputInfo{
26530 {0, 469762046},
26531 {1, 469762046},
26532 },
26533 outputs: []outputInfo{
26534 {0, 35184372088832},
26535 {1, 70368744177664},
26536 },
26537 },
26538 },
26539 {
26540 name: "DIVU",
26541 argLen: 2,
26542 asm: mips.ADIVU,
26543 reg: regInfo{
26544 inputs: []inputInfo{
26545 {0, 469762046},
26546 {1, 469762046},
26547 },
26548 outputs: []outputInfo{
26549 {0, 35184372088832},
26550 {1, 70368744177664},
26551 },
26552 },
26553 },
26554 {
26555 name: "ADDF",
26556 argLen: 2,
26557 commutative: true,
26558 asm: mips.AADDF,
26559 reg: regInfo{
26560 inputs: []inputInfo{
26561 {0, 35183835217920},
26562 {1, 35183835217920},
26563 },
26564 outputs: []outputInfo{
26565 {0, 35183835217920},
26566 },
26567 },
26568 },
26569 {
26570 name: "ADDD",
26571 argLen: 2,
26572 commutative: true,
26573 asm: mips.AADDD,
26574 reg: regInfo{
26575 inputs: []inputInfo{
26576 {0, 35183835217920},
26577 {1, 35183835217920},
26578 },
26579 outputs: []outputInfo{
26580 {0, 35183835217920},
26581 },
26582 },
26583 },
26584 {
26585 name: "SUBF",
26586 argLen: 2,
26587 asm: mips.ASUBF,
26588 reg: regInfo{
26589 inputs: []inputInfo{
26590 {0, 35183835217920},
26591 {1, 35183835217920},
26592 },
26593 outputs: []outputInfo{
26594 {0, 35183835217920},
26595 },
26596 },
26597 },
26598 {
26599 name: "SUBD",
26600 argLen: 2,
26601 asm: mips.ASUBD,
26602 reg: regInfo{
26603 inputs: []inputInfo{
26604 {0, 35183835217920},
26605 {1, 35183835217920},
26606 },
26607 outputs: []outputInfo{
26608 {0, 35183835217920},
26609 },
26610 },
26611 },
26612 {
26613 name: "MULF",
26614 argLen: 2,
26615 commutative: true,
26616 asm: mips.AMULF,
26617 reg: regInfo{
26618 inputs: []inputInfo{
26619 {0, 35183835217920},
26620 {1, 35183835217920},
26621 },
26622 outputs: []outputInfo{
26623 {0, 35183835217920},
26624 },
26625 },
26626 },
26627 {
26628 name: "MULD",
26629 argLen: 2,
26630 commutative: true,
26631 asm: mips.AMULD,
26632 reg: regInfo{
26633 inputs: []inputInfo{
26634 {0, 35183835217920},
26635 {1, 35183835217920},
26636 },
26637 outputs: []outputInfo{
26638 {0, 35183835217920},
26639 },
26640 },
26641 },
26642 {
26643 name: "DIVF",
26644 argLen: 2,
26645 asm: mips.ADIVF,
26646 reg: regInfo{
26647 inputs: []inputInfo{
26648 {0, 35183835217920},
26649 {1, 35183835217920},
26650 },
26651 outputs: []outputInfo{
26652 {0, 35183835217920},
26653 },
26654 },
26655 },
26656 {
26657 name: "DIVD",
26658 argLen: 2,
26659 asm: mips.ADIVD,
26660 reg: regInfo{
26661 inputs: []inputInfo{
26662 {0, 35183835217920},
26663 {1, 35183835217920},
26664 },
26665 outputs: []outputInfo{
26666 {0, 35183835217920},
26667 },
26668 },
26669 },
26670 {
26671 name: "AND",
26672 argLen: 2,
26673 commutative: true,
26674 asm: mips.AAND,
26675 reg: regInfo{
26676 inputs: []inputInfo{
26677 {0, 469762046},
26678 {1, 469762046},
26679 },
26680 outputs: []outputInfo{
26681 {0, 335544318},
26682 },
26683 },
26684 },
26685 {
26686 name: "ANDconst",
26687 auxType: auxInt32,
26688 argLen: 1,
26689 asm: mips.AAND,
26690 reg: regInfo{
26691 inputs: []inputInfo{
26692 {0, 469762046},
26693 },
26694 outputs: []outputInfo{
26695 {0, 335544318},
26696 },
26697 },
26698 },
26699 {
26700 name: "OR",
26701 argLen: 2,
26702 commutative: true,
26703 asm: mips.AOR,
26704 reg: regInfo{
26705 inputs: []inputInfo{
26706 {0, 469762046},
26707 {1, 469762046},
26708 },
26709 outputs: []outputInfo{
26710 {0, 335544318},
26711 },
26712 },
26713 },
26714 {
26715 name: "ORconst",
26716 auxType: auxInt32,
26717 argLen: 1,
26718 asm: mips.AOR,
26719 reg: regInfo{
26720 inputs: []inputInfo{
26721 {0, 469762046},
26722 },
26723 outputs: []outputInfo{
26724 {0, 335544318},
26725 },
26726 },
26727 },
26728 {
26729 name: "XOR",
26730 argLen: 2,
26731 commutative: true,
26732 asm: mips.AXOR,
26733 reg: regInfo{
26734 inputs: []inputInfo{
26735 {0, 469762046},
26736 {1, 469762046},
26737 },
26738 outputs: []outputInfo{
26739 {0, 335544318},
26740 },
26741 },
26742 },
26743 {
26744 name: "XORconst",
26745 auxType: auxInt32,
26746 argLen: 1,
26747 asm: mips.AXOR,
26748 reg: regInfo{
26749 inputs: []inputInfo{
26750 {0, 469762046},
26751 },
26752 outputs: []outputInfo{
26753 {0, 335544318},
26754 },
26755 },
26756 },
26757 {
26758 name: "NOR",
26759 argLen: 2,
26760 commutative: true,
26761 asm: mips.ANOR,
26762 reg: regInfo{
26763 inputs: []inputInfo{
26764 {0, 469762046},
26765 {1, 469762046},
26766 },
26767 outputs: []outputInfo{
26768 {0, 335544318},
26769 },
26770 },
26771 },
26772 {
26773 name: "NORconst",
26774 auxType: auxInt32,
26775 argLen: 1,
26776 asm: mips.ANOR,
26777 reg: regInfo{
26778 inputs: []inputInfo{
26779 {0, 469762046},
26780 },
26781 outputs: []outputInfo{
26782 {0, 335544318},
26783 },
26784 },
26785 },
26786 {
26787 name: "NEG",
26788 argLen: 1,
26789 reg: regInfo{
26790 inputs: []inputInfo{
26791 {0, 469762046},
26792 },
26793 outputs: []outputInfo{
26794 {0, 335544318},
26795 },
26796 },
26797 },
26798 {
26799 name: "NEGF",
26800 argLen: 1,
26801 asm: mips.ANEGF,
26802 reg: regInfo{
26803 inputs: []inputInfo{
26804 {0, 35183835217920},
26805 },
26806 outputs: []outputInfo{
26807 {0, 35183835217920},
26808 },
26809 },
26810 },
26811 {
26812 name: "NEGD",
26813 argLen: 1,
26814 asm: mips.ANEGD,
26815 reg: regInfo{
26816 inputs: []inputInfo{
26817 {0, 35183835217920},
26818 },
26819 outputs: []outputInfo{
26820 {0, 35183835217920},
26821 },
26822 },
26823 },
26824 {
26825 name: "ABSD",
26826 argLen: 1,
26827 asm: mips.AABSD,
26828 reg: regInfo{
26829 inputs: []inputInfo{
26830 {0, 35183835217920},
26831 },
26832 outputs: []outputInfo{
26833 {0, 35183835217920},
26834 },
26835 },
26836 },
26837 {
26838 name: "SQRTD",
26839 argLen: 1,
26840 asm: mips.ASQRTD,
26841 reg: regInfo{
26842 inputs: []inputInfo{
26843 {0, 35183835217920},
26844 },
26845 outputs: []outputInfo{
26846 {0, 35183835217920},
26847 },
26848 },
26849 },
26850 {
26851 name: "SQRTF",
26852 argLen: 1,
26853 asm: mips.ASQRTF,
26854 reg: regInfo{
26855 inputs: []inputInfo{
26856 {0, 35183835217920},
26857 },
26858 outputs: []outputInfo{
26859 {0, 35183835217920},
26860 },
26861 },
26862 },
26863 {
26864 name: "SLL",
26865 argLen: 2,
26866 asm: mips.ASLL,
26867 reg: regInfo{
26868 inputs: []inputInfo{
26869 {0, 469762046},
26870 {1, 469762046},
26871 },
26872 outputs: []outputInfo{
26873 {0, 335544318},
26874 },
26875 },
26876 },
26877 {
26878 name: "SLLconst",
26879 auxType: auxInt32,
26880 argLen: 1,
26881 asm: mips.ASLL,
26882 reg: regInfo{
26883 inputs: []inputInfo{
26884 {0, 469762046},
26885 },
26886 outputs: []outputInfo{
26887 {0, 335544318},
26888 },
26889 },
26890 },
26891 {
26892 name: "SRL",
26893 argLen: 2,
26894 asm: mips.ASRL,
26895 reg: regInfo{
26896 inputs: []inputInfo{
26897 {0, 469762046},
26898 {1, 469762046},
26899 },
26900 outputs: []outputInfo{
26901 {0, 335544318},
26902 },
26903 },
26904 },
26905 {
26906 name: "SRLconst",
26907 auxType: auxInt32,
26908 argLen: 1,
26909 asm: mips.ASRL,
26910 reg: regInfo{
26911 inputs: []inputInfo{
26912 {0, 469762046},
26913 },
26914 outputs: []outputInfo{
26915 {0, 335544318},
26916 },
26917 },
26918 },
26919 {
26920 name: "SRA",
26921 argLen: 2,
26922 asm: mips.ASRA,
26923 reg: regInfo{
26924 inputs: []inputInfo{
26925 {0, 469762046},
26926 {1, 469762046},
26927 },
26928 outputs: []outputInfo{
26929 {0, 335544318},
26930 },
26931 },
26932 },
26933 {
26934 name: "SRAconst",
26935 auxType: auxInt32,
26936 argLen: 1,
26937 asm: mips.ASRA,
26938 reg: regInfo{
26939 inputs: []inputInfo{
26940 {0, 469762046},
26941 },
26942 outputs: []outputInfo{
26943 {0, 335544318},
26944 },
26945 },
26946 },
26947 {
26948 name: "CLZ",
26949 argLen: 1,
26950 asm: mips.ACLZ,
26951 reg: regInfo{
26952 inputs: []inputInfo{
26953 {0, 469762046},
26954 },
26955 outputs: []outputInfo{
26956 {0, 335544318},
26957 },
26958 },
26959 },
26960 {
26961 name: "SGT",
26962 argLen: 2,
26963 asm: mips.ASGT,
26964 reg: regInfo{
26965 inputs: []inputInfo{
26966 {0, 469762046},
26967 {1, 469762046},
26968 },
26969 outputs: []outputInfo{
26970 {0, 335544318},
26971 },
26972 },
26973 },
26974 {
26975 name: "SGTconst",
26976 auxType: auxInt32,
26977 argLen: 1,
26978 asm: mips.ASGT,
26979 reg: regInfo{
26980 inputs: []inputInfo{
26981 {0, 469762046},
26982 },
26983 outputs: []outputInfo{
26984 {0, 335544318},
26985 },
26986 },
26987 },
26988 {
26989 name: "SGTzero",
26990 argLen: 1,
26991 asm: mips.ASGT,
26992 reg: regInfo{
26993 inputs: []inputInfo{
26994 {0, 469762046},
26995 },
26996 outputs: []outputInfo{
26997 {0, 335544318},
26998 },
26999 },
27000 },
27001 {
27002 name: "SGTU",
27003 argLen: 2,
27004 asm: mips.ASGTU,
27005 reg: regInfo{
27006 inputs: []inputInfo{
27007 {0, 469762046},
27008 {1, 469762046},
27009 },
27010 outputs: []outputInfo{
27011 {0, 335544318},
27012 },
27013 },
27014 },
27015 {
27016 name: "SGTUconst",
27017 auxType: auxInt32,
27018 argLen: 1,
27019 asm: mips.ASGTU,
27020 reg: regInfo{
27021 inputs: []inputInfo{
27022 {0, 469762046},
27023 },
27024 outputs: []outputInfo{
27025 {0, 335544318},
27026 },
27027 },
27028 },
27029 {
27030 name: "SGTUzero",
27031 argLen: 1,
27032 asm: mips.ASGTU,
27033 reg: regInfo{
27034 inputs: []inputInfo{
27035 {0, 469762046},
27036 },
27037 outputs: []outputInfo{
27038 {0, 335544318},
27039 },
27040 },
27041 },
27042 {
27043 name: "CMPEQF",
27044 argLen: 2,
27045 asm: mips.ACMPEQF,
27046 reg: regInfo{
27047 inputs: []inputInfo{
27048 {0, 35183835217920},
27049 {1, 35183835217920},
27050 },
27051 },
27052 },
27053 {
27054 name: "CMPEQD",
27055 argLen: 2,
27056 asm: mips.ACMPEQD,
27057 reg: regInfo{
27058 inputs: []inputInfo{
27059 {0, 35183835217920},
27060 {1, 35183835217920},
27061 },
27062 },
27063 },
27064 {
27065 name: "CMPGEF",
27066 argLen: 2,
27067 asm: mips.ACMPGEF,
27068 reg: regInfo{
27069 inputs: []inputInfo{
27070 {0, 35183835217920},
27071 {1, 35183835217920},
27072 },
27073 },
27074 },
27075 {
27076 name: "CMPGED",
27077 argLen: 2,
27078 asm: mips.ACMPGED,
27079 reg: regInfo{
27080 inputs: []inputInfo{
27081 {0, 35183835217920},
27082 {1, 35183835217920},
27083 },
27084 },
27085 },
27086 {
27087 name: "CMPGTF",
27088 argLen: 2,
27089 asm: mips.ACMPGTF,
27090 reg: regInfo{
27091 inputs: []inputInfo{
27092 {0, 35183835217920},
27093 {1, 35183835217920},
27094 },
27095 },
27096 },
27097 {
27098 name: "CMPGTD",
27099 argLen: 2,
27100 asm: mips.ACMPGTD,
27101 reg: regInfo{
27102 inputs: []inputInfo{
27103 {0, 35183835217920},
27104 {1, 35183835217920},
27105 },
27106 },
27107 },
27108 {
27109 name: "MOVWconst",
27110 auxType: auxInt32,
27111 argLen: 0,
27112 rematerializeable: true,
27113 asm: mips.AMOVW,
27114 reg: regInfo{
27115 outputs: []outputInfo{
27116 {0, 335544318},
27117 },
27118 },
27119 },
27120 {
27121 name: "MOVFconst",
27122 auxType: auxFloat32,
27123 argLen: 0,
27124 rematerializeable: true,
27125 asm: mips.AMOVF,
27126 reg: regInfo{
27127 outputs: []outputInfo{
27128 {0, 35183835217920},
27129 },
27130 },
27131 },
27132 {
27133 name: "MOVDconst",
27134 auxType: auxFloat64,
27135 argLen: 0,
27136 rematerializeable: true,
27137 asm: mips.AMOVD,
27138 reg: regInfo{
27139 outputs: []outputInfo{
27140 {0, 35183835217920},
27141 },
27142 },
27143 },
27144 {
27145 name: "MOVWaddr",
27146 auxType: auxSymOff,
27147 argLen: 1,
27148 rematerializeable: true,
27149 symEffect: SymAddr,
27150 asm: mips.AMOVW,
27151 reg: regInfo{
27152 inputs: []inputInfo{
27153 {0, 140737555464192},
27154 },
27155 outputs: []outputInfo{
27156 {0, 335544318},
27157 },
27158 },
27159 },
27160 {
27161 name: "MOVBload",
27162 auxType: auxSymOff,
27163 argLen: 2,
27164 faultOnNilArg0: true,
27165 symEffect: SymRead,
27166 asm: mips.AMOVB,
27167 reg: regInfo{
27168 inputs: []inputInfo{
27169 {0, 140738025226238},
27170 },
27171 outputs: []outputInfo{
27172 {0, 335544318},
27173 },
27174 },
27175 },
27176 {
27177 name: "MOVBUload",
27178 auxType: auxSymOff,
27179 argLen: 2,
27180 faultOnNilArg0: true,
27181 symEffect: SymRead,
27182 asm: mips.AMOVBU,
27183 reg: regInfo{
27184 inputs: []inputInfo{
27185 {0, 140738025226238},
27186 },
27187 outputs: []outputInfo{
27188 {0, 335544318},
27189 },
27190 },
27191 },
27192 {
27193 name: "MOVHload",
27194 auxType: auxSymOff,
27195 argLen: 2,
27196 faultOnNilArg0: true,
27197 symEffect: SymRead,
27198 asm: mips.AMOVH,
27199 reg: regInfo{
27200 inputs: []inputInfo{
27201 {0, 140738025226238},
27202 },
27203 outputs: []outputInfo{
27204 {0, 335544318},
27205 },
27206 },
27207 },
27208 {
27209 name: "MOVHUload",
27210 auxType: auxSymOff,
27211 argLen: 2,
27212 faultOnNilArg0: true,
27213 symEffect: SymRead,
27214 asm: mips.AMOVHU,
27215 reg: regInfo{
27216 inputs: []inputInfo{
27217 {0, 140738025226238},
27218 },
27219 outputs: []outputInfo{
27220 {0, 335544318},
27221 },
27222 },
27223 },
27224 {
27225 name: "MOVWload",
27226 auxType: auxSymOff,
27227 argLen: 2,
27228 faultOnNilArg0: true,
27229 symEffect: SymRead,
27230 asm: mips.AMOVW,
27231 reg: regInfo{
27232 inputs: []inputInfo{
27233 {0, 140738025226238},
27234 },
27235 outputs: []outputInfo{
27236 {0, 335544318},
27237 },
27238 },
27239 },
27240 {
27241 name: "MOVFload",
27242 auxType: auxSymOff,
27243 argLen: 2,
27244 faultOnNilArg0: true,
27245 symEffect: SymRead,
27246 asm: mips.AMOVF,
27247 reg: regInfo{
27248 inputs: []inputInfo{
27249 {0, 140738025226238},
27250 },
27251 outputs: []outputInfo{
27252 {0, 35183835217920},
27253 },
27254 },
27255 },
27256 {
27257 name: "MOVDload",
27258 auxType: auxSymOff,
27259 argLen: 2,
27260 faultOnNilArg0: true,
27261 symEffect: SymRead,
27262 asm: mips.AMOVD,
27263 reg: regInfo{
27264 inputs: []inputInfo{
27265 {0, 140738025226238},
27266 },
27267 outputs: []outputInfo{
27268 {0, 35183835217920},
27269 },
27270 },
27271 },
27272 {
27273 name: "MOVBstore",
27274 auxType: auxSymOff,
27275 argLen: 3,
27276 faultOnNilArg0: true,
27277 symEffect: SymWrite,
27278 asm: mips.AMOVB,
27279 reg: regInfo{
27280 inputs: []inputInfo{
27281 {1, 469762046},
27282 {0, 140738025226238},
27283 },
27284 },
27285 },
27286 {
27287 name: "MOVHstore",
27288 auxType: auxSymOff,
27289 argLen: 3,
27290 faultOnNilArg0: true,
27291 symEffect: SymWrite,
27292 asm: mips.AMOVH,
27293 reg: regInfo{
27294 inputs: []inputInfo{
27295 {1, 469762046},
27296 {0, 140738025226238},
27297 },
27298 },
27299 },
27300 {
27301 name: "MOVWstore",
27302 auxType: auxSymOff,
27303 argLen: 3,
27304 faultOnNilArg0: true,
27305 symEffect: SymWrite,
27306 asm: mips.AMOVW,
27307 reg: regInfo{
27308 inputs: []inputInfo{
27309 {1, 469762046},
27310 {0, 140738025226238},
27311 },
27312 },
27313 },
27314 {
27315 name: "MOVFstore",
27316 auxType: auxSymOff,
27317 argLen: 3,
27318 faultOnNilArg0: true,
27319 symEffect: SymWrite,
27320 asm: mips.AMOVF,
27321 reg: regInfo{
27322 inputs: []inputInfo{
27323 {1, 35183835217920},
27324 {0, 140738025226238},
27325 },
27326 },
27327 },
27328 {
27329 name: "MOVDstore",
27330 auxType: auxSymOff,
27331 argLen: 3,
27332 faultOnNilArg0: true,
27333 symEffect: SymWrite,
27334 asm: mips.AMOVD,
27335 reg: regInfo{
27336 inputs: []inputInfo{
27337 {1, 35183835217920},
27338 {0, 140738025226238},
27339 },
27340 },
27341 },
27342 {
27343 name: "MOVBstorezero",
27344 auxType: auxSymOff,
27345 argLen: 2,
27346 faultOnNilArg0: true,
27347 symEffect: SymWrite,
27348 asm: mips.AMOVB,
27349 reg: regInfo{
27350 inputs: []inputInfo{
27351 {0, 140738025226238},
27352 },
27353 },
27354 },
27355 {
27356 name: "MOVHstorezero",
27357 auxType: auxSymOff,
27358 argLen: 2,
27359 faultOnNilArg0: true,
27360 symEffect: SymWrite,
27361 asm: mips.AMOVH,
27362 reg: regInfo{
27363 inputs: []inputInfo{
27364 {0, 140738025226238},
27365 },
27366 },
27367 },
27368 {
27369 name: "MOVWstorezero",
27370 auxType: auxSymOff,
27371 argLen: 2,
27372 faultOnNilArg0: true,
27373 symEffect: SymWrite,
27374 asm: mips.AMOVW,
27375 reg: regInfo{
27376 inputs: []inputInfo{
27377 {0, 140738025226238},
27378 },
27379 },
27380 },
27381 {
27382 name: "MOVWfpgp",
27383 argLen: 1,
27384 asm: mips.AMOVW,
27385 reg: regInfo{
27386 inputs: []inputInfo{
27387 {0, 35183835217920},
27388 },
27389 outputs: []outputInfo{
27390 {0, 335544318},
27391 },
27392 },
27393 },
27394 {
27395 name: "MOVWgpfp",
27396 argLen: 1,
27397 asm: mips.AMOVW,
27398 reg: regInfo{
27399 inputs: []inputInfo{
27400 {0, 335544318},
27401 },
27402 outputs: []outputInfo{
27403 {0, 35183835217920},
27404 },
27405 },
27406 },
27407 {
27408 name: "MOVBreg",
27409 argLen: 1,
27410 asm: mips.AMOVB,
27411 reg: regInfo{
27412 inputs: []inputInfo{
27413 {0, 469762046},
27414 },
27415 outputs: []outputInfo{
27416 {0, 335544318},
27417 },
27418 },
27419 },
27420 {
27421 name: "MOVBUreg",
27422 argLen: 1,
27423 asm: mips.AMOVBU,
27424 reg: regInfo{
27425 inputs: []inputInfo{
27426 {0, 469762046},
27427 },
27428 outputs: []outputInfo{
27429 {0, 335544318},
27430 },
27431 },
27432 },
27433 {
27434 name: "MOVHreg",
27435 argLen: 1,
27436 asm: mips.AMOVH,
27437 reg: regInfo{
27438 inputs: []inputInfo{
27439 {0, 469762046},
27440 },
27441 outputs: []outputInfo{
27442 {0, 335544318},
27443 },
27444 },
27445 },
27446 {
27447 name: "MOVHUreg",
27448 argLen: 1,
27449 asm: mips.AMOVHU,
27450 reg: regInfo{
27451 inputs: []inputInfo{
27452 {0, 469762046},
27453 },
27454 outputs: []outputInfo{
27455 {0, 335544318},
27456 },
27457 },
27458 },
27459 {
27460 name: "MOVWreg",
27461 argLen: 1,
27462 asm: mips.AMOVW,
27463 reg: regInfo{
27464 inputs: []inputInfo{
27465 {0, 469762046},
27466 },
27467 outputs: []outputInfo{
27468 {0, 335544318},
27469 },
27470 },
27471 },
27472 {
27473 name: "MOVWnop",
27474 argLen: 1,
27475 resultInArg0: true,
27476 reg: regInfo{
27477 inputs: []inputInfo{
27478 {0, 335544318},
27479 },
27480 outputs: []outputInfo{
27481 {0, 335544318},
27482 },
27483 },
27484 },
27485 {
27486 name: "CMOVZ",
27487 argLen: 3,
27488 resultInArg0: true,
27489 asm: mips.ACMOVZ,
27490 reg: regInfo{
27491 inputs: []inputInfo{
27492 {0, 335544318},
27493 {1, 335544318},
27494 {2, 335544318},
27495 },
27496 outputs: []outputInfo{
27497 {0, 335544318},
27498 },
27499 },
27500 },
27501 {
27502 name: "CMOVZzero",
27503 argLen: 2,
27504 resultInArg0: true,
27505 asm: mips.ACMOVZ,
27506 reg: regInfo{
27507 inputs: []inputInfo{
27508 {0, 335544318},
27509 {1, 469762046},
27510 },
27511 outputs: []outputInfo{
27512 {0, 335544318},
27513 },
27514 },
27515 },
27516 {
27517 name: "MOVWF",
27518 argLen: 1,
27519 asm: mips.AMOVWF,
27520 reg: regInfo{
27521 inputs: []inputInfo{
27522 {0, 35183835217920},
27523 },
27524 outputs: []outputInfo{
27525 {0, 35183835217920},
27526 },
27527 },
27528 },
27529 {
27530 name: "MOVWD",
27531 argLen: 1,
27532 asm: mips.AMOVWD,
27533 reg: regInfo{
27534 inputs: []inputInfo{
27535 {0, 35183835217920},
27536 },
27537 outputs: []outputInfo{
27538 {0, 35183835217920},
27539 },
27540 },
27541 },
27542 {
27543 name: "TRUNCFW",
27544 argLen: 1,
27545 asm: mips.ATRUNCFW,
27546 reg: regInfo{
27547 inputs: []inputInfo{
27548 {0, 35183835217920},
27549 },
27550 outputs: []outputInfo{
27551 {0, 35183835217920},
27552 },
27553 },
27554 },
27555 {
27556 name: "TRUNCDW",
27557 argLen: 1,
27558 asm: mips.ATRUNCDW,
27559 reg: regInfo{
27560 inputs: []inputInfo{
27561 {0, 35183835217920},
27562 },
27563 outputs: []outputInfo{
27564 {0, 35183835217920},
27565 },
27566 },
27567 },
27568 {
27569 name: "MOVFD",
27570 argLen: 1,
27571 asm: mips.AMOVFD,
27572 reg: regInfo{
27573 inputs: []inputInfo{
27574 {0, 35183835217920},
27575 },
27576 outputs: []outputInfo{
27577 {0, 35183835217920},
27578 },
27579 },
27580 },
27581 {
27582 name: "MOVDF",
27583 argLen: 1,
27584 asm: mips.AMOVDF,
27585 reg: regInfo{
27586 inputs: []inputInfo{
27587 {0, 35183835217920},
27588 },
27589 outputs: []outputInfo{
27590 {0, 35183835217920},
27591 },
27592 },
27593 },
27594 {
27595 name: "CALLstatic",
27596 auxType: auxCallOff,
27597 argLen: 1,
27598 clobberFlags: true,
27599 call: true,
27600 reg: regInfo{
27601 clobbers: 140737421246462,
27602 },
27603 },
27604 {
27605 name: "CALLtail",
27606 auxType: auxCallOff,
27607 argLen: 1,
27608 clobberFlags: true,
27609 call: true,
27610 tailCall: true,
27611 reg: regInfo{
27612 clobbers: 140737421246462,
27613 },
27614 },
27615 {
27616 name: "CALLclosure",
27617 auxType: auxCallOff,
27618 argLen: 3,
27619 clobberFlags: true,
27620 call: true,
27621 reg: regInfo{
27622 inputs: []inputInfo{
27623 {1, 4194304},
27624 {0, 402653182},
27625 },
27626 clobbers: 140737421246462,
27627 },
27628 },
27629 {
27630 name: "CALLinter",
27631 auxType: auxCallOff,
27632 argLen: 2,
27633 clobberFlags: true,
27634 call: true,
27635 reg: regInfo{
27636 inputs: []inputInfo{
27637 {0, 335544318},
27638 },
27639 clobbers: 140737421246462,
27640 },
27641 },
27642 {
27643 name: "LoweredAtomicLoad8",
27644 argLen: 2,
27645 faultOnNilArg0: true,
27646 reg: regInfo{
27647 inputs: []inputInfo{
27648 {0, 140738025226238},
27649 },
27650 outputs: []outputInfo{
27651 {0, 335544318},
27652 },
27653 },
27654 },
27655 {
27656 name: "LoweredAtomicLoad32",
27657 argLen: 2,
27658 faultOnNilArg0: true,
27659 reg: regInfo{
27660 inputs: []inputInfo{
27661 {0, 140738025226238},
27662 },
27663 outputs: []outputInfo{
27664 {0, 335544318},
27665 },
27666 },
27667 },
27668 {
27669 name: "LoweredAtomicStore8",
27670 argLen: 3,
27671 faultOnNilArg0: true,
27672 hasSideEffects: true,
27673 reg: regInfo{
27674 inputs: []inputInfo{
27675 {1, 469762046},
27676 {0, 140738025226238},
27677 },
27678 },
27679 },
27680 {
27681 name: "LoweredAtomicStore32",
27682 argLen: 3,
27683 faultOnNilArg0: true,
27684 hasSideEffects: true,
27685 reg: regInfo{
27686 inputs: []inputInfo{
27687 {1, 469762046},
27688 {0, 140738025226238},
27689 },
27690 },
27691 },
27692 {
27693 name: "LoweredAtomicStorezero",
27694 argLen: 2,
27695 faultOnNilArg0: true,
27696 hasSideEffects: true,
27697 reg: regInfo{
27698 inputs: []inputInfo{
27699 {0, 140738025226238},
27700 },
27701 },
27702 },
27703 {
27704 name: "LoweredAtomicExchange",
27705 argLen: 3,
27706 resultNotInArgs: true,
27707 faultOnNilArg0: true,
27708 hasSideEffects: true,
27709 unsafePoint: true,
27710 reg: regInfo{
27711 inputs: []inputInfo{
27712 {1, 469762046},
27713 {0, 140738025226238},
27714 },
27715 outputs: []outputInfo{
27716 {0, 335544318},
27717 },
27718 },
27719 },
27720 {
27721 name: "LoweredAtomicAdd",
27722 argLen: 3,
27723 resultNotInArgs: true,
27724 faultOnNilArg0: true,
27725 hasSideEffects: true,
27726 unsafePoint: true,
27727 reg: regInfo{
27728 inputs: []inputInfo{
27729 {1, 469762046},
27730 {0, 140738025226238},
27731 },
27732 outputs: []outputInfo{
27733 {0, 335544318},
27734 },
27735 },
27736 },
27737 {
27738 name: "LoweredAtomicAddconst",
27739 auxType: auxInt32,
27740 argLen: 2,
27741 resultNotInArgs: true,
27742 faultOnNilArg0: true,
27743 hasSideEffects: true,
27744 unsafePoint: true,
27745 reg: regInfo{
27746 inputs: []inputInfo{
27747 {0, 140738025226238},
27748 },
27749 outputs: []outputInfo{
27750 {0, 335544318},
27751 },
27752 },
27753 },
27754 {
27755 name: "LoweredAtomicCas",
27756 argLen: 4,
27757 resultNotInArgs: true,
27758 faultOnNilArg0: true,
27759 hasSideEffects: true,
27760 unsafePoint: true,
27761 reg: regInfo{
27762 inputs: []inputInfo{
27763 {1, 469762046},
27764 {2, 469762046},
27765 {0, 140738025226238},
27766 },
27767 outputs: []outputInfo{
27768 {0, 335544318},
27769 },
27770 },
27771 },
27772 {
27773 name: "LoweredAtomicAnd",
27774 argLen: 3,
27775 faultOnNilArg0: true,
27776 hasSideEffects: true,
27777 unsafePoint: true,
27778 asm: mips.AAND,
27779 reg: regInfo{
27780 inputs: []inputInfo{
27781 {1, 469762046},
27782 {0, 140738025226238},
27783 },
27784 },
27785 },
27786 {
27787 name: "LoweredAtomicOr",
27788 argLen: 3,
27789 faultOnNilArg0: true,
27790 hasSideEffects: true,
27791 unsafePoint: true,
27792 asm: mips.AOR,
27793 reg: regInfo{
27794 inputs: []inputInfo{
27795 {1, 469762046},
27796 {0, 140738025226238},
27797 },
27798 },
27799 },
27800 {
27801 name: "LoweredZero",
27802 auxType: auxInt32,
27803 argLen: 3,
27804 faultOnNilArg0: true,
27805 reg: regInfo{
27806 inputs: []inputInfo{
27807 {0, 2},
27808 {1, 335544318},
27809 },
27810 clobbers: 2,
27811 },
27812 },
27813 {
27814 name: "LoweredMove",
27815 auxType: auxInt32,
27816 argLen: 4,
27817 faultOnNilArg0: true,
27818 faultOnNilArg1: true,
27819 reg: regInfo{
27820 inputs: []inputInfo{
27821 {0, 4},
27822 {1, 2},
27823 {2, 335544318},
27824 },
27825 clobbers: 6,
27826 },
27827 },
27828 {
27829 name: "LoweredNilCheck",
27830 argLen: 2,
27831 nilCheck: true,
27832 faultOnNilArg0: true,
27833 reg: regInfo{
27834 inputs: []inputInfo{
27835 {0, 469762046},
27836 },
27837 },
27838 },
27839 {
27840 name: "FPFlagTrue",
27841 argLen: 1,
27842 reg: regInfo{
27843 outputs: []outputInfo{
27844 {0, 335544318},
27845 },
27846 },
27847 },
27848 {
27849 name: "FPFlagFalse",
27850 argLen: 1,
27851 reg: regInfo{
27852 outputs: []outputInfo{
27853 {0, 335544318},
27854 },
27855 },
27856 },
27857 {
27858 name: "LoweredGetClosurePtr",
27859 argLen: 0,
27860 zeroWidth: true,
27861 reg: regInfo{
27862 outputs: []outputInfo{
27863 {0, 4194304},
27864 },
27865 },
27866 },
27867 {
27868 name: "LoweredGetCallerSP",
27869 argLen: 1,
27870 rematerializeable: true,
27871 reg: regInfo{
27872 outputs: []outputInfo{
27873 {0, 335544318},
27874 },
27875 },
27876 },
27877 {
27878 name: "LoweredGetCallerPC",
27879 argLen: 0,
27880 rematerializeable: true,
27881 reg: regInfo{
27882 outputs: []outputInfo{
27883 {0, 335544318},
27884 },
27885 },
27886 },
27887 {
27888 name: "LoweredWB",
27889 auxType: auxInt64,
27890 argLen: 1,
27891 clobberFlags: true,
27892 reg: regInfo{
27893 clobbers: 140737219919872,
27894 outputs: []outputInfo{
27895 {0, 16777216},
27896 },
27897 },
27898 },
27899 {
27900 name: "LoweredPanicBoundsA",
27901 auxType: auxInt64,
27902 argLen: 3,
27903 call: true,
27904 reg: regInfo{
27905 inputs: []inputInfo{
27906 {0, 8},
27907 {1, 16},
27908 },
27909 },
27910 },
27911 {
27912 name: "LoweredPanicBoundsB",
27913 auxType: auxInt64,
27914 argLen: 3,
27915 call: true,
27916 reg: regInfo{
27917 inputs: []inputInfo{
27918 {0, 4},
27919 {1, 8},
27920 },
27921 },
27922 },
27923 {
27924 name: "LoweredPanicBoundsC",
27925 auxType: auxInt64,
27926 argLen: 3,
27927 call: true,
27928 reg: regInfo{
27929 inputs: []inputInfo{
27930 {0, 2},
27931 {1, 4},
27932 },
27933 },
27934 },
27935 {
27936 name: "LoweredPanicExtendA",
27937 auxType: auxInt64,
27938 argLen: 4,
27939 call: true,
27940 reg: regInfo{
27941 inputs: []inputInfo{
27942 {0, 32},
27943 {1, 8},
27944 {2, 16},
27945 },
27946 },
27947 },
27948 {
27949 name: "LoweredPanicExtendB",
27950 auxType: auxInt64,
27951 argLen: 4,
27952 call: true,
27953 reg: regInfo{
27954 inputs: []inputInfo{
27955 {0, 32},
27956 {1, 4},
27957 {2, 8},
27958 },
27959 },
27960 },
27961 {
27962 name: "LoweredPanicExtendC",
27963 auxType: auxInt64,
27964 argLen: 4,
27965 call: true,
27966 reg: regInfo{
27967 inputs: []inputInfo{
27968 {0, 32},
27969 {1, 2},
27970 {2, 4},
27971 },
27972 },
27973 },
27974
27975 {
27976 name: "ADDV",
27977 argLen: 2,
27978 commutative: true,
27979 asm: mips.AADDVU,
27980 reg: regInfo{
27981 inputs: []inputInfo{
27982 {0, 234881022},
27983 {1, 234881022},
27984 },
27985 outputs: []outputInfo{
27986 {0, 167772158},
27987 },
27988 },
27989 },
27990 {
27991 name: "ADDVconst",
27992 auxType: auxInt64,
27993 argLen: 1,
27994 asm: mips.AADDVU,
27995 reg: regInfo{
27996 inputs: []inputInfo{
27997 {0, 268435454},
27998 },
27999 outputs: []outputInfo{
28000 {0, 167772158},
28001 },
28002 },
28003 },
28004 {
28005 name: "SUBV",
28006 argLen: 2,
28007 asm: mips.ASUBVU,
28008 reg: regInfo{
28009 inputs: []inputInfo{
28010 {0, 234881022},
28011 {1, 234881022},
28012 },
28013 outputs: []outputInfo{
28014 {0, 167772158},
28015 },
28016 },
28017 },
28018 {
28019 name: "SUBVconst",
28020 auxType: auxInt64,
28021 argLen: 1,
28022 asm: mips.ASUBVU,
28023 reg: regInfo{
28024 inputs: []inputInfo{
28025 {0, 234881022},
28026 },
28027 outputs: []outputInfo{
28028 {0, 167772158},
28029 },
28030 },
28031 },
28032 {
28033 name: "MULV",
28034 argLen: 2,
28035 commutative: true,
28036 asm: mips.AMULV,
28037 reg: regInfo{
28038 inputs: []inputInfo{
28039 {0, 234881022},
28040 {1, 234881022},
28041 },
28042 outputs: []outputInfo{
28043 {0, 1152921504606846976},
28044 {1, 2305843009213693952},
28045 },
28046 },
28047 },
28048 {
28049 name: "MULVU",
28050 argLen: 2,
28051 commutative: true,
28052 asm: mips.AMULVU,
28053 reg: regInfo{
28054 inputs: []inputInfo{
28055 {0, 234881022},
28056 {1, 234881022},
28057 },
28058 outputs: []outputInfo{
28059 {0, 1152921504606846976},
28060 {1, 2305843009213693952},
28061 },
28062 },
28063 },
28064 {
28065 name: "DIVV",
28066 argLen: 2,
28067 asm: mips.ADIVV,
28068 reg: regInfo{
28069 inputs: []inputInfo{
28070 {0, 234881022},
28071 {1, 234881022},
28072 },
28073 outputs: []outputInfo{
28074 {0, 1152921504606846976},
28075 {1, 2305843009213693952},
28076 },
28077 },
28078 },
28079 {
28080 name: "DIVVU",
28081 argLen: 2,
28082 asm: mips.ADIVVU,
28083 reg: regInfo{
28084 inputs: []inputInfo{
28085 {0, 234881022},
28086 {1, 234881022},
28087 },
28088 outputs: []outputInfo{
28089 {0, 1152921504606846976},
28090 {1, 2305843009213693952},
28091 },
28092 },
28093 },
28094 {
28095 name: "ADDF",
28096 argLen: 2,
28097 commutative: true,
28098 asm: mips.AADDF,
28099 reg: regInfo{
28100 inputs: []inputInfo{
28101 {0, 1152921504338411520},
28102 {1, 1152921504338411520},
28103 },
28104 outputs: []outputInfo{
28105 {0, 1152921504338411520},
28106 },
28107 },
28108 },
28109 {
28110 name: "ADDD",
28111 argLen: 2,
28112 commutative: true,
28113 asm: mips.AADDD,
28114 reg: regInfo{
28115 inputs: []inputInfo{
28116 {0, 1152921504338411520},
28117 {1, 1152921504338411520},
28118 },
28119 outputs: []outputInfo{
28120 {0, 1152921504338411520},
28121 },
28122 },
28123 },
28124 {
28125 name: "SUBF",
28126 argLen: 2,
28127 asm: mips.ASUBF,
28128 reg: regInfo{
28129 inputs: []inputInfo{
28130 {0, 1152921504338411520},
28131 {1, 1152921504338411520},
28132 },
28133 outputs: []outputInfo{
28134 {0, 1152921504338411520},
28135 },
28136 },
28137 },
28138 {
28139 name: "SUBD",
28140 argLen: 2,
28141 asm: mips.ASUBD,
28142 reg: regInfo{
28143 inputs: []inputInfo{
28144 {0, 1152921504338411520},
28145 {1, 1152921504338411520},
28146 },
28147 outputs: []outputInfo{
28148 {0, 1152921504338411520},
28149 },
28150 },
28151 },
28152 {
28153 name: "MULF",
28154 argLen: 2,
28155 commutative: true,
28156 asm: mips.AMULF,
28157 reg: regInfo{
28158 inputs: []inputInfo{
28159 {0, 1152921504338411520},
28160 {1, 1152921504338411520},
28161 },
28162 outputs: []outputInfo{
28163 {0, 1152921504338411520},
28164 },
28165 },
28166 },
28167 {
28168 name: "MULD",
28169 argLen: 2,
28170 commutative: true,
28171 asm: mips.AMULD,
28172 reg: regInfo{
28173 inputs: []inputInfo{
28174 {0, 1152921504338411520},
28175 {1, 1152921504338411520},
28176 },
28177 outputs: []outputInfo{
28178 {0, 1152921504338411520},
28179 },
28180 },
28181 },
28182 {
28183 name: "DIVF",
28184 argLen: 2,
28185 asm: mips.ADIVF,
28186 reg: regInfo{
28187 inputs: []inputInfo{
28188 {0, 1152921504338411520},
28189 {1, 1152921504338411520},
28190 },
28191 outputs: []outputInfo{
28192 {0, 1152921504338411520},
28193 },
28194 },
28195 },
28196 {
28197 name: "DIVD",
28198 argLen: 2,
28199 asm: mips.ADIVD,
28200 reg: regInfo{
28201 inputs: []inputInfo{
28202 {0, 1152921504338411520},
28203 {1, 1152921504338411520},
28204 },
28205 outputs: []outputInfo{
28206 {0, 1152921504338411520},
28207 },
28208 },
28209 },
28210 {
28211 name: "AND",
28212 argLen: 2,
28213 commutative: true,
28214 asm: mips.AAND,
28215 reg: regInfo{
28216 inputs: []inputInfo{
28217 {0, 234881022},
28218 {1, 234881022},
28219 },
28220 outputs: []outputInfo{
28221 {0, 167772158},
28222 },
28223 },
28224 },
28225 {
28226 name: "ANDconst",
28227 auxType: auxInt64,
28228 argLen: 1,
28229 asm: mips.AAND,
28230 reg: regInfo{
28231 inputs: []inputInfo{
28232 {0, 234881022},
28233 },
28234 outputs: []outputInfo{
28235 {0, 167772158},
28236 },
28237 },
28238 },
28239 {
28240 name: "OR",
28241 argLen: 2,
28242 commutative: true,
28243 asm: mips.AOR,
28244 reg: regInfo{
28245 inputs: []inputInfo{
28246 {0, 234881022},
28247 {1, 234881022},
28248 },
28249 outputs: []outputInfo{
28250 {0, 167772158},
28251 },
28252 },
28253 },
28254 {
28255 name: "ORconst",
28256 auxType: auxInt64,
28257 argLen: 1,
28258 asm: mips.AOR,
28259 reg: regInfo{
28260 inputs: []inputInfo{
28261 {0, 234881022},
28262 },
28263 outputs: []outputInfo{
28264 {0, 167772158},
28265 },
28266 },
28267 },
28268 {
28269 name: "XOR",
28270 argLen: 2,
28271 commutative: true,
28272 asm: mips.AXOR,
28273 reg: regInfo{
28274 inputs: []inputInfo{
28275 {0, 234881022},
28276 {1, 234881022},
28277 },
28278 outputs: []outputInfo{
28279 {0, 167772158},
28280 },
28281 },
28282 },
28283 {
28284 name: "XORconst",
28285 auxType: auxInt64,
28286 argLen: 1,
28287 asm: mips.AXOR,
28288 reg: regInfo{
28289 inputs: []inputInfo{
28290 {0, 234881022},
28291 },
28292 outputs: []outputInfo{
28293 {0, 167772158},
28294 },
28295 },
28296 },
28297 {
28298 name: "NOR",
28299 argLen: 2,
28300 commutative: true,
28301 asm: mips.ANOR,
28302 reg: regInfo{
28303 inputs: []inputInfo{
28304 {0, 234881022},
28305 {1, 234881022},
28306 },
28307 outputs: []outputInfo{
28308 {0, 167772158},
28309 },
28310 },
28311 },
28312 {
28313 name: "NORconst",
28314 auxType: auxInt64,
28315 argLen: 1,
28316 asm: mips.ANOR,
28317 reg: regInfo{
28318 inputs: []inputInfo{
28319 {0, 234881022},
28320 },
28321 outputs: []outputInfo{
28322 {0, 167772158},
28323 },
28324 },
28325 },
28326 {
28327 name: "NEGV",
28328 argLen: 1,
28329 reg: regInfo{
28330 inputs: []inputInfo{
28331 {0, 234881022},
28332 },
28333 outputs: []outputInfo{
28334 {0, 167772158},
28335 },
28336 },
28337 },
28338 {
28339 name: "NEGF",
28340 argLen: 1,
28341 asm: mips.ANEGF,
28342 reg: regInfo{
28343 inputs: []inputInfo{
28344 {0, 1152921504338411520},
28345 },
28346 outputs: []outputInfo{
28347 {0, 1152921504338411520},
28348 },
28349 },
28350 },
28351 {
28352 name: "NEGD",
28353 argLen: 1,
28354 asm: mips.ANEGD,
28355 reg: regInfo{
28356 inputs: []inputInfo{
28357 {0, 1152921504338411520},
28358 },
28359 outputs: []outputInfo{
28360 {0, 1152921504338411520},
28361 },
28362 },
28363 },
28364 {
28365 name: "ABSD",
28366 argLen: 1,
28367 asm: mips.AABSD,
28368 reg: regInfo{
28369 inputs: []inputInfo{
28370 {0, 1152921504338411520},
28371 },
28372 outputs: []outputInfo{
28373 {0, 1152921504338411520},
28374 },
28375 },
28376 },
28377 {
28378 name: "SQRTD",
28379 argLen: 1,
28380 asm: mips.ASQRTD,
28381 reg: regInfo{
28382 inputs: []inputInfo{
28383 {0, 1152921504338411520},
28384 },
28385 outputs: []outputInfo{
28386 {0, 1152921504338411520},
28387 },
28388 },
28389 },
28390 {
28391 name: "SQRTF",
28392 argLen: 1,
28393 asm: mips.ASQRTF,
28394 reg: regInfo{
28395 inputs: []inputInfo{
28396 {0, 1152921504338411520},
28397 },
28398 outputs: []outputInfo{
28399 {0, 1152921504338411520},
28400 },
28401 },
28402 },
28403 {
28404 name: "SLLV",
28405 argLen: 2,
28406 asm: mips.ASLLV,
28407 reg: regInfo{
28408 inputs: []inputInfo{
28409 {0, 234881022},
28410 {1, 234881022},
28411 },
28412 outputs: []outputInfo{
28413 {0, 167772158},
28414 },
28415 },
28416 },
28417 {
28418 name: "SLLVconst",
28419 auxType: auxInt64,
28420 argLen: 1,
28421 asm: mips.ASLLV,
28422 reg: regInfo{
28423 inputs: []inputInfo{
28424 {0, 234881022},
28425 },
28426 outputs: []outputInfo{
28427 {0, 167772158},
28428 },
28429 },
28430 },
28431 {
28432 name: "SRLV",
28433 argLen: 2,
28434 asm: mips.ASRLV,
28435 reg: regInfo{
28436 inputs: []inputInfo{
28437 {0, 234881022},
28438 {1, 234881022},
28439 },
28440 outputs: []outputInfo{
28441 {0, 167772158},
28442 },
28443 },
28444 },
28445 {
28446 name: "SRLVconst",
28447 auxType: auxInt64,
28448 argLen: 1,
28449 asm: mips.ASRLV,
28450 reg: regInfo{
28451 inputs: []inputInfo{
28452 {0, 234881022},
28453 },
28454 outputs: []outputInfo{
28455 {0, 167772158},
28456 },
28457 },
28458 },
28459 {
28460 name: "SRAV",
28461 argLen: 2,
28462 asm: mips.ASRAV,
28463 reg: regInfo{
28464 inputs: []inputInfo{
28465 {0, 234881022},
28466 {1, 234881022},
28467 },
28468 outputs: []outputInfo{
28469 {0, 167772158},
28470 },
28471 },
28472 },
28473 {
28474 name: "SRAVconst",
28475 auxType: auxInt64,
28476 argLen: 1,
28477 asm: mips.ASRAV,
28478 reg: regInfo{
28479 inputs: []inputInfo{
28480 {0, 234881022},
28481 },
28482 outputs: []outputInfo{
28483 {0, 167772158},
28484 },
28485 },
28486 },
28487 {
28488 name: "SGT",
28489 argLen: 2,
28490 asm: mips.ASGT,
28491 reg: regInfo{
28492 inputs: []inputInfo{
28493 {0, 234881022},
28494 {1, 234881022},
28495 },
28496 outputs: []outputInfo{
28497 {0, 167772158},
28498 },
28499 },
28500 },
28501 {
28502 name: "SGTconst",
28503 auxType: auxInt64,
28504 argLen: 1,
28505 asm: mips.ASGT,
28506 reg: regInfo{
28507 inputs: []inputInfo{
28508 {0, 234881022},
28509 },
28510 outputs: []outputInfo{
28511 {0, 167772158},
28512 },
28513 },
28514 },
28515 {
28516 name: "SGTU",
28517 argLen: 2,
28518 asm: mips.ASGTU,
28519 reg: regInfo{
28520 inputs: []inputInfo{
28521 {0, 234881022},
28522 {1, 234881022},
28523 },
28524 outputs: []outputInfo{
28525 {0, 167772158},
28526 },
28527 },
28528 },
28529 {
28530 name: "SGTUconst",
28531 auxType: auxInt64,
28532 argLen: 1,
28533 asm: mips.ASGTU,
28534 reg: regInfo{
28535 inputs: []inputInfo{
28536 {0, 234881022},
28537 },
28538 outputs: []outputInfo{
28539 {0, 167772158},
28540 },
28541 },
28542 },
28543 {
28544 name: "CMPEQF",
28545 argLen: 2,
28546 asm: mips.ACMPEQF,
28547 reg: regInfo{
28548 inputs: []inputInfo{
28549 {0, 1152921504338411520},
28550 {1, 1152921504338411520},
28551 },
28552 },
28553 },
28554 {
28555 name: "CMPEQD",
28556 argLen: 2,
28557 asm: mips.ACMPEQD,
28558 reg: regInfo{
28559 inputs: []inputInfo{
28560 {0, 1152921504338411520},
28561 {1, 1152921504338411520},
28562 },
28563 },
28564 },
28565 {
28566 name: "CMPGEF",
28567 argLen: 2,
28568 asm: mips.ACMPGEF,
28569 reg: regInfo{
28570 inputs: []inputInfo{
28571 {0, 1152921504338411520},
28572 {1, 1152921504338411520},
28573 },
28574 },
28575 },
28576 {
28577 name: "CMPGED",
28578 argLen: 2,
28579 asm: mips.ACMPGED,
28580 reg: regInfo{
28581 inputs: []inputInfo{
28582 {0, 1152921504338411520},
28583 {1, 1152921504338411520},
28584 },
28585 },
28586 },
28587 {
28588 name: "CMPGTF",
28589 argLen: 2,
28590 asm: mips.ACMPGTF,
28591 reg: regInfo{
28592 inputs: []inputInfo{
28593 {0, 1152921504338411520},
28594 {1, 1152921504338411520},
28595 },
28596 },
28597 },
28598 {
28599 name: "CMPGTD",
28600 argLen: 2,
28601 asm: mips.ACMPGTD,
28602 reg: regInfo{
28603 inputs: []inputInfo{
28604 {0, 1152921504338411520},
28605 {1, 1152921504338411520},
28606 },
28607 },
28608 },
28609 {
28610 name: "MOVVconst",
28611 auxType: auxInt64,
28612 argLen: 0,
28613 rematerializeable: true,
28614 asm: mips.AMOVV,
28615 reg: regInfo{
28616 outputs: []outputInfo{
28617 {0, 167772158},
28618 },
28619 },
28620 },
28621 {
28622 name: "MOVFconst",
28623 auxType: auxFloat64,
28624 argLen: 0,
28625 rematerializeable: true,
28626 asm: mips.AMOVF,
28627 reg: regInfo{
28628 outputs: []outputInfo{
28629 {0, 1152921504338411520},
28630 },
28631 },
28632 },
28633 {
28634 name: "MOVDconst",
28635 auxType: auxFloat64,
28636 argLen: 0,
28637 rematerializeable: true,
28638 asm: mips.AMOVD,
28639 reg: regInfo{
28640 outputs: []outputInfo{
28641 {0, 1152921504338411520},
28642 },
28643 },
28644 },
28645 {
28646 name: "MOVVaddr",
28647 auxType: auxSymOff,
28648 argLen: 1,
28649 rematerializeable: true,
28650 symEffect: SymAddr,
28651 asm: mips.AMOVV,
28652 reg: regInfo{
28653 inputs: []inputInfo{
28654 {0, 4611686018460942336},
28655 },
28656 outputs: []outputInfo{
28657 {0, 167772158},
28658 },
28659 },
28660 },
28661 {
28662 name: "MOVBload",
28663 auxType: auxSymOff,
28664 argLen: 2,
28665 faultOnNilArg0: true,
28666 symEffect: SymRead,
28667 asm: mips.AMOVB,
28668 reg: regInfo{
28669 inputs: []inputInfo{
28670 {0, 4611686018695823358},
28671 },
28672 outputs: []outputInfo{
28673 {0, 167772158},
28674 },
28675 },
28676 },
28677 {
28678 name: "MOVBUload",
28679 auxType: auxSymOff,
28680 argLen: 2,
28681 faultOnNilArg0: true,
28682 symEffect: SymRead,
28683 asm: mips.AMOVBU,
28684 reg: regInfo{
28685 inputs: []inputInfo{
28686 {0, 4611686018695823358},
28687 },
28688 outputs: []outputInfo{
28689 {0, 167772158},
28690 },
28691 },
28692 },
28693 {
28694 name: "MOVHload",
28695 auxType: auxSymOff,
28696 argLen: 2,
28697 faultOnNilArg0: true,
28698 symEffect: SymRead,
28699 asm: mips.AMOVH,
28700 reg: regInfo{
28701 inputs: []inputInfo{
28702 {0, 4611686018695823358},
28703 },
28704 outputs: []outputInfo{
28705 {0, 167772158},
28706 },
28707 },
28708 },
28709 {
28710 name: "MOVHUload",
28711 auxType: auxSymOff,
28712 argLen: 2,
28713 faultOnNilArg0: true,
28714 symEffect: SymRead,
28715 asm: mips.AMOVHU,
28716 reg: regInfo{
28717 inputs: []inputInfo{
28718 {0, 4611686018695823358},
28719 },
28720 outputs: []outputInfo{
28721 {0, 167772158},
28722 },
28723 },
28724 },
28725 {
28726 name: "MOVWload",
28727 auxType: auxSymOff,
28728 argLen: 2,
28729 faultOnNilArg0: true,
28730 symEffect: SymRead,
28731 asm: mips.AMOVW,
28732 reg: regInfo{
28733 inputs: []inputInfo{
28734 {0, 4611686018695823358},
28735 },
28736 outputs: []outputInfo{
28737 {0, 167772158},
28738 },
28739 },
28740 },
28741 {
28742 name: "MOVWUload",
28743 auxType: auxSymOff,
28744 argLen: 2,
28745 faultOnNilArg0: true,
28746 symEffect: SymRead,
28747 asm: mips.AMOVWU,
28748 reg: regInfo{
28749 inputs: []inputInfo{
28750 {0, 4611686018695823358},
28751 },
28752 outputs: []outputInfo{
28753 {0, 167772158},
28754 },
28755 },
28756 },
28757 {
28758 name: "MOVVload",
28759 auxType: auxSymOff,
28760 argLen: 2,
28761 faultOnNilArg0: true,
28762 symEffect: SymRead,
28763 asm: mips.AMOVV,
28764 reg: regInfo{
28765 inputs: []inputInfo{
28766 {0, 4611686018695823358},
28767 },
28768 outputs: []outputInfo{
28769 {0, 167772158},
28770 },
28771 },
28772 },
28773 {
28774 name: "MOVFload",
28775 auxType: auxSymOff,
28776 argLen: 2,
28777 faultOnNilArg0: true,
28778 symEffect: SymRead,
28779 asm: mips.AMOVF,
28780 reg: regInfo{
28781 inputs: []inputInfo{
28782 {0, 4611686018695823358},
28783 },
28784 outputs: []outputInfo{
28785 {0, 1152921504338411520},
28786 },
28787 },
28788 },
28789 {
28790 name: "MOVDload",
28791 auxType: auxSymOff,
28792 argLen: 2,
28793 faultOnNilArg0: true,
28794 symEffect: SymRead,
28795 asm: mips.AMOVD,
28796 reg: regInfo{
28797 inputs: []inputInfo{
28798 {0, 4611686018695823358},
28799 },
28800 outputs: []outputInfo{
28801 {0, 1152921504338411520},
28802 },
28803 },
28804 },
28805 {
28806 name: "MOVBstore",
28807 auxType: auxSymOff,
28808 argLen: 3,
28809 faultOnNilArg0: true,
28810 symEffect: SymWrite,
28811 asm: mips.AMOVB,
28812 reg: regInfo{
28813 inputs: []inputInfo{
28814 {1, 234881022},
28815 {0, 4611686018695823358},
28816 },
28817 },
28818 },
28819 {
28820 name: "MOVHstore",
28821 auxType: auxSymOff,
28822 argLen: 3,
28823 faultOnNilArg0: true,
28824 symEffect: SymWrite,
28825 asm: mips.AMOVH,
28826 reg: regInfo{
28827 inputs: []inputInfo{
28828 {1, 234881022},
28829 {0, 4611686018695823358},
28830 },
28831 },
28832 },
28833 {
28834 name: "MOVWstore",
28835 auxType: auxSymOff,
28836 argLen: 3,
28837 faultOnNilArg0: true,
28838 symEffect: SymWrite,
28839 asm: mips.AMOVW,
28840 reg: regInfo{
28841 inputs: []inputInfo{
28842 {1, 234881022},
28843 {0, 4611686018695823358},
28844 },
28845 },
28846 },
28847 {
28848 name: "MOVVstore",
28849 auxType: auxSymOff,
28850 argLen: 3,
28851 faultOnNilArg0: true,
28852 symEffect: SymWrite,
28853 asm: mips.AMOVV,
28854 reg: regInfo{
28855 inputs: []inputInfo{
28856 {1, 234881022},
28857 {0, 4611686018695823358},
28858 },
28859 },
28860 },
28861 {
28862 name: "MOVFstore",
28863 auxType: auxSymOff,
28864 argLen: 3,
28865 faultOnNilArg0: true,
28866 symEffect: SymWrite,
28867 asm: mips.AMOVF,
28868 reg: regInfo{
28869 inputs: []inputInfo{
28870 {0, 4611686018695823358},
28871 {1, 1152921504338411520},
28872 },
28873 },
28874 },
28875 {
28876 name: "MOVDstore",
28877 auxType: auxSymOff,
28878 argLen: 3,
28879 faultOnNilArg0: true,
28880 symEffect: SymWrite,
28881 asm: mips.AMOVD,
28882 reg: regInfo{
28883 inputs: []inputInfo{
28884 {0, 4611686018695823358},
28885 {1, 1152921504338411520},
28886 },
28887 },
28888 },
28889 {
28890 name: "MOVBstorezero",
28891 auxType: auxSymOff,
28892 argLen: 2,
28893 faultOnNilArg0: true,
28894 symEffect: SymWrite,
28895 asm: mips.AMOVB,
28896 reg: regInfo{
28897 inputs: []inputInfo{
28898 {0, 4611686018695823358},
28899 },
28900 },
28901 },
28902 {
28903 name: "MOVHstorezero",
28904 auxType: auxSymOff,
28905 argLen: 2,
28906 faultOnNilArg0: true,
28907 symEffect: SymWrite,
28908 asm: mips.AMOVH,
28909 reg: regInfo{
28910 inputs: []inputInfo{
28911 {0, 4611686018695823358},
28912 },
28913 },
28914 },
28915 {
28916 name: "MOVWstorezero",
28917 auxType: auxSymOff,
28918 argLen: 2,
28919 faultOnNilArg0: true,
28920 symEffect: SymWrite,
28921 asm: mips.AMOVW,
28922 reg: regInfo{
28923 inputs: []inputInfo{
28924 {0, 4611686018695823358},
28925 },
28926 },
28927 },
28928 {
28929 name: "MOVVstorezero",
28930 auxType: auxSymOff,
28931 argLen: 2,
28932 faultOnNilArg0: true,
28933 symEffect: SymWrite,
28934 asm: mips.AMOVV,
28935 reg: regInfo{
28936 inputs: []inputInfo{
28937 {0, 4611686018695823358},
28938 },
28939 },
28940 },
28941 {
28942 name: "MOVWfpgp",
28943 argLen: 1,
28944 asm: mips.AMOVW,
28945 reg: regInfo{
28946 inputs: []inputInfo{
28947 {0, 1152921504338411520},
28948 },
28949 outputs: []outputInfo{
28950 {0, 167772158},
28951 },
28952 },
28953 },
28954 {
28955 name: "MOVWgpfp",
28956 argLen: 1,
28957 asm: mips.AMOVW,
28958 reg: regInfo{
28959 inputs: []inputInfo{
28960 {0, 167772158},
28961 },
28962 outputs: []outputInfo{
28963 {0, 1152921504338411520},
28964 },
28965 },
28966 },
28967 {
28968 name: "MOVVfpgp",
28969 argLen: 1,
28970 asm: mips.AMOVV,
28971 reg: regInfo{
28972 inputs: []inputInfo{
28973 {0, 1152921504338411520},
28974 },
28975 outputs: []outputInfo{
28976 {0, 167772158},
28977 },
28978 },
28979 },
28980 {
28981 name: "MOVVgpfp",
28982 argLen: 1,
28983 asm: mips.AMOVV,
28984 reg: regInfo{
28985 inputs: []inputInfo{
28986 {0, 167772158},
28987 },
28988 outputs: []outputInfo{
28989 {0, 1152921504338411520},
28990 },
28991 },
28992 },
28993 {
28994 name: "MOVBreg",
28995 argLen: 1,
28996 asm: mips.AMOVB,
28997 reg: regInfo{
28998 inputs: []inputInfo{
28999 {0, 234881022},
29000 },
29001 outputs: []outputInfo{
29002 {0, 167772158},
29003 },
29004 },
29005 },
29006 {
29007 name: "MOVBUreg",
29008 argLen: 1,
29009 asm: mips.AMOVBU,
29010 reg: regInfo{
29011 inputs: []inputInfo{
29012 {0, 234881022},
29013 },
29014 outputs: []outputInfo{
29015 {0, 167772158},
29016 },
29017 },
29018 },
29019 {
29020 name: "MOVHreg",
29021 argLen: 1,
29022 asm: mips.AMOVH,
29023 reg: regInfo{
29024 inputs: []inputInfo{
29025 {0, 234881022},
29026 },
29027 outputs: []outputInfo{
29028 {0, 167772158},
29029 },
29030 },
29031 },
29032 {
29033 name: "MOVHUreg",
29034 argLen: 1,
29035 asm: mips.AMOVHU,
29036 reg: regInfo{
29037 inputs: []inputInfo{
29038 {0, 234881022},
29039 },
29040 outputs: []outputInfo{
29041 {0, 167772158},
29042 },
29043 },
29044 },
29045 {
29046 name: "MOVWreg",
29047 argLen: 1,
29048 asm: mips.AMOVW,
29049 reg: regInfo{
29050 inputs: []inputInfo{
29051 {0, 234881022},
29052 },
29053 outputs: []outputInfo{
29054 {0, 167772158},
29055 },
29056 },
29057 },
29058 {
29059 name: "MOVWUreg",
29060 argLen: 1,
29061 asm: mips.AMOVWU,
29062 reg: regInfo{
29063 inputs: []inputInfo{
29064 {0, 234881022},
29065 },
29066 outputs: []outputInfo{
29067 {0, 167772158},
29068 },
29069 },
29070 },
29071 {
29072 name: "MOVVreg",
29073 argLen: 1,
29074 asm: mips.AMOVV,
29075 reg: regInfo{
29076 inputs: []inputInfo{
29077 {0, 234881022},
29078 },
29079 outputs: []outputInfo{
29080 {0, 167772158},
29081 },
29082 },
29083 },
29084 {
29085 name: "MOVVnop",
29086 argLen: 1,
29087 resultInArg0: true,
29088 reg: regInfo{
29089 inputs: []inputInfo{
29090 {0, 167772158},
29091 },
29092 outputs: []outputInfo{
29093 {0, 167772158},
29094 },
29095 },
29096 },
29097 {
29098 name: "MOVWF",
29099 argLen: 1,
29100 asm: mips.AMOVWF,
29101 reg: regInfo{
29102 inputs: []inputInfo{
29103 {0, 1152921504338411520},
29104 },
29105 outputs: []outputInfo{
29106 {0, 1152921504338411520},
29107 },
29108 },
29109 },
29110 {
29111 name: "MOVWD",
29112 argLen: 1,
29113 asm: mips.AMOVWD,
29114 reg: regInfo{
29115 inputs: []inputInfo{
29116 {0, 1152921504338411520},
29117 },
29118 outputs: []outputInfo{
29119 {0, 1152921504338411520},
29120 },
29121 },
29122 },
29123 {
29124 name: "MOVVF",
29125 argLen: 1,
29126 asm: mips.AMOVVF,
29127 reg: regInfo{
29128 inputs: []inputInfo{
29129 {0, 1152921504338411520},
29130 },
29131 outputs: []outputInfo{
29132 {0, 1152921504338411520},
29133 },
29134 },
29135 },
29136 {
29137 name: "MOVVD",
29138 argLen: 1,
29139 asm: mips.AMOVVD,
29140 reg: regInfo{
29141 inputs: []inputInfo{
29142 {0, 1152921504338411520},
29143 },
29144 outputs: []outputInfo{
29145 {0, 1152921504338411520},
29146 },
29147 },
29148 },
29149 {
29150 name: "TRUNCFW",
29151 argLen: 1,
29152 asm: mips.ATRUNCFW,
29153 reg: regInfo{
29154 inputs: []inputInfo{
29155 {0, 1152921504338411520},
29156 },
29157 outputs: []outputInfo{
29158 {0, 1152921504338411520},
29159 },
29160 },
29161 },
29162 {
29163 name: "TRUNCDW",
29164 argLen: 1,
29165 asm: mips.ATRUNCDW,
29166 reg: regInfo{
29167 inputs: []inputInfo{
29168 {0, 1152921504338411520},
29169 },
29170 outputs: []outputInfo{
29171 {0, 1152921504338411520},
29172 },
29173 },
29174 },
29175 {
29176 name: "TRUNCFV",
29177 argLen: 1,
29178 asm: mips.ATRUNCFV,
29179 reg: regInfo{
29180 inputs: []inputInfo{
29181 {0, 1152921504338411520},
29182 },
29183 outputs: []outputInfo{
29184 {0, 1152921504338411520},
29185 },
29186 },
29187 },
29188 {
29189 name: "TRUNCDV",
29190 argLen: 1,
29191 asm: mips.ATRUNCDV,
29192 reg: regInfo{
29193 inputs: []inputInfo{
29194 {0, 1152921504338411520},
29195 },
29196 outputs: []outputInfo{
29197 {0, 1152921504338411520},
29198 },
29199 },
29200 },
29201 {
29202 name: "MOVFD",
29203 argLen: 1,
29204 asm: mips.AMOVFD,
29205 reg: regInfo{
29206 inputs: []inputInfo{
29207 {0, 1152921504338411520},
29208 },
29209 outputs: []outputInfo{
29210 {0, 1152921504338411520},
29211 },
29212 },
29213 },
29214 {
29215 name: "MOVDF",
29216 argLen: 1,
29217 asm: mips.AMOVDF,
29218 reg: regInfo{
29219 inputs: []inputInfo{
29220 {0, 1152921504338411520},
29221 },
29222 outputs: []outputInfo{
29223 {0, 1152921504338411520},
29224 },
29225 },
29226 },
29227 {
29228 name: "CALLstatic",
29229 auxType: auxCallOff,
29230 argLen: 1,
29231 clobberFlags: true,
29232 call: true,
29233 reg: regInfo{
29234 clobbers: 4611686018393833470,
29235 },
29236 },
29237 {
29238 name: "CALLtail",
29239 auxType: auxCallOff,
29240 argLen: 1,
29241 clobberFlags: true,
29242 call: true,
29243 tailCall: true,
29244 reg: regInfo{
29245 clobbers: 4611686018393833470,
29246 },
29247 },
29248 {
29249 name: "CALLclosure",
29250 auxType: auxCallOff,
29251 argLen: 3,
29252 clobberFlags: true,
29253 call: true,
29254 reg: regInfo{
29255 inputs: []inputInfo{
29256 {1, 4194304},
29257 {0, 201326590},
29258 },
29259 clobbers: 4611686018393833470,
29260 },
29261 },
29262 {
29263 name: "CALLinter",
29264 auxType: auxCallOff,
29265 argLen: 2,
29266 clobberFlags: true,
29267 call: true,
29268 reg: regInfo{
29269 inputs: []inputInfo{
29270 {0, 167772158},
29271 },
29272 clobbers: 4611686018393833470,
29273 },
29274 },
29275 {
29276 name: "DUFFZERO",
29277 auxType: auxInt64,
29278 argLen: 2,
29279 faultOnNilArg0: true,
29280 reg: regInfo{
29281 inputs: []inputInfo{
29282 {0, 167772158},
29283 },
29284 clobbers: 134217730,
29285 },
29286 },
29287 {
29288 name: "DUFFCOPY",
29289 auxType: auxInt64,
29290 argLen: 3,
29291 faultOnNilArg0: true,
29292 faultOnNilArg1: true,
29293 reg: regInfo{
29294 inputs: []inputInfo{
29295 {0, 4},
29296 {1, 2},
29297 },
29298 clobbers: 134217734,
29299 },
29300 },
29301 {
29302 name: "LoweredZero",
29303 auxType: auxInt64,
29304 argLen: 3,
29305 clobberFlags: true,
29306 faultOnNilArg0: true,
29307 reg: regInfo{
29308 inputs: []inputInfo{
29309 {0, 2},
29310 {1, 167772158},
29311 },
29312 clobbers: 2,
29313 },
29314 },
29315 {
29316 name: "LoweredMove",
29317 auxType: auxInt64,
29318 argLen: 4,
29319 clobberFlags: true,
29320 faultOnNilArg0: true,
29321 faultOnNilArg1: true,
29322 reg: regInfo{
29323 inputs: []inputInfo{
29324 {0, 4},
29325 {1, 2},
29326 {2, 167772158},
29327 },
29328 clobbers: 6,
29329 },
29330 },
29331 {
29332 name: "LoweredAtomicAnd32",
29333 argLen: 3,
29334 faultOnNilArg0: true,
29335 hasSideEffects: true,
29336 unsafePoint: true,
29337 asm: mips.AAND,
29338 reg: regInfo{
29339 inputs: []inputInfo{
29340 {1, 234881022},
29341 {0, 4611686018695823358},
29342 },
29343 },
29344 },
29345 {
29346 name: "LoweredAtomicOr32",
29347 argLen: 3,
29348 faultOnNilArg0: true,
29349 hasSideEffects: true,
29350 unsafePoint: true,
29351 asm: mips.AOR,
29352 reg: regInfo{
29353 inputs: []inputInfo{
29354 {1, 234881022},
29355 {0, 4611686018695823358},
29356 },
29357 },
29358 },
29359 {
29360 name: "LoweredAtomicLoad8",
29361 argLen: 2,
29362 faultOnNilArg0: true,
29363 reg: regInfo{
29364 inputs: []inputInfo{
29365 {0, 4611686018695823358},
29366 },
29367 outputs: []outputInfo{
29368 {0, 167772158},
29369 },
29370 },
29371 },
29372 {
29373 name: "LoweredAtomicLoad32",
29374 argLen: 2,
29375 faultOnNilArg0: true,
29376 reg: regInfo{
29377 inputs: []inputInfo{
29378 {0, 4611686018695823358},
29379 },
29380 outputs: []outputInfo{
29381 {0, 167772158},
29382 },
29383 },
29384 },
29385 {
29386 name: "LoweredAtomicLoad64",
29387 argLen: 2,
29388 faultOnNilArg0: true,
29389 reg: regInfo{
29390 inputs: []inputInfo{
29391 {0, 4611686018695823358},
29392 },
29393 outputs: []outputInfo{
29394 {0, 167772158},
29395 },
29396 },
29397 },
29398 {
29399 name: "LoweredAtomicStore8",
29400 argLen: 3,
29401 faultOnNilArg0: true,
29402 hasSideEffects: true,
29403 reg: regInfo{
29404 inputs: []inputInfo{
29405 {1, 234881022},
29406 {0, 4611686018695823358},
29407 },
29408 },
29409 },
29410 {
29411 name: "LoweredAtomicStore32",
29412 argLen: 3,
29413 faultOnNilArg0: true,
29414 hasSideEffects: true,
29415 reg: regInfo{
29416 inputs: []inputInfo{
29417 {1, 234881022},
29418 {0, 4611686018695823358},
29419 },
29420 },
29421 },
29422 {
29423 name: "LoweredAtomicStore64",
29424 argLen: 3,
29425 faultOnNilArg0: true,
29426 hasSideEffects: true,
29427 reg: regInfo{
29428 inputs: []inputInfo{
29429 {1, 234881022},
29430 {0, 4611686018695823358},
29431 },
29432 },
29433 },
29434 {
29435 name: "LoweredAtomicStorezero32",
29436 argLen: 2,
29437 faultOnNilArg0: true,
29438 hasSideEffects: true,
29439 reg: regInfo{
29440 inputs: []inputInfo{
29441 {0, 4611686018695823358},
29442 },
29443 },
29444 },
29445 {
29446 name: "LoweredAtomicStorezero64",
29447 argLen: 2,
29448 faultOnNilArg0: true,
29449 hasSideEffects: true,
29450 reg: regInfo{
29451 inputs: []inputInfo{
29452 {0, 4611686018695823358},
29453 },
29454 },
29455 },
29456 {
29457 name: "LoweredAtomicExchange32",
29458 argLen: 3,
29459 resultNotInArgs: true,
29460 faultOnNilArg0: true,
29461 hasSideEffects: true,
29462 unsafePoint: true,
29463 reg: regInfo{
29464 inputs: []inputInfo{
29465 {1, 234881022},
29466 {0, 4611686018695823358},
29467 },
29468 outputs: []outputInfo{
29469 {0, 167772158},
29470 },
29471 },
29472 },
29473 {
29474 name: "LoweredAtomicExchange64",
29475 argLen: 3,
29476 resultNotInArgs: true,
29477 faultOnNilArg0: true,
29478 hasSideEffects: true,
29479 unsafePoint: true,
29480 reg: regInfo{
29481 inputs: []inputInfo{
29482 {1, 234881022},
29483 {0, 4611686018695823358},
29484 },
29485 outputs: []outputInfo{
29486 {0, 167772158},
29487 },
29488 },
29489 },
29490 {
29491 name: "LoweredAtomicAdd32",
29492 argLen: 3,
29493 resultNotInArgs: true,
29494 faultOnNilArg0: true,
29495 hasSideEffects: true,
29496 unsafePoint: true,
29497 reg: regInfo{
29498 inputs: []inputInfo{
29499 {1, 234881022},
29500 {0, 4611686018695823358},
29501 },
29502 outputs: []outputInfo{
29503 {0, 167772158},
29504 },
29505 },
29506 },
29507 {
29508 name: "LoweredAtomicAdd64",
29509 argLen: 3,
29510 resultNotInArgs: true,
29511 faultOnNilArg0: true,
29512 hasSideEffects: true,
29513 unsafePoint: true,
29514 reg: regInfo{
29515 inputs: []inputInfo{
29516 {1, 234881022},
29517 {0, 4611686018695823358},
29518 },
29519 outputs: []outputInfo{
29520 {0, 167772158},
29521 },
29522 },
29523 },
29524 {
29525 name: "LoweredAtomicAddconst32",
29526 auxType: auxInt32,
29527 argLen: 2,
29528 resultNotInArgs: true,
29529 faultOnNilArg0: true,
29530 hasSideEffects: true,
29531 unsafePoint: true,
29532 reg: regInfo{
29533 inputs: []inputInfo{
29534 {0, 4611686018695823358},
29535 },
29536 outputs: []outputInfo{
29537 {0, 167772158},
29538 },
29539 },
29540 },
29541 {
29542 name: "LoweredAtomicAddconst64",
29543 auxType: auxInt64,
29544 argLen: 2,
29545 resultNotInArgs: true,
29546 faultOnNilArg0: true,
29547 hasSideEffects: true,
29548 unsafePoint: true,
29549 reg: regInfo{
29550 inputs: []inputInfo{
29551 {0, 4611686018695823358},
29552 },
29553 outputs: []outputInfo{
29554 {0, 167772158},
29555 },
29556 },
29557 },
29558 {
29559 name: "LoweredAtomicCas32",
29560 argLen: 4,
29561 resultNotInArgs: true,
29562 faultOnNilArg0: true,
29563 hasSideEffects: true,
29564 unsafePoint: true,
29565 reg: regInfo{
29566 inputs: []inputInfo{
29567 {1, 234881022},
29568 {2, 234881022},
29569 {0, 4611686018695823358},
29570 },
29571 outputs: []outputInfo{
29572 {0, 167772158},
29573 },
29574 },
29575 },
29576 {
29577 name: "LoweredAtomicCas64",
29578 argLen: 4,
29579 resultNotInArgs: true,
29580 faultOnNilArg0: true,
29581 hasSideEffects: true,
29582 unsafePoint: true,
29583 reg: regInfo{
29584 inputs: []inputInfo{
29585 {1, 234881022},
29586 {2, 234881022},
29587 {0, 4611686018695823358},
29588 },
29589 outputs: []outputInfo{
29590 {0, 167772158},
29591 },
29592 },
29593 },
29594 {
29595 name: "LoweredNilCheck",
29596 argLen: 2,
29597 nilCheck: true,
29598 faultOnNilArg0: true,
29599 reg: regInfo{
29600 inputs: []inputInfo{
29601 {0, 234881022},
29602 },
29603 },
29604 },
29605 {
29606 name: "FPFlagTrue",
29607 argLen: 1,
29608 reg: regInfo{
29609 outputs: []outputInfo{
29610 {0, 167772158},
29611 },
29612 },
29613 },
29614 {
29615 name: "FPFlagFalse",
29616 argLen: 1,
29617 reg: regInfo{
29618 outputs: []outputInfo{
29619 {0, 167772158},
29620 },
29621 },
29622 },
29623 {
29624 name: "LoweredGetClosurePtr",
29625 argLen: 0,
29626 zeroWidth: true,
29627 reg: regInfo{
29628 outputs: []outputInfo{
29629 {0, 4194304},
29630 },
29631 },
29632 },
29633 {
29634 name: "LoweredGetCallerSP",
29635 argLen: 1,
29636 rematerializeable: true,
29637 reg: regInfo{
29638 outputs: []outputInfo{
29639 {0, 167772158},
29640 },
29641 },
29642 },
29643 {
29644 name: "LoweredGetCallerPC",
29645 argLen: 0,
29646 rematerializeable: true,
29647 reg: regInfo{
29648 outputs: []outputInfo{
29649 {0, 167772158},
29650 },
29651 },
29652 },
29653 {
29654 name: "LoweredWB",
29655 auxType: auxInt64,
29656 argLen: 1,
29657 clobberFlags: true,
29658 reg: regInfo{
29659 clobbers: 4611686018293170176,
29660 outputs: []outputInfo{
29661 {0, 16777216},
29662 },
29663 },
29664 },
29665 {
29666 name: "LoweredPanicBoundsA",
29667 auxType: auxInt64,
29668 argLen: 3,
29669 call: true,
29670 reg: regInfo{
29671 inputs: []inputInfo{
29672 {0, 8},
29673 {1, 16},
29674 },
29675 },
29676 },
29677 {
29678 name: "LoweredPanicBoundsB",
29679 auxType: auxInt64,
29680 argLen: 3,
29681 call: true,
29682 reg: regInfo{
29683 inputs: []inputInfo{
29684 {0, 4},
29685 {1, 8},
29686 },
29687 },
29688 },
29689 {
29690 name: "LoweredPanicBoundsC",
29691 auxType: auxInt64,
29692 argLen: 3,
29693 call: true,
29694 reg: regInfo{
29695 inputs: []inputInfo{
29696 {0, 2},
29697 {1, 4},
29698 },
29699 },
29700 },
29701
29702 {
29703 name: "ADD",
29704 argLen: 2,
29705 commutative: true,
29706 asm: ppc64.AADD,
29707 reg: regInfo{
29708 inputs: []inputInfo{
29709 {0, 1073733630},
29710 {1, 1073733630},
29711 },
29712 outputs: []outputInfo{
29713 {0, 1073733624},
29714 },
29715 },
29716 },
29717 {
29718 name: "ADDCC",
29719 argLen: 2,
29720 commutative: true,
29721 asm: ppc64.AADDCC,
29722 reg: regInfo{
29723 inputs: []inputInfo{
29724 {0, 1073733630},
29725 {1, 1073733630},
29726 },
29727 outputs: []outputInfo{
29728 {0, 1073733624},
29729 },
29730 },
29731 },
29732 {
29733 name: "ADDconst",
29734 auxType: auxInt64,
29735 argLen: 1,
29736 asm: ppc64.AADD,
29737 reg: regInfo{
29738 inputs: []inputInfo{
29739 {0, 1073733630},
29740 },
29741 outputs: []outputInfo{
29742 {0, 1073733624},
29743 },
29744 },
29745 },
29746 {
29747 name: "ADDCCconst",
29748 auxType: auxInt64,
29749 argLen: 1,
29750 asm: ppc64.AADDCCC,
29751 reg: regInfo{
29752 inputs: []inputInfo{
29753 {0, 1073733630},
29754 },
29755 clobbers: 9223372036854775808,
29756 outputs: []outputInfo{
29757 {0, 1073733624},
29758 },
29759 },
29760 },
29761 {
29762 name: "FADD",
29763 argLen: 2,
29764 commutative: true,
29765 asm: ppc64.AFADD,
29766 reg: regInfo{
29767 inputs: []inputInfo{
29768 {0, 9223372032559808512},
29769 {1, 9223372032559808512},
29770 },
29771 outputs: []outputInfo{
29772 {0, 9223372032559808512},
29773 },
29774 },
29775 },
29776 {
29777 name: "FADDS",
29778 argLen: 2,
29779 commutative: true,
29780 asm: ppc64.AFADDS,
29781 reg: regInfo{
29782 inputs: []inputInfo{
29783 {0, 9223372032559808512},
29784 {1, 9223372032559808512},
29785 },
29786 outputs: []outputInfo{
29787 {0, 9223372032559808512},
29788 },
29789 },
29790 },
29791 {
29792 name: "SUB",
29793 argLen: 2,
29794 asm: ppc64.ASUB,
29795 reg: regInfo{
29796 inputs: []inputInfo{
29797 {0, 1073733630},
29798 {1, 1073733630},
29799 },
29800 outputs: []outputInfo{
29801 {0, 1073733624},
29802 },
29803 },
29804 },
29805 {
29806 name: "SUBCC",
29807 argLen: 2,
29808 asm: ppc64.ASUBCC,
29809 reg: regInfo{
29810 inputs: []inputInfo{
29811 {0, 1073733630},
29812 {1, 1073733630},
29813 },
29814 outputs: []outputInfo{
29815 {0, 1073733624},
29816 },
29817 },
29818 },
29819 {
29820 name: "SUBFCconst",
29821 auxType: auxInt64,
29822 argLen: 1,
29823 asm: ppc64.ASUBC,
29824 reg: regInfo{
29825 inputs: []inputInfo{
29826 {0, 1073733630},
29827 },
29828 clobbers: 9223372036854775808,
29829 outputs: []outputInfo{
29830 {0, 1073733624},
29831 },
29832 },
29833 },
29834 {
29835 name: "FSUB",
29836 argLen: 2,
29837 asm: ppc64.AFSUB,
29838 reg: regInfo{
29839 inputs: []inputInfo{
29840 {0, 9223372032559808512},
29841 {1, 9223372032559808512},
29842 },
29843 outputs: []outputInfo{
29844 {0, 9223372032559808512},
29845 },
29846 },
29847 },
29848 {
29849 name: "FSUBS",
29850 argLen: 2,
29851 asm: ppc64.AFSUBS,
29852 reg: regInfo{
29853 inputs: []inputInfo{
29854 {0, 9223372032559808512},
29855 {1, 9223372032559808512},
29856 },
29857 outputs: []outputInfo{
29858 {0, 9223372032559808512},
29859 },
29860 },
29861 },
29862 {
29863 name: "XSMINJDP",
29864 argLen: 2,
29865 asm: ppc64.AXSMINJDP,
29866 reg: regInfo{
29867 inputs: []inputInfo{
29868 {0, 9223372032559808512},
29869 {1, 9223372032559808512},
29870 },
29871 outputs: []outputInfo{
29872 {0, 9223372032559808512},
29873 },
29874 },
29875 },
29876 {
29877 name: "XSMAXJDP",
29878 argLen: 2,
29879 asm: ppc64.AXSMAXJDP,
29880 reg: regInfo{
29881 inputs: []inputInfo{
29882 {0, 9223372032559808512},
29883 {1, 9223372032559808512},
29884 },
29885 outputs: []outputInfo{
29886 {0, 9223372032559808512},
29887 },
29888 },
29889 },
29890 {
29891 name: "MULLD",
29892 argLen: 2,
29893 commutative: true,
29894 asm: ppc64.AMULLD,
29895 reg: regInfo{
29896 inputs: []inputInfo{
29897 {0, 1073733630},
29898 {1, 1073733630},
29899 },
29900 outputs: []outputInfo{
29901 {0, 1073733624},
29902 },
29903 },
29904 },
29905 {
29906 name: "MULLW",
29907 argLen: 2,
29908 commutative: true,
29909 asm: ppc64.AMULLW,
29910 reg: regInfo{
29911 inputs: []inputInfo{
29912 {0, 1073733630},
29913 {1, 1073733630},
29914 },
29915 outputs: []outputInfo{
29916 {0, 1073733624},
29917 },
29918 },
29919 },
29920 {
29921 name: "MULLDconst",
29922 auxType: auxInt32,
29923 argLen: 1,
29924 asm: ppc64.AMULLD,
29925 reg: regInfo{
29926 inputs: []inputInfo{
29927 {0, 1073733630},
29928 },
29929 outputs: []outputInfo{
29930 {0, 1073733624},
29931 },
29932 },
29933 },
29934 {
29935 name: "MULLWconst",
29936 auxType: auxInt32,
29937 argLen: 1,
29938 asm: ppc64.AMULLW,
29939 reg: regInfo{
29940 inputs: []inputInfo{
29941 {0, 1073733630},
29942 },
29943 outputs: []outputInfo{
29944 {0, 1073733624},
29945 },
29946 },
29947 },
29948 {
29949 name: "MADDLD",
29950 argLen: 3,
29951 asm: ppc64.AMADDLD,
29952 reg: regInfo{
29953 inputs: []inputInfo{
29954 {0, 1073733630},
29955 {1, 1073733630},
29956 {2, 1073733630},
29957 },
29958 outputs: []outputInfo{
29959 {0, 1073733624},
29960 },
29961 },
29962 },
29963 {
29964 name: "MULHD",
29965 argLen: 2,
29966 commutative: true,
29967 asm: ppc64.AMULHD,
29968 reg: regInfo{
29969 inputs: []inputInfo{
29970 {0, 1073733630},
29971 {1, 1073733630},
29972 },
29973 outputs: []outputInfo{
29974 {0, 1073733624},
29975 },
29976 },
29977 },
29978 {
29979 name: "MULHW",
29980 argLen: 2,
29981 commutative: true,
29982 asm: ppc64.AMULHW,
29983 reg: regInfo{
29984 inputs: []inputInfo{
29985 {0, 1073733630},
29986 {1, 1073733630},
29987 },
29988 outputs: []outputInfo{
29989 {0, 1073733624},
29990 },
29991 },
29992 },
29993 {
29994 name: "MULHDU",
29995 argLen: 2,
29996 commutative: true,
29997 asm: ppc64.AMULHDU,
29998 reg: regInfo{
29999 inputs: []inputInfo{
30000 {0, 1073733630},
30001 {1, 1073733630},
30002 },
30003 outputs: []outputInfo{
30004 {0, 1073733624},
30005 },
30006 },
30007 },
30008 {
30009 name: "MULHDUCC",
30010 argLen: 2,
30011 commutative: true,
30012 asm: ppc64.AMULHDUCC,
30013 reg: regInfo{
30014 inputs: []inputInfo{
30015 {0, 1073733630},
30016 {1, 1073733630},
30017 },
30018 outputs: []outputInfo{
30019 {0, 1073733624},
30020 },
30021 },
30022 },
30023 {
30024 name: "MULHWU",
30025 argLen: 2,
30026 commutative: true,
30027 asm: ppc64.AMULHWU,
30028 reg: regInfo{
30029 inputs: []inputInfo{
30030 {0, 1073733630},
30031 {1, 1073733630},
30032 },
30033 outputs: []outputInfo{
30034 {0, 1073733624},
30035 },
30036 },
30037 },
30038 {
30039 name: "FMUL",
30040 argLen: 2,
30041 commutative: true,
30042 asm: ppc64.AFMUL,
30043 reg: regInfo{
30044 inputs: []inputInfo{
30045 {0, 9223372032559808512},
30046 {1, 9223372032559808512},
30047 },
30048 outputs: []outputInfo{
30049 {0, 9223372032559808512},
30050 },
30051 },
30052 },
30053 {
30054 name: "FMULS",
30055 argLen: 2,
30056 commutative: true,
30057 asm: ppc64.AFMULS,
30058 reg: regInfo{
30059 inputs: []inputInfo{
30060 {0, 9223372032559808512},
30061 {1, 9223372032559808512},
30062 },
30063 outputs: []outputInfo{
30064 {0, 9223372032559808512},
30065 },
30066 },
30067 },
30068 {
30069 name: "FMADD",
30070 argLen: 3,
30071 asm: ppc64.AFMADD,
30072 reg: regInfo{
30073 inputs: []inputInfo{
30074 {0, 9223372032559808512},
30075 {1, 9223372032559808512},
30076 {2, 9223372032559808512},
30077 },
30078 outputs: []outputInfo{
30079 {0, 9223372032559808512},
30080 },
30081 },
30082 },
30083 {
30084 name: "FMADDS",
30085 argLen: 3,
30086 asm: ppc64.AFMADDS,
30087 reg: regInfo{
30088 inputs: []inputInfo{
30089 {0, 9223372032559808512},
30090 {1, 9223372032559808512},
30091 {2, 9223372032559808512},
30092 },
30093 outputs: []outputInfo{
30094 {0, 9223372032559808512},
30095 },
30096 },
30097 },
30098 {
30099 name: "FMSUB",
30100 argLen: 3,
30101 asm: ppc64.AFMSUB,
30102 reg: regInfo{
30103 inputs: []inputInfo{
30104 {0, 9223372032559808512},
30105 {1, 9223372032559808512},
30106 {2, 9223372032559808512},
30107 },
30108 outputs: []outputInfo{
30109 {0, 9223372032559808512},
30110 },
30111 },
30112 },
30113 {
30114 name: "FMSUBS",
30115 argLen: 3,
30116 asm: ppc64.AFMSUBS,
30117 reg: regInfo{
30118 inputs: []inputInfo{
30119 {0, 9223372032559808512},
30120 {1, 9223372032559808512},
30121 {2, 9223372032559808512},
30122 },
30123 outputs: []outputInfo{
30124 {0, 9223372032559808512},
30125 },
30126 },
30127 },
30128 {
30129 name: "SRAD",
30130 argLen: 2,
30131 asm: ppc64.ASRAD,
30132 reg: regInfo{
30133 inputs: []inputInfo{
30134 {0, 1073733630},
30135 {1, 1073733630},
30136 },
30137 clobbers: 9223372036854775808,
30138 outputs: []outputInfo{
30139 {0, 1073733624},
30140 },
30141 },
30142 },
30143 {
30144 name: "SRAW",
30145 argLen: 2,
30146 asm: ppc64.ASRAW,
30147 reg: regInfo{
30148 inputs: []inputInfo{
30149 {0, 1073733630},
30150 {1, 1073733630},
30151 },
30152 clobbers: 9223372036854775808,
30153 outputs: []outputInfo{
30154 {0, 1073733624},
30155 },
30156 },
30157 },
30158 {
30159 name: "SRD",
30160 argLen: 2,
30161 asm: ppc64.ASRD,
30162 reg: regInfo{
30163 inputs: []inputInfo{
30164 {0, 1073733630},
30165 {1, 1073733630},
30166 },
30167 outputs: []outputInfo{
30168 {0, 1073733624},
30169 },
30170 },
30171 },
30172 {
30173 name: "SRW",
30174 argLen: 2,
30175 asm: ppc64.ASRW,
30176 reg: regInfo{
30177 inputs: []inputInfo{
30178 {0, 1073733630},
30179 {1, 1073733630},
30180 },
30181 outputs: []outputInfo{
30182 {0, 1073733624},
30183 },
30184 },
30185 },
30186 {
30187 name: "SLD",
30188 argLen: 2,
30189 asm: ppc64.ASLD,
30190 reg: regInfo{
30191 inputs: []inputInfo{
30192 {0, 1073733630},
30193 {1, 1073733630},
30194 },
30195 outputs: []outputInfo{
30196 {0, 1073733624},
30197 },
30198 },
30199 },
30200 {
30201 name: "SLW",
30202 argLen: 2,
30203 asm: ppc64.ASLW,
30204 reg: regInfo{
30205 inputs: []inputInfo{
30206 {0, 1073733630},
30207 {1, 1073733630},
30208 },
30209 outputs: []outputInfo{
30210 {0, 1073733624},
30211 },
30212 },
30213 },
30214 {
30215 name: "ROTL",
30216 argLen: 2,
30217 asm: ppc64.AROTL,
30218 reg: regInfo{
30219 inputs: []inputInfo{
30220 {0, 1073733630},
30221 {1, 1073733630},
30222 },
30223 outputs: []outputInfo{
30224 {0, 1073733624},
30225 },
30226 },
30227 },
30228 {
30229 name: "ROTLW",
30230 argLen: 2,
30231 asm: ppc64.AROTLW,
30232 reg: regInfo{
30233 inputs: []inputInfo{
30234 {0, 1073733630},
30235 {1, 1073733630},
30236 },
30237 outputs: []outputInfo{
30238 {0, 1073733624},
30239 },
30240 },
30241 },
30242 {
30243 name: "CLRLSLWI",
30244 auxType: auxInt32,
30245 argLen: 1,
30246 asm: ppc64.ACLRLSLWI,
30247 reg: regInfo{
30248 inputs: []inputInfo{
30249 {0, 1073733630},
30250 },
30251 outputs: []outputInfo{
30252 {0, 1073733624},
30253 },
30254 },
30255 },
30256 {
30257 name: "CLRLSLDI",
30258 auxType: auxInt32,
30259 argLen: 1,
30260 asm: ppc64.ACLRLSLDI,
30261 reg: regInfo{
30262 inputs: []inputInfo{
30263 {0, 1073733630},
30264 },
30265 outputs: []outputInfo{
30266 {0, 1073733624},
30267 },
30268 },
30269 },
30270 {
30271 name: "ADDC",
30272 argLen: 2,
30273 commutative: true,
30274 asm: ppc64.AADDC,
30275 reg: regInfo{
30276 inputs: []inputInfo{
30277 {0, 1073733630},
30278 {1, 1073733630},
30279 },
30280 clobbers: 9223372036854775808,
30281 outputs: []outputInfo{
30282 {1, 9223372036854775808},
30283 {0, 1073733624},
30284 },
30285 },
30286 },
30287 {
30288 name: "SUBC",
30289 argLen: 2,
30290 asm: ppc64.ASUBC,
30291 reg: regInfo{
30292 inputs: []inputInfo{
30293 {0, 1073733630},
30294 {1, 1073733630},
30295 },
30296 clobbers: 9223372036854775808,
30297 outputs: []outputInfo{
30298 {1, 9223372036854775808},
30299 {0, 1073733624},
30300 },
30301 },
30302 },
30303 {
30304 name: "ADDCconst",
30305 auxType: auxInt64,
30306 argLen: 1,
30307 asm: ppc64.AADDC,
30308 reg: regInfo{
30309 inputs: []inputInfo{
30310 {0, 1073733630},
30311 },
30312 outputs: []outputInfo{
30313 {1, 9223372036854775808},
30314 {0, 1073733624},
30315 },
30316 },
30317 },
30318 {
30319 name: "SUBCconst",
30320 auxType: auxInt64,
30321 argLen: 1,
30322 asm: ppc64.ASUBC,
30323 reg: regInfo{
30324 inputs: []inputInfo{
30325 {0, 1073733630},
30326 },
30327 outputs: []outputInfo{
30328 {1, 9223372036854775808},
30329 {0, 1073733624},
30330 },
30331 },
30332 },
30333 {
30334 name: "ADDE",
30335 argLen: 3,
30336 commutative: true,
30337 asm: ppc64.AADDE,
30338 reg: regInfo{
30339 inputs: []inputInfo{
30340 {2, 9223372036854775808},
30341 {0, 1073733630},
30342 {1, 1073733630},
30343 },
30344 clobbers: 9223372036854775808,
30345 outputs: []outputInfo{
30346 {1, 9223372036854775808},
30347 {0, 1073733624},
30348 },
30349 },
30350 },
30351 {
30352 name: "ADDZE",
30353 argLen: 2,
30354 asm: ppc64.AADDZE,
30355 reg: regInfo{
30356 inputs: []inputInfo{
30357 {1, 9223372036854775808},
30358 {0, 1073733630},
30359 },
30360 clobbers: 9223372036854775808,
30361 outputs: []outputInfo{
30362 {1, 9223372036854775808},
30363 {0, 1073733624},
30364 },
30365 },
30366 },
30367 {
30368 name: "SUBE",
30369 argLen: 3,
30370 asm: ppc64.ASUBE,
30371 reg: regInfo{
30372 inputs: []inputInfo{
30373 {2, 9223372036854775808},
30374 {0, 1073733630},
30375 {1, 1073733630},
30376 },
30377 clobbers: 9223372036854775808,
30378 outputs: []outputInfo{
30379 {1, 9223372036854775808},
30380 {0, 1073733624},
30381 },
30382 },
30383 },
30384 {
30385 name: "ADDZEzero",
30386 argLen: 1,
30387 asm: ppc64.AADDZE,
30388 reg: regInfo{
30389 inputs: []inputInfo{
30390 {0, 9223372036854775808},
30391 },
30392 clobbers: 9223372036854775808,
30393 outputs: []outputInfo{
30394 {0, 1073733624},
30395 },
30396 },
30397 },
30398 {
30399 name: "SUBZEzero",
30400 argLen: 1,
30401 asm: ppc64.ASUBZE,
30402 reg: regInfo{
30403 inputs: []inputInfo{
30404 {0, 9223372036854775808},
30405 },
30406 clobbers: 9223372036854775808,
30407 outputs: []outputInfo{
30408 {0, 1073733624},
30409 },
30410 },
30411 },
30412 {
30413 name: "SRADconst",
30414 auxType: auxInt64,
30415 argLen: 1,
30416 asm: ppc64.ASRAD,
30417 reg: regInfo{
30418 inputs: []inputInfo{
30419 {0, 1073733630},
30420 },
30421 clobbers: 9223372036854775808,
30422 outputs: []outputInfo{
30423 {0, 1073733624},
30424 },
30425 },
30426 },
30427 {
30428 name: "SRAWconst",
30429 auxType: auxInt64,
30430 argLen: 1,
30431 asm: ppc64.ASRAW,
30432 reg: regInfo{
30433 inputs: []inputInfo{
30434 {0, 1073733630},
30435 },
30436 clobbers: 9223372036854775808,
30437 outputs: []outputInfo{
30438 {0, 1073733624},
30439 },
30440 },
30441 },
30442 {
30443 name: "SRDconst",
30444 auxType: auxInt64,
30445 argLen: 1,
30446 asm: ppc64.ASRD,
30447 reg: regInfo{
30448 inputs: []inputInfo{
30449 {0, 1073733630},
30450 },
30451 outputs: []outputInfo{
30452 {0, 1073733624},
30453 },
30454 },
30455 },
30456 {
30457 name: "SRWconst",
30458 auxType: auxInt64,
30459 argLen: 1,
30460 asm: ppc64.ASRW,
30461 reg: regInfo{
30462 inputs: []inputInfo{
30463 {0, 1073733630},
30464 },
30465 outputs: []outputInfo{
30466 {0, 1073733624},
30467 },
30468 },
30469 },
30470 {
30471 name: "SLDconst",
30472 auxType: auxInt64,
30473 argLen: 1,
30474 asm: ppc64.ASLD,
30475 reg: regInfo{
30476 inputs: []inputInfo{
30477 {0, 1073733630},
30478 },
30479 outputs: []outputInfo{
30480 {0, 1073733624},
30481 },
30482 },
30483 },
30484 {
30485 name: "SLWconst",
30486 auxType: auxInt64,
30487 argLen: 1,
30488 asm: ppc64.ASLW,
30489 reg: regInfo{
30490 inputs: []inputInfo{
30491 {0, 1073733630},
30492 },
30493 outputs: []outputInfo{
30494 {0, 1073733624},
30495 },
30496 },
30497 },
30498 {
30499 name: "ROTLconst",
30500 auxType: auxInt64,
30501 argLen: 1,
30502 asm: ppc64.AROTL,
30503 reg: regInfo{
30504 inputs: []inputInfo{
30505 {0, 1073733630},
30506 },
30507 outputs: []outputInfo{
30508 {0, 1073733624},
30509 },
30510 },
30511 },
30512 {
30513 name: "ROTLWconst",
30514 auxType: auxInt64,
30515 argLen: 1,
30516 asm: ppc64.AROTLW,
30517 reg: regInfo{
30518 inputs: []inputInfo{
30519 {0, 1073733630},
30520 },
30521 outputs: []outputInfo{
30522 {0, 1073733624},
30523 },
30524 },
30525 },
30526 {
30527 name: "EXTSWSLconst",
30528 auxType: auxInt64,
30529 argLen: 1,
30530 asm: ppc64.AEXTSWSLI,
30531 reg: regInfo{
30532 inputs: []inputInfo{
30533 {0, 1073733630},
30534 },
30535 outputs: []outputInfo{
30536 {0, 1073733624},
30537 },
30538 },
30539 },
30540 {
30541 name: "RLWINM",
30542 auxType: auxInt64,
30543 argLen: 1,
30544 asm: ppc64.ARLWNM,
30545 reg: regInfo{
30546 inputs: []inputInfo{
30547 {0, 1073733630},
30548 },
30549 outputs: []outputInfo{
30550 {0, 1073733624},
30551 },
30552 },
30553 },
30554 {
30555 name: "RLWNM",
30556 auxType: auxInt64,
30557 argLen: 2,
30558 asm: ppc64.ARLWNM,
30559 reg: regInfo{
30560 inputs: []inputInfo{
30561 {0, 1073733630},
30562 {1, 1073733630},
30563 },
30564 outputs: []outputInfo{
30565 {0, 1073733624},
30566 },
30567 },
30568 },
30569 {
30570 name: "RLWMI",
30571 auxType: auxInt64,
30572 argLen: 2,
30573 resultInArg0: true,
30574 asm: ppc64.ARLWMI,
30575 reg: regInfo{
30576 inputs: []inputInfo{
30577 {0, 1073733624},
30578 {1, 1073733630},
30579 },
30580 outputs: []outputInfo{
30581 {0, 1073733624},
30582 },
30583 },
30584 },
30585 {
30586 name: "RLDICL",
30587 auxType: auxInt64,
30588 argLen: 1,
30589 asm: ppc64.ARLDICL,
30590 reg: regInfo{
30591 inputs: []inputInfo{
30592 {0, 1073733630},
30593 },
30594 outputs: []outputInfo{
30595 {0, 1073733624},
30596 },
30597 },
30598 },
30599 {
30600 name: "RLDICLCC",
30601 auxType: auxInt64,
30602 argLen: 1,
30603 asm: ppc64.ARLDICLCC,
30604 reg: regInfo{
30605 inputs: []inputInfo{
30606 {0, 1073733630},
30607 },
30608 outputs: []outputInfo{
30609 {0, 1073733624},
30610 },
30611 },
30612 },
30613 {
30614 name: "RLDICR",
30615 auxType: auxInt64,
30616 argLen: 1,
30617 asm: ppc64.ARLDICR,
30618 reg: regInfo{
30619 inputs: []inputInfo{
30620 {0, 1073733630},
30621 },
30622 outputs: []outputInfo{
30623 {0, 1073733624},
30624 },
30625 },
30626 },
30627 {
30628 name: "CNTLZD",
30629 argLen: 1,
30630 asm: ppc64.ACNTLZD,
30631 reg: regInfo{
30632 inputs: []inputInfo{
30633 {0, 1073733630},
30634 },
30635 outputs: []outputInfo{
30636 {0, 1073733624},
30637 },
30638 },
30639 },
30640 {
30641 name: "CNTLZDCC",
30642 argLen: 1,
30643 asm: ppc64.ACNTLZDCC,
30644 reg: regInfo{
30645 inputs: []inputInfo{
30646 {0, 1073733630},
30647 },
30648 outputs: []outputInfo{
30649 {0, 1073733624},
30650 },
30651 },
30652 },
30653 {
30654 name: "CNTLZW",
30655 argLen: 1,
30656 asm: ppc64.ACNTLZW,
30657 reg: regInfo{
30658 inputs: []inputInfo{
30659 {0, 1073733630},
30660 },
30661 outputs: []outputInfo{
30662 {0, 1073733624},
30663 },
30664 },
30665 },
30666 {
30667 name: "CNTTZD",
30668 argLen: 1,
30669 asm: ppc64.ACNTTZD,
30670 reg: regInfo{
30671 inputs: []inputInfo{
30672 {0, 1073733630},
30673 },
30674 outputs: []outputInfo{
30675 {0, 1073733624},
30676 },
30677 },
30678 },
30679 {
30680 name: "CNTTZW",
30681 argLen: 1,
30682 asm: ppc64.ACNTTZW,
30683 reg: regInfo{
30684 inputs: []inputInfo{
30685 {0, 1073733630},
30686 },
30687 outputs: []outputInfo{
30688 {0, 1073733624},
30689 },
30690 },
30691 },
30692 {
30693 name: "POPCNTD",
30694 argLen: 1,
30695 asm: ppc64.APOPCNTD,
30696 reg: regInfo{
30697 inputs: []inputInfo{
30698 {0, 1073733630},
30699 },
30700 outputs: []outputInfo{
30701 {0, 1073733624},
30702 },
30703 },
30704 },
30705 {
30706 name: "POPCNTW",
30707 argLen: 1,
30708 asm: ppc64.APOPCNTW,
30709 reg: regInfo{
30710 inputs: []inputInfo{
30711 {0, 1073733630},
30712 },
30713 outputs: []outputInfo{
30714 {0, 1073733624},
30715 },
30716 },
30717 },
30718 {
30719 name: "POPCNTB",
30720 argLen: 1,
30721 asm: ppc64.APOPCNTB,
30722 reg: regInfo{
30723 inputs: []inputInfo{
30724 {0, 1073733630},
30725 },
30726 outputs: []outputInfo{
30727 {0, 1073733624},
30728 },
30729 },
30730 },
30731 {
30732 name: "FDIV",
30733 argLen: 2,
30734 asm: ppc64.AFDIV,
30735 reg: regInfo{
30736 inputs: []inputInfo{
30737 {0, 9223372032559808512},
30738 {1, 9223372032559808512},
30739 },
30740 outputs: []outputInfo{
30741 {0, 9223372032559808512},
30742 },
30743 },
30744 },
30745 {
30746 name: "FDIVS",
30747 argLen: 2,
30748 asm: ppc64.AFDIVS,
30749 reg: regInfo{
30750 inputs: []inputInfo{
30751 {0, 9223372032559808512},
30752 {1, 9223372032559808512},
30753 },
30754 outputs: []outputInfo{
30755 {0, 9223372032559808512},
30756 },
30757 },
30758 },
30759 {
30760 name: "DIVD",
30761 argLen: 2,
30762 asm: ppc64.ADIVD,
30763 reg: regInfo{
30764 inputs: []inputInfo{
30765 {0, 1073733630},
30766 {1, 1073733630},
30767 },
30768 outputs: []outputInfo{
30769 {0, 1073733624},
30770 },
30771 },
30772 },
30773 {
30774 name: "DIVW",
30775 argLen: 2,
30776 asm: ppc64.ADIVW,
30777 reg: regInfo{
30778 inputs: []inputInfo{
30779 {0, 1073733630},
30780 {1, 1073733630},
30781 },
30782 outputs: []outputInfo{
30783 {0, 1073733624},
30784 },
30785 },
30786 },
30787 {
30788 name: "DIVDU",
30789 argLen: 2,
30790 asm: ppc64.ADIVDU,
30791 reg: regInfo{
30792 inputs: []inputInfo{
30793 {0, 1073733630},
30794 {1, 1073733630},
30795 },
30796 outputs: []outputInfo{
30797 {0, 1073733624},
30798 },
30799 },
30800 },
30801 {
30802 name: "DIVWU",
30803 argLen: 2,
30804 asm: ppc64.ADIVWU,
30805 reg: regInfo{
30806 inputs: []inputInfo{
30807 {0, 1073733630},
30808 {1, 1073733630},
30809 },
30810 outputs: []outputInfo{
30811 {0, 1073733624},
30812 },
30813 },
30814 },
30815 {
30816 name: "MODUD",
30817 argLen: 2,
30818 asm: ppc64.AMODUD,
30819 reg: regInfo{
30820 inputs: []inputInfo{
30821 {0, 1073733630},
30822 {1, 1073733630},
30823 },
30824 outputs: []outputInfo{
30825 {0, 1073733624},
30826 },
30827 },
30828 },
30829 {
30830 name: "MODSD",
30831 argLen: 2,
30832 asm: ppc64.AMODSD,
30833 reg: regInfo{
30834 inputs: []inputInfo{
30835 {0, 1073733630},
30836 {1, 1073733630},
30837 },
30838 outputs: []outputInfo{
30839 {0, 1073733624},
30840 },
30841 },
30842 },
30843 {
30844 name: "MODUW",
30845 argLen: 2,
30846 asm: ppc64.AMODUW,
30847 reg: regInfo{
30848 inputs: []inputInfo{
30849 {0, 1073733630},
30850 {1, 1073733630},
30851 },
30852 outputs: []outputInfo{
30853 {0, 1073733624},
30854 },
30855 },
30856 },
30857 {
30858 name: "MODSW",
30859 argLen: 2,
30860 asm: ppc64.AMODSW,
30861 reg: regInfo{
30862 inputs: []inputInfo{
30863 {0, 1073733630},
30864 {1, 1073733630},
30865 },
30866 outputs: []outputInfo{
30867 {0, 1073733624},
30868 },
30869 },
30870 },
30871 {
30872 name: "FCTIDZ",
30873 argLen: 1,
30874 asm: ppc64.AFCTIDZ,
30875 reg: regInfo{
30876 inputs: []inputInfo{
30877 {0, 9223372032559808512},
30878 },
30879 outputs: []outputInfo{
30880 {0, 9223372032559808512},
30881 },
30882 },
30883 },
30884 {
30885 name: "FCTIWZ",
30886 argLen: 1,
30887 asm: ppc64.AFCTIWZ,
30888 reg: regInfo{
30889 inputs: []inputInfo{
30890 {0, 9223372032559808512},
30891 },
30892 outputs: []outputInfo{
30893 {0, 9223372032559808512},
30894 },
30895 },
30896 },
30897 {
30898 name: "FCFID",
30899 argLen: 1,
30900 asm: ppc64.AFCFID,
30901 reg: regInfo{
30902 inputs: []inputInfo{
30903 {0, 9223372032559808512},
30904 },
30905 outputs: []outputInfo{
30906 {0, 9223372032559808512},
30907 },
30908 },
30909 },
30910 {
30911 name: "FCFIDS",
30912 argLen: 1,
30913 asm: ppc64.AFCFIDS,
30914 reg: regInfo{
30915 inputs: []inputInfo{
30916 {0, 9223372032559808512},
30917 },
30918 outputs: []outputInfo{
30919 {0, 9223372032559808512},
30920 },
30921 },
30922 },
30923 {
30924 name: "FRSP",
30925 argLen: 1,
30926 asm: ppc64.AFRSP,
30927 reg: regInfo{
30928 inputs: []inputInfo{
30929 {0, 9223372032559808512},
30930 },
30931 outputs: []outputInfo{
30932 {0, 9223372032559808512},
30933 },
30934 },
30935 },
30936 {
30937 name: "MFVSRD",
30938 argLen: 1,
30939 asm: ppc64.AMFVSRD,
30940 reg: regInfo{
30941 inputs: []inputInfo{
30942 {0, 9223372032559808512},
30943 },
30944 outputs: []outputInfo{
30945 {0, 1073733624},
30946 },
30947 },
30948 },
30949 {
30950 name: "MTVSRD",
30951 argLen: 1,
30952 asm: ppc64.AMTVSRD,
30953 reg: regInfo{
30954 inputs: []inputInfo{
30955 {0, 1073733624},
30956 },
30957 outputs: []outputInfo{
30958 {0, 9223372032559808512},
30959 },
30960 },
30961 },
30962 {
30963 name: "AND",
30964 argLen: 2,
30965 commutative: true,
30966 asm: ppc64.AAND,
30967 reg: regInfo{
30968 inputs: []inputInfo{
30969 {0, 1073733630},
30970 {1, 1073733630},
30971 },
30972 outputs: []outputInfo{
30973 {0, 1073733624},
30974 },
30975 },
30976 },
30977 {
30978 name: "ANDN",
30979 argLen: 2,
30980 asm: ppc64.AANDN,
30981 reg: regInfo{
30982 inputs: []inputInfo{
30983 {0, 1073733630},
30984 {1, 1073733630},
30985 },
30986 outputs: []outputInfo{
30987 {0, 1073733624},
30988 },
30989 },
30990 },
30991 {
30992 name: "ANDNCC",
30993 argLen: 2,
30994 asm: ppc64.AANDNCC,
30995 reg: regInfo{
30996 inputs: []inputInfo{
30997 {0, 1073733630},
30998 {1, 1073733630},
30999 },
31000 outputs: []outputInfo{
31001 {0, 1073733624},
31002 },
31003 },
31004 },
31005 {
31006 name: "ANDCC",
31007 argLen: 2,
31008 commutative: true,
31009 asm: ppc64.AANDCC,
31010 reg: regInfo{
31011 inputs: []inputInfo{
31012 {0, 1073733630},
31013 {1, 1073733630},
31014 },
31015 outputs: []outputInfo{
31016 {0, 1073733624},
31017 },
31018 },
31019 },
31020 {
31021 name: "OR",
31022 argLen: 2,
31023 commutative: true,
31024 asm: ppc64.AOR,
31025 reg: regInfo{
31026 inputs: []inputInfo{
31027 {0, 1073733630},
31028 {1, 1073733630},
31029 },
31030 outputs: []outputInfo{
31031 {0, 1073733624},
31032 },
31033 },
31034 },
31035 {
31036 name: "ORN",
31037 argLen: 2,
31038 asm: ppc64.AORN,
31039 reg: regInfo{
31040 inputs: []inputInfo{
31041 {0, 1073733630},
31042 {1, 1073733630},
31043 },
31044 outputs: []outputInfo{
31045 {0, 1073733624},
31046 },
31047 },
31048 },
31049 {
31050 name: "ORCC",
31051 argLen: 2,
31052 commutative: true,
31053 asm: ppc64.AORCC,
31054 reg: regInfo{
31055 inputs: []inputInfo{
31056 {0, 1073733630},
31057 {1, 1073733630},
31058 },
31059 outputs: []outputInfo{
31060 {0, 1073733624},
31061 },
31062 },
31063 },
31064 {
31065 name: "NOR",
31066 argLen: 2,
31067 commutative: true,
31068 asm: ppc64.ANOR,
31069 reg: regInfo{
31070 inputs: []inputInfo{
31071 {0, 1073733630},
31072 {1, 1073733630},
31073 },
31074 outputs: []outputInfo{
31075 {0, 1073733624},
31076 },
31077 },
31078 },
31079 {
31080 name: "NORCC",
31081 argLen: 2,
31082 commutative: true,
31083 asm: ppc64.ANORCC,
31084 reg: regInfo{
31085 inputs: []inputInfo{
31086 {0, 1073733630},
31087 {1, 1073733630},
31088 },
31089 outputs: []outputInfo{
31090 {0, 1073733624},
31091 },
31092 },
31093 },
31094 {
31095 name: "XOR",
31096 argLen: 2,
31097 commutative: true,
31098 asm: ppc64.AXOR,
31099 reg: regInfo{
31100 inputs: []inputInfo{
31101 {0, 1073733630},
31102 {1, 1073733630},
31103 },
31104 outputs: []outputInfo{
31105 {0, 1073733624},
31106 },
31107 },
31108 },
31109 {
31110 name: "XORCC",
31111 argLen: 2,
31112 commutative: true,
31113 asm: ppc64.AXORCC,
31114 reg: regInfo{
31115 inputs: []inputInfo{
31116 {0, 1073733630},
31117 {1, 1073733630},
31118 },
31119 outputs: []outputInfo{
31120 {0, 1073733624},
31121 },
31122 },
31123 },
31124 {
31125 name: "EQV",
31126 argLen: 2,
31127 commutative: true,
31128 asm: ppc64.AEQV,
31129 reg: regInfo{
31130 inputs: []inputInfo{
31131 {0, 1073733630},
31132 {1, 1073733630},
31133 },
31134 outputs: []outputInfo{
31135 {0, 1073733624},
31136 },
31137 },
31138 },
31139 {
31140 name: "NEG",
31141 argLen: 1,
31142 asm: ppc64.ANEG,
31143 reg: regInfo{
31144 inputs: []inputInfo{
31145 {0, 1073733630},
31146 },
31147 outputs: []outputInfo{
31148 {0, 1073733624},
31149 },
31150 },
31151 },
31152 {
31153 name: "NEGCC",
31154 argLen: 1,
31155 asm: ppc64.ANEGCC,
31156 reg: regInfo{
31157 inputs: []inputInfo{
31158 {0, 1073733630},
31159 },
31160 outputs: []outputInfo{
31161 {0, 1073733624},
31162 },
31163 },
31164 },
31165 {
31166 name: "BRD",
31167 argLen: 1,
31168 asm: ppc64.ABRD,
31169 reg: regInfo{
31170 inputs: []inputInfo{
31171 {0, 1073733630},
31172 },
31173 outputs: []outputInfo{
31174 {0, 1073733624},
31175 },
31176 },
31177 },
31178 {
31179 name: "BRW",
31180 argLen: 1,
31181 asm: ppc64.ABRW,
31182 reg: regInfo{
31183 inputs: []inputInfo{
31184 {0, 1073733630},
31185 },
31186 outputs: []outputInfo{
31187 {0, 1073733624},
31188 },
31189 },
31190 },
31191 {
31192 name: "BRH",
31193 argLen: 1,
31194 asm: ppc64.ABRH,
31195 reg: regInfo{
31196 inputs: []inputInfo{
31197 {0, 1073733630},
31198 },
31199 outputs: []outputInfo{
31200 {0, 1073733624},
31201 },
31202 },
31203 },
31204 {
31205 name: "FNEG",
31206 argLen: 1,
31207 asm: ppc64.AFNEG,
31208 reg: regInfo{
31209 inputs: []inputInfo{
31210 {0, 9223372032559808512},
31211 },
31212 outputs: []outputInfo{
31213 {0, 9223372032559808512},
31214 },
31215 },
31216 },
31217 {
31218 name: "FSQRT",
31219 argLen: 1,
31220 asm: ppc64.AFSQRT,
31221 reg: regInfo{
31222 inputs: []inputInfo{
31223 {0, 9223372032559808512},
31224 },
31225 outputs: []outputInfo{
31226 {0, 9223372032559808512},
31227 },
31228 },
31229 },
31230 {
31231 name: "FSQRTS",
31232 argLen: 1,
31233 asm: ppc64.AFSQRTS,
31234 reg: regInfo{
31235 inputs: []inputInfo{
31236 {0, 9223372032559808512},
31237 },
31238 outputs: []outputInfo{
31239 {0, 9223372032559808512},
31240 },
31241 },
31242 },
31243 {
31244 name: "FFLOOR",
31245 argLen: 1,
31246 asm: ppc64.AFRIM,
31247 reg: regInfo{
31248 inputs: []inputInfo{
31249 {0, 9223372032559808512},
31250 },
31251 outputs: []outputInfo{
31252 {0, 9223372032559808512},
31253 },
31254 },
31255 },
31256 {
31257 name: "FCEIL",
31258 argLen: 1,
31259 asm: ppc64.AFRIP,
31260 reg: regInfo{
31261 inputs: []inputInfo{
31262 {0, 9223372032559808512},
31263 },
31264 outputs: []outputInfo{
31265 {0, 9223372032559808512},
31266 },
31267 },
31268 },
31269 {
31270 name: "FTRUNC",
31271 argLen: 1,
31272 asm: ppc64.AFRIZ,
31273 reg: regInfo{
31274 inputs: []inputInfo{
31275 {0, 9223372032559808512},
31276 },
31277 outputs: []outputInfo{
31278 {0, 9223372032559808512},
31279 },
31280 },
31281 },
31282 {
31283 name: "FROUND",
31284 argLen: 1,
31285 asm: ppc64.AFRIN,
31286 reg: regInfo{
31287 inputs: []inputInfo{
31288 {0, 9223372032559808512},
31289 },
31290 outputs: []outputInfo{
31291 {0, 9223372032559808512},
31292 },
31293 },
31294 },
31295 {
31296 name: "FABS",
31297 argLen: 1,
31298 asm: ppc64.AFABS,
31299 reg: regInfo{
31300 inputs: []inputInfo{
31301 {0, 9223372032559808512},
31302 },
31303 outputs: []outputInfo{
31304 {0, 9223372032559808512},
31305 },
31306 },
31307 },
31308 {
31309 name: "FNABS",
31310 argLen: 1,
31311 asm: ppc64.AFNABS,
31312 reg: regInfo{
31313 inputs: []inputInfo{
31314 {0, 9223372032559808512},
31315 },
31316 outputs: []outputInfo{
31317 {0, 9223372032559808512},
31318 },
31319 },
31320 },
31321 {
31322 name: "FCPSGN",
31323 argLen: 2,
31324 asm: ppc64.AFCPSGN,
31325 reg: regInfo{
31326 inputs: []inputInfo{
31327 {0, 9223372032559808512},
31328 {1, 9223372032559808512},
31329 },
31330 outputs: []outputInfo{
31331 {0, 9223372032559808512},
31332 },
31333 },
31334 },
31335 {
31336 name: "ORconst",
31337 auxType: auxInt64,
31338 argLen: 1,
31339 asm: ppc64.AOR,
31340 reg: regInfo{
31341 inputs: []inputInfo{
31342 {0, 1073733630},
31343 },
31344 outputs: []outputInfo{
31345 {0, 1073733624},
31346 },
31347 },
31348 },
31349 {
31350 name: "XORconst",
31351 auxType: auxInt64,
31352 argLen: 1,
31353 asm: ppc64.AXOR,
31354 reg: regInfo{
31355 inputs: []inputInfo{
31356 {0, 1073733630},
31357 },
31358 outputs: []outputInfo{
31359 {0, 1073733624},
31360 },
31361 },
31362 },
31363 {
31364 name: "ANDCCconst",
31365 auxType: auxInt64,
31366 argLen: 1,
31367 asm: ppc64.AANDCC,
31368 reg: regInfo{
31369 inputs: []inputInfo{
31370 {0, 1073733630},
31371 },
31372 outputs: []outputInfo{
31373 {0, 1073733624},
31374 },
31375 },
31376 },
31377 {
31378 name: "ANDconst",
31379 auxType: auxInt64,
31380 argLen: 1,
31381 clobberFlags: true,
31382 asm: ppc64.AANDCC,
31383 reg: regInfo{
31384 inputs: []inputInfo{
31385 {0, 1073733630},
31386 },
31387 outputs: []outputInfo{
31388 {0, 1073733624},
31389 },
31390 },
31391 },
31392 {
31393 name: "MOVBreg",
31394 argLen: 1,
31395 asm: ppc64.AMOVB,
31396 reg: regInfo{
31397 inputs: []inputInfo{
31398 {0, 1073733630},
31399 },
31400 outputs: []outputInfo{
31401 {0, 1073733624},
31402 },
31403 },
31404 },
31405 {
31406 name: "MOVBZreg",
31407 argLen: 1,
31408 asm: ppc64.AMOVBZ,
31409 reg: regInfo{
31410 inputs: []inputInfo{
31411 {0, 1073733630},
31412 },
31413 outputs: []outputInfo{
31414 {0, 1073733624},
31415 },
31416 },
31417 },
31418 {
31419 name: "MOVHreg",
31420 argLen: 1,
31421 asm: ppc64.AMOVH,
31422 reg: regInfo{
31423 inputs: []inputInfo{
31424 {0, 1073733630},
31425 },
31426 outputs: []outputInfo{
31427 {0, 1073733624},
31428 },
31429 },
31430 },
31431 {
31432 name: "MOVHZreg",
31433 argLen: 1,
31434 asm: ppc64.AMOVHZ,
31435 reg: regInfo{
31436 inputs: []inputInfo{
31437 {0, 1073733630},
31438 },
31439 outputs: []outputInfo{
31440 {0, 1073733624},
31441 },
31442 },
31443 },
31444 {
31445 name: "MOVWreg",
31446 argLen: 1,
31447 asm: ppc64.AMOVW,
31448 reg: regInfo{
31449 inputs: []inputInfo{
31450 {0, 1073733630},
31451 },
31452 outputs: []outputInfo{
31453 {0, 1073733624},
31454 },
31455 },
31456 },
31457 {
31458 name: "MOVWZreg",
31459 argLen: 1,
31460 asm: ppc64.AMOVWZ,
31461 reg: regInfo{
31462 inputs: []inputInfo{
31463 {0, 1073733630},
31464 },
31465 outputs: []outputInfo{
31466 {0, 1073733624},
31467 },
31468 },
31469 },
31470 {
31471 name: "MOVBZload",
31472 auxType: auxSymOff,
31473 argLen: 2,
31474 faultOnNilArg0: true,
31475 symEffect: SymRead,
31476 asm: ppc64.AMOVBZ,
31477 reg: regInfo{
31478 inputs: []inputInfo{
31479 {0, 1073733630},
31480 },
31481 outputs: []outputInfo{
31482 {0, 1073733624},
31483 },
31484 },
31485 },
31486 {
31487 name: "MOVHload",
31488 auxType: auxSymOff,
31489 argLen: 2,
31490 faultOnNilArg0: true,
31491 symEffect: SymRead,
31492 asm: ppc64.AMOVH,
31493 reg: regInfo{
31494 inputs: []inputInfo{
31495 {0, 1073733630},
31496 },
31497 outputs: []outputInfo{
31498 {0, 1073733624},
31499 },
31500 },
31501 },
31502 {
31503 name: "MOVHZload",
31504 auxType: auxSymOff,
31505 argLen: 2,
31506 faultOnNilArg0: true,
31507 symEffect: SymRead,
31508 asm: ppc64.AMOVHZ,
31509 reg: regInfo{
31510 inputs: []inputInfo{
31511 {0, 1073733630},
31512 },
31513 outputs: []outputInfo{
31514 {0, 1073733624},
31515 },
31516 },
31517 },
31518 {
31519 name: "MOVWload",
31520 auxType: auxSymOff,
31521 argLen: 2,
31522 faultOnNilArg0: true,
31523 symEffect: SymRead,
31524 asm: ppc64.AMOVW,
31525 reg: regInfo{
31526 inputs: []inputInfo{
31527 {0, 1073733630},
31528 },
31529 outputs: []outputInfo{
31530 {0, 1073733624},
31531 },
31532 },
31533 },
31534 {
31535 name: "MOVWZload",
31536 auxType: auxSymOff,
31537 argLen: 2,
31538 faultOnNilArg0: true,
31539 symEffect: SymRead,
31540 asm: ppc64.AMOVWZ,
31541 reg: regInfo{
31542 inputs: []inputInfo{
31543 {0, 1073733630},
31544 },
31545 outputs: []outputInfo{
31546 {0, 1073733624},
31547 },
31548 },
31549 },
31550 {
31551 name: "MOVDload",
31552 auxType: auxSymOff,
31553 argLen: 2,
31554 faultOnNilArg0: true,
31555 symEffect: SymRead,
31556 asm: ppc64.AMOVD,
31557 reg: regInfo{
31558 inputs: []inputInfo{
31559 {0, 1073733630},
31560 },
31561 outputs: []outputInfo{
31562 {0, 1073733624},
31563 },
31564 },
31565 },
31566 {
31567 name: "MOVDBRload",
31568 argLen: 2,
31569 faultOnNilArg0: true,
31570 asm: ppc64.AMOVDBR,
31571 reg: regInfo{
31572 inputs: []inputInfo{
31573 {0, 1073733630},
31574 },
31575 outputs: []outputInfo{
31576 {0, 1073733624},
31577 },
31578 },
31579 },
31580 {
31581 name: "MOVWBRload",
31582 argLen: 2,
31583 faultOnNilArg0: true,
31584 asm: ppc64.AMOVWBR,
31585 reg: regInfo{
31586 inputs: []inputInfo{
31587 {0, 1073733630},
31588 },
31589 outputs: []outputInfo{
31590 {0, 1073733624},
31591 },
31592 },
31593 },
31594 {
31595 name: "MOVHBRload",
31596 argLen: 2,
31597 faultOnNilArg0: true,
31598 asm: ppc64.AMOVHBR,
31599 reg: regInfo{
31600 inputs: []inputInfo{
31601 {0, 1073733630},
31602 },
31603 outputs: []outputInfo{
31604 {0, 1073733624},
31605 },
31606 },
31607 },
31608 {
31609 name: "MOVBZloadidx",
31610 argLen: 3,
31611 asm: ppc64.AMOVBZ,
31612 reg: regInfo{
31613 inputs: []inputInfo{
31614 {1, 1073733624},
31615 {0, 1073733630},
31616 },
31617 outputs: []outputInfo{
31618 {0, 1073733624},
31619 },
31620 },
31621 },
31622 {
31623 name: "MOVHloadidx",
31624 argLen: 3,
31625 asm: ppc64.AMOVH,
31626 reg: regInfo{
31627 inputs: []inputInfo{
31628 {1, 1073733624},
31629 {0, 1073733630},
31630 },
31631 outputs: []outputInfo{
31632 {0, 1073733624},
31633 },
31634 },
31635 },
31636 {
31637 name: "MOVHZloadidx",
31638 argLen: 3,
31639 asm: ppc64.AMOVHZ,
31640 reg: regInfo{
31641 inputs: []inputInfo{
31642 {1, 1073733624},
31643 {0, 1073733630},
31644 },
31645 outputs: []outputInfo{
31646 {0, 1073733624},
31647 },
31648 },
31649 },
31650 {
31651 name: "MOVWloadidx",
31652 argLen: 3,
31653 asm: ppc64.AMOVW,
31654 reg: regInfo{
31655 inputs: []inputInfo{
31656 {1, 1073733624},
31657 {0, 1073733630},
31658 },
31659 outputs: []outputInfo{
31660 {0, 1073733624},
31661 },
31662 },
31663 },
31664 {
31665 name: "MOVWZloadidx",
31666 argLen: 3,
31667 asm: ppc64.AMOVWZ,
31668 reg: regInfo{
31669 inputs: []inputInfo{
31670 {1, 1073733624},
31671 {0, 1073733630},
31672 },
31673 outputs: []outputInfo{
31674 {0, 1073733624},
31675 },
31676 },
31677 },
31678 {
31679 name: "MOVDloadidx",
31680 argLen: 3,
31681 asm: ppc64.AMOVD,
31682 reg: regInfo{
31683 inputs: []inputInfo{
31684 {1, 1073733624},
31685 {0, 1073733630},
31686 },
31687 outputs: []outputInfo{
31688 {0, 1073733624},
31689 },
31690 },
31691 },
31692 {
31693 name: "MOVHBRloadidx",
31694 argLen: 3,
31695 asm: ppc64.AMOVHBR,
31696 reg: regInfo{
31697 inputs: []inputInfo{
31698 {1, 1073733624},
31699 {0, 1073733630},
31700 },
31701 outputs: []outputInfo{
31702 {0, 1073733624},
31703 },
31704 },
31705 },
31706 {
31707 name: "MOVWBRloadidx",
31708 argLen: 3,
31709 asm: ppc64.AMOVWBR,
31710 reg: regInfo{
31711 inputs: []inputInfo{
31712 {1, 1073733624},
31713 {0, 1073733630},
31714 },
31715 outputs: []outputInfo{
31716 {0, 1073733624},
31717 },
31718 },
31719 },
31720 {
31721 name: "MOVDBRloadidx",
31722 argLen: 3,
31723 asm: ppc64.AMOVDBR,
31724 reg: regInfo{
31725 inputs: []inputInfo{
31726 {1, 1073733624},
31727 {0, 1073733630},
31728 },
31729 outputs: []outputInfo{
31730 {0, 1073733624},
31731 },
31732 },
31733 },
31734 {
31735 name: "FMOVDloadidx",
31736 argLen: 3,
31737 asm: ppc64.AFMOVD,
31738 reg: regInfo{
31739 inputs: []inputInfo{
31740 {0, 1073733630},
31741 {1, 1073733630},
31742 },
31743 outputs: []outputInfo{
31744 {0, 9223372032559808512},
31745 },
31746 },
31747 },
31748 {
31749 name: "FMOVSloadidx",
31750 argLen: 3,
31751 asm: ppc64.AFMOVS,
31752 reg: regInfo{
31753 inputs: []inputInfo{
31754 {0, 1073733630},
31755 {1, 1073733630},
31756 },
31757 outputs: []outputInfo{
31758 {0, 9223372032559808512},
31759 },
31760 },
31761 },
31762 {
31763 name: "DCBT",
31764 auxType: auxInt64,
31765 argLen: 2,
31766 hasSideEffects: true,
31767 asm: ppc64.ADCBT,
31768 reg: regInfo{
31769 inputs: []inputInfo{
31770 {0, 1073733630},
31771 },
31772 },
31773 },
31774 {
31775 name: "MOVDBRstore",
31776 argLen: 3,
31777 faultOnNilArg0: true,
31778 asm: ppc64.AMOVDBR,
31779 reg: regInfo{
31780 inputs: []inputInfo{
31781 {0, 1073733630},
31782 {1, 1073733630},
31783 },
31784 },
31785 },
31786 {
31787 name: "MOVWBRstore",
31788 argLen: 3,
31789 faultOnNilArg0: true,
31790 asm: ppc64.AMOVWBR,
31791 reg: regInfo{
31792 inputs: []inputInfo{
31793 {0, 1073733630},
31794 {1, 1073733630},
31795 },
31796 },
31797 },
31798 {
31799 name: "MOVHBRstore",
31800 argLen: 3,
31801 faultOnNilArg0: true,
31802 asm: ppc64.AMOVHBR,
31803 reg: regInfo{
31804 inputs: []inputInfo{
31805 {0, 1073733630},
31806 {1, 1073733630},
31807 },
31808 },
31809 },
31810 {
31811 name: "FMOVDload",
31812 auxType: auxSymOff,
31813 argLen: 2,
31814 faultOnNilArg0: true,
31815 symEffect: SymRead,
31816 asm: ppc64.AFMOVD,
31817 reg: regInfo{
31818 inputs: []inputInfo{
31819 {0, 1073733630},
31820 },
31821 outputs: []outputInfo{
31822 {0, 9223372032559808512},
31823 },
31824 },
31825 },
31826 {
31827 name: "FMOVSload",
31828 auxType: auxSymOff,
31829 argLen: 2,
31830 faultOnNilArg0: true,
31831 symEffect: SymRead,
31832 asm: ppc64.AFMOVS,
31833 reg: regInfo{
31834 inputs: []inputInfo{
31835 {0, 1073733630},
31836 },
31837 outputs: []outputInfo{
31838 {0, 9223372032559808512},
31839 },
31840 },
31841 },
31842 {
31843 name: "MOVBstore",
31844 auxType: auxSymOff,
31845 argLen: 3,
31846 faultOnNilArg0: true,
31847 symEffect: SymWrite,
31848 asm: ppc64.AMOVB,
31849 reg: regInfo{
31850 inputs: []inputInfo{
31851 {0, 1073733630},
31852 {1, 1073733630},
31853 },
31854 },
31855 },
31856 {
31857 name: "MOVHstore",
31858 auxType: auxSymOff,
31859 argLen: 3,
31860 faultOnNilArg0: true,
31861 symEffect: SymWrite,
31862 asm: ppc64.AMOVH,
31863 reg: regInfo{
31864 inputs: []inputInfo{
31865 {0, 1073733630},
31866 {1, 1073733630},
31867 },
31868 },
31869 },
31870 {
31871 name: "MOVWstore",
31872 auxType: auxSymOff,
31873 argLen: 3,
31874 faultOnNilArg0: true,
31875 symEffect: SymWrite,
31876 asm: ppc64.AMOVW,
31877 reg: regInfo{
31878 inputs: []inputInfo{
31879 {0, 1073733630},
31880 {1, 1073733630},
31881 },
31882 },
31883 },
31884 {
31885 name: "MOVDstore",
31886 auxType: auxSymOff,
31887 argLen: 3,
31888 faultOnNilArg0: true,
31889 symEffect: SymWrite,
31890 asm: ppc64.AMOVD,
31891 reg: regInfo{
31892 inputs: []inputInfo{
31893 {0, 1073733630},
31894 {1, 1073733630},
31895 },
31896 },
31897 },
31898 {
31899 name: "FMOVDstore",
31900 auxType: auxSymOff,
31901 argLen: 3,
31902 faultOnNilArg0: true,
31903 symEffect: SymWrite,
31904 asm: ppc64.AFMOVD,
31905 reg: regInfo{
31906 inputs: []inputInfo{
31907 {0, 1073733630},
31908 {1, 9223372032559808512},
31909 },
31910 },
31911 },
31912 {
31913 name: "FMOVSstore",
31914 auxType: auxSymOff,
31915 argLen: 3,
31916 faultOnNilArg0: true,
31917 symEffect: SymWrite,
31918 asm: ppc64.AFMOVS,
31919 reg: regInfo{
31920 inputs: []inputInfo{
31921 {0, 1073733630},
31922 {1, 9223372032559808512},
31923 },
31924 },
31925 },
31926 {
31927 name: "MOVBstoreidx",
31928 argLen: 4,
31929 asm: ppc64.AMOVB,
31930 reg: regInfo{
31931 inputs: []inputInfo{
31932 {0, 1073733630},
31933 {1, 1073733630},
31934 {2, 1073733630},
31935 },
31936 },
31937 },
31938 {
31939 name: "MOVHstoreidx",
31940 argLen: 4,
31941 asm: ppc64.AMOVH,
31942 reg: regInfo{
31943 inputs: []inputInfo{
31944 {0, 1073733630},
31945 {1, 1073733630},
31946 {2, 1073733630},
31947 },
31948 },
31949 },
31950 {
31951 name: "MOVWstoreidx",
31952 argLen: 4,
31953 asm: ppc64.AMOVW,
31954 reg: regInfo{
31955 inputs: []inputInfo{
31956 {0, 1073733630},
31957 {1, 1073733630},
31958 {2, 1073733630},
31959 },
31960 },
31961 },
31962 {
31963 name: "MOVDstoreidx",
31964 argLen: 4,
31965 asm: ppc64.AMOVD,
31966 reg: regInfo{
31967 inputs: []inputInfo{
31968 {0, 1073733630},
31969 {1, 1073733630},
31970 {2, 1073733630},
31971 },
31972 },
31973 },
31974 {
31975 name: "FMOVDstoreidx",
31976 argLen: 4,
31977 asm: ppc64.AFMOVD,
31978 reg: regInfo{
31979 inputs: []inputInfo{
31980 {0, 1073733630},
31981 {1, 1073733630},
31982 {2, 9223372032559808512},
31983 },
31984 },
31985 },
31986 {
31987 name: "FMOVSstoreidx",
31988 argLen: 4,
31989 asm: ppc64.AFMOVS,
31990 reg: regInfo{
31991 inputs: []inputInfo{
31992 {0, 1073733630},
31993 {1, 1073733630},
31994 {2, 9223372032559808512},
31995 },
31996 },
31997 },
31998 {
31999 name: "MOVHBRstoreidx",
32000 argLen: 4,
32001 asm: ppc64.AMOVHBR,
32002 reg: regInfo{
32003 inputs: []inputInfo{
32004 {0, 1073733630},
32005 {1, 1073733630},
32006 {2, 1073733630},
32007 },
32008 },
32009 },
32010 {
32011 name: "MOVWBRstoreidx",
32012 argLen: 4,
32013 asm: ppc64.AMOVWBR,
32014 reg: regInfo{
32015 inputs: []inputInfo{
32016 {0, 1073733630},
32017 {1, 1073733630},
32018 {2, 1073733630},
32019 },
32020 },
32021 },
32022 {
32023 name: "MOVDBRstoreidx",
32024 argLen: 4,
32025 asm: ppc64.AMOVDBR,
32026 reg: regInfo{
32027 inputs: []inputInfo{
32028 {0, 1073733630},
32029 {1, 1073733630},
32030 {2, 1073733630},
32031 },
32032 },
32033 },
32034 {
32035 name: "MOVBstorezero",
32036 auxType: auxSymOff,
32037 argLen: 2,
32038 faultOnNilArg0: true,
32039 symEffect: SymWrite,
32040 asm: ppc64.AMOVB,
32041 reg: regInfo{
32042 inputs: []inputInfo{
32043 {0, 1073733630},
32044 },
32045 },
32046 },
32047 {
32048 name: "MOVHstorezero",
32049 auxType: auxSymOff,
32050 argLen: 2,
32051 faultOnNilArg0: true,
32052 symEffect: SymWrite,
32053 asm: ppc64.AMOVH,
32054 reg: regInfo{
32055 inputs: []inputInfo{
32056 {0, 1073733630},
32057 },
32058 },
32059 },
32060 {
32061 name: "MOVWstorezero",
32062 auxType: auxSymOff,
32063 argLen: 2,
32064 faultOnNilArg0: true,
32065 symEffect: SymWrite,
32066 asm: ppc64.AMOVW,
32067 reg: regInfo{
32068 inputs: []inputInfo{
32069 {0, 1073733630},
32070 },
32071 },
32072 },
32073 {
32074 name: "MOVDstorezero",
32075 auxType: auxSymOff,
32076 argLen: 2,
32077 faultOnNilArg0: true,
32078 symEffect: SymWrite,
32079 asm: ppc64.AMOVD,
32080 reg: regInfo{
32081 inputs: []inputInfo{
32082 {0, 1073733630},
32083 },
32084 },
32085 },
32086 {
32087 name: "MOVDaddr",
32088 auxType: auxSymOff,
32089 argLen: 1,
32090 rematerializeable: true,
32091 symEffect: SymAddr,
32092 asm: ppc64.AMOVD,
32093 reg: regInfo{
32094 inputs: []inputInfo{
32095 {0, 1073733630},
32096 },
32097 outputs: []outputInfo{
32098 {0, 1073733624},
32099 },
32100 },
32101 },
32102 {
32103 name: "MOVDconst",
32104 auxType: auxInt64,
32105 argLen: 0,
32106 rematerializeable: true,
32107 asm: ppc64.AMOVD,
32108 reg: regInfo{
32109 outputs: []outputInfo{
32110 {0, 1073733624},
32111 },
32112 },
32113 },
32114 {
32115 name: "FMOVDconst",
32116 auxType: auxFloat64,
32117 argLen: 0,
32118 rematerializeable: true,
32119 asm: ppc64.AFMOVD,
32120 reg: regInfo{
32121 outputs: []outputInfo{
32122 {0, 9223372032559808512},
32123 },
32124 },
32125 },
32126 {
32127 name: "FMOVSconst",
32128 auxType: auxFloat32,
32129 argLen: 0,
32130 rematerializeable: true,
32131 asm: ppc64.AFMOVS,
32132 reg: regInfo{
32133 outputs: []outputInfo{
32134 {0, 9223372032559808512},
32135 },
32136 },
32137 },
32138 {
32139 name: "FCMPU",
32140 argLen: 2,
32141 asm: ppc64.AFCMPU,
32142 reg: regInfo{
32143 inputs: []inputInfo{
32144 {0, 9223372032559808512},
32145 {1, 9223372032559808512},
32146 },
32147 },
32148 },
32149 {
32150 name: "CMP",
32151 argLen: 2,
32152 asm: ppc64.ACMP,
32153 reg: regInfo{
32154 inputs: []inputInfo{
32155 {0, 1073733630},
32156 {1, 1073733630},
32157 },
32158 },
32159 },
32160 {
32161 name: "CMPU",
32162 argLen: 2,
32163 asm: ppc64.ACMPU,
32164 reg: regInfo{
32165 inputs: []inputInfo{
32166 {0, 1073733630},
32167 {1, 1073733630},
32168 },
32169 },
32170 },
32171 {
32172 name: "CMPW",
32173 argLen: 2,
32174 asm: ppc64.ACMPW,
32175 reg: regInfo{
32176 inputs: []inputInfo{
32177 {0, 1073733630},
32178 {1, 1073733630},
32179 },
32180 },
32181 },
32182 {
32183 name: "CMPWU",
32184 argLen: 2,
32185 asm: ppc64.ACMPWU,
32186 reg: regInfo{
32187 inputs: []inputInfo{
32188 {0, 1073733630},
32189 {1, 1073733630},
32190 },
32191 },
32192 },
32193 {
32194 name: "CMPconst",
32195 auxType: auxInt64,
32196 argLen: 1,
32197 asm: ppc64.ACMP,
32198 reg: regInfo{
32199 inputs: []inputInfo{
32200 {0, 1073733630},
32201 },
32202 },
32203 },
32204 {
32205 name: "CMPUconst",
32206 auxType: auxInt64,
32207 argLen: 1,
32208 asm: ppc64.ACMPU,
32209 reg: regInfo{
32210 inputs: []inputInfo{
32211 {0, 1073733630},
32212 },
32213 },
32214 },
32215 {
32216 name: "CMPWconst",
32217 auxType: auxInt32,
32218 argLen: 1,
32219 asm: ppc64.ACMPW,
32220 reg: regInfo{
32221 inputs: []inputInfo{
32222 {0, 1073733630},
32223 },
32224 },
32225 },
32226 {
32227 name: "CMPWUconst",
32228 auxType: auxInt32,
32229 argLen: 1,
32230 asm: ppc64.ACMPWU,
32231 reg: regInfo{
32232 inputs: []inputInfo{
32233 {0, 1073733630},
32234 },
32235 },
32236 },
32237 {
32238 name: "ISEL",
32239 auxType: auxInt32,
32240 argLen: 3,
32241 asm: ppc64.AISEL,
32242 reg: regInfo{
32243 inputs: []inputInfo{
32244 {0, 1073733624},
32245 {1, 1073733624},
32246 },
32247 outputs: []outputInfo{
32248 {0, 1073733624},
32249 },
32250 },
32251 },
32252 {
32253 name: "ISELZ",
32254 auxType: auxInt32,
32255 argLen: 2,
32256 asm: ppc64.AISEL,
32257 reg: regInfo{
32258 inputs: []inputInfo{
32259 {0, 1073733624},
32260 },
32261 outputs: []outputInfo{
32262 {0, 1073733624},
32263 },
32264 },
32265 },
32266 {
32267 name: "SETBC",
32268 auxType: auxInt32,
32269 argLen: 1,
32270 asm: ppc64.ASETBC,
32271 reg: regInfo{
32272 outputs: []outputInfo{
32273 {0, 1073733624},
32274 },
32275 },
32276 },
32277 {
32278 name: "SETBCR",
32279 auxType: auxInt32,
32280 argLen: 1,
32281 asm: ppc64.ASETBCR,
32282 reg: regInfo{
32283 outputs: []outputInfo{
32284 {0, 1073733624},
32285 },
32286 },
32287 },
32288 {
32289 name: "Equal",
32290 argLen: 1,
32291 reg: regInfo{
32292 outputs: []outputInfo{
32293 {0, 1073733624},
32294 },
32295 },
32296 },
32297 {
32298 name: "NotEqual",
32299 argLen: 1,
32300 reg: regInfo{
32301 outputs: []outputInfo{
32302 {0, 1073733624},
32303 },
32304 },
32305 },
32306 {
32307 name: "LessThan",
32308 argLen: 1,
32309 reg: regInfo{
32310 outputs: []outputInfo{
32311 {0, 1073733624},
32312 },
32313 },
32314 },
32315 {
32316 name: "FLessThan",
32317 argLen: 1,
32318 reg: regInfo{
32319 outputs: []outputInfo{
32320 {0, 1073733624},
32321 },
32322 },
32323 },
32324 {
32325 name: "LessEqual",
32326 argLen: 1,
32327 reg: regInfo{
32328 outputs: []outputInfo{
32329 {0, 1073733624},
32330 },
32331 },
32332 },
32333 {
32334 name: "FLessEqual",
32335 argLen: 1,
32336 reg: regInfo{
32337 outputs: []outputInfo{
32338 {0, 1073733624},
32339 },
32340 },
32341 },
32342 {
32343 name: "GreaterThan",
32344 argLen: 1,
32345 reg: regInfo{
32346 outputs: []outputInfo{
32347 {0, 1073733624},
32348 },
32349 },
32350 },
32351 {
32352 name: "FGreaterThan",
32353 argLen: 1,
32354 reg: regInfo{
32355 outputs: []outputInfo{
32356 {0, 1073733624},
32357 },
32358 },
32359 },
32360 {
32361 name: "GreaterEqual",
32362 argLen: 1,
32363 reg: regInfo{
32364 outputs: []outputInfo{
32365 {0, 1073733624},
32366 },
32367 },
32368 },
32369 {
32370 name: "FGreaterEqual",
32371 argLen: 1,
32372 reg: regInfo{
32373 outputs: []outputInfo{
32374 {0, 1073733624},
32375 },
32376 },
32377 },
32378 {
32379 name: "LoweredGetClosurePtr",
32380 argLen: 0,
32381 zeroWidth: true,
32382 reg: regInfo{
32383 outputs: []outputInfo{
32384 {0, 2048},
32385 },
32386 },
32387 },
32388 {
32389 name: "LoweredGetCallerSP",
32390 argLen: 1,
32391 rematerializeable: true,
32392 reg: regInfo{
32393 outputs: []outputInfo{
32394 {0, 1073733624},
32395 },
32396 },
32397 },
32398 {
32399 name: "LoweredGetCallerPC",
32400 argLen: 0,
32401 rematerializeable: true,
32402 reg: regInfo{
32403 outputs: []outputInfo{
32404 {0, 1073733624},
32405 },
32406 },
32407 },
32408 {
32409 name: "LoweredNilCheck",
32410 argLen: 2,
32411 clobberFlags: true,
32412 nilCheck: true,
32413 faultOnNilArg0: true,
32414 reg: regInfo{
32415 inputs: []inputInfo{
32416 {0, 1073733630},
32417 },
32418 clobbers: 2147483648,
32419 },
32420 },
32421 {
32422 name: "LoweredRound32F",
32423 argLen: 1,
32424 resultInArg0: true,
32425 zeroWidth: true,
32426 reg: regInfo{
32427 inputs: []inputInfo{
32428 {0, 9223372032559808512},
32429 },
32430 outputs: []outputInfo{
32431 {0, 9223372032559808512},
32432 },
32433 },
32434 },
32435 {
32436 name: "LoweredRound64F",
32437 argLen: 1,
32438 resultInArg0: true,
32439 zeroWidth: true,
32440 reg: regInfo{
32441 inputs: []inputInfo{
32442 {0, 9223372032559808512},
32443 },
32444 outputs: []outputInfo{
32445 {0, 9223372032559808512},
32446 },
32447 },
32448 },
32449 {
32450 name: "CALLstatic",
32451 auxType: auxCallOff,
32452 argLen: -1,
32453 clobberFlags: true,
32454 call: true,
32455 reg: regInfo{
32456 clobbers: 18446744071562059768,
32457 },
32458 },
32459 {
32460 name: "CALLtail",
32461 auxType: auxCallOff,
32462 argLen: -1,
32463 clobberFlags: true,
32464 call: true,
32465 tailCall: true,
32466 reg: regInfo{
32467 clobbers: 18446744071562059768,
32468 },
32469 },
32470 {
32471 name: "CALLclosure",
32472 auxType: auxCallOff,
32473 argLen: -1,
32474 clobberFlags: true,
32475 call: true,
32476 reg: regInfo{
32477 inputs: []inputInfo{
32478 {0, 4096},
32479 {1, 2048},
32480 },
32481 clobbers: 18446744071562059768,
32482 },
32483 },
32484 {
32485 name: "CALLinter",
32486 auxType: auxCallOff,
32487 argLen: -1,
32488 clobberFlags: true,
32489 call: true,
32490 reg: regInfo{
32491 inputs: []inputInfo{
32492 {0, 4096},
32493 },
32494 clobbers: 18446744071562059768,
32495 },
32496 },
32497 {
32498 name: "LoweredZero",
32499 auxType: auxInt64,
32500 argLen: 2,
32501 clobberFlags: true,
32502 faultOnNilArg0: true,
32503 unsafePoint: true,
32504 reg: regInfo{
32505 inputs: []inputInfo{
32506 {0, 1048576},
32507 },
32508 clobbers: 1048576,
32509 },
32510 },
32511 {
32512 name: "LoweredZeroShort",
32513 auxType: auxInt64,
32514 argLen: 2,
32515 faultOnNilArg0: true,
32516 unsafePoint: true,
32517 reg: regInfo{
32518 inputs: []inputInfo{
32519 {0, 1073733624},
32520 },
32521 },
32522 },
32523 {
32524 name: "LoweredQuadZeroShort",
32525 auxType: auxInt64,
32526 argLen: 2,
32527 faultOnNilArg0: true,
32528 unsafePoint: true,
32529 reg: regInfo{
32530 inputs: []inputInfo{
32531 {0, 1073733624},
32532 },
32533 },
32534 },
32535 {
32536 name: "LoweredQuadZero",
32537 auxType: auxInt64,
32538 argLen: 2,
32539 clobberFlags: true,
32540 faultOnNilArg0: true,
32541 unsafePoint: true,
32542 reg: regInfo{
32543 inputs: []inputInfo{
32544 {0, 1048576},
32545 },
32546 clobbers: 1048576,
32547 },
32548 },
32549 {
32550 name: "LoweredMove",
32551 auxType: auxInt64,
32552 argLen: 3,
32553 clobberFlags: true,
32554 faultOnNilArg0: true,
32555 faultOnNilArg1: true,
32556 unsafePoint: true,
32557 reg: regInfo{
32558 inputs: []inputInfo{
32559 {0, 1048576},
32560 {1, 2097152},
32561 },
32562 clobbers: 3145728,
32563 },
32564 },
32565 {
32566 name: "LoweredMoveShort",
32567 auxType: auxInt64,
32568 argLen: 3,
32569 faultOnNilArg0: true,
32570 faultOnNilArg1: true,
32571 unsafePoint: true,
32572 reg: regInfo{
32573 inputs: []inputInfo{
32574 {0, 1073733624},
32575 {1, 1073733624},
32576 },
32577 },
32578 },
32579 {
32580 name: "LoweredQuadMove",
32581 auxType: auxInt64,
32582 argLen: 3,
32583 clobberFlags: true,
32584 faultOnNilArg0: true,
32585 faultOnNilArg1: true,
32586 unsafePoint: true,
32587 reg: regInfo{
32588 inputs: []inputInfo{
32589 {0, 1048576},
32590 {1, 2097152},
32591 },
32592 clobbers: 3145728,
32593 },
32594 },
32595 {
32596 name: "LoweredQuadMoveShort",
32597 auxType: auxInt64,
32598 argLen: 3,
32599 faultOnNilArg0: true,
32600 faultOnNilArg1: true,
32601 unsafePoint: true,
32602 reg: regInfo{
32603 inputs: []inputInfo{
32604 {0, 1073733624},
32605 {1, 1073733624},
32606 },
32607 },
32608 },
32609 {
32610 name: "LoweredAtomicStore8",
32611 auxType: auxInt64,
32612 argLen: 3,
32613 faultOnNilArg0: true,
32614 hasSideEffects: true,
32615 reg: regInfo{
32616 inputs: []inputInfo{
32617 {0, 1073733630},
32618 {1, 1073733630},
32619 },
32620 },
32621 },
32622 {
32623 name: "LoweredAtomicStore32",
32624 auxType: auxInt64,
32625 argLen: 3,
32626 faultOnNilArg0: true,
32627 hasSideEffects: true,
32628 reg: regInfo{
32629 inputs: []inputInfo{
32630 {0, 1073733630},
32631 {1, 1073733630},
32632 },
32633 },
32634 },
32635 {
32636 name: "LoweredAtomicStore64",
32637 auxType: auxInt64,
32638 argLen: 3,
32639 faultOnNilArg0: true,
32640 hasSideEffects: true,
32641 reg: regInfo{
32642 inputs: []inputInfo{
32643 {0, 1073733630},
32644 {1, 1073733630},
32645 },
32646 },
32647 },
32648 {
32649 name: "LoweredAtomicLoad8",
32650 auxType: auxInt64,
32651 argLen: 2,
32652 clobberFlags: true,
32653 faultOnNilArg0: true,
32654 reg: regInfo{
32655 inputs: []inputInfo{
32656 {0, 1073733630},
32657 },
32658 outputs: []outputInfo{
32659 {0, 1073733624},
32660 },
32661 },
32662 },
32663 {
32664 name: "LoweredAtomicLoad32",
32665 auxType: auxInt64,
32666 argLen: 2,
32667 clobberFlags: true,
32668 faultOnNilArg0: true,
32669 reg: regInfo{
32670 inputs: []inputInfo{
32671 {0, 1073733630},
32672 },
32673 outputs: []outputInfo{
32674 {0, 1073733624},
32675 },
32676 },
32677 },
32678 {
32679 name: "LoweredAtomicLoad64",
32680 auxType: auxInt64,
32681 argLen: 2,
32682 clobberFlags: true,
32683 faultOnNilArg0: true,
32684 reg: regInfo{
32685 inputs: []inputInfo{
32686 {0, 1073733630},
32687 },
32688 outputs: []outputInfo{
32689 {0, 1073733624},
32690 },
32691 },
32692 },
32693 {
32694 name: "LoweredAtomicLoadPtr",
32695 auxType: auxInt64,
32696 argLen: 2,
32697 clobberFlags: true,
32698 faultOnNilArg0: true,
32699 reg: regInfo{
32700 inputs: []inputInfo{
32701 {0, 1073733630},
32702 },
32703 outputs: []outputInfo{
32704 {0, 1073733624},
32705 },
32706 },
32707 },
32708 {
32709 name: "LoweredAtomicAdd32",
32710 argLen: 3,
32711 resultNotInArgs: true,
32712 clobberFlags: true,
32713 faultOnNilArg0: true,
32714 hasSideEffects: true,
32715 reg: regInfo{
32716 inputs: []inputInfo{
32717 {1, 1073733624},
32718 {0, 1073733630},
32719 },
32720 outputs: []outputInfo{
32721 {0, 1073733624},
32722 },
32723 },
32724 },
32725 {
32726 name: "LoweredAtomicAdd64",
32727 argLen: 3,
32728 resultNotInArgs: true,
32729 clobberFlags: true,
32730 faultOnNilArg0: true,
32731 hasSideEffects: true,
32732 reg: regInfo{
32733 inputs: []inputInfo{
32734 {1, 1073733624},
32735 {0, 1073733630},
32736 },
32737 outputs: []outputInfo{
32738 {0, 1073733624},
32739 },
32740 },
32741 },
32742 {
32743 name: "LoweredAtomicExchange8",
32744 argLen: 3,
32745 resultNotInArgs: true,
32746 clobberFlags: true,
32747 faultOnNilArg0: true,
32748 hasSideEffects: true,
32749 reg: regInfo{
32750 inputs: []inputInfo{
32751 {1, 1073733624},
32752 {0, 1073733630},
32753 },
32754 outputs: []outputInfo{
32755 {0, 1073733624},
32756 },
32757 },
32758 },
32759 {
32760 name: "LoweredAtomicExchange32",
32761 argLen: 3,
32762 resultNotInArgs: true,
32763 clobberFlags: true,
32764 faultOnNilArg0: true,
32765 hasSideEffects: true,
32766 reg: regInfo{
32767 inputs: []inputInfo{
32768 {1, 1073733624},
32769 {0, 1073733630},
32770 },
32771 outputs: []outputInfo{
32772 {0, 1073733624},
32773 },
32774 },
32775 },
32776 {
32777 name: "LoweredAtomicExchange64",
32778 argLen: 3,
32779 resultNotInArgs: true,
32780 clobberFlags: true,
32781 faultOnNilArg0: true,
32782 hasSideEffects: true,
32783 reg: regInfo{
32784 inputs: []inputInfo{
32785 {1, 1073733624},
32786 {0, 1073733630},
32787 },
32788 outputs: []outputInfo{
32789 {0, 1073733624},
32790 },
32791 },
32792 },
32793 {
32794 name: "LoweredAtomicCas64",
32795 auxType: auxInt64,
32796 argLen: 4,
32797 resultNotInArgs: true,
32798 clobberFlags: true,
32799 faultOnNilArg0: true,
32800 hasSideEffects: true,
32801 reg: regInfo{
32802 inputs: []inputInfo{
32803 {1, 1073733624},
32804 {2, 1073733624},
32805 {0, 1073733630},
32806 },
32807 outputs: []outputInfo{
32808 {0, 1073733624},
32809 },
32810 },
32811 },
32812 {
32813 name: "LoweredAtomicCas32",
32814 auxType: auxInt64,
32815 argLen: 4,
32816 resultNotInArgs: true,
32817 clobberFlags: true,
32818 faultOnNilArg0: true,
32819 hasSideEffects: true,
32820 reg: regInfo{
32821 inputs: []inputInfo{
32822 {1, 1073733624},
32823 {2, 1073733624},
32824 {0, 1073733630},
32825 },
32826 outputs: []outputInfo{
32827 {0, 1073733624},
32828 },
32829 },
32830 },
32831 {
32832 name: "LoweredAtomicAnd8",
32833 argLen: 3,
32834 faultOnNilArg0: true,
32835 hasSideEffects: true,
32836 asm: ppc64.AAND,
32837 reg: regInfo{
32838 inputs: []inputInfo{
32839 {0, 1073733630},
32840 {1, 1073733630},
32841 },
32842 },
32843 },
32844 {
32845 name: "LoweredAtomicAnd32",
32846 argLen: 3,
32847 faultOnNilArg0: true,
32848 hasSideEffects: true,
32849 asm: ppc64.AAND,
32850 reg: regInfo{
32851 inputs: []inputInfo{
32852 {0, 1073733630},
32853 {1, 1073733630},
32854 },
32855 },
32856 },
32857 {
32858 name: "LoweredAtomicOr8",
32859 argLen: 3,
32860 faultOnNilArg0: true,
32861 hasSideEffects: true,
32862 asm: ppc64.AOR,
32863 reg: regInfo{
32864 inputs: []inputInfo{
32865 {0, 1073733630},
32866 {1, 1073733630},
32867 },
32868 },
32869 },
32870 {
32871 name: "LoweredAtomicOr32",
32872 argLen: 3,
32873 faultOnNilArg0: true,
32874 hasSideEffects: true,
32875 asm: ppc64.AOR,
32876 reg: regInfo{
32877 inputs: []inputInfo{
32878 {0, 1073733630},
32879 {1, 1073733630},
32880 },
32881 },
32882 },
32883 {
32884 name: "LoweredWB",
32885 auxType: auxInt64,
32886 argLen: 1,
32887 clobberFlags: true,
32888 reg: regInfo{
32889 clobbers: 18446744072632408064,
32890 outputs: []outputInfo{
32891 {0, 536870912},
32892 },
32893 },
32894 },
32895 {
32896 name: "LoweredPubBarrier",
32897 argLen: 1,
32898 hasSideEffects: true,
32899 asm: ppc64.ALWSYNC,
32900 reg: regInfo{},
32901 },
32902 {
32903 name: "LoweredPanicBoundsA",
32904 auxType: auxInt64,
32905 argLen: 3,
32906 call: true,
32907 reg: regInfo{
32908 inputs: []inputInfo{
32909 {0, 32},
32910 {1, 64},
32911 },
32912 },
32913 },
32914 {
32915 name: "LoweredPanicBoundsB",
32916 auxType: auxInt64,
32917 argLen: 3,
32918 call: true,
32919 reg: regInfo{
32920 inputs: []inputInfo{
32921 {0, 16},
32922 {1, 32},
32923 },
32924 },
32925 },
32926 {
32927 name: "LoweredPanicBoundsC",
32928 auxType: auxInt64,
32929 argLen: 3,
32930 call: true,
32931 reg: regInfo{
32932 inputs: []inputInfo{
32933 {0, 8},
32934 {1, 16},
32935 },
32936 },
32937 },
32938 {
32939 name: "InvertFlags",
32940 argLen: 1,
32941 reg: regInfo{},
32942 },
32943 {
32944 name: "FlagEQ",
32945 argLen: 0,
32946 reg: regInfo{},
32947 },
32948 {
32949 name: "FlagLT",
32950 argLen: 0,
32951 reg: regInfo{},
32952 },
32953 {
32954 name: "FlagGT",
32955 argLen: 0,
32956 reg: regInfo{},
32957 },
32958
32959 {
32960 name: "ADD",
32961 argLen: 2,
32962 commutative: true,
32963 asm: riscv.AADD,
32964 reg: regInfo{
32965 inputs: []inputInfo{
32966 {0, 1006632944},
32967 {1, 1006632944},
32968 },
32969 outputs: []outputInfo{
32970 {0, 1006632944},
32971 },
32972 },
32973 },
32974 {
32975 name: "ADDI",
32976 auxType: auxInt64,
32977 argLen: 1,
32978 asm: riscv.AADDI,
32979 reg: regInfo{
32980 inputs: []inputInfo{
32981 {0, 9223372037861408754},
32982 },
32983 outputs: []outputInfo{
32984 {0, 1006632944},
32985 },
32986 },
32987 },
32988 {
32989 name: "ADDIW",
32990 auxType: auxInt64,
32991 argLen: 1,
32992 asm: riscv.AADDIW,
32993 reg: regInfo{
32994 inputs: []inputInfo{
32995 {0, 1006632944},
32996 },
32997 outputs: []outputInfo{
32998 {0, 1006632944},
32999 },
33000 },
33001 },
33002 {
33003 name: "NEG",
33004 argLen: 1,
33005 asm: riscv.ANEG,
33006 reg: regInfo{
33007 inputs: []inputInfo{
33008 {0, 1006632944},
33009 },
33010 outputs: []outputInfo{
33011 {0, 1006632944},
33012 },
33013 },
33014 },
33015 {
33016 name: "NEGW",
33017 argLen: 1,
33018 asm: riscv.ANEGW,
33019 reg: regInfo{
33020 inputs: []inputInfo{
33021 {0, 1006632944},
33022 },
33023 outputs: []outputInfo{
33024 {0, 1006632944},
33025 },
33026 },
33027 },
33028 {
33029 name: "SUB",
33030 argLen: 2,
33031 asm: riscv.ASUB,
33032 reg: regInfo{
33033 inputs: []inputInfo{
33034 {0, 1006632944},
33035 {1, 1006632944},
33036 },
33037 outputs: []outputInfo{
33038 {0, 1006632944},
33039 },
33040 },
33041 },
33042 {
33043 name: "SUBW",
33044 argLen: 2,
33045 asm: riscv.ASUBW,
33046 reg: regInfo{
33047 inputs: []inputInfo{
33048 {0, 1006632944},
33049 {1, 1006632944},
33050 },
33051 outputs: []outputInfo{
33052 {0, 1006632944},
33053 },
33054 },
33055 },
33056 {
33057 name: "MUL",
33058 argLen: 2,
33059 commutative: true,
33060 asm: riscv.AMUL,
33061 reg: regInfo{
33062 inputs: []inputInfo{
33063 {0, 1006632944},
33064 {1, 1006632944},
33065 },
33066 outputs: []outputInfo{
33067 {0, 1006632944},
33068 },
33069 },
33070 },
33071 {
33072 name: "MULW",
33073 argLen: 2,
33074 commutative: true,
33075 asm: riscv.AMULW,
33076 reg: regInfo{
33077 inputs: []inputInfo{
33078 {0, 1006632944},
33079 {1, 1006632944},
33080 },
33081 outputs: []outputInfo{
33082 {0, 1006632944},
33083 },
33084 },
33085 },
33086 {
33087 name: "MULH",
33088 argLen: 2,
33089 commutative: true,
33090 asm: riscv.AMULH,
33091 reg: regInfo{
33092 inputs: []inputInfo{
33093 {0, 1006632944},
33094 {1, 1006632944},
33095 },
33096 outputs: []outputInfo{
33097 {0, 1006632944},
33098 },
33099 },
33100 },
33101 {
33102 name: "MULHU",
33103 argLen: 2,
33104 commutative: true,
33105 asm: riscv.AMULHU,
33106 reg: regInfo{
33107 inputs: []inputInfo{
33108 {0, 1006632944},
33109 {1, 1006632944},
33110 },
33111 outputs: []outputInfo{
33112 {0, 1006632944},
33113 },
33114 },
33115 },
33116 {
33117 name: "LoweredMuluhilo",
33118 argLen: 2,
33119 resultNotInArgs: true,
33120 reg: regInfo{
33121 inputs: []inputInfo{
33122 {0, 1006632944},
33123 {1, 1006632944},
33124 },
33125 outputs: []outputInfo{
33126 {0, 1006632944},
33127 {1, 1006632944},
33128 },
33129 },
33130 },
33131 {
33132 name: "LoweredMuluover",
33133 argLen: 2,
33134 resultNotInArgs: true,
33135 reg: regInfo{
33136 inputs: []inputInfo{
33137 {0, 1006632944},
33138 {1, 1006632944},
33139 },
33140 outputs: []outputInfo{
33141 {0, 1006632944},
33142 {1, 1006632944},
33143 },
33144 },
33145 },
33146 {
33147 name: "DIV",
33148 argLen: 2,
33149 asm: riscv.ADIV,
33150 reg: regInfo{
33151 inputs: []inputInfo{
33152 {0, 1006632944},
33153 {1, 1006632944},
33154 },
33155 outputs: []outputInfo{
33156 {0, 1006632944},
33157 },
33158 },
33159 },
33160 {
33161 name: "DIVU",
33162 argLen: 2,
33163 asm: riscv.ADIVU,
33164 reg: regInfo{
33165 inputs: []inputInfo{
33166 {0, 1006632944},
33167 {1, 1006632944},
33168 },
33169 outputs: []outputInfo{
33170 {0, 1006632944},
33171 },
33172 },
33173 },
33174 {
33175 name: "DIVW",
33176 argLen: 2,
33177 asm: riscv.ADIVW,
33178 reg: regInfo{
33179 inputs: []inputInfo{
33180 {0, 1006632944},
33181 {1, 1006632944},
33182 },
33183 outputs: []outputInfo{
33184 {0, 1006632944},
33185 },
33186 },
33187 },
33188 {
33189 name: "DIVUW",
33190 argLen: 2,
33191 asm: riscv.ADIVUW,
33192 reg: regInfo{
33193 inputs: []inputInfo{
33194 {0, 1006632944},
33195 {1, 1006632944},
33196 },
33197 outputs: []outputInfo{
33198 {0, 1006632944},
33199 },
33200 },
33201 },
33202 {
33203 name: "REM",
33204 argLen: 2,
33205 asm: riscv.AREM,
33206 reg: regInfo{
33207 inputs: []inputInfo{
33208 {0, 1006632944},
33209 {1, 1006632944},
33210 },
33211 outputs: []outputInfo{
33212 {0, 1006632944},
33213 },
33214 },
33215 },
33216 {
33217 name: "REMU",
33218 argLen: 2,
33219 asm: riscv.AREMU,
33220 reg: regInfo{
33221 inputs: []inputInfo{
33222 {0, 1006632944},
33223 {1, 1006632944},
33224 },
33225 outputs: []outputInfo{
33226 {0, 1006632944},
33227 },
33228 },
33229 },
33230 {
33231 name: "REMW",
33232 argLen: 2,
33233 asm: riscv.AREMW,
33234 reg: regInfo{
33235 inputs: []inputInfo{
33236 {0, 1006632944},
33237 {1, 1006632944},
33238 },
33239 outputs: []outputInfo{
33240 {0, 1006632944},
33241 },
33242 },
33243 },
33244 {
33245 name: "REMUW",
33246 argLen: 2,
33247 asm: riscv.AREMUW,
33248 reg: regInfo{
33249 inputs: []inputInfo{
33250 {0, 1006632944},
33251 {1, 1006632944},
33252 },
33253 outputs: []outputInfo{
33254 {0, 1006632944},
33255 },
33256 },
33257 },
33258 {
33259 name: "MOVaddr",
33260 auxType: auxSymOff,
33261 argLen: 1,
33262 rematerializeable: true,
33263 symEffect: SymAddr,
33264 asm: riscv.AMOV,
33265 reg: regInfo{
33266 inputs: []inputInfo{
33267 {0, 9223372037861408754},
33268 },
33269 outputs: []outputInfo{
33270 {0, 1006632944},
33271 },
33272 },
33273 },
33274 {
33275 name: "MOVDconst",
33276 auxType: auxInt64,
33277 argLen: 0,
33278 rematerializeable: true,
33279 asm: riscv.AMOV,
33280 reg: regInfo{
33281 outputs: []outputInfo{
33282 {0, 1006632944},
33283 },
33284 },
33285 },
33286 {
33287 name: "MOVBload",
33288 auxType: auxSymOff,
33289 argLen: 2,
33290 faultOnNilArg0: true,
33291 symEffect: SymRead,
33292 asm: riscv.AMOVB,
33293 reg: regInfo{
33294 inputs: []inputInfo{
33295 {0, 9223372037861408754},
33296 },
33297 outputs: []outputInfo{
33298 {0, 1006632944},
33299 },
33300 },
33301 },
33302 {
33303 name: "MOVHload",
33304 auxType: auxSymOff,
33305 argLen: 2,
33306 faultOnNilArg0: true,
33307 symEffect: SymRead,
33308 asm: riscv.AMOVH,
33309 reg: regInfo{
33310 inputs: []inputInfo{
33311 {0, 9223372037861408754},
33312 },
33313 outputs: []outputInfo{
33314 {0, 1006632944},
33315 },
33316 },
33317 },
33318 {
33319 name: "MOVWload",
33320 auxType: auxSymOff,
33321 argLen: 2,
33322 faultOnNilArg0: true,
33323 symEffect: SymRead,
33324 asm: riscv.AMOVW,
33325 reg: regInfo{
33326 inputs: []inputInfo{
33327 {0, 9223372037861408754},
33328 },
33329 outputs: []outputInfo{
33330 {0, 1006632944},
33331 },
33332 },
33333 },
33334 {
33335 name: "MOVDload",
33336 auxType: auxSymOff,
33337 argLen: 2,
33338 faultOnNilArg0: true,
33339 symEffect: SymRead,
33340 asm: riscv.AMOV,
33341 reg: regInfo{
33342 inputs: []inputInfo{
33343 {0, 9223372037861408754},
33344 },
33345 outputs: []outputInfo{
33346 {0, 1006632944},
33347 },
33348 },
33349 },
33350 {
33351 name: "MOVBUload",
33352 auxType: auxSymOff,
33353 argLen: 2,
33354 faultOnNilArg0: true,
33355 symEffect: SymRead,
33356 asm: riscv.AMOVBU,
33357 reg: regInfo{
33358 inputs: []inputInfo{
33359 {0, 9223372037861408754},
33360 },
33361 outputs: []outputInfo{
33362 {0, 1006632944},
33363 },
33364 },
33365 },
33366 {
33367 name: "MOVHUload",
33368 auxType: auxSymOff,
33369 argLen: 2,
33370 faultOnNilArg0: true,
33371 symEffect: SymRead,
33372 asm: riscv.AMOVHU,
33373 reg: regInfo{
33374 inputs: []inputInfo{
33375 {0, 9223372037861408754},
33376 },
33377 outputs: []outputInfo{
33378 {0, 1006632944},
33379 },
33380 },
33381 },
33382 {
33383 name: "MOVWUload",
33384 auxType: auxSymOff,
33385 argLen: 2,
33386 faultOnNilArg0: true,
33387 symEffect: SymRead,
33388 asm: riscv.AMOVWU,
33389 reg: regInfo{
33390 inputs: []inputInfo{
33391 {0, 9223372037861408754},
33392 },
33393 outputs: []outputInfo{
33394 {0, 1006632944},
33395 },
33396 },
33397 },
33398 {
33399 name: "MOVBstore",
33400 auxType: auxSymOff,
33401 argLen: 3,
33402 faultOnNilArg0: true,
33403 symEffect: SymWrite,
33404 asm: riscv.AMOVB,
33405 reg: regInfo{
33406 inputs: []inputInfo{
33407 {1, 1006632946},
33408 {0, 9223372037861408754},
33409 },
33410 },
33411 },
33412 {
33413 name: "MOVHstore",
33414 auxType: auxSymOff,
33415 argLen: 3,
33416 faultOnNilArg0: true,
33417 symEffect: SymWrite,
33418 asm: riscv.AMOVH,
33419 reg: regInfo{
33420 inputs: []inputInfo{
33421 {1, 1006632946},
33422 {0, 9223372037861408754},
33423 },
33424 },
33425 },
33426 {
33427 name: "MOVWstore",
33428 auxType: auxSymOff,
33429 argLen: 3,
33430 faultOnNilArg0: true,
33431 symEffect: SymWrite,
33432 asm: riscv.AMOVW,
33433 reg: regInfo{
33434 inputs: []inputInfo{
33435 {1, 1006632946},
33436 {0, 9223372037861408754},
33437 },
33438 },
33439 },
33440 {
33441 name: "MOVDstore",
33442 auxType: auxSymOff,
33443 argLen: 3,
33444 faultOnNilArg0: true,
33445 symEffect: SymWrite,
33446 asm: riscv.AMOV,
33447 reg: regInfo{
33448 inputs: []inputInfo{
33449 {1, 1006632946},
33450 {0, 9223372037861408754},
33451 },
33452 },
33453 },
33454 {
33455 name: "MOVBstorezero",
33456 auxType: auxSymOff,
33457 argLen: 2,
33458 faultOnNilArg0: true,
33459 symEffect: SymWrite,
33460 asm: riscv.AMOVB,
33461 reg: regInfo{
33462 inputs: []inputInfo{
33463 {0, 9223372037861408754},
33464 },
33465 },
33466 },
33467 {
33468 name: "MOVHstorezero",
33469 auxType: auxSymOff,
33470 argLen: 2,
33471 faultOnNilArg0: true,
33472 symEffect: SymWrite,
33473 asm: riscv.AMOVH,
33474 reg: regInfo{
33475 inputs: []inputInfo{
33476 {0, 9223372037861408754},
33477 },
33478 },
33479 },
33480 {
33481 name: "MOVWstorezero",
33482 auxType: auxSymOff,
33483 argLen: 2,
33484 faultOnNilArg0: true,
33485 symEffect: SymWrite,
33486 asm: riscv.AMOVW,
33487 reg: regInfo{
33488 inputs: []inputInfo{
33489 {0, 9223372037861408754},
33490 },
33491 },
33492 },
33493 {
33494 name: "MOVDstorezero",
33495 auxType: auxSymOff,
33496 argLen: 2,
33497 faultOnNilArg0: true,
33498 symEffect: SymWrite,
33499 asm: riscv.AMOV,
33500 reg: regInfo{
33501 inputs: []inputInfo{
33502 {0, 9223372037861408754},
33503 },
33504 },
33505 },
33506 {
33507 name: "MOVBreg",
33508 argLen: 1,
33509 asm: riscv.AMOVB,
33510 reg: regInfo{
33511 inputs: []inputInfo{
33512 {0, 1006632944},
33513 },
33514 outputs: []outputInfo{
33515 {0, 1006632944},
33516 },
33517 },
33518 },
33519 {
33520 name: "MOVHreg",
33521 argLen: 1,
33522 asm: riscv.AMOVH,
33523 reg: regInfo{
33524 inputs: []inputInfo{
33525 {0, 1006632944},
33526 },
33527 outputs: []outputInfo{
33528 {0, 1006632944},
33529 },
33530 },
33531 },
33532 {
33533 name: "MOVWreg",
33534 argLen: 1,
33535 asm: riscv.AMOVW,
33536 reg: regInfo{
33537 inputs: []inputInfo{
33538 {0, 1006632944},
33539 },
33540 outputs: []outputInfo{
33541 {0, 1006632944},
33542 },
33543 },
33544 },
33545 {
33546 name: "MOVDreg",
33547 argLen: 1,
33548 asm: riscv.AMOV,
33549 reg: regInfo{
33550 inputs: []inputInfo{
33551 {0, 1006632944},
33552 },
33553 outputs: []outputInfo{
33554 {0, 1006632944},
33555 },
33556 },
33557 },
33558 {
33559 name: "MOVBUreg",
33560 argLen: 1,
33561 asm: riscv.AMOVBU,
33562 reg: regInfo{
33563 inputs: []inputInfo{
33564 {0, 1006632944},
33565 },
33566 outputs: []outputInfo{
33567 {0, 1006632944},
33568 },
33569 },
33570 },
33571 {
33572 name: "MOVHUreg",
33573 argLen: 1,
33574 asm: riscv.AMOVHU,
33575 reg: regInfo{
33576 inputs: []inputInfo{
33577 {0, 1006632944},
33578 },
33579 outputs: []outputInfo{
33580 {0, 1006632944},
33581 },
33582 },
33583 },
33584 {
33585 name: "MOVWUreg",
33586 argLen: 1,
33587 asm: riscv.AMOVWU,
33588 reg: regInfo{
33589 inputs: []inputInfo{
33590 {0, 1006632944},
33591 },
33592 outputs: []outputInfo{
33593 {0, 1006632944},
33594 },
33595 },
33596 },
33597 {
33598 name: "MOVDnop",
33599 argLen: 1,
33600 resultInArg0: true,
33601 reg: regInfo{
33602 inputs: []inputInfo{
33603 {0, 1006632944},
33604 },
33605 outputs: []outputInfo{
33606 {0, 1006632944},
33607 },
33608 },
33609 },
33610 {
33611 name: "SLL",
33612 argLen: 2,
33613 asm: riscv.ASLL,
33614 reg: regInfo{
33615 inputs: []inputInfo{
33616 {0, 1006632944},
33617 {1, 1006632944},
33618 },
33619 outputs: []outputInfo{
33620 {0, 1006632944},
33621 },
33622 },
33623 },
33624 {
33625 name: "SLLW",
33626 argLen: 2,
33627 asm: riscv.ASLLW,
33628 reg: regInfo{
33629 inputs: []inputInfo{
33630 {0, 1006632944},
33631 {1, 1006632944},
33632 },
33633 outputs: []outputInfo{
33634 {0, 1006632944},
33635 },
33636 },
33637 },
33638 {
33639 name: "SRA",
33640 argLen: 2,
33641 asm: riscv.ASRA,
33642 reg: regInfo{
33643 inputs: []inputInfo{
33644 {0, 1006632944},
33645 {1, 1006632944},
33646 },
33647 outputs: []outputInfo{
33648 {0, 1006632944},
33649 },
33650 },
33651 },
33652 {
33653 name: "SRAW",
33654 argLen: 2,
33655 asm: riscv.ASRAW,
33656 reg: regInfo{
33657 inputs: []inputInfo{
33658 {0, 1006632944},
33659 {1, 1006632944},
33660 },
33661 outputs: []outputInfo{
33662 {0, 1006632944},
33663 },
33664 },
33665 },
33666 {
33667 name: "SRL",
33668 argLen: 2,
33669 asm: riscv.ASRL,
33670 reg: regInfo{
33671 inputs: []inputInfo{
33672 {0, 1006632944},
33673 {1, 1006632944},
33674 },
33675 outputs: []outputInfo{
33676 {0, 1006632944},
33677 },
33678 },
33679 },
33680 {
33681 name: "SRLW",
33682 argLen: 2,
33683 asm: riscv.ASRLW,
33684 reg: regInfo{
33685 inputs: []inputInfo{
33686 {0, 1006632944},
33687 {1, 1006632944},
33688 },
33689 outputs: []outputInfo{
33690 {0, 1006632944},
33691 },
33692 },
33693 },
33694 {
33695 name: "SLLI",
33696 auxType: auxInt64,
33697 argLen: 1,
33698 asm: riscv.ASLLI,
33699 reg: regInfo{
33700 inputs: []inputInfo{
33701 {0, 1006632944},
33702 },
33703 outputs: []outputInfo{
33704 {0, 1006632944},
33705 },
33706 },
33707 },
33708 {
33709 name: "SLLIW",
33710 auxType: auxInt64,
33711 argLen: 1,
33712 asm: riscv.ASLLIW,
33713 reg: regInfo{
33714 inputs: []inputInfo{
33715 {0, 1006632944},
33716 },
33717 outputs: []outputInfo{
33718 {0, 1006632944},
33719 },
33720 },
33721 },
33722 {
33723 name: "SRAI",
33724 auxType: auxInt64,
33725 argLen: 1,
33726 asm: riscv.ASRAI,
33727 reg: regInfo{
33728 inputs: []inputInfo{
33729 {0, 1006632944},
33730 },
33731 outputs: []outputInfo{
33732 {0, 1006632944},
33733 },
33734 },
33735 },
33736 {
33737 name: "SRAIW",
33738 auxType: auxInt64,
33739 argLen: 1,
33740 asm: riscv.ASRAIW,
33741 reg: regInfo{
33742 inputs: []inputInfo{
33743 {0, 1006632944},
33744 },
33745 outputs: []outputInfo{
33746 {0, 1006632944},
33747 },
33748 },
33749 },
33750 {
33751 name: "SRLI",
33752 auxType: auxInt64,
33753 argLen: 1,
33754 asm: riscv.ASRLI,
33755 reg: regInfo{
33756 inputs: []inputInfo{
33757 {0, 1006632944},
33758 },
33759 outputs: []outputInfo{
33760 {0, 1006632944},
33761 },
33762 },
33763 },
33764 {
33765 name: "SRLIW",
33766 auxType: auxInt64,
33767 argLen: 1,
33768 asm: riscv.ASRLIW,
33769 reg: regInfo{
33770 inputs: []inputInfo{
33771 {0, 1006632944},
33772 },
33773 outputs: []outputInfo{
33774 {0, 1006632944},
33775 },
33776 },
33777 },
33778 {
33779 name: "SH1ADD",
33780 argLen: 2,
33781 asm: riscv.ASH1ADD,
33782 reg: regInfo{
33783 inputs: []inputInfo{
33784 {0, 1006632944},
33785 {1, 1006632944},
33786 },
33787 outputs: []outputInfo{
33788 {0, 1006632944},
33789 },
33790 },
33791 },
33792 {
33793 name: "SH2ADD",
33794 argLen: 2,
33795 asm: riscv.ASH2ADD,
33796 reg: regInfo{
33797 inputs: []inputInfo{
33798 {0, 1006632944},
33799 {1, 1006632944},
33800 },
33801 outputs: []outputInfo{
33802 {0, 1006632944},
33803 },
33804 },
33805 },
33806 {
33807 name: "SH3ADD",
33808 argLen: 2,
33809 asm: riscv.ASH3ADD,
33810 reg: regInfo{
33811 inputs: []inputInfo{
33812 {0, 1006632944},
33813 {1, 1006632944},
33814 },
33815 outputs: []outputInfo{
33816 {0, 1006632944},
33817 },
33818 },
33819 },
33820 {
33821 name: "AND",
33822 argLen: 2,
33823 commutative: true,
33824 asm: riscv.AAND,
33825 reg: regInfo{
33826 inputs: []inputInfo{
33827 {0, 1006632944},
33828 {1, 1006632944},
33829 },
33830 outputs: []outputInfo{
33831 {0, 1006632944},
33832 },
33833 },
33834 },
33835 {
33836 name: "ANDN",
33837 argLen: 2,
33838 asm: riscv.AANDN,
33839 reg: regInfo{
33840 inputs: []inputInfo{
33841 {0, 1006632944},
33842 {1, 1006632944},
33843 },
33844 outputs: []outputInfo{
33845 {0, 1006632944},
33846 },
33847 },
33848 },
33849 {
33850 name: "ANDI",
33851 auxType: auxInt64,
33852 argLen: 1,
33853 asm: riscv.AANDI,
33854 reg: regInfo{
33855 inputs: []inputInfo{
33856 {0, 1006632944},
33857 },
33858 outputs: []outputInfo{
33859 {0, 1006632944},
33860 },
33861 },
33862 },
33863 {
33864 name: "CLZ",
33865 argLen: 1,
33866 asm: riscv.ACLZ,
33867 reg: regInfo{
33868 inputs: []inputInfo{
33869 {0, 1006632944},
33870 },
33871 outputs: []outputInfo{
33872 {0, 1006632944},
33873 },
33874 },
33875 },
33876 {
33877 name: "CLZW",
33878 argLen: 1,
33879 asm: riscv.ACLZW,
33880 reg: regInfo{
33881 inputs: []inputInfo{
33882 {0, 1006632944},
33883 },
33884 outputs: []outputInfo{
33885 {0, 1006632944},
33886 },
33887 },
33888 },
33889 {
33890 name: "CTZ",
33891 argLen: 1,
33892 asm: riscv.ACTZ,
33893 reg: regInfo{
33894 inputs: []inputInfo{
33895 {0, 1006632944},
33896 },
33897 outputs: []outputInfo{
33898 {0, 1006632944},
33899 },
33900 },
33901 },
33902 {
33903 name: "CTZW",
33904 argLen: 1,
33905 asm: riscv.ACTZW,
33906 reg: regInfo{
33907 inputs: []inputInfo{
33908 {0, 1006632944},
33909 },
33910 outputs: []outputInfo{
33911 {0, 1006632944},
33912 },
33913 },
33914 },
33915 {
33916 name: "NOT",
33917 argLen: 1,
33918 asm: riscv.ANOT,
33919 reg: regInfo{
33920 inputs: []inputInfo{
33921 {0, 1006632944},
33922 },
33923 outputs: []outputInfo{
33924 {0, 1006632944},
33925 },
33926 },
33927 },
33928 {
33929 name: "OR",
33930 argLen: 2,
33931 commutative: true,
33932 asm: riscv.AOR,
33933 reg: regInfo{
33934 inputs: []inputInfo{
33935 {0, 1006632944},
33936 {1, 1006632944},
33937 },
33938 outputs: []outputInfo{
33939 {0, 1006632944},
33940 },
33941 },
33942 },
33943 {
33944 name: "ORN",
33945 argLen: 2,
33946 asm: riscv.AORN,
33947 reg: regInfo{
33948 inputs: []inputInfo{
33949 {0, 1006632944},
33950 {1, 1006632944},
33951 },
33952 outputs: []outputInfo{
33953 {0, 1006632944},
33954 },
33955 },
33956 },
33957 {
33958 name: "ORI",
33959 auxType: auxInt64,
33960 argLen: 1,
33961 asm: riscv.AORI,
33962 reg: regInfo{
33963 inputs: []inputInfo{
33964 {0, 1006632944},
33965 },
33966 outputs: []outputInfo{
33967 {0, 1006632944},
33968 },
33969 },
33970 },
33971 {
33972 name: "ROL",
33973 argLen: 2,
33974 asm: riscv.AROL,
33975 reg: regInfo{
33976 inputs: []inputInfo{
33977 {0, 1006632944},
33978 {1, 1006632944},
33979 },
33980 outputs: []outputInfo{
33981 {0, 1006632944},
33982 },
33983 },
33984 },
33985 {
33986 name: "ROLW",
33987 argLen: 2,
33988 asm: riscv.AROLW,
33989 reg: regInfo{
33990 inputs: []inputInfo{
33991 {0, 1006632944},
33992 {1, 1006632944},
33993 },
33994 outputs: []outputInfo{
33995 {0, 1006632944},
33996 },
33997 },
33998 },
33999 {
34000 name: "ROR",
34001 argLen: 2,
34002 asm: riscv.AROR,
34003 reg: regInfo{
34004 inputs: []inputInfo{
34005 {0, 1006632944},
34006 {1, 1006632944},
34007 },
34008 outputs: []outputInfo{
34009 {0, 1006632944},
34010 },
34011 },
34012 },
34013 {
34014 name: "RORI",
34015 auxType: auxInt64,
34016 argLen: 1,
34017 asm: riscv.ARORI,
34018 reg: regInfo{
34019 inputs: []inputInfo{
34020 {0, 1006632944},
34021 },
34022 outputs: []outputInfo{
34023 {0, 1006632944},
34024 },
34025 },
34026 },
34027 {
34028 name: "RORIW",
34029 auxType: auxInt64,
34030 argLen: 1,
34031 asm: riscv.ARORIW,
34032 reg: regInfo{
34033 inputs: []inputInfo{
34034 {0, 1006632944},
34035 },
34036 outputs: []outputInfo{
34037 {0, 1006632944},
34038 },
34039 },
34040 },
34041 {
34042 name: "RORW",
34043 argLen: 2,
34044 asm: riscv.ARORW,
34045 reg: regInfo{
34046 inputs: []inputInfo{
34047 {0, 1006632944},
34048 {1, 1006632944},
34049 },
34050 outputs: []outputInfo{
34051 {0, 1006632944},
34052 },
34053 },
34054 },
34055 {
34056 name: "XNOR",
34057 argLen: 2,
34058 commutative: true,
34059 asm: riscv.AXNOR,
34060 reg: regInfo{
34061 inputs: []inputInfo{
34062 {0, 1006632944},
34063 {1, 1006632944},
34064 },
34065 outputs: []outputInfo{
34066 {0, 1006632944},
34067 },
34068 },
34069 },
34070 {
34071 name: "XOR",
34072 argLen: 2,
34073 commutative: true,
34074 asm: riscv.AXOR,
34075 reg: regInfo{
34076 inputs: []inputInfo{
34077 {0, 1006632944},
34078 {1, 1006632944},
34079 },
34080 outputs: []outputInfo{
34081 {0, 1006632944},
34082 },
34083 },
34084 },
34085 {
34086 name: "XORI",
34087 auxType: auxInt64,
34088 argLen: 1,
34089 asm: riscv.AXORI,
34090 reg: regInfo{
34091 inputs: []inputInfo{
34092 {0, 1006632944},
34093 },
34094 outputs: []outputInfo{
34095 {0, 1006632944},
34096 },
34097 },
34098 },
34099 {
34100 name: "MIN",
34101 argLen: 2,
34102 commutative: true,
34103 asm: riscv.AMIN,
34104 reg: regInfo{
34105 inputs: []inputInfo{
34106 {0, 1006632944},
34107 {1, 1006632944},
34108 },
34109 outputs: []outputInfo{
34110 {0, 1006632944},
34111 },
34112 },
34113 },
34114 {
34115 name: "MAX",
34116 argLen: 2,
34117 commutative: true,
34118 asm: riscv.AMAX,
34119 reg: regInfo{
34120 inputs: []inputInfo{
34121 {0, 1006632944},
34122 {1, 1006632944},
34123 },
34124 outputs: []outputInfo{
34125 {0, 1006632944},
34126 },
34127 },
34128 },
34129 {
34130 name: "MINU",
34131 argLen: 2,
34132 commutative: true,
34133 asm: riscv.AMINU,
34134 reg: regInfo{
34135 inputs: []inputInfo{
34136 {0, 1006632944},
34137 {1, 1006632944},
34138 },
34139 outputs: []outputInfo{
34140 {0, 1006632944},
34141 },
34142 },
34143 },
34144 {
34145 name: "MAXU",
34146 argLen: 2,
34147 commutative: true,
34148 asm: riscv.AMAXU,
34149 reg: regInfo{
34150 inputs: []inputInfo{
34151 {0, 1006632944},
34152 {1, 1006632944},
34153 },
34154 outputs: []outputInfo{
34155 {0, 1006632944},
34156 },
34157 },
34158 },
34159 {
34160 name: "SEQZ",
34161 argLen: 1,
34162 asm: riscv.ASEQZ,
34163 reg: regInfo{
34164 inputs: []inputInfo{
34165 {0, 1006632944},
34166 },
34167 outputs: []outputInfo{
34168 {0, 1006632944},
34169 },
34170 },
34171 },
34172 {
34173 name: "SNEZ",
34174 argLen: 1,
34175 asm: riscv.ASNEZ,
34176 reg: regInfo{
34177 inputs: []inputInfo{
34178 {0, 1006632944},
34179 },
34180 outputs: []outputInfo{
34181 {0, 1006632944},
34182 },
34183 },
34184 },
34185 {
34186 name: "SLT",
34187 argLen: 2,
34188 asm: riscv.ASLT,
34189 reg: regInfo{
34190 inputs: []inputInfo{
34191 {0, 1006632944},
34192 {1, 1006632944},
34193 },
34194 outputs: []outputInfo{
34195 {0, 1006632944},
34196 },
34197 },
34198 },
34199 {
34200 name: "SLTI",
34201 auxType: auxInt64,
34202 argLen: 1,
34203 asm: riscv.ASLTI,
34204 reg: regInfo{
34205 inputs: []inputInfo{
34206 {0, 1006632944},
34207 },
34208 outputs: []outputInfo{
34209 {0, 1006632944},
34210 },
34211 },
34212 },
34213 {
34214 name: "SLTU",
34215 argLen: 2,
34216 asm: riscv.ASLTU,
34217 reg: regInfo{
34218 inputs: []inputInfo{
34219 {0, 1006632944},
34220 {1, 1006632944},
34221 },
34222 outputs: []outputInfo{
34223 {0, 1006632944},
34224 },
34225 },
34226 },
34227 {
34228 name: "SLTIU",
34229 auxType: auxInt64,
34230 argLen: 1,
34231 asm: riscv.ASLTIU,
34232 reg: regInfo{
34233 inputs: []inputInfo{
34234 {0, 1006632944},
34235 },
34236 outputs: []outputInfo{
34237 {0, 1006632944},
34238 },
34239 },
34240 },
34241 {
34242 name: "LoweredRound32F",
34243 argLen: 1,
34244 resultInArg0: true,
34245 reg: regInfo{
34246 inputs: []inputInfo{
34247 {0, 9223372034707292160},
34248 },
34249 outputs: []outputInfo{
34250 {0, 9223372034707292160},
34251 },
34252 },
34253 },
34254 {
34255 name: "LoweredRound64F",
34256 argLen: 1,
34257 resultInArg0: true,
34258 reg: regInfo{
34259 inputs: []inputInfo{
34260 {0, 9223372034707292160},
34261 },
34262 outputs: []outputInfo{
34263 {0, 9223372034707292160},
34264 },
34265 },
34266 },
34267 {
34268 name: "CALLstatic",
34269 auxType: auxCallOff,
34270 argLen: -1,
34271 call: true,
34272 reg: regInfo{
34273 clobbers: 9223372035781033968,
34274 },
34275 },
34276 {
34277 name: "CALLtail",
34278 auxType: auxCallOff,
34279 argLen: -1,
34280 call: true,
34281 tailCall: true,
34282 reg: regInfo{
34283 clobbers: 9223372035781033968,
34284 },
34285 },
34286 {
34287 name: "CALLclosure",
34288 auxType: auxCallOff,
34289 argLen: -1,
34290 call: true,
34291 reg: regInfo{
34292 inputs: []inputInfo{
34293 {1, 33554432},
34294 {0, 1006632946},
34295 },
34296 clobbers: 9223372035781033968,
34297 },
34298 },
34299 {
34300 name: "CALLinter",
34301 auxType: auxCallOff,
34302 argLen: -1,
34303 call: true,
34304 reg: regInfo{
34305 inputs: []inputInfo{
34306 {0, 1006632944},
34307 },
34308 clobbers: 9223372035781033968,
34309 },
34310 },
34311 {
34312 name: "DUFFZERO",
34313 auxType: auxInt64,
34314 argLen: 2,
34315 faultOnNilArg0: true,
34316 reg: regInfo{
34317 inputs: []inputInfo{
34318 {0, 16777216},
34319 },
34320 clobbers: 16777216,
34321 },
34322 },
34323 {
34324 name: "DUFFCOPY",
34325 auxType: auxInt64,
34326 argLen: 3,
34327 faultOnNilArg0: true,
34328 faultOnNilArg1: true,
34329 reg: regInfo{
34330 inputs: []inputInfo{
34331 {0, 16777216},
34332 {1, 8388608},
34333 },
34334 clobbers: 25165824,
34335 },
34336 },
34337 {
34338 name: "LoweredZero",
34339 auxType: auxInt64,
34340 argLen: 3,
34341 faultOnNilArg0: true,
34342 reg: regInfo{
34343 inputs: []inputInfo{
34344 {0, 16},
34345 {1, 1006632944},
34346 },
34347 clobbers: 16,
34348 },
34349 },
34350 {
34351 name: "LoweredMove",
34352 auxType: auxInt64,
34353 argLen: 4,
34354 faultOnNilArg0: true,
34355 faultOnNilArg1: true,
34356 reg: regInfo{
34357 inputs: []inputInfo{
34358 {0, 16},
34359 {1, 32},
34360 {2, 1006632880},
34361 },
34362 clobbers: 112,
34363 },
34364 },
34365 {
34366 name: "LoweredAtomicLoad8",
34367 argLen: 2,
34368 faultOnNilArg0: true,
34369 reg: regInfo{
34370 inputs: []inputInfo{
34371 {0, 9223372037861408754},
34372 },
34373 outputs: []outputInfo{
34374 {0, 1006632944},
34375 },
34376 },
34377 },
34378 {
34379 name: "LoweredAtomicLoad32",
34380 argLen: 2,
34381 faultOnNilArg0: true,
34382 reg: regInfo{
34383 inputs: []inputInfo{
34384 {0, 9223372037861408754},
34385 },
34386 outputs: []outputInfo{
34387 {0, 1006632944},
34388 },
34389 },
34390 },
34391 {
34392 name: "LoweredAtomicLoad64",
34393 argLen: 2,
34394 faultOnNilArg0: true,
34395 reg: regInfo{
34396 inputs: []inputInfo{
34397 {0, 9223372037861408754},
34398 },
34399 outputs: []outputInfo{
34400 {0, 1006632944},
34401 },
34402 },
34403 },
34404 {
34405 name: "LoweredAtomicStore8",
34406 argLen: 3,
34407 faultOnNilArg0: true,
34408 hasSideEffects: true,
34409 reg: regInfo{
34410 inputs: []inputInfo{
34411 {1, 1006632946},
34412 {0, 9223372037861408754},
34413 },
34414 },
34415 },
34416 {
34417 name: "LoweredAtomicStore32",
34418 argLen: 3,
34419 faultOnNilArg0: true,
34420 hasSideEffects: true,
34421 reg: regInfo{
34422 inputs: []inputInfo{
34423 {1, 1006632946},
34424 {0, 9223372037861408754},
34425 },
34426 },
34427 },
34428 {
34429 name: "LoweredAtomicStore64",
34430 argLen: 3,
34431 faultOnNilArg0: true,
34432 hasSideEffects: true,
34433 reg: regInfo{
34434 inputs: []inputInfo{
34435 {1, 1006632946},
34436 {0, 9223372037861408754},
34437 },
34438 },
34439 },
34440 {
34441 name: "LoweredAtomicExchange32",
34442 argLen: 3,
34443 resultNotInArgs: true,
34444 faultOnNilArg0: true,
34445 hasSideEffects: true,
34446 reg: regInfo{
34447 inputs: []inputInfo{
34448 {1, 1073741808},
34449 {0, 9223372037928517618},
34450 },
34451 outputs: []outputInfo{
34452 {0, 1006632944},
34453 },
34454 },
34455 },
34456 {
34457 name: "LoweredAtomicExchange64",
34458 argLen: 3,
34459 resultNotInArgs: true,
34460 faultOnNilArg0: true,
34461 hasSideEffects: true,
34462 reg: regInfo{
34463 inputs: []inputInfo{
34464 {1, 1073741808},
34465 {0, 9223372037928517618},
34466 },
34467 outputs: []outputInfo{
34468 {0, 1006632944},
34469 },
34470 },
34471 },
34472 {
34473 name: "LoweredAtomicAdd32",
34474 argLen: 3,
34475 resultNotInArgs: true,
34476 faultOnNilArg0: true,
34477 hasSideEffects: true,
34478 unsafePoint: true,
34479 reg: regInfo{
34480 inputs: []inputInfo{
34481 {1, 1073741808},
34482 {0, 9223372037928517618},
34483 },
34484 outputs: []outputInfo{
34485 {0, 1006632944},
34486 },
34487 },
34488 },
34489 {
34490 name: "LoweredAtomicAdd64",
34491 argLen: 3,
34492 resultNotInArgs: true,
34493 faultOnNilArg0: true,
34494 hasSideEffects: true,
34495 unsafePoint: true,
34496 reg: regInfo{
34497 inputs: []inputInfo{
34498 {1, 1073741808},
34499 {0, 9223372037928517618},
34500 },
34501 outputs: []outputInfo{
34502 {0, 1006632944},
34503 },
34504 },
34505 },
34506 {
34507 name: "LoweredAtomicCas32",
34508 argLen: 4,
34509 resultNotInArgs: true,
34510 faultOnNilArg0: true,
34511 hasSideEffects: true,
34512 unsafePoint: true,
34513 reg: regInfo{
34514 inputs: []inputInfo{
34515 {1, 1073741808},
34516 {2, 1073741808},
34517 {0, 9223372037928517618},
34518 },
34519 outputs: []outputInfo{
34520 {0, 1006632944},
34521 },
34522 },
34523 },
34524 {
34525 name: "LoweredAtomicCas64",
34526 argLen: 4,
34527 resultNotInArgs: true,
34528 faultOnNilArg0: true,
34529 hasSideEffects: true,
34530 unsafePoint: true,
34531 reg: regInfo{
34532 inputs: []inputInfo{
34533 {1, 1073741808},
34534 {2, 1073741808},
34535 {0, 9223372037928517618},
34536 },
34537 outputs: []outputInfo{
34538 {0, 1006632944},
34539 },
34540 },
34541 },
34542 {
34543 name: "LoweredAtomicAnd32",
34544 argLen: 3,
34545 faultOnNilArg0: true,
34546 hasSideEffects: true,
34547 asm: riscv.AAMOANDW,
34548 reg: regInfo{
34549 inputs: []inputInfo{
34550 {1, 1073741808},
34551 {0, 9223372037928517618},
34552 },
34553 },
34554 },
34555 {
34556 name: "LoweredAtomicOr32",
34557 argLen: 3,
34558 faultOnNilArg0: true,
34559 hasSideEffects: true,
34560 asm: riscv.AAMOORW,
34561 reg: regInfo{
34562 inputs: []inputInfo{
34563 {1, 1073741808},
34564 {0, 9223372037928517618},
34565 },
34566 },
34567 },
34568 {
34569 name: "LoweredNilCheck",
34570 argLen: 2,
34571 nilCheck: true,
34572 faultOnNilArg0: true,
34573 reg: regInfo{
34574 inputs: []inputInfo{
34575 {0, 1006632946},
34576 },
34577 },
34578 },
34579 {
34580 name: "LoweredGetClosurePtr",
34581 argLen: 0,
34582 reg: regInfo{
34583 outputs: []outputInfo{
34584 {0, 33554432},
34585 },
34586 },
34587 },
34588 {
34589 name: "LoweredGetCallerSP",
34590 argLen: 1,
34591 rematerializeable: true,
34592 reg: regInfo{
34593 outputs: []outputInfo{
34594 {0, 1006632944},
34595 },
34596 },
34597 },
34598 {
34599 name: "LoweredGetCallerPC",
34600 argLen: 0,
34601 rematerializeable: true,
34602 reg: regInfo{
34603 outputs: []outputInfo{
34604 {0, 1006632944},
34605 },
34606 },
34607 },
34608 {
34609 name: "LoweredWB",
34610 auxType: auxInt64,
34611 argLen: 1,
34612 clobberFlags: true,
34613 reg: regInfo{
34614 clobbers: 9223372034707292160,
34615 outputs: []outputInfo{
34616 {0, 8388608},
34617 },
34618 },
34619 },
34620 {
34621 name: "LoweredPubBarrier",
34622 argLen: 1,
34623 hasSideEffects: true,
34624 asm: riscv.AFENCE,
34625 reg: regInfo{},
34626 },
34627 {
34628 name: "LoweredPanicBoundsA",
34629 auxType: auxInt64,
34630 argLen: 3,
34631 call: true,
34632 reg: regInfo{
34633 inputs: []inputInfo{
34634 {0, 64},
34635 {1, 134217728},
34636 },
34637 },
34638 },
34639 {
34640 name: "LoweredPanicBoundsB",
34641 auxType: auxInt64,
34642 argLen: 3,
34643 call: true,
34644 reg: regInfo{
34645 inputs: []inputInfo{
34646 {0, 32},
34647 {1, 64},
34648 },
34649 },
34650 },
34651 {
34652 name: "LoweredPanicBoundsC",
34653 auxType: auxInt64,
34654 argLen: 3,
34655 call: true,
34656 reg: regInfo{
34657 inputs: []inputInfo{
34658 {0, 16},
34659 {1, 32},
34660 },
34661 },
34662 },
34663 {
34664 name: "FADDS",
34665 argLen: 2,
34666 commutative: true,
34667 asm: riscv.AFADDS,
34668 reg: regInfo{
34669 inputs: []inputInfo{
34670 {0, 9223372034707292160},
34671 {1, 9223372034707292160},
34672 },
34673 outputs: []outputInfo{
34674 {0, 9223372034707292160},
34675 },
34676 },
34677 },
34678 {
34679 name: "FSUBS",
34680 argLen: 2,
34681 asm: riscv.AFSUBS,
34682 reg: regInfo{
34683 inputs: []inputInfo{
34684 {0, 9223372034707292160},
34685 {1, 9223372034707292160},
34686 },
34687 outputs: []outputInfo{
34688 {0, 9223372034707292160},
34689 },
34690 },
34691 },
34692 {
34693 name: "FMULS",
34694 argLen: 2,
34695 commutative: true,
34696 asm: riscv.AFMULS,
34697 reg: regInfo{
34698 inputs: []inputInfo{
34699 {0, 9223372034707292160},
34700 {1, 9223372034707292160},
34701 },
34702 outputs: []outputInfo{
34703 {0, 9223372034707292160},
34704 },
34705 },
34706 },
34707 {
34708 name: "FDIVS",
34709 argLen: 2,
34710 asm: riscv.AFDIVS,
34711 reg: regInfo{
34712 inputs: []inputInfo{
34713 {0, 9223372034707292160},
34714 {1, 9223372034707292160},
34715 },
34716 outputs: []outputInfo{
34717 {0, 9223372034707292160},
34718 },
34719 },
34720 },
34721 {
34722 name: "FMADDS",
34723 argLen: 3,
34724 commutative: true,
34725 asm: riscv.AFMADDS,
34726 reg: regInfo{
34727 inputs: []inputInfo{
34728 {0, 9223372034707292160},
34729 {1, 9223372034707292160},
34730 {2, 9223372034707292160},
34731 },
34732 outputs: []outputInfo{
34733 {0, 9223372034707292160},
34734 },
34735 },
34736 },
34737 {
34738 name: "FMSUBS",
34739 argLen: 3,
34740 commutative: true,
34741 asm: riscv.AFMSUBS,
34742 reg: regInfo{
34743 inputs: []inputInfo{
34744 {0, 9223372034707292160},
34745 {1, 9223372034707292160},
34746 {2, 9223372034707292160},
34747 },
34748 outputs: []outputInfo{
34749 {0, 9223372034707292160},
34750 },
34751 },
34752 },
34753 {
34754 name: "FNMADDS",
34755 argLen: 3,
34756 commutative: true,
34757 asm: riscv.AFNMADDS,
34758 reg: regInfo{
34759 inputs: []inputInfo{
34760 {0, 9223372034707292160},
34761 {1, 9223372034707292160},
34762 {2, 9223372034707292160},
34763 },
34764 outputs: []outputInfo{
34765 {0, 9223372034707292160},
34766 },
34767 },
34768 },
34769 {
34770 name: "FNMSUBS",
34771 argLen: 3,
34772 commutative: true,
34773 asm: riscv.AFNMSUBS,
34774 reg: regInfo{
34775 inputs: []inputInfo{
34776 {0, 9223372034707292160},
34777 {1, 9223372034707292160},
34778 {2, 9223372034707292160},
34779 },
34780 outputs: []outputInfo{
34781 {0, 9223372034707292160},
34782 },
34783 },
34784 },
34785 {
34786 name: "FSQRTS",
34787 argLen: 1,
34788 asm: riscv.AFSQRTS,
34789 reg: regInfo{
34790 inputs: []inputInfo{
34791 {0, 9223372034707292160},
34792 },
34793 outputs: []outputInfo{
34794 {0, 9223372034707292160},
34795 },
34796 },
34797 },
34798 {
34799 name: "FNEGS",
34800 argLen: 1,
34801 asm: riscv.AFNEGS,
34802 reg: regInfo{
34803 inputs: []inputInfo{
34804 {0, 9223372034707292160},
34805 },
34806 outputs: []outputInfo{
34807 {0, 9223372034707292160},
34808 },
34809 },
34810 },
34811 {
34812 name: "FMVSX",
34813 argLen: 1,
34814 asm: riscv.AFMVSX,
34815 reg: regInfo{
34816 inputs: []inputInfo{
34817 {0, 1006632944},
34818 },
34819 outputs: []outputInfo{
34820 {0, 9223372034707292160},
34821 },
34822 },
34823 },
34824 {
34825 name: "FCVTSW",
34826 argLen: 1,
34827 asm: riscv.AFCVTSW,
34828 reg: regInfo{
34829 inputs: []inputInfo{
34830 {0, 1006632944},
34831 },
34832 outputs: []outputInfo{
34833 {0, 9223372034707292160},
34834 },
34835 },
34836 },
34837 {
34838 name: "FCVTSL",
34839 argLen: 1,
34840 asm: riscv.AFCVTSL,
34841 reg: regInfo{
34842 inputs: []inputInfo{
34843 {0, 1006632944},
34844 },
34845 outputs: []outputInfo{
34846 {0, 9223372034707292160},
34847 },
34848 },
34849 },
34850 {
34851 name: "FCVTWS",
34852 argLen: 1,
34853 asm: riscv.AFCVTWS,
34854 reg: regInfo{
34855 inputs: []inputInfo{
34856 {0, 9223372034707292160},
34857 },
34858 outputs: []outputInfo{
34859 {0, 1006632944},
34860 },
34861 },
34862 },
34863 {
34864 name: "FCVTLS",
34865 argLen: 1,
34866 asm: riscv.AFCVTLS,
34867 reg: regInfo{
34868 inputs: []inputInfo{
34869 {0, 9223372034707292160},
34870 },
34871 outputs: []outputInfo{
34872 {0, 1006632944},
34873 },
34874 },
34875 },
34876 {
34877 name: "FMOVWload",
34878 auxType: auxSymOff,
34879 argLen: 2,
34880 faultOnNilArg0: true,
34881 symEffect: SymRead,
34882 asm: riscv.AMOVF,
34883 reg: regInfo{
34884 inputs: []inputInfo{
34885 {0, 9223372037861408754},
34886 },
34887 outputs: []outputInfo{
34888 {0, 9223372034707292160},
34889 },
34890 },
34891 },
34892 {
34893 name: "FMOVWstore",
34894 auxType: auxSymOff,
34895 argLen: 3,
34896 faultOnNilArg0: true,
34897 symEffect: SymWrite,
34898 asm: riscv.AMOVF,
34899 reg: regInfo{
34900 inputs: []inputInfo{
34901 {0, 9223372037861408754},
34902 {1, 9223372034707292160},
34903 },
34904 },
34905 },
34906 {
34907 name: "FEQS",
34908 argLen: 2,
34909 commutative: true,
34910 asm: riscv.AFEQS,
34911 reg: regInfo{
34912 inputs: []inputInfo{
34913 {0, 9223372034707292160},
34914 {1, 9223372034707292160},
34915 },
34916 outputs: []outputInfo{
34917 {0, 1006632944},
34918 },
34919 },
34920 },
34921 {
34922 name: "FNES",
34923 argLen: 2,
34924 commutative: true,
34925 asm: riscv.AFNES,
34926 reg: regInfo{
34927 inputs: []inputInfo{
34928 {0, 9223372034707292160},
34929 {1, 9223372034707292160},
34930 },
34931 outputs: []outputInfo{
34932 {0, 1006632944},
34933 },
34934 },
34935 },
34936 {
34937 name: "FLTS",
34938 argLen: 2,
34939 asm: riscv.AFLTS,
34940 reg: regInfo{
34941 inputs: []inputInfo{
34942 {0, 9223372034707292160},
34943 {1, 9223372034707292160},
34944 },
34945 outputs: []outputInfo{
34946 {0, 1006632944},
34947 },
34948 },
34949 },
34950 {
34951 name: "FLES",
34952 argLen: 2,
34953 asm: riscv.AFLES,
34954 reg: regInfo{
34955 inputs: []inputInfo{
34956 {0, 9223372034707292160},
34957 {1, 9223372034707292160},
34958 },
34959 outputs: []outputInfo{
34960 {0, 1006632944},
34961 },
34962 },
34963 },
34964 {
34965 name: "LoweredFMAXS",
34966 argLen: 2,
34967 commutative: true,
34968 resultNotInArgs: true,
34969 asm: riscv.AFMAXS,
34970 reg: regInfo{
34971 inputs: []inputInfo{
34972 {0, 9223372034707292160},
34973 {1, 9223372034707292160},
34974 },
34975 outputs: []outputInfo{
34976 {0, 9223372034707292160},
34977 },
34978 },
34979 },
34980 {
34981 name: "LoweredFMINS",
34982 argLen: 2,
34983 commutative: true,
34984 resultNotInArgs: true,
34985 asm: riscv.AFMINS,
34986 reg: regInfo{
34987 inputs: []inputInfo{
34988 {0, 9223372034707292160},
34989 {1, 9223372034707292160},
34990 },
34991 outputs: []outputInfo{
34992 {0, 9223372034707292160},
34993 },
34994 },
34995 },
34996 {
34997 name: "FADDD",
34998 argLen: 2,
34999 commutative: true,
35000 asm: riscv.AFADDD,
35001 reg: regInfo{
35002 inputs: []inputInfo{
35003 {0, 9223372034707292160},
35004 {1, 9223372034707292160},
35005 },
35006 outputs: []outputInfo{
35007 {0, 9223372034707292160},
35008 },
35009 },
35010 },
35011 {
35012 name: "FSUBD",
35013 argLen: 2,
35014 asm: riscv.AFSUBD,
35015 reg: regInfo{
35016 inputs: []inputInfo{
35017 {0, 9223372034707292160},
35018 {1, 9223372034707292160},
35019 },
35020 outputs: []outputInfo{
35021 {0, 9223372034707292160},
35022 },
35023 },
35024 },
35025 {
35026 name: "FMULD",
35027 argLen: 2,
35028 commutative: true,
35029 asm: riscv.AFMULD,
35030 reg: regInfo{
35031 inputs: []inputInfo{
35032 {0, 9223372034707292160},
35033 {1, 9223372034707292160},
35034 },
35035 outputs: []outputInfo{
35036 {0, 9223372034707292160},
35037 },
35038 },
35039 },
35040 {
35041 name: "FDIVD",
35042 argLen: 2,
35043 asm: riscv.AFDIVD,
35044 reg: regInfo{
35045 inputs: []inputInfo{
35046 {0, 9223372034707292160},
35047 {1, 9223372034707292160},
35048 },
35049 outputs: []outputInfo{
35050 {0, 9223372034707292160},
35051 },
35052 },
35053 },
35054 {
35055 name: "FMADDD",
35056 argLen: 3,
35057 commutative: true,
35058 asm: riscv.AFMADDD,
35059 reg: regInfo{
35060 inputs: []inputInfo{
35061 {0, 9223372034707292160},
35062 {1, 9223372034707292160},
35063 {2, 9223372034707292160},
35064 },
35065 outputs: []outputInfo{
35066 {0, 9223372034707292160},
35067 },
35068 },
35069 },
35070 {
35071 name: "FMSUBD",
35072 argLen: 3,
35073 commutative: true,
35074 asm: riscv.AFMSUBD,
35075 reg: regInfo{
35076 inputs: []inputInfo{
35077 {0, 9223372034707292160},
35078 {1, 9223372034707292160},
35079 {2, 9223372034707292160},
35080 },
35081 outputs: []outputInfo{
35082 {0, 9223372034707292160},
35083 },
35084 },
35085 },
35086 {
35087 name: "FNMADDD",
35088 argLen: 3,
35089 commutative: true,
35090 asm: riscv.AFNMADDD,
35091 reg: regInfo{
35092 inputs: []inputInfo{
35093 {0, 9223372034707292160},
35094 {1, 9223372034707292160},
35095 {2, 9223372034707292160},
35096 },
35097 outputs: []outputInfo{
35098 {0, 9223372034707292160},
35099 },
35100 },
35101 },
35102 {
35103 name: "FNMSUBD",
35104 argLen: 3,
35105 commutative: true,
35106 asm: riscv.AFNMSUBD,
35107 reg: regInfo{
35108 inputs: []inputInfo{
35109 {0, 9223372034707292160},
35110 {1, 9223372034707292160},
35111 {2, 9223372034707292160},
35112 },
35113 outputs: []outputInfo{
35114 {0, 9223372034707292160},
35115 },
35116 },
35117 },
35118 {
35119 name: "FSQRTD",
35120 argLen: 1,
35121 asm: riscv.AFSQRTD,
35122 reg: regInfo{
35123 inputs: []inputInfo{
35124 {0, 9223372034707292160},
35125 },
35126 outputs: []outputInfo{
35127 {0, 9223372034707292160},
35128 },
35129 },
35130 },
35131 {
35132 name: "FNEGD",
35133 argLen: 1,
35134 asm: riscv.AFNEGD,
35135 reg: regInfo{
35136 inputs: []inputInfo{
35137 {0, 9223372034707292160},
35138 },
35139 outputs: []outputInfo{
35140 {0, 9223372034707292160},
35141 },
35142 },
35143 },
35144 {
35145 name: "FABSD",
35146 argLen: 1,
35147 asm: riscv.AFABSD,
35148 reg: regInfo{
35149 inputs: []inputInfo{
35150 {0, 9223372034707292160},
35151 },
35152 outputs: []outputInfo{
35153 {0, 9223372034707292160},
35154 },
35155 },
35156 },
35157 {
35158 name: "FSGNJD",
35159 argLen: 2,
35160 asm: riscv.AFSGNJD,
35161 reg: regInfo{
35162 inputs: []inputInfo{
35163 {0, 9223372034707292160},
35164 {1, 9223372034707292160},
35165 },
35166 outputs: []outputInfo{
35167 {0, 9223372034707292160},
35168 },
35169 },
35170 },
35171 {
35172 name: "FMVDX",
35173 argLen: 1,
35174 asm: riscv.AFMVDX,
35175 reg: regInfo{
35176 inputs: []inputInfo{
35177 {0, 1006632944},
35178 },
35179 outputs: []outputInfo{
35180 {0, 9223372034707292160},
35181 },
35182 },
35183 },
35184 {
35185 name: "FCVTDW",
35186 argLen: 1,
35187 asm: riscv.AFCVTDW,
35188 reg: regInfo{
35189 inputs: []inputInfo{
35190 {0, 1006632944},
35191 },
35192 outputs: []outputInfo{
35193 {0, 9223372034707292160},
35194 },
35195 },
35196 },
35197 {
35198 name: "FCVTDL",
35199 argLen: 1,
35200 asm: riscv.AFCVTDL,
35201 reg: regInfo{
35202 inputs: []inputInfo{
35203 {0, 1006632944},
35204 },
35205 outputs: []outputInfo{
35206 {0, 9223372034707292160},
35207 },
35208 },
35209 },
35210 {
35211 name: "FCVTWD",
35212 argLen: 1,
35213 asm: riscv.AFCVTWD,
35214 reg: regInfo{
35215 inputs: []inputInfo{
35216 {0, 9223372034707292160},
35217 },
35218 outputs: []outputInfo{
35219 {0, 1006632944},
35220 },
35221 },
35222 },
35223 {
35224 name: "FCVTLD",
35225 argLen: 1,
35226 asm: riscv.AFCVTLD,
35227 reg: regInfo{
35228 inputs: []inputInfo{
35229 {0, 9223372034707292160},
35230 },
35231 outputs: []outputInfo{
35232 {0, 1006632944},
35233 },
35234 },
35235 },
35236 {
35237 name: "FCVTDS",
35238 argLen: 1,
35239 asm: riscv.AFCVTDS,
35240 reg: regInfo{
35241 inputs: []inputInfo{
35242 {0, 9223372034707292160},
35243 },
35244 outputs: []outputInfo{
35245 {0, 9223372034707292160},
35246 },
35247 },
35248 },
35249 {
35250 name: "FCVTSD",
35251 argLen: 1,
35252 asm: riscv.AFCVTSD,
35253 reg: regInfo{
35254 inputs: []inputInfo{
35255 {0, 9223372034707292160},
35256 },
35257 outputs: []outputInfo{
35258 {0, 9223372034707292160},
35259 },
35260 },
35261 },
35262 {
35263 name: "FMOVDload",
35264 auxType: auxSymOff,
35265 argLen: 2,
35266 faultOnNilArg0: true,
35267 symEffect: SymRead,
35268 asm: riscv.AMOVD,
35269 reg: regInfo{
35270 inputs: []inputInfo{
35271 {0, 9223372037861408754},
35272 },
35273 outputs: []outputInfo{
35274 {0, 9223372034707292160},
35275 },
35276 },
35277 },
35278 {
35279 name: "FMOVDstore",
35280 auxType: auxSymOff,
35281 argLen: 3,
35282 faultOnNilArg0: true,
35283 symEffect: SymWrite,
35284 asm: riscv.AMOVD,
35285 reg: regInfo{
35286 inputs: []inputInfo{
35287 {0, 9223372037861408754},
35288 {1, 9223372034707292160},
35289 },
35290 },
35291 },
35292 {
35293 name: "FEQD",
35294 argLen: 2,
35295 commutative: true,
35296 asm: riscv.AFEQD,
35297 reg: regInfo{
35298 inputs: []inputInfo{
35299 {0, 9223372034707292160},
35300 {1, 9223372034707292160},
35301 },
35302 outputs: []outputInfo{
35303 {0, 1006632944},
35304 },
35305 },
35306 },
35307 {
35308 name: "FNED",
35309 argLen: 2,
35310 commutative: true,
35311 asm: riscv.AFNED,
35312 reg: regInfo{
35313 inputs: []inputInfo{
35314 {0, 9223372034707292160},
35315 {1, 9223372034707292160},
35316 },
35317 outputs: []outputInfo{
35318 {0, 1006632944},
35319 },
35320 },
35321 },
35322 {
35323 name: "FLTD",
35324 argLen: 2,
35325 asm: riscv.AFLTD,
35326 reg: regInfo{
35327 inputs: []inputInfo{
35328 {0, 9223372034707292160},
35329 {1, 9223372034707292160},
35330 },
35331 outputs: []outputInfo{
35332 {0, 1006632944},
35333 },
35334 },
35335 },
35336 {
35337 name: "FLED",
35338 argLen: 2,
35339 asm: riscv.AFLED,
35340 reg: regInfo{
35341 inputs: []inputInfo{
35342 {0, 9223372034707292160},
35343 {1, 9223372034707292160},
35344 },
35345 outputs: []outputInfo{
35346 {0, 1006632944},
35347 },
35348 },
35349 },
35350 {
35351 name: "LoweredFMIND",
35352 argLen: 2,
35353 commutative: true,
35354 resultNotInArgs: true,
35355 asm: riscv.AFMIND,
35356 reg: regInfo{
35357 inputs: []inputInfo{
35358 {0, 9223372034707292160},
35359 {1, 9223372034707292160},
35360 },
35361 outputs: []outputInfo{
35362 {0, 9223372034707292160},
35363 },
35364 },
35365 },
35366 {
35367 name: "LoweredFMAXD",
35368 argLen: 2,
35369 commutative: true,
35370 resultNotInArgs: true,
35371 asm: riscv.AFMAXD,
35372 reg: regInfo{
35373 inputs: []inputInfo{
35374 {0, 9223372034707292160},
35375 {1, 9223372034707292160},
35376 },
35377 outputs: []outputInfo{
35378 {0, 9223372034707292160},
35379 },
35380 },
35381 },
35382
35383 {
35384 name: "FADDS",
35385 argLen: 2,
35386 commutative: true,
35387 resultInArg0: true,
35388 asm: s390x.AFADDS,
35389 reg: regInfo{
35390 inputs: []inputInfo{
35391 {0, 4294901760},
35392 {1, 4294901760},
35393 },
35394 outputs: []outputInfo{
35395 {0, 4294901760},
35396 },
35397 },
35398 },
35399 {
35400 name: "FADD",
35401 argLen: 2,
35402 commutative: true,
35403 resultInArg0: true,
35404 asm: s390x.AFADD,
35405 reg: regInfo{
35406 inputs: []inputInfo{
35407 {0, 4294901760},
35408 {1, 4294901760},
35409 },
35410 outputs: []outputInfo{
35411 {0, 4294901760},
35412 },
35413 },
35414 },
35415 {
35416 name: "FSUBS",
35417 argLen: 2,
35418 resultInArg0: true,
35419 asm: s390x.AFSUBS,
35420 reg: regInfo{
35421 inputs: []inputInfo{
35422 {0, 4294901760},
35423 {1, 4294901760},
35424 },
35425 outputs: []outputInfo{
35426 {0, 4294901760},
35427 },
35428 },
35429 },
35430 {
35431 name: "FSUB",
35432 argLen: 2,
35433 resultInArg0: true,
35434 asm: s390x.AFSUB,
35435 reg: regInfo{
35436 inputs: []inputInfo{
35437 {0, 4294901760},
35438 {1, 4294901760},
35439 },
35440 outputs: []outputInfo{
35441 {0, 4294901760},
35442 },
35443 },
35444 },
35445 {
35446 name: "FMULS",
35447 argLen: 2,
35448 commutative: true,
35449 resultInArg0: true,
35450 asm: s390x.AFMULS,
35451 reg: regInfo{
35452 inputs: []inputInfo{
35453 {0, 4294901760},
35454 {1, 4294901760},
35455 },
35456 outputs: []outputInfo{
35457 {0, 4294901760},
35458 },
35459 },
35460 },
35461 {
35462 name: "FMUL",
35463 argLen: 2,
35464 commutative: true,
35465 resultInArg0: true,
35466 asm: s390x.AFMUL,
35467 reg: regInfo{
35468 inputs: []inputInfo{
35469 {0, 4294901760},
35470 {1, 4294901760},
35471 },
35472 outputs: []outputInfo{
35473 {0, 4294901760},
35474 },
35475 },
35476 },
35477 {
35478 name: "FDIVS",
35479 argLen: 2,
35480 resultInArg0: true,
35481 asm: s390x.AFDIVS,
35482 reg: regInfo{
35483 inputs: []inputInfo{
35484 {0, 4294901760},
35485 {1, 4294901760},
35486 },
35487 outputs: []outputInfo{
35488 {0, 4294901760},
35489 },
35490 },
35491 },
35492 {
35493 name: "FDIV",
35494 argLen: 2,
35495 resultInArg0: true,
35496 asm: s390x.AFDIV,
35497 reg: regInfo{
35498 inputs: []inputInfo{
35499 {0, 4294901760},
35500 {1, 4294901760},
35501 },
35502 outputs: []outputInfo{
35503 {0, 4294901760},
35504 },
35505 },
35506 },
35507 {
35508 name: "FNEGS",
35509 argLen: 1,
35510 clobberFlags: true,
35511 asm: s390x.AFNEGS,
35512 reg: regInfo{
35513 inputs: []inputInfo{
35514 {0, 4294901760},
35515 },
35516 outputs: []outputInfo{
35517 {0, 4294901760},
35518 },
35519 },
35520 },
35521 {
35522 name: "FNEG",
35523 argLen: 1,
35524 clobberFlags: true,
35525 asm: s390x.AFNEG,
35526 reg: regInfo{
35527 inputs: []inputInfo{
35528 {0, 4294901760},
35529 },
35530 outputs: []outputInfo{
35531 {0, 4294901760},
35532 },
35533 },
35534 },
35535 {
35536 name: "FMADDS",
35537 argLen: 3,
35538 resultInArg0: true,
35539 asm: s390x.AFMADDS,
35540 reg: regInfo{
35541 inputs: []inputInfo{
35542 {0, 4294901760},
35543 {1, 4294901760},
35544 {2, 4294901760},
35545 },
35546 outputs: []outputInfo{
35547 {0, 4294901760},
35548 },
35549 },
35550 },
35551 {
35552 name: "FMADD",
35553 argLen: 3,
35554 resultInArg0: true,
35555 asm: s390x.AFMADD,
35556 reg: regInfo{
35557 inputs: []inputInfo{
35558 {0, 4294901760},
35559 {1, 4294901760},
35560 {2, 4294901760},
35561 },
35562 outputs: []outputInfo{
35563 {0, 4294901760},
35564 },
35565 },
35566 },
35567 {
35568 name: "FMSUBS",
35569 argLen: 3,
35570 resultInArg0: true,
35571 asm: s390x.AFMSUBS,
35572 reg: regInfo{
35573 inputs: []inputInfo{
35574 {0, 4294901760},
35575 {1, 4294901760},
35576 {2, 4294901760},
35577 },
35578 outputs: []outputInfo{
35579 {0, 4294901760},
35580 },
35581 },
35582 },
35583 {
35584 name: "FMSUB",
35585 argLen: 3,
35586 resultInArg0: true,
35587 asm: s390x.AFMSUB,
35588 reg: regInfo{
35589 inputs: []inputInfo{
35590 {0, 4294901760},
35591 {1, 4294901760},
35592 {2, 4294901760},
35593 },
35594 outputs: []outputInfo{
35595 {0, 4294901760},
35596 },
35597 },
35598 },
35599 {
35600 name: "LPDFR",
35601 argLen: 1,
35602 asm: s390x.ALPDFR,
35603 reg: regInfo{
35604 inputs: []inputInfo{
35605 {0, 4294901760},
35606 },
35607 outputs: []outputInfo{
35608 {0, 4294901760},
35609 },
35610 },
35611 },
35612 {
35613 name: "LNDFR",
35614 argLen: 1,
35615 asm: s390x.ALNDFR,
35616 reg: regInfo{
35617 inputs: []inputInfo{
35618 {0, 4294901760},
35619 },
35620 outputs: []outputInfo{
35621 {0, 4294901760},
35622 },
35623 },
35624 },
35625 {
35626 name: "CPSDR",
35627 argLen: 2,
35628 asm: s390x.ACPSDR,
35629 reg: regInfo{
35630 inputs: []inputInfo{
35631 {0, 4294901760},
35632 {1, 4294901760},
35633 },
35634 outputs: []outputInfo{
35635 {0, 4294901760},
35636 },
35637 },
35638 },
35639 {
35640 name: "FIDBR",
35641 auxType: auxInt8,
35642 argLen: 1,
35643 asm: s390x.AFIDBR,
35644 reg: regInfo{
35645 inputs: []inputInfo{
35646 {0, 4294901760},
35647 },
35648 outputs: []outputInfo{
35649 {0, 4294901760},
35650 },
35651 },
35652 },
35653 {
35654 name: "FMOVSload",
35655 auxType: auxSymOff,
35656 argLen: 2,
35657 faultOnNilArg0: true,
35658 symEffect: SymRead,
35659 asm: s390x.AFMOVS,
35660 reg: regInfo{
35661 inputs: []inputInfo{
35662 {0, 4295023614},
35663 },
35664 outputs: []outputInfo{
35665 {0, 4294901760},
35666 },
35667 },
35668 },
35669 {
35670 name: "FMOVDload",
35671 auxType: auxSymOff,
35672 argLen: 2,
35673 faultOnNilArg0: true,
35674 symEffect: SymRead,
35675 asm: s390x.AFMOVD,
35676 reg: regInfo{
35677 inputs: []inputInfo{
35678 {0, 4295023614},
35679 },
35680 outputs: []outputInfo{
35681 {0, 4294901760},
35682 },
35683 },
35684 },
35685 {
35686 name: "FMOVSconst",
35687 auxType: auxFloat32,
35688 argLen: 0,
35689 rematerializeable: true,
35690 asm: s390x.AFMOVS,
35691 reg: regInfo{
35692 outputs: []outputInfo{
35693 {0, 4294901760},
35694 },
35695 },
35696 },
35697 {
35698 name: "FMOVDconst",
35699 auxType: auxFloat64,
35700 argLen: 0,
35701 rematerializeable: true,
35702 asm: s390x.AFMOVD,
35703 reg: regInfo{
35704 outputs: []outputInfo{
35705 {0, 4294901760},
35706 },
35707 },
35708 },
35709 {
35710 name: "FMOVSloadidx",
35711 auxType: auxSymOff,
35712 argLen: 3,
35713 symEffect: SymRead,
35714 asm: s390x.AFMOVS,
35715 reg: regInfo{
35716 inputs: []inputInfo{
35717 {0, 56318},
35718 {1, 56318},
35719 },
35720 outputs: []outputInfo{
35721 {0, 4294901760},
35722 },
35723 },
35724 },
35725 {
35726 name: "FMOVDloadidx",
35727 auxType: auxSymOff,
35728 argLen: 3,
35729 symEffect: SymRead,
35730 asm: s390x.AFMOVD,
35731 reg: regInfo{
35732 inputs: []inputInfo{
35733 {0, 56318},
35734 {1, 56318},
35735 },
35736 outputs: []outputInfo{
35737 {0, 4294901760},
35738 },
35739 },
35740 },
35741 {
35742 name: "FMOVSstore",
35743 auxType: auxSymOff,
35744 argLen: 3,
35745 faultOnNilArg0: true,
35746 symEffect: SymWrite,
35747 asm: s390x.AFMOVS,
35748 reg: regInfo{
35749 inputs: []inputInfo{
35750 {0, 4295023614},
35751 {1, 4294901760},
35752 },
35753 },
35754 },
35755 {
35756 name: "FMOVDstore",
35757 auxType: auxSymOff,
35758 argLen: 3,
35759 faultOnNilArg0: true,
35760 symEffect: SymWrite,
35761 asm: s390x.AFMOVD,
35762 reg: regInfo{
35763 inputs: []inputInfo{
35764 {0, 4295023614},
35765 {1, 4294901760},
35766 },
35767 },
35768 },
35769 {
35770 name: "FMOVSstoreidx",
35771 auxType: auxSymOff,
35772 argLen: 4,
35773 symEffect: SymWrite,
35774 asm: s390x.AFMOVS,
35775 reg: regInfo{
35776 inputs: []inputInfo{
35777 {0, 56318},
35778 {1, 56318},
35779 {2, 4294901760},
35780 },
35781 },
35782 },
35783 {
35784 name: "FMOVDstoreidx",
35785 auxType: auxSymOff,
35786 argLen: 4,
35787 symEffect: SymWrite,
35788 asm: s390x.AFMOVD,
35789 reg: regInfo{
35790 inputs: []inputInfo{
35791 {0, 56318},
35792 {1, 56318},
35793 {2, 4294901760},
35794 },
35795 },
35796 },
35797 {
35798 name: "ADD",
35799 argLen: 2,
35800 commutative: true,
35801 clobberFlags: true,
35802 asm: s390x.AADD,
35803 reg: regInfo{
35804 inputs: []inputInfo{
35805 {1, 23551},
35806 {0, 56319},
35807 },
35808 outputs: []outputInfo{
35809 {0, 23551},
35810 },
35811 },
35812 },
35813 {
35814 name: "ADDW",
35815 argLen: 2,
35816 commutative: true,
35817 clobberFlags: true,
35818 asm: s390x.AADDW,
35819 reg: regInfo{
35820 inputs: []inputInfo{
35821 {1, 23551},
35822 {0, 56319},
35823 },
35824 outputs: []outputInfo{
35825 {0, 23551},
35826 },
35827 },
35828 },
35829 {
35830 name: "ADDconst",
35831 auxType: auxInt32,
35832 argLen: 1,
35833 clobberFlags: true,
35834 asm: s390x.AADD,
35835 reg: regInfo{
35836 inputs: []inputInfo{
35837 {0, 56319},
35838 },
35839 outputs: []outputInfo{
35840 {0, 23551},
35841 },
35842 },
35843 },
35844 {
35845 name: "ADDWconst",
35846 auxType: auxInt32,
35847 argLen: 1,
35848 clobberFlags: true,
35849 asm: s390x.AADDW,
35850 reg: regInfo{
35851 inputs: []inputInfo{
35852 {0, 56319},
35853 },
35854 outputs: []outputInfo{
35855 {0, 23551},
35856 },
35857 },
35858 },
35859 {
35860 name: "ADDload",
35861 auxType: auxSymOff,
35862 argLen: 3,
35863 resultInArg0: true,
35864 clobberFlags: true,
35865 faultOnNilArg1: true,
35866 symEffect: SymRead,
35867 asm: s390x.AADD,
35868 reg: regInfo{
35869 inputs: []inputInfo{
35870 {0, 23551},
35871 {1, 56318},
35872 },
35873 outputs: []outputInfo{
35874 {0, 23551},
35875 },
35876 },
35877 },
35878 {
35879 name: "ADDWload",
35880 auxType: auxSymOff,
35881 argLen: 3,
35882 resultInArg0: true,
35883 clobberFlags: true,
35884 faultOnNilArg1: true,
35885 symEffect: SymRead,
35886 asm: s390x.AADDW,
35887 reg: regInfo{
35888 inputs: []inputInfo{
35889 {0, 23551},
35890 {1, 56318},
35891 },
35892 outputs: []outputInfo{
35893 {0, 23551},
35894 },
35895 },
35896 },
35897 {
35898 name: "SUB",
35899 argLen: 2,
35900 clobberFlags: true,
35901 asm: s390x.ASUB,
35902 reg: regInfo{
35903 inputs: []inputInfo{
35904 {0, 23551},
35905 {1, 23551},
35906 },
35907 outputs: []outputInfo{
35908 {0, 23551},
35909 },
35910 },
35911 },
35912 {
35913 name: "SUBW",
35914 argLen: 2,
35915 clobberFlags: true,
35916 asm: s390x.ASUBW,
35917 reg: regInfo{
35918 inputs: []inputInfo{
35919 {0, 23551},
35920 {1, 23551},
35921 },
35922 outputs: []outputInfo{
35923 {0, 23551},
35924 },
35925 },
35926 },
35927 {
35928 name: "SUBconst",
35929 auxType: auxInt32,
35930 argLen: 1,
35931 resultInArg0: true,
35932 clobberFlags: true,
35933 asm: s390x.ASUB,
35934 reg: regInfo{
35935 inputs: []inputInfo{
35936 {0, 23551},
35937 },
35938 outputs: []outputInfo{
35939 {0, 23551},
35940 },
35941 },
35942 },
35943 {
35944 name: "SUBWconst",
35945 auxType: auxInt32,
35946 argLen: 1,
35947 resultInArg0: true,
35948 clobberFlags: true,
35949 asm: s390x.ASUBW,
35950 reg: regInfo{
35951 inputs: []inputInfo{
35952 {0, 23551},
35953 },
35954 outputs: []outputInfo{
35955 {0, 23551},
35956 },
35957 },
35958 },
35959 {
35960 name: "SUBload",
35961 auxType: auxSymOff,
35962 argLen: 3,
35963 resultInArg0: true,
35964 clobberFlags: true,
35965 faultOnNilArg1: true,
35966 symEffect: SymRead,
35967 asm: s390x.ASUB,
35968 reg: regInfo{
35969 inputs: []inputInfo{
35970 {0, 23551},
35971 {1, 56318},
35972 },
35973 outputs: []outputInfo{
35974 {0, 23551},
35975 },
35976 },
35977 },
35978 {
35979 name: "SUBWload",
35980 auxType: auxSymOff,
35981 argLen: 3,
35982 resultInArg0: true,
35983 clobberFlags: true,
35984 faultOnNilArg1: true,
35985 symEffect: SymRead,
35986 asm: s390x.ASUBW,
35987 reg: regInfo{
35988 inputs: []inputInfo{
35989 {0, 23551},
35990 {1, 56318},
35991 },
35992 outputs: []outputInfo{
35993 {0, 23551},
35994 },
35995 },
35996 },
35997 {
35998 name: "MULLD",
35999 argLen: 2,
36000 commutative: true,
36001 resultInArg0: true,
36002 clobberFlags: true,
36003 asm: s390x.AMULLD,
36004 reg: regInfo{
36005 inputs: []inputInfo{
36006 {0, 23551},
36007 {1, 23551},
36008 },
36009 outputs: []outputInfo{
36010 {0, 23551},
36011 },
36012 },
36013 },
36014 {
36015 name: "MULLW",
36016 argLen: 2,
36017 commutative: true,
36018 resultInArg0: true,
36019 clobberFlags: true,
36020 asm: s390x.AMULLW,
36021 reg: regInfo{
36022 inputs: []inputInfo{
36023 {0, 23551},
36024 {1, 23551},
36025 },
36026 outputs: []outputInfo{
36027 {0, 23551},
36028 },
36029 },
36030 },
36031 {
36032 name: "MULLDconst",
36033 auxType: auxInt32,
36034 argLen: 1,
36035 resultInArg0: true,
36036 clobberFlags: true,
36037 asm: s390x.AMULLD,
36038 reg: regInfo{
36039 inputs: []inputInfo{
36040 {0, 23551},
36041 },
36042 outputs: []outputInfo{
36043 {0, 23551},
36044 },
36045 },
36046 },
36047 {
36048 name: "MULLWconst",
36049 auxType: auxInt32,
36050 argLen: 1,
36051 resultInArg0: true,
36052 clobberFlags: true,
36053 asm: s390x.AMULLW,
36054 reg: regInfo{
36055 inputs: []inputInfo{
36056 {0, 23551},
36057 },
36058 outputs: []outputInfo{
36059 {0, 23551},
36060 },
36061 },
36062 },
36063 {
36064 name: "MULLDload",
36065 auxType: auxSymOff,
36066 argLen: 3,
36067 resultInArg0: true,
36068 clobberFlags: true,
36069 faultOnNilArg1: true,
36070 symEffect: SymRead,
36071 asm: s390x.AMULLD,
36072 reg: regInfo{
36073 inputs: []inputInfo{
36074 {0, 23551},
36075 {1, 56318},
36076 },
36077 outputs: []outputInfo{
36078 {0, 23551},
36079 },
36080 },
36081 },
36082 {
36083 name: "MULLWload",
36084 auxType: auxSymOff,
36085 argLen: 3,
36086 resultInArg0: true,
36087 clobberFlags: true,
36088 faultOnNilArg1: true,
36089 symEffect: SymRead,
36090 asm: s390x.AMULLW,
36091 reg: regInfo{
36092 inputs: []inputInfo{
36093 {0, 23551},
36094 {1, 56318},
36095 },
36096 outputs: []outputInfo{
36097 {0, 23551},
36098 },
36099 },
36100 },
36101 {
36102 name: "MULHD",
36103 argLen: 2,
36104 commutative: true,
36105 resultInArg0: true,
36106 clobberFlags: true,
36107 asm: s390x.AMULHD,
36108 reg: regInfo{
36109 inputs: []inputInfo{
36110 {0, 21503},
36111 {1, 21503},
36112 },
36113 clobbers: 2048,
36114 outputs: []outputInfo{
36115 {0, 21503},
36116 },
36117 },
36118 },
36119 {
36120 name: "MULHDU",
36121 argLen: 2,
36122 commutative: true,
36123 resultInArg0: true,
36124 clobberFlags: true,
36125 asm: s390x.AMULHDU,
36126 reg: regInfo{
36127 inputs: []inputInfo{
36128 {0, 21503},
36129 {1, 21503},
36130 },
36131 clobbers: 2048,
36132 outputs: []outputInfo{
36133 {0, 21503},
36134 },
36135 },
36136 },
36137 {
36138 name: "DIVD",
36139 argLen: 2,
36140 resultInArg0: true,
36141 clobberFlags: true,
36142 asm: s390x.ADIVD,
36143 reg: regInfo{
36144 inputs: []inputInfo{
36145 {0, 21503},
36146 {1, 21503},
36147 },
36148 clobbers: 2048,
36149 outputs: []outputInfo{
36150 {0, 21503},
36151 },
36152 },
36153 },
36154 {
36155 name: "DIVW",
36156 argLen: 2,
36157 resultInArg0: true,
36158 clobberFlags: true,
36159 asm: s390x.ADIVW,
36160 reg: regInfo{
36161 inputs: []inputInfo{
36162 {0, 21503},
36163 {1, 21503},
36164 },
36165 clobbers: 2048,
36166 outputs: []outputInfo{
36167 {0, 21503},
36168 },
36169 },
36170 },
36171 {
36172 name: "DIVDU",
36173 argLen: 2,
36174 resultInArg0: true,
36175 clobberFlags: true,
36176 asm: s390x.ADIVDU,
36177 reg: regInfo{
36178 inputs: []inputInfo{
36179 {0, 21503},
36180 {1, 21503},
36181 },
36182 clobbers: 2048,
36183 outputs: []outputInfo{
36184 {0, 21503},
36185 },
36186 },
36187 },
36188 {
36189 name: "DIVWU",
36190 argLen: 2,
36191 resultInArg0: true,
36192 clobberFlags: true,
36193 asm: s390x.ADIVWU,
36194 reg: regInfo{
36195 inputs: []inputInfo{
36196 {0, 21503},
36197 {1, 21503},
36198 },
36199 clobbers: 2048,
36200 outputs: []outputInfo{
36201 {0, 21503},
36202 },
36203 },
36204 },
36205 {
36206 name: "MODD",
36207 argLen: 2,
36208 resultInArg0: true,
36209 clobberFlags: true,
36210 asm: s390x.AMODD,
36211 reg: regInfo{
36212 inputs: []inputInfo{
36213 {0, 21503},
36214 {1, 21503},
36215 },
36216 clobbers: 2048,
36217 outputs: []outputInfo{
36218 {0, 21503},
36219 },
36220 },
36221 },
36222 {
36223 name: "MODW",
36224 argLen: 2,
36225 resultInArg0: true,
36226 clobberFlags: true,
36227 asm: s390x.AMODW,
36228 reg: regInfo{
36229 inputs: []inputInfo{
36230 {0, 21503},
36231 {1, 21503},
36232 },
36233 clobbers: 2048,
36234 outputs: []outputInfo{
36235 {0, 21503},
36236 },
36237 },
36238 },
36239 {
36240 name: "MODDU",
36241 argLen: 2,
36242 resultInArg0: true,
36243 clobberFlags: true,
36244 asm: s390x.AMODDU,
36245 reg: regInfo{
36246 inputs: []inputInfo{
36247 {0, 21503},
36248 {1, 21503},
36249 },
36250 clobbers: 2048,
36251 outputs: []outputInfo{
36252 {0, 21503},
36253 },
36254 },
36255 },
36256 {
36257 name: "MODWU",
36258 argLen: 2,
36259 resultInArg0: true,
36260 clobberFlags: true,
36261 asm: s390x.AMODWU,
36262 reg: regInfo{
36263 inputs: []inputInfo{
36264 {0, 21503},
36265 {1, 21503},
36266 },
36267 clobbers: 2048,
36268 outputs: []outputInfo{
36269 {0, 21503},
36270 },
36271 },
36272 },
36273 {
36274 name: "AND",
36275 argLen: 2,
36276 commutative: true,
36277 clobberFlags: true,
36278 asm: s390x.AAND,
36279 reg: regInfo{
36280 inputs: []inputInfo{
36281 {0, 23551},
36282 {1, 23551},
36283 },
36284 outputs: []outputInfo{
36285 {0, 23551},
36286 },
36287 },
36288 },
36289 {
36290 name: "ANDW",
36291 argLen: 2,
36292 commutative: true,
36293 clobberFlags: true,
36294 asm: s390x.AANDW,
36295 reg: regInfo{
36296 inputs: []inputInfo{
36297 {0, 23551},
36298 {1, 23551},
36299 },
36300 outputs: []outputInfo{
36301 {0, 23551},
36302 },
36303 },
36304 },
36305 {
36306 name: "ANDconst",
36307 auxType: auxInt64,
36308 argLen: 1,
36309 resultInArg0: true,
36310 clobberFlags: true,
36311 asm: s390x.AAND,
36312 reg: regInfo{
36313 inputs: []inputInfo{
36314 {0, 23551},
36315 },
36316 outputs: []outputInfo{
36317 {0, 23551},
36318 },
36319 },
36320 },
36321 {
36322 name: "ANDWconst",
36323 auxType: auxInt32,
36324 argLen: 1,
36325 resultInArg0: true,
36326 clobberFlags: true,
36327 asm: s390x.AANDW,
36328 reg: regInfo{
36329 inputs: []inputInfo{
36330 {0, 23551},
36331 },
36332 outputs: []outputInfo{
36333 {0, 23551},
36334 },
36335 },
36336 },
36337 {
36338 name: "ANDload",
36339 auxType: auxSymOff,
36340 argLen: 3,
36341 resultInArg0: true,
36342 clobberFlags: true,
36343 faultOnNilArg1: true,
36344 symEffect: SymRead,
36345 asm: s390x.AAND,
36346 reg: regInfo{
36347 inputs: []inputInfo{
36348 {0, 23551},
36349 {1, 56318},
36350 },
36351 outputs: []outputInfo{
36352 {0, 23551},
36353 },
36354 },
36355 },
36356 {
36357 name: "ANDWload",
36358 auxType: auxSymOff,
36359 argLen: 3,
36360 resultInArg0: true,
36361 clobberFlags: true,
36362 faultOnNilArg1: true,
36363 symEffect: SymRead,
36364 asm: s390x.AANDW,
36365 reg: regInfo{
36366 inputs: []inputInfo{
36367 {0, 23551},
36368 {1, 56318},
36369 },
36370 outputs: []outputInfo{
36371 {0, 23551},
36372 },
36373 },
36374 },
36375 {
36376 name: "OR",
36377 argLen: 2,
36378 commutative: true,
36379 clobberFlags: true,
36380 asm: s390x.AOR,
36381 reg: regInfo{
36382 inputs: []inputInfo{
36383 {0, 23551},
36384 {1, 23551},
36385 },
36386 outputs: []outputInfo{
36387 {0, 23551},
36388 },
36389 },
36390 },
36391 {
36392 name: "ORW",
36393 argLen: 2,
36394 commutative: true,
36395 clobberFlags: true,
36396 asm: s390x.AORW,
36397 reg: regInfo{
36398 inputs: []inputInfo{
36399 {0, 23551},
36400 {1, 23551},
36401 },
36402 outputs: []outputInfo{
36403 {0, 23551},
36404 },
36405 },
36406 },
36407 {
36408 name: "ORconst",
36409 auxType: auxInt64,
36410 argLen: 1,
36411 resultInArg0: true,
36412 clobberFlags: true,
36413 asm: s390x.AOR,
36414 reg: regInfo{
36415 inputs: []inputInfo{
36416 {0, 23551},
36417 },
36418 outputs: []outputInfo{
36419 {0, 23551},
36420 },
36421 },
36422 },
36423 {
36424 name: "ORWconst",
36425 auxType: auxInt32,
36426 argLen: 1,
36427 resultInArg0: true,
36428 clobberFlags: true,
36429 asm: s390x.AORW,
36430 reg: regInfo{
36431 inputs: []inputInfo{
36432 {0, 23551},
36433 },
36434 outputs: []outputInfo{
36435 {0, 23551},
36436 },
36437 },
36438 },
36439 {
36440 name: "ORload",
36441 auxType: auxSymOff,
36442 argLen: 3,
36443 resultInArg0: true,
36444 clobberFlags: true,
36445 faultOnNilArg1: true,
36446 symEffect: SymRead,
36447 asm: s390x.AOR,
36448 reg: regInfo{
36449 inputs: []inputInfo{
36450 {0, 23551},
36451 {1, 56318},
36452 },
36453 outputs: []outputInfo{
36454 {0, 23551},
36455 },
36456 },
36457 },
36458 {
36459 name: "ORWload",
36460 auxType: auxSymOff,
36461 argLen: 3,
36462 resultInArg0: true,
36463 clobberFlags: true,
36464 faultOnNilArg1: true,
36465 symEffect: SymRead,
36466 asm: s390x.AORW,
36467 reg: regInfo{
36468 inputs: []inputInfo{
36469 {0, 23551},
36470 {1, 56318},
36471 },
36472 outputs: []outputInfo{
36473 {0, 23551},
36474 },
36475 },
36476 },
36477 {
36478 name: "XOR",
36479 argLen: 2,
36480 commutative: true,
36481 clobberFlags: true,
36482 asm: s390x.AXOR,
36483 reg: regInfo{
36484 inputs: []inputInfo{
36485 {0, 23551},
36486 {1, 23551},
36487 },
36488 outputs: []outputInfo{
36489 {0, 23551},
36490 },
36491 },
36492 },
36493 {
36494 name: "XORW",
36495 argLen: 2,
36496 commutative: true,
36497 clobberFlags: true,
36498 asm: s390x.AXORW,
36499 reg: regInfo{
36500 inputs: []inputInfo{
36501 {0, 23551},
36502 {1, 23551},
36503 },
36504 outputs: []outputInfo{
36505 {0, 23551},
36506 },
36507 },
36508 },
36509 {
36510 name: "XORconst",
36511 auxType: auxInt64,
36512 argLen: 1,
36513 resultInArg0: true,
36514 clobberFlags: true,
36515 asm: s390x.AXOR,
36516 reg: regInfo{
36517 inputs: []inputInfo{
36518 {0, 23551},
36519 },
36520 outputs: []outputInfo{
36521 {0, 23551},
36522 },
36523 },
36524 },
36525 {
36526 name: "XORWconst",
36527 auxType: auxInt32,
36528 argLen: 1,
36529 resultInArg0: true,
36530 clobberFlags: true,
36531 asm: s390x.AXORW,
36532 reg: regInfo{
36533 inputs: []inputInfo{
36534 {0, 23551},
36535 },
36536 outputs: []outputInfo{
36537 {0, 23551},
36538 },
36539 },
36540 },
36541 {
36542 name: "XORload",
36543 auxType: auxSymOff,
36544 argLen: 3,
36545 resultInArg0: true,
36546 clobberFlags: true,
36547 faultOnNilArg1: true,
36548 symEffect: SymRead,
36549 asm: s390x.AXOR,
36550 reg: regInfo{
36551 inputs: []inputInfo{
36552 {0, 23551},
36553 {1, 56318},
36554 },
36555 outputs: []outputInfo{
36556 {0, 23551},
36557 },
36558 },
36559 },
36560 {
36561 name: "XORWload",
36562 auxType: auxSymOff,
36563 argLen: 3,
36564 resultInArg0: true,
36565 clobberFlags: true,
36566 faultOnNilArg1: true,
36567 symEffect: SymRead,
36568 asm: s390x.AXORW,
36569 reg: regInfo{
36570 inputs: []inputInfo{
36571 {0, 23551},
36572 {1, 56318},
36573 },
36574 outputs: []outputInfo{
36575 {0, 23551},
36576 },
36577 },
36578 },
36579 {
36580 name: "ADDC",
36581 argLen: 2,
36582 commutative: true,
36583 asm: s390x.AADDC,
36584 reg: regInfo{
36585 inputs: []inputInfo{
36586 {0, 23551},
36587 {1, 23551},
36588 },
36589 outputs: []outputInfo{
36590 {0, 23551},
36591 },
36592 },
36593 },
36594 {
36595 name: "ADDCconst",
36596 auxType: auxInt16,
36597 argLen: 1,
36598 asm: s390x.AADDC,
36599 reg: regInfo{
36600 inputs: []inputInfo{
36601 {0, 23551},
36602 },
36603 outputs: []outputInfo{
36604 {0, 23551},
36605 },
36606 },
36607 },
36608 {
36609 name: "ADDE",
36610 argLen: 3,
36611 commutative: true,
36612 resultInArg0: true,
36613 asm: s390x.AADDE,
36614 reg: regInfo{
36615 inputs: []inputInfo{
36616 {0, 23551},
36617 {1, 23551},
36618 },
36619 outputs: []outputInfo{
36620 {0, 23551},
36621 },
36622 },
36623 },
36624 {
36625 name: "SUBC",
36626 argLen: 2,
36627 asm: s390x.ASUBC,
36628 reg: regInfo{
36629 inputs: []inputInfo{
36630 {0, 23551},
36631 {1, 23551},
36632 },
36633 outputs: []outputInfo{
36634 {0, 23551},
36635 },
36636 },
36637 },
36638 {
36639 name: "SUBE",
36640 argLen: 3,
36641 resultInArg0: true,
36642 asm: s390x.ASUBE,
36643 reg: regInfo{
36644 inputs: []inputInfo{
36645 {0, 23551},
36646 {1, 23551},
36647 },
36648 outputs: []outputInfo{
36649 {0, 23551},
36650 },
36651 },
36652 },
36653 {
36654 name: "CMP",
36655 argLen: 2,
36656 asm: s390x.ACMP,
36657 reg: regInfo{
36658 inputs: []inputInfo{
36659 {0, 56319},
36660 {1, 56319},
36661 },
36662 },
36663 },
36664 {
36665 name: "CMPW",
36666 argLen: 2,
36667 asm: s390x.ACMPW,
36668 reg: regInfo{
36669 inputs: []inputInfo{
36670 {0, 56319},
36671 {1, 56319},
36672 },
36673 },
36674 },
36675 {
36676 name: "CMPU",
36677 argLen: 2,
36678 asm: s390x.ACMPU,
36679 reg: regInfo{
36680 inputs: []inputInfo{
36681 {0, 56319},
36682 {1, 56319},
36683 },
36684 },
36685 },
36686 {
36687 name: "CMPWU",
36688 argLen: 2,
36689 asm: s390x.ACMPWU,
36690 reg: regInfo{
36691 inputs: []inputInfo{
36692 {0, 56319},
36693 {1, 56319},
36694 },
36695 },
36696 },
36697 {
36698 name: "CMPconst",
36699 auxType: auxInt32,
36700 argLen: 1,
36701 asm: s390x.ACMP,
36702 reg: regInfo{
36703 inputs: []inputInfo{
36704 {0, 56319},
36705 },
36706 },
36707 },
36708 {
36709 name: "CMPWconst",
36710 auxType: auxInt32,
36711 argLen: 1,
36712 asm: s390x.ACMPW,
36713 reg: regInfo{
36714 inputs: []inputInfo{
36715 {0, 56319},
36716 },
36717 },
36718 },
36719 {
36720 name: "CMPUconst",
36721 auxType: auxInt32,
36722 argLen: 1,
36723 asm: s390x.ACMPU,
36724 reg: regInfo{
36725 inputs: []inputInfo{
36726 {0, 56319},
36727 },
36728 },
36729 },
36730 {
36731 name: "CMPWUconst",
36732 auxType: auxInt32,
36733 argLen: 1,
36734 asm: s390x.ACMPWU,
36735 reg: regInfo{
36736 inputs: []inputInfo{
36737 {0, 56319},
36738 },
36739 },
36740 },
36741 {
36742 name: "FCMPS",
36743 argLen: 2,
36744 asm: s390x.ACEBR,
36745 reg: regInfo{
36746 inputs: []inputInfo{
36747 {0, 4294901760},
36748 {1, 4294901760},
36749 },
36750 },
36751 },
36752 {
36753 name: "FCMP",
36754 argLen: 2,
36755 asm: s390x.AFCMPU,
36756 reg: regInfo{
36757 inputs: []inputInfo{
36758 {0, 4294901760},
36759 {1, 4294901760},
36760 },
36761 },
36762 },
36763 {
36764 name: "LTDBR",
36765 argLen: 1,
36766 asm: s390x.ALTDBR,
36767 reg: regInfo{
36768 inputs: []inputInfo{
36769 {0, 4294901760},
36770 },
36771 },
36772 },
36773 {
36774 name: "LTEBR",
36775 argLen: 1,
36776 asm: s390x.ALTEBR,
36777 reg: regInfo{
36778 inputs: []inputInfo{
36779 {0, 4294901760},
36780 },
36781 },
36782 },
36783 {
36784 name: "SLD",
36785 argLen: 2,
36786 asm: s390x.ASLD,
36787 reg: regInfo{
36788 inputs: []inputInfo{
36789 {1, 23550},
36790 {0, 23551},
36791 },
36792 outputs: []outputInfo{
36793 {0, 23551},
36794 },
36795 },
36796 },
36797 {
36798 name: "SLW",
36799 argLen: 2,
36800 asm: s390x.ASLW,
36801 reg: regInfo{
36802 inputs: []inputInfo{
36803 {1, 23550},
36804 {0, 23551},
36805 },
36806 outputs: []outputInfo{
36807 {0, 23551},
36808 },
36809 },
36810 },
36811 {
36812 name: "SLDconst",
36813 auxType: auxUInt8,
36814 argLen: 1,
36815 asm: s390x.ASLD,
36816 reg: regInfo{
36817 inputs: []inputInfo{
36818 {0, 23551},
36819 },
36820 outputs: []outputInfo{
36821 {0, 23551},
36822 },
36823 },
36824 },
36825 {
36826 name: "SLWconst",
36827 auxType: auxUInt8,
36828 argLen: 1,
36829 asm: s390x.ASLW,
36830 reg: regInfo{
36831 inputs: []inputInfo{
36832 {0, 23551},
36833 },
36834 outputs: []outputInfo{
36835 {0, 23551},
36836 },
36837 },
36838 },
36839 {
36840 name: "SRD",
36841 argLen: 2,
36842 asm: s390x.ASRD,
36843 reg: regInfo{
36844 inputs: []inputInfo{
36845 {1, 23550},
36846 {0, 23551},
36847 },
36848 outputs: []outputInfo{
36849 {0, 23551},
36850 },
36851 },
36852 },
36853 {
36854 name: "SRW",
36855 argLen: 2,
36856 asm: s390x.ASRW,
36857 reg: regInfo{
36858 inputs: []inputInfo{
36859 {1, 23550},
36860 {0, 23551},
36861 },
36862 outputs: []outputInfo{
36863 {0, 23551},
36864 },
36865 },
36866 },
36867 {
36868 name: "SRDconst",
36869 auxType: auxUInt8,
36870 argLen: 1,
36871 asm: s390x.ASRD,
36872 reg: regInfo{
36873 inputs: []inputInfo{
36874 {0, 23551},
36875 },
36876 outputs: []outputInfo{
36877 {0, 23551},
36878 },
36879 },
36880 },
36881 {
36882 name: "SRWconst",
36883 auxType: auxUInt8,
36884 argLen: 1,
36885 asm: s390x.ASRW,
36886 reg: regInfo{
36887 inputs: []inputInfo{
36888 {0, 23551},
36889 },
36890 outputs: []outputInfo{
36891 {0, 23551},
36892 },
36893 },
36894 },
36895 {
36896 name: "SRAD",
36897 argLen: 2,
36898 clobberFlags: true,
36899 asm: s390x.ASRAD,
36900 reg: regInfo{
36901 inputs: []inputInfo{
36902 {1, 23550},
36903 {0, 23551},
36904 },
36905 outputs: []outputInfo{
36906 {0, 23551},
36907 },
36908 },
36909 },
36910 {
36911 name: "SRAW",
36912 argLen: 2,
36913 clobberFlags: true,
36914 asm: s390x.ASRAW,
36915 reg: regInfo{
36916 inputs: []inputInfo{
36917 {1, 23550},
36918 {0, 23551},
36919 },
36920 outputs: []outputInfo{
36921 {0, 23551},
36922 },
36923 },
36924 },
36925 {
36926 name: "SRADconst",
36927 auxType: auxUInt8,
36928 argLen: 1,
36929 clobberFlags: true,
36930 asm: s390x.ASRAD,
36931 reg: regInfo{
36932 inputs: []inputInfo{
36933 {0, 23551},
36934 },
36935 outputs: []outputInfo{
36936 {0, 23551},
36937 },
36938 },
36939 },
36940 {
36941 name: "SRAWconst",
36942 auxType: auxUInt8,
36943 argLen: 1,
36944 clobberFlags: true,
36945 asm: s390x.ASRAW,
36946 reg: regInfo{
36947 inputs: []inputInfo{
36948 {0, 23551},
36949 },
36950 outputs: []outputInfo{
36951 {0, 23551},
36952 },
36953 },
36954 },
36955 {
36956 name: "RLLG",
36957 argLen: 2,
36958 asm: s390x.ARLLG,
36959 reg: regInfo{
36960 inputs: []inputInfo{
36961 {1, 23550},
36962 {0, 23551},
36963 },
36964 outputs: []outputInfo{
36965 {0, 23551},
36966 },
36967 },
36968 },
36969 {
36970 name: "RLL",
36971 argLen: 2,
36972 asm: s390x.ARLL,
36973 reg: regInfo{
36974 inputs: []inputInfo{
36975 {1, 23550},
36976 {0, 23551},
36977 },
36978 outputs: []outputInfo{
36979 {0, 23551},
36980 },
36981 },
36982 },
36983 {
36984 name: "RLLconst",
36985 auxType: auxUInt8,
36986 argLen: 1,
36987 asm: s390x.ARLL,
36988 reg: regInfo{
36989 inputs: []inputInfo{
36990 {0, 23551},
36991 },
36992 outputs: []outputInfo{
36993 {0, 23551},
36994 },
36995 },
36996 },
36997 {
36998 name: "RXSBG",
36999 auxType: auxS390XRotateParams,
37000 argLen: 2,
37001 resultInArg0: true,
37002 clobberFlags: true,
37003 asm: s390x.ARXSBG,
37004 reg: regInfo{
37005 inputs: []inputInfo{
37006 {0, 23551},
37007 {1, 23551},
37008 },
37009 outputs: []outputInfo{
37010 {0, 23551},
37011 },
37012 },
37013 },
37014 {
37015 name: "RISBGZ",
37016 auxType: auxS390XRotateParams,
37017 argLen: 1,
37018 clobberFlags: true,
37019 asm: s390x.ARISBGZ,
37020 reg: regInfo{
37021 inputs: []inputInfo{
37022 {0, 23551},
37023 },
37024 outputs: []outputInfo{
37025 {0, 23551},
37026 },
37027 },
37028 },
37029 {
37030 name: "NEG",
37031 argLen: 1,
37032 clobberFlags: true,
37033 asm: s390x.ANEG,
37034 reg: regInfo{
37035 inputs: []inputInfo{
37036 {0, 23551},
37037 },
37038 outputs: []outputInfo{
37039 {0, 23551},
37040 },
37041 },
37042 },
37043 {
37044 name: "NEGW",
37045 argLen: 1,
37046 clobberFlags: true,
37047 asm: s390x.ANEGW,
37048 reg: regInfo{
37049 inputs: []inputInfo{
37050 {0, 23551},
37051 },
37052 outputs: []outputInfo{
37053 {0, 23551},
37054 },
37055 },
37056 },
37057 {
37058 name: "NOT",
37059 argLen: 1,
37060 resultInArg0: true,
37061 clobberFlags: true,
37062 reg: regInfo{
37063 inputs: []inputInfo{
37064 {0, 23551},
37065 },
37066 outputs: []outputInfo{
37067 {0, 23551},
37068 },
37069 },
37070 },
37071 {
37072 name: "NOTW",
37073 argLen: 1,
37074 resultInArg0: true,
37075 clobberFlags: true,
37076 reg: regInfo{
37077 inputs: []inputInfo{
37078 {0, 23551},
37079 },
37080 outputs: []outputInfo{
37081 {0, 23551},
37082 },
37083 },
37084 },
37085 {
37086 name: "FSQRT",
37087 argLen: 1,
37088 asm: s390x.AFSQRT,
37089 reg: regInfo{
37090 inputs: []inputInfo{
37091 {0, 4294901760},
37092 },
37093 outputs: []outputInfo{
37094 {0, 4294901760},
37095 },
37096 },
37097 },
37098 {
37099 name: "FSQRTS",
37100 argLen: 1,
37101 asm: s390x.AFSQRTS,
37102 reg: regInfo{
37103 inputs: []inputInfo{
37104 {0, 4294901760},
37105 },
37106 outputs: []outputInfo{
37107 {0, 4294901760},
37108 },
37109 },
37110 },
37111 {
37112 name: "LOCGR",
37113 auxType: auxS390XCCMask,
37114 argLen: 3,
37115 resultInArg0: true,
37116 asm: s390x.ALOCGR,
37117 reg: regInfo{
37118 inputs: []inputInfo{
37119 {0, 23551},
37120 {1, 23551},
37121 },
37122 outputs: []outputInfo{
37123 {0, 23551},
37124 },
37125 },
37126 },
37127 {
37128 name: "MOVBreg",
37129 argLen: 1,
37130 asm: s390x.AMOVB,
37131 reg: regInfo{
37132 inputs: []inputInfo{
37133 {0, 56319},
37134 },
37135 outputs: []outputInfo{
37136 {0, 23551},
37137 },
37138 },
37139 },
37140 {
37141 name: "MOVBZreg",
37142 argLen: 1,
37143 asm: s390x.AMOVBZ,
37144 reg: regInfo{
37145 inputs: []inputInfo{
37146 {0, 56319},
37147 },
37148 outputs: []outputInfo{
37149 {0, 23551},
37150 },
37151 },
37152 },
37153 {
37154 name: "MOVHreg",
37155 argLen: 1,
37156 asm: s390x.AMOVH,
37157 reg: regInfo{
37158 inputs: []inputInfo{
37159 {0, 56319},
37160 },
37161 outputs: []outputInfo{
37162 {0, 23551},
37163 },
37164 },
37165 },
37166 {
37167 name: "MOVHZreg",
37168 argLen: 1,
37169 asm: s390x.AMOVHZ,
37170 reg: regInfo{
37171 inputs: []inputInfo{
37172 {0, 56319},
37173 },
37174 outputs: []outputInfo{
37175 {0, 23551},
37176 },
37177 },
37178 },
37179 {
37180 name: "MOVWreg",
37181 argLen: 1,
37182 asm: s390x.AMOVW,
37183 reg: regInfo{
37184 inputs: []inputInfo{
37185 {0, 56319},
37186 },
37187 outputs: []outputInfo{
37188 {0, 23551},
37189 },
37190 },
37191 },
37192 {
37193 name: "MOVWZreg",
37194 argLen: 1,
37195 asm: s390x.AMOVWZ,
37196 reg: regInfo{
37197 inputs: []inputInfo{
37198 {0, 56319},
37199 },
37200 outputs: []outputInfo{
37201 {0, 23551},
37202 },
37203 },
37204 },
37205 {
37206 name: "MOVDconst",
37207 auxType: auxInt64,
37208 argLen: 0,
37209 rematerializeable: true,
37210 asm: s390x.AMOVD,
37211 reg: regInfo{
37212 outputs: []outputInfo{
37213 {0, 23551},
37214 },
37215 },
37216 },
37217 {
37218 name: "LDGR",
37219 argLen: 1,
37220 asm: s390x.ALDGR,
37221 reg: regInfo{
37222 inputs: []inputInfo{
37223 {0, 23551},
37224 },
37225 outputs: []outputInfo{
37226 {0, 4294901760},
37227 },
37228 },
37229 },
37230 {
37231 name: "LGDR",
37232 argLen: 1,
37233 asm: s390x.ALGDR,
37234 reg: regInfo{
37235 inputs: []inputInfo{
37236 {0, 4294901760},
37237 },
37238 outputs: []outputInfo{
37239 {0, 23551},
37240 },
37241 },
37242 },
37243 {
37244 name: "CFDBRA",
37245 argLen: 1,
37246 clobberFlags: true,
37247 asm: s390x.ACFDBRA,
37248 reg: regInfo{
37249 inputs: []inputInfo{
37250 {0, 4294901760},
37251 },
37252 outputs: []outputInfo{
37253 {0, 23551},
37254 },
37255 },
37256 },
37257 {
37258 name: "CGDBRA",
37259 argLen: 1,
37260 clobberFlags: true,
37261 asm: s390x.ACGDBRA,
37262 reg: regInfo{
37263 inputs: []inputInfo{
37264 {0, 4294901760},
37265 },
37266 outputs: []outputInfo{
37267 {0, 23551},
37268 },
37269 },
37270 },
37271 {
37272 name: "CFEBRA",
37273 argLen: 1,
37274 clobberFlags: true,
37275 asm: s390x.ACFEBRA,
37276 reg: regInfo{
37277 inputs: []inputInfo{
37278 {0, 4294901760},
37279 },
37280 outputs: []outputInfo{
37281 {0, 23551},
37282 },
37283 },
37284 },
37285 {
37286 name: "CGEBRA",
37287 argLen: 1,
37288 clobberFlags: true,
37289 asm: s390x.ACGEBRA,
37290 reg: regInfo{
37291 inputs: []inputInfo{
37292 {0, 4294901760},
37293 },
37294 outputs: []outputInfo{
37295 {0, 23551},
37296 },
37297 },
37298 },
37299 {
37300 name: "CEFBRA",
37301 argLen: 1,
37302 clobberFlags: true,
37303 asm: s390x.ACEFBRA,
37304 reg: regInfo{
37305 inputs: []inputInfo{
37306 {0, 23551},
37307 },
37308 outputs: []outputInfo{
37309 {0, 4294901760},
37310 },
37311 },
37312 },
37313 {
37314 name: "CDFBRA",
37315 argLen: 1,
37316 clobberFlags: true,
37317 asm: s390x.ACDFBRA,
37318 reg: regInfo{
37319 inputs: []inputInfo{
37320 {0, 23551},
37321 },
37322 outputs: []outputInfo{
37323 {0, 4294901760},
37324 },
37325 },
37326 },
37327 {
37328 name: "CEGBRA",
37329 argLen: 1,
37330 clobberFlags: true,
37331 asm: s390x.ACEGBRA,
37332 reg: regInfo{
37333 inputs: []inputInfo{
37334 {0, 23551},
37335 },
37336 outputs: []outputInfo{
37337 {0, 4294901760},
37338 },
37339 },
37340 },
37341 {
37342 name: "CDGBRA",
37343 argLen: 1,
37344 clobberFlags: true,
37345 asm: s390x.ACDGBRA,
37346 reg: regInfo{
37347 inputs: []inputInfo{
37348 {0, 23551},
37349 },
37350 outputs: []outputInfo{
37351 {0, 4294901760},
37352 },
37353 },
37354 },
37355 {
37356 name: "CLFEBR",
37357 argLen: 1,
37358 clobberFlags: true,
37359 asm: s390x.ACLFEBR,
37360 reg: regInfo{
37361 inputs: []inputInfo{
37362 {0, 4294901760},
37363 },
37364 outputs: []outputInfo{
37365 {0, 23551},
37366 },
37367 },
37368 },
37369 {
37370 name: "CLFDBR",
37371 argLen: 1,
37372 clobberFlags: true,
37373 asm: s390x.ACLFDBR,
37374 reg: regInfo{
37375 inputs: []inputInfo{
37376 {0, 4294901760},
37377 },
37378 outputs: []outputInfo{
37379 {0, 23551},
37380 },
37381 },
37382 },
37383 {
37384 name: "CLGEBR",
37385 argLen: 1,
37386 clobberFlags: true,
37387 asm: s390x.ACLGEBR,
37388 reg: regInfo{
37389 inputs: []inputInfo{
37390 {0, 4294901760},
37391 },
37392 outputs: []outputInfo{
37393 {0, 23551},
37394 },
37395 },
37396 },
37397 {
37398 name: "CLGDBR",
37399 argLen: 1,
37400 clobberFlags: true,
37401 asm: s390x.ACLGDBR,
37402 reg: regInfo{
37403 inputs: []inputInfo{
37404 {0, 4294901760},
37405 },
37406 outputs: []outputInfo{
37407 {0, 23551},
37408 },
37409 },
37410 },
37411 {
37412 name: "CELFBR",
37413 argLen: 1,
37414 clobberFlags: true,
37415 asm: s390x.ACELFBR,
37416 reg: regInfo{
37417 inputs: []inputInfo{
37418 {0, 23551},
37419 },
37420 outputs: []outputInfo{
37421 {0, 4294901760},
37422 },
37423 },
37424 },
37425 {
37426 name: "CDLFBR",
37427 argLen: 1,
37428 clobberFlags: true,
37429 asm: s390x.ACDLFBR,
37430 reg: regInfo{
37431 inputs: []inputInfo{
37432 {0, 23551},
37433 },
37434 outputs: []outputInfo{
37435 {0, 4294901760},
37436 },
37437 },
37438 },
37439 {
37440 name: "CELGBR",
37441 argLen: 1,
37442 clobberFlags: true,
37443 asm: s390x.ACELGBR,
37444 reg: regInfo{
37445 inputs: []inputInfo{
37446 {0, 23551},
37447 },
37448 outputs: []outputInfo{
37449 {0, 4294901760},
37450 },
37451 },
37452 },
37453 {
37454 name: "CDLGBR",
37455 argLen: 1,
37456 clobberFlags: true,
37457 asm: s390x.ACDLGBR,
37458 reg: regInfo{
37459 inputs: []inputInfo{
37460 {0, 23551},
37461 },
37462 outputs: []outputInfo{
37463 {0, 4294901760},
37464 },
37465 },
37466 },
37467 {
37468 name: "LEDBR",
37469 argLen: 1,
37470 asm: s390x.ALEDBR,
37471 reg: regInfo{
37472 inputs: []inputInfo{
37473 {0, 4294901760},
37474 },
37475 outputs: []outputInfo{
37476 {0, 4294901760},
37477 },
37478 },
37479 },
37480 {
37481 name: "LDEBR",
37482 argLen: 1,
37483 asm: s390x.ALDEBR,
37484 reg: regInfo{
37485 inputs: []inputInfo{
37486 {0, 4294901760},
37487 },
37488 outputs: []outputInfo{
37489 {0, 4294901760},
37490 },
37491 },
37492 },
37493 {
37494 name: "MOVDaddr",
37495 auxType: auxSymOff,
37496 argLen: 1,
37497 rematerializeable: true,
37498 symEffect: SymAddr,
37499 reg: regInfo{
37500 inputs: []inputInfo{
37501 {0, 4295000064},
37502 },
37503 outputs: []outputInfo{
37504 {0, 23551},
37505 },
37506 },
37507 },
37508 {
37509 name: "MOVDaddridx",
37510 auxType: auxSymOff,
37511 argLen: 2,
37512 symEffect: SymAddr,
37513 reg: regInfo{
37514 inputs: []inputInfo{
37515 {0, 4295000064},
37516 {1, 56318},
37517 },
37518 outputs: []outputInfo{
37519 {0, 23551},
37520 },
37521 },
37522 },
37523 {
37524 name: "MOVBZload",
37525 auxType: auxSymOff,
37526 argLen: 2,
37527 faultOnNilArg0: true,
37528 symEffect: SymRead,
37529 asm: s390x.AMOVBZ,
37530 reg: regInfo{
37531 inputs: []inputInfo{
37532 {0, 4295023614},
37533 },
37534 outputs: []outputInfo{
37535 {0, 23551},
37536 },
37537 },
37538 },
37539 {
37540 name: "MOVBload",
37541 auxType: auxSymOff,
37542 argLen: 2,
37543 faultOnNilArg0: true,
37544 symEffect: SymRead,
37545 asm: s390x.AMOVB,
37546 reg: regInfo{
37547 inputs: []inputInfo{
37548 {0, 4295023614},
37549 },
37550 outputs: []outputInfo{
37551 {0, 23551},
37552 },
37553 },
37554 },
37555 {
37556 name: "MOVHZload",
37557 auxType: auxSymOff,
37558 argLen: 2,
37559 faultOnNilArg0: true,
37560 symEffect: SymRead,
37561 asm: s390x.AMOVHZ,
37562 reg: regInfo{
37563 inputs: []inputInfo{
37564 {0, 4295023614},
37565 },
37566 outputs: []outputInfo{
37567 {0, 23551},
37568 },
37569 },
37570 },
37571 {
37572 name: "MOVHload",
37573 auxType: auxSymOff,
37574 argLen: 2,
37575 faultOnNilArg0: true,
37576 symEffect: SymRead,
37577 asm: s390x.AMOVH,
37578 reg: regInfo{
37579 inputs: []inputInfo{
37580 {0, 4295023614},
37581 },
37582 outputs: []outputInfo{
37583 {0, 23551},
37584 },
37585 },
37586 },
37587 {
37588 name: "MOVWZload",
37589 auxType: auxSymOff,
37590 argLen: 2,
37591 faultOnNilArg0: true,
37592 symEffect: SymRead,
37593 asm: s390x.AMOVWZ,
37594 reg: regInfo{
37595 inputs: []inputInfo{
37596 {0, 4295023614},
37597 },
37598 outputs: []outputInfo{
37599 {0, 23551},
37600 },
37601 },
37602 },
37603 {
37604 name: "MOVWload",
37605 auxType: auxSymOff,
37606 argLen: 2,
37607 faultOnNilArg0: true,
37608 symEffect: SymRead,
37609 asm: s390x.AMOVW,
37610 reg: regInfo{
37611 inputs: []inputInfo{
37612 {0, 4295023614},
37613 },
37614 outputs: []outputInfo{
37615 {0, 23551},
37616 },
37617 },
37618 },
37619 {
37620 name: "MOVDload",
37621 auxType: auxSymOff,
37622 argLen: 2,
37623 faultOnNilArg0: true,
37624 symEffect: SymRead,
37625 asm: s390x.AMOVD,
37626 reg: regInfo{
37627 inputs: []inputInfo{
37628 {0, 4295023614},
37629 },
37630 outputs: []outputInfo{
37631 {0, 23551},
37632 },
37633 },
37634 },
37635 {
37636 name: "MOVWBR",
37637 argLen: 1,
37638 asm: s390x.AMOVWBR,
37639 reg: regInfo{
37640 inputs: []inputInfo{
37641 {0, 23551},
37642 },
37643 outputs: []outputInfo{
37644 {0, 23551},
37645 },
37646 },
37647 },
37648 {
37649 name: "MOVDBR",
37650 argLen: 1,
37651 asm: s390x.AMOVDBR,
37652 reg: regInfo{
37653 inputs: []inputInfo{
37654 {0, 23551},
37655 },
37656 outputs: []outputInfo{
37657 {0, 23551},
37658 },
37659 },
37660 },
37661 {
37662 name: "MOVHBRload",
37663 auxType: auxSymOff,
37664 argLen: 2,
37665 faultOnNilArg0: true,
37666 symEffect: SymRead,
37667 asm: s390x.AMOVHBR,
37668 reg: regInfo{
37669 inputs: []inputInfo{
37670 {0, 4295023614},
37671 },
37672 outputs: []outputInfo{
37673 {0, 23551},
37674 },
37675 },
37676 },
37677 {
37678 name: "MOVWBRload",
37679 auxType: auxSymOff,
37680 argLen: 2,
37681 faultOnNilArg0: true,
37682 symEffect: SymRead,
37683 asm: s390x.AMOVWBR,
37684 reg: regInfo{
37685 inputs: []inputInfo{
37686 {0, 4295023614},
37687 },
37688 outputs: []outputInfo{
37689 {0, 23551},
37690 },
37691 },
37692 },
37693 {
37694 name: "MOVDBRload",
37695 auxType: auxSymOff,
37696 argLen: 2,
37697 faultOnNilArg0: true,
37698 symEffect: SymRead,
37699 asm: s390x.AMOVDBR,
37700 reg: regInfo{
37701 inputs: []inputInfo{
37702 {0, 4295023614},
37703 },
37704 outputs: []outputInfo{
37705 {0, 23551},
37706 },
37707 },
37708 },
37709 {
37710 name: "MOVBstore",
37711 auxType: auxSymOff,
37712 argLen: 3,
37713 faultOnNilArg0: true,
37714 symEffect: SymWrite,
37715 asm: s390x.AMOVB,
37716 reg: regInfo{
37717 inputs: []inputInfo{
37718 {0, 4295023614},
37719 {1, 56319},
37720 },
37721 },
37722 },
37723 {
37724 name: "MOVHstore",
37725 auxType: auxSymOff,
37726 argLen: 3,
37727 faultOnNilArg0: true,
37728 symEffect: SymWrite,
37729 asm: s390x.AMOVH,
37730 reg: regInfo{
37731 inputs: []inputInfo{
37732 {0, 4295023614},
37733 {1, 56319},
37734 },
37735 },
37736 },
37737 {
37738 name: "MOVWstore",
37739 auxType: auxSymOff,
37740 argLen: 3,
37741 faultOnNilArg0: true,
37742 symEffect: SymWrite,
37743 asm: s390x.AMOVW,
37744 reg: regInfo{
37745 inputs: []inputInfo{
37746 {0, 4295023614},
37747 {1, 56319},
37748 },
37749 },
37750 },
37751 {
37752 name: "MOVDstore",
37753 auxType: auxSymOff,
37754 argLen: 3,
37755 faultOnNilArg0: true,
37756 symEffect: SymWrite,
37757 asm: s390x.AMOVD,
37758 reg: regInfo{
37759 inputs: []inputInfo{
37760 {0, 4295023614},
37761 {1, 56319},
37762 },
37763 },
37764 },
37765 {
37766 name: "MOVHBRstore",
37767 auxType: auxSymOff,
37768 argLen: 3,
37769 faultOnNilArg0: true,
37770 symEffect: SymWrite,
37771 asm: s390x.AMOVHBR,
37772 reg: regInfo{
37773 inputs: []inputInfo{
37774 {0, 56318},
37775 {1, 56319},
37776 },
37777 },
37778 },
37779 {
37780 name: "MOVWBRstore",
37781 auxType: auxSymOff,
37782 argLen: 3,
37783 faultOnNilArg0: true,
37784 symEffect: SymWrite,
37785 asm: s390x.AMOVWBR,
37786 reg: regInfo{
37787 inputs: []inputInfo{
37788 {0, 56318},
37789 {1, 56319},
37790 },
37791 },
37792 },
37793 {
37794 name: "MOVDBRstore",
37795 auxType: auxSymOff,
37796 argLen: 3,
37797 faultOnNilArg0: true,
37798 symEffect: SymWrite,
37799 asm: s390x.AMOVDBR,
37800 reg: regInfo{
37801 inputs: []inputInfo{
37802 {0, 56318},
37803 {1, 56319},
37804 },
37805 },
37806 },
37807 {
37808 name: "MVC",
37809 auxType: auxSymValAndOff,
37810 argLen: 3,
37811 clobberFlags: true,
37812 faultOnNilArg0: true,
37813 faultOnNilArg1: true,
37814 symEffect: SymNone,
37815 asm: s390x.AMVC,
37816 reg: regInfo{
37817 inputs: []inputInfo{
37818 {0, 56318},
37819 {1, 56318},
37820 },
37821 },
37822 },
37823 {
37824 name: "MOVBZloadidx",
37825 auxType: auxSymOff,
37826 argLen: 3,
37827 commutative: true,
37828 symEffect: SymRead,
37829 asm: s390x.AMOVBZ,
37830 reg: regInfo{
37831 inputs: []inputInfo{
37832 {1, 56318},
37833 {0, 4295023614},
37834 },
37835 outputs: []outputInfo{
37836 {0, 23551},
37837 },
37838 },
37839 },
37840 {
37841 name: "MOVBloadidx",
37842 auxType: auxSymOff,
37843 argLen: 3,
37844 commutative: true,
37845 symEffect: SymRead,
37846 asm: s390x.AMOVB,
37847 reg: regInfo{
37848 inputs: []inputInfo{
37849 {1, 56318},
37850 {0, 4295023614},
37851 },
37852 outputs: []outputInfo{
37853 {0, 23551},
37854 },
37855 },
37856 },
37857 {
37858 name: "MOVHZloadidx",
37859 auxType: auxSymOff,
37860 argLen: 3,
37861 commutative: true,
37862 symEffect: SymRead,
37863 asm: s390x.AMOVHZ,
37864 reg: regInfo{
37865 inputs: []inputInfo{
37866 {1, 56318},
37867 {0, 4295023614},
37868 },
37869 outputs: []outputInfo{
37870 {0, 23551},
37871 },
37872 },
37873 },
37874 {
37875 name: "MOVHloadidx",
37876 auxType: auxSymOff,
37877 argLen: 3,
37878 commutative: true,
37879 symEffect: SymRead,
37880 asm: s390x.AMOVH,
37881 reg: regInfo{
37882 inputs: []inputInfo{
37883 {1, 56318},
37884 {0, 4295023614},
37885 },
37886 outputs: []outputInfo{
37887 {0, 23551},
37888 },
37889 },
37890 },
37891 {
37892 name: "MOVWZloadidx",
37893 auxType: auxSymOff,
37894 argLen: 3,
37895 commutative: true,
37896 symEffect: SymRead,
37897 asm: s390x.AMOVWZ,
37898 reg: regInfo{
37899 inputs: []inputInfo{
37900 {1, 56318},
37901 {0, 4295023614},
37902 },
37903 outputs: []outputInfo{
37904 {0, 23551},
37905 },
37906 },
37907 },
37908 {
37909 name: "MOVWloadidx",
37910 auxType: auxSymOff,
37911 argLen: 3,
37912 commutative: true,
37913 symEffect: SymRead,
37914 asm: s390x.AMOVW,
37915 reg: regInfo{
37916 inputs: []inputInfo{
37917 {1, 56318},
37918 {0, 4295023614},
37919 },
37920 outputs: []outputInfo{
37921 {0, 23551},
37922 },
37923 },
37924 },
37925 {
37926 name: "MOVDloadidx",
37927 auxType: auxSymOff,
37928 argLen: 3,
37929 commutative: true,
37930 symEffect: SymRead,
37931 asm: s390x.AMOVD,
37932 reg: regInfo{
37933 inputs: []inputInfo{
37934 {1, 56318},
37935 {0, 4295023614},
37936 },
37937 outputs: []outputInfo{
37938 {0, 23551},
37939 },
37940 },
37941 },
37942 {
37943 name: "MOVHBRloadidx",
37944 auxType: auxSymOff,
37945 argLen: 3,
37946 commutative: true,
37947 symEffect: SymRead,
37948 asm: s390x.AMOVHBR,
37949 reg: regInfo{
37950 inputs: []inputInfo{
37951 {1, 56318},
37952 {0, 4295023614},
37953 },
37954 outputs: []outputInfo{
37955 {0, 23551},
37956 },
37957 },
37958 },
37959 {
37960 name: "MOVWBRloadidx",
37961 auxType: auxSymOff,
37962 argLen: 3,
37963 commutative: true,
37964 symEffect: SymRead,
37965 asm: s390x.AMOVWBR,
37966 reg: regInfo{
37967 inputs: []inputInfo{
37968 {1, 56318},
37969 {0, 4295023614},
37970 },
37971 outputs: []outputInfo{
37972 {0, 23551},
37973 },
37974 },
37975 },
37976 {
37977 name: "MOVDBRloadidx",
37978 auxType: auxSymOff,
37979 argLen: 3,
37980 commutative: true,
37981 symEffect: SymRead,
37982 asm: s390x.AMOVDBR,
37983 reg: regInfo{
37984 inputs: []inputInfo{
37985 {1, 56318},
37986 {0, 4295023614},
37987 },
37988 outputs: []outputInfo{
37989 {0, 23551},
37990 },
37991 },
37992 },
37993 {
37994 name: "MOVBstoreidx",
37995 auxType: auxSymOff,
37996 argLen: 4,
37997 commutative: true,
37998 symEffect: SymWrite,
37999 asm: s390x.AMOVB,
38000 reg: regInfo{
38001 inputs: []inputInfo{
38002 {0, 56318},
38003 {1, 56318},
38004 {2, 56319},
38005 },
38006 },
38007 },
38008 {
38009 name: "MOVHstoreidx",
38010 auxType: auxSymOff,
38011 argLen: 4,
38012 commutative: true,
38013 symEffect: SymWrite,
38014 asm: s390x.AMOVH,
38015 reg: regInfo{
38016 inputs: []inputInfo{
38017 {0, 56318},
38018 {1, 56318},
38019 {2, 56319},
38020 },
38021 },
38022 },
38023 {
38024 name: "MOVWstoreidx",
38025 auxType: auxSymOff,
38026 argLen: 4,
38027 commutative: true,
38028 symEffect: SymWrite,
38029 asm: s390x.AMOVW,
38030 reg: regInfo{
38031 inputs: []inputInfo{
38032 {0, 56318},
38033 {1, 56318},
38034 {2, 56319},
38035 },
38036 },
38037 },
38038 {
38039 name: "MOVDstoreidx",
38040 auxType: auxSymOff,
38041 argLen: 4,
38042 commutative: true,
38043 symEffect: SymWrite,
38044 asm: s390x.AMOVD,
38045 reg: regInfo{
38046 inputs: []inputInfo{
38047 {0, 56318},
38048 {1, 56318},
38049 {2, 56319},
38050 },
38051 },
38052 },
38053 {
38054 name: "MOVHBRstoreidx",
38055 auxType: auxSymOff,
38056 argLen: 4,
38057 commutative: true,
38058 symEffect: SymWrite,
38059 asm: s390x.AMOVHBR,
38060 reg: regInfo{
38061 inputs: []inputInfo{
38062 {0, 56318},
38063 {1, 56318},
38064 {2, 56319},
38065 },
38066 },
38067 },
38068 {
38069 name: "MOVWBRstoreidx",
38070 auxType: auxSymOff,
38071 argLen: 4,
38072 commutative: true,
38073 symEffect: SymWrite,
38074 asm: s390x.AMOVWBR,
38075 reg: regInfo{
38076 inputs: []inputInfo{
38077 {0, 56318},
38078 {1, 56318},
38079 {2, 56319},
38080 },
38081 },
38082 },
38083 {
38084 name: "MOVDBRstoreidx",
38085 auxType: auxSymOff,
38086 argLen: 4,
38087 commutative: true,
38088 symEffect: SymWrite,
38089 asm: s390x.AMOVDBR,
38090 reg: regInfo{
38091 inputs: []inputInfo{
38092 {0, 56318},
38093 {1, 56318},
38094 {2, 56319},
38095 },
38096 },
38097 },
38098 {
38099 name: "MOVBstoreconst",
38100 auxType: auxSymValAndOff,
38101 argLen: 2,
38102 faultOnNilArg0: true,
38103 symEffect: SymWrite,
38104 asm: s390x.AMOVB,
38105 reg: regInfo{
38106 inputs: []inputInfo{
38107 {0, 4295023614},
38108 },
38109 },
38110 },
38111 {
38112 name: "MOVHstoreconst",
38113 auxType: auxSymValAndOff,
38114 argLen: 2,
38115 faultOnNilArg0: true,
38116 symEffect: SymWrite,
38117 asm: s390x.AMOVH,
38118 reg: regInfo{
38119 inputs: []inputInfo{
38120 {0, 4295023614},
38121 },
38122 },
38123 },
38124 {
38125 name: "MOVWstoreconst",
38126 auxType: auxSymValAndOff,
38127 argLen: 2,
38128 faultOnNilArg0: true,
38129 symEffect: SymWrite,
38130 asm: s390x.AMOVW,
38131 reg: regInfo{
38132 inputs: []inputInfo{
38133 {0, 4295023614},
38134 },
38135 },
38136 },
38137 {
38138 name: "MOVDstoreconst",
38139 auxType: auxSymValAndOff,
38140 argLen: 2,
38141 faultOnNilArg0: true,
38142 symEffect: SymWrite,
38143 asm: s390x.AMOVD,
38144 reg: regInfo{
38145 inputs: []inputInfo{
38146 {0, 4295023614},
38147 },
38148 },
38149 },
38150 {
38151 name: "CLEAR",
38152 auxType: auxSymValAndOff,
38153 argLen: 2,
38154 clobberFlags: true,
38155 faultOnNilArg0: true,
38156 symEffect: SymWrite,
38157 asm: s390x.ACLEAR,
38158 reg: regInfo{
38159 inputs: []inputInfo{
38160 {0, 23550},
38161 },
38162 },
38163 },
38164 {
38165 name: "CALLstatic",
38166 auxType: auxCallOff,
38167 argLen: 1,
38168 clobberFlags: true,
38169 call: true,
38170 reg: regInfo{
38171 clobbers: 4294933503,
38172 },
38173 },
38174 {
38175 name: "CALLtail",
38176 auxType: auxCallOff,
38177 argLen: 1,
38178 clobberFlags: true,
38179 call: true,
38180 tailCall: true,
38181 reg: regInfo{
38182 clobbers: 4294933503,
38183 },
38184 },
38185 {
38186 name: "CALLclosure",
38187 auxType: auxCallOff,
38188 argLen: 3,
38189 clobberFlags: true,
38190 call: true,
38191 reg: regInfo{
38192 inputs: []inputInfo{
38193 {1, 4096},
38194 {0, 56318},
38195 },
38196 clobbers: 4294933503,
38197 },
38198 },
38199 {
38200 name: "CALLinter",
38201 auxType: auxCallOff,
38202 argLen: 2,
38203 clobberFlags: true,
38204 call: true,
38205 reg: regInfo{
38206 inputs: []inputInfo{
38207 {0, 23550},
38208 },
38209 clobbers: 4294933503,
38210 },
38211 },
38212 {
38213 name: "InvertFlags",
38214 argLen: 1,
38215 reg: regInfo{},
38216 },
38217 {
38218 name: "LoweredGetG",
38219 argLen: 1,
38220 reg: regInfo{
38221 outputs: []outputInfo{
38222 {0, 23551},
38223 },
38224 },
38225 },
38226 {
38227 name: "LoweredGetClosurePtr",
38228 argLen: 0,
38229 zeroWidth: true,
38230 reg: regInfo{
38231 outputs: []outputInfo{
38232 {0, 4096},
38233 },
38234 },
38235 },
38236 {
38237 name: "LoweredGetCallerSP",
38238 argLen: 1,
38239 rematerializeable: true,
38240 reg: regInfo{
38241 outputs: []outputInfo{
38242 {0, 23551},
38243 },
38244 },
38245 },
38246 {
38247 name: "LoweredGetCallerPC",
38248 argLen: 0,
38249 rematerializeable: true,
38250 reg: regInfo{
38251 outputs: []outputInfo{
38252 {0, 23551},
38253 },
38254 },
38255 },
38256 {
38257 name: "LoweredNilCheck",
38258 argLen: 2,
38259 clobberFlags: true,
38260 nilCheck: true,
38261 faultOnNilArg0: true,
38262 reg: regInfo{
38263 inputs: []inputInfo{
38264 {0, 56318},
38265 },
38266 },
38267 },
38268 {
38269 name: "LoweredRound32F",
38270 argLen: 1,
38271 resultInArg0: true,
38272 zeroWidth: true,
38273 reg: regInfo{
38274 inputs: []inputInfo{
38275 {0, 4294901760},
38276 },
38277 outputs: []outputInfo{
38278 {0, 4294901760},
38279 },
38280 },
38281 },
38282 {
38283 name: "LoweredRound64F",
38284 argLen: 1,
38285 resultInArg0: true,
38286 zeroWidth: true,
38287 reg: regInfo{
38288 inputs: []inputInfo{
38289 {0, 4294901760},
38290 },
38291 outputs: []outputInfo{
38292 {0, 4294901760},
38293 },
38294 },
38295 },
38296 {
38297 name: "LoweredWB",
38298 auxType: auxInt64,
38299 argLen: 1,
38300 clobberFlags: true,
38301 reg: regInfo{
38302 clobbers: 4294918146,
38303 outputs: []outputInfo{
38304 {0, 512},
38305 },
38306 },
38307 },
38308 {
38309 name: "LoweredPanicBoundsA",
38310 auxType: auxInt64,
38311 argLen: 3,
38312 call: true,
38313 reg: regInfo{
38314 inputs: []inputInfo{
38315 {0, 4},
38316 {1, 8},
38317 },
38318 },
38319 },
38320 {
38321 name: "LoweredPanicBoundsB",
38322 auxType: auxInt64,
38323 argLen: 3,
38324 call: true,
38325 reg: regInfo{
38326 inputs: []inputInfo{
38327 {0, 2},
38328 {1, 4},
38329 },
38330 },
38331 },
38332 {
38333 name: "LoweredPanicBoundsC",
38334 auxType: auxInt64,
38335 argLen: 3,
38336 call: true,
38337 reg: regInfo{
38338 inputs: []inputInfo{
38339 {0, 1},
38340 {1, 2},
38341 },
38342 },
38343 },
38344 {
38345 name: "FlagEQ",
38346 argLen: 0,
38347 reg: regInfo{},
38348 },
38349 {
38350 name: "FlagLT",
38351 argLen: 0,
38352 reg: regInfo{},
38353 },
38354 {
38355 name: "FlagGT",
38356 argLen: 0,
38357 reg: regInfo{},
38358 },
38359 {
38360 name: "FlagOV",
38361 argLen: 0,
38362 reg: regInfo{},
38363 },
38364 {
38365 name: "SYNC",
38366 argLen: 1,
38367 asm: s390x.ASYNC,
38368 reg: regInfo{},
38369 },
38370 {
38371 name: "MOVBZatomicload",
38372 auxType: auxSymOff,
38373 argLen: 2,
38374 faultOnNilArg0: true,
38375 symEffect: SymRead,
38376 asm: s390x.AMOVBZ,
38377 reg: regInfo{
38378 inputs: []inputInfo{
38379 {0, 4295023614},
38380 },
38381 outputs: []outputInfo{
38382 {0, 23551},
38383 },
38384 },
38385 },
38386 {
38387 name: "MOVWZatomicload",
38388 auxType: auxSymOff,
38389 argLen: 2,
38390 faultOnNilArg0: true,
38391 symEffect: SymRead,
38392 asm: s390x.AMOVWZ,
38393 reg: regInfo{
38394 inputs: []inputInfo{
38395 {0, 4295023614},
38396 },
38397 outputs: []outputInfo{
38398 {0, 23551},
38399 },
38400 },
38401 },
38402 {
38403 name: "MOVDatomicload",
38404 auxType: auxSymOff,
38405 argLen: 2,
38406 faultOnNilArg0: true,
38407 symEffect: SymRead,
38408 asm: s390x.AMOVD,
38409 reg: regInfo{
38410 inputs: []inputInfo{
38411 {0, 4295023614},
38412 },
38413 outputs: []outputInfo{
38414 {0, 23551},
38415 },
38416 },
38417 },
38418 {
38419 name: "MOVBatomicstore",
38420 auxType: auxSymOff,
38421 argLen: 3,
38422 clobberFlags: true,
38423 faultOnNilArg0: true,
38424 hasSideEffects: true,
38425 symEffect: SymWrite,
38426 asm: s390x.AMOVB,
38427 reg: regInfo{
38428 inputs: []inputInfo{
38429 {0, 4295023614},
38430 {1, 56319},
38431 },
38432 },
38433 },
38434 {
38435 name: "MOVWatomicstore",
38436 auxType: auxSymOff,
38437 argLen: 3,
38438 clobberFlags: true,
38439 faultOnNilArg0: true,
38440 hasSideEffects: true,
38441 symEffect: SymWrite,
38442 asm: s390x.AMOVW,
38443 reg: regInfo{
38444 inputs: []inputInfo{
38445 {0, 4295023614},
38446 {1, 56319},
38447 },
38448 },
38449 },
38450 {
38451 name: "MOVDatomicstore",
38452 auxType: auxSymOff,
38453 argLen: 3,
38454 clobberFlags: true,
38455 faultOnNilArg0: true,
38456 hasSideEffects: true,
38457 symEffect: SymWrite,
38458 asm: s390x.AMOVD,
38459 reg: regInfo{
38460 inputs: []inputInfo{
38461 {0, 4295023614},
38462 {1, 56319},
38463 },
38464 },
38465 },
38466 {
38467 name: "LAA",
38468 auxType: auxSymOff,
38469 argLen: 3,
38470 clobberFlags: true,
38471 faultOnNilArg0: true,
38472 hasSideEffects: true,
38473 symEffect: SymRdWr,
38474 asm: s390x.ALAA,
38475 reg: regInfo{
38476 inputs: []inputInfo{
38477 {0, 4295023614},
38478 {1, 56319},
38479 },
38480 outputs: []outputInfo{
38481 {0, 23551},
38482 },
38483 },
38484 },
38485 {
38486 name: "LAAG",
38487 auxType: auxSymOff,
38488 argLen: 3,
38489 clobberFlags: true,
38490 faultOnNilArg0: true,
38491 hasSideEffects: true,
38492 symEffect: SymRdWr,
38493 asm: s390x.ALAAG,
38494 reg: regInfo{
38495 inputs: []inputInfo{
38496 {0, 4295023614},
38497 {1, 56319},
38498 },
38499 outputs: []outputInfo{
38500 {0, 23551},
38501 },
38502 },
38503 },
38504 {
38505 name: "AddTupleFirst32",
38506 argLen: 2,
38507 reg: regInfo{},
38508 },
38509 {
38510 name: "AddTupleFirst64",
38511 argLen: 2,
38512 reg: regInfo{},
38513 },
38514 {
38515 name: "LAN",
38516 argLen: 3,
38517 clobberFlags: true,
38518 hasSideEffects: true,
38519 asm: s390x.ALAN,
38520 reg: regInfo{
38521 inputs: []inputInfo{
38522 {0, 4295023614},
38523 {1, 56319},
38524 },
38525 },
38526 },
38527 {
38528 name: "LANfloor",
38529 argLen: 3,
38530 clobberFlags: true,
38531 hasSideEffects: true,
38532 asm: s390x.ALAN,
38533 reg: regInfo{
38534 inputs: []inputInfo{
38535 {0, 2},
38536 {1, 56319},
38537 },
38538 clobbers: 2,
38539 },
38540 },
38541 {
38542 name: "LAO",
38543 argLen: 3,
38544 clobberFlags: true,
38545 hasSideEffects: true,
38546 asm: s390x.ALAO,
38547 reg: regInfo{
38548 inputs: []inputInfo{
38549 {0, 4295023614},
38550 {1, 56319},
38551 },
38552 },
38553 },
38554 {
38555 name: "LAOfloor",
38556 argLen: 3,
38557 clobberFlags: true,
38558 hasSideEffects: true,
38559 asm: s390x.ALAO,
38560 reg: regInfo{
38561 inputs: []inputInfo{
38562 {0, 2},
38563 {1, 56319},
38564 },
38565 clobbers: 2,
38566 },
38567 },
38568 {
38569 name: "LoweredAtomicCas32",
38570 auxType: auxSymOff,
38571 argLen: 4,
38572 clobberFlags: true,
38573 faultOnNilArg0: true,
38574 hasSideEffects: true,
38575 symEffect: SymRdWr,
38576 asm: s390x.ACS,
38577 reg: regInfo{
38578 inputs: []inputInfo{
38579 {1, 1},
38580 {0, 56318},
38581 {2, 56319},
38582 },
38583 clobbers: 1,
38584 outputs: []outputInfo{
38585 {1, 0},
38586 {0, 23551},
38587 },
38588 },
38589 },
38590 {
38591 name: "LoweredAtomicCas64",
38592 auxType: auxSymOff,
38593 argLen: 4,
38594 clobberFlags: true,
38595 faultOnNilArg0: true,
38596 hasSideEffects: true,
38597 symEffect: SymRdWr,
38598 asm: s390x.ACSG,
38599 reg: regInfo{
38600 inputs: []inputInfo{
38601 {1, 1},
38602 {0, 56318},
38603 {2, 56319},
38604 },
38605 clobbers: 1,
38606 outputs: []outputInfo{
38607 {1, 0},
38608 {0, 23551},
38609 },
38610 },
38611 },
38612 {
38613 name: "LoweredAtomicExchange32",
38614 auxType: auxSymOff,
38615 argLen: 3,
38616 clobberFlags: true,
38617 faultOnNilArg0: true,
38618 hasSideEffects: true,
38619 symEffect: SymRdWr,
38620 asm: s390x.ACS,
38621 reg: regInfo{
38622 inputs: []inputInfo{
38623 {0, 56318},
38624 {1, 56318},
38625 },
38626 outputs: []outputInfo{
38627 {1, 0},
38628 {0, 1},
38629 },
38630 },
38631 },
38632 {
38633 name: "LoweredAtomicExchange64",
38634 auxType: auxSymOff,
38635 argLen: 3,
38636 clobberFlags: true,
38637 faultOnNilArg0: true,
38638 hasSideEffects: true,
38639 symEffect: SymRdWr,
38640 asm: s390x.ACSG,
38641 reg: regInfo{
38642 inputs: []inputInfo{
38643 {0, 56318},
38644 {1, 56318},
38645 },
38646 outputs: []outputInfo{
38647 {1, 0},
38648 {0, 1},
38649 },
38650 },
38651 },
38652 {
38653 name: "FLOGR",
38654 argLen: 1,
38655 clobberFlags: true,
38656 asm: s390x.AFLOGR,
38657 reg: regInfo{
38658 inputs: []inputInfo{
38659 {0, 23551},
38660 },
38661 clobbers: 2,
38662 outputs: []outputInfo{
38663 {0, 1},
38664 },
38665 },
38666 },
38667 {
38668 name: "POPCNT",
38669 argLen: 1,
38670 clobberFlags: true,
38671 asm: s390x.APOPCNT,
38672 reg: regInfo{
38673 inputs: []inputInfo{
38674 {0, 23551},
38675 },
38676 outputs: []outputInfo{
38677 {0, 23551},
38678 },
38679 },
38680 },
38681 {
38682 name: "MLGR",
38683 argLen: 2,
38684 asm: s390x.AMLGR,
38685 reg: regInfo{
38686 inputs: []inputInfo{
38687 {1, 8},
38688 {0, 23551},
38689 },
38690 outputs: []outputInfo{
38691 {0, 4},
38692 {1, 8},
38693 },
38694 },
38695 },
38696 {
38697 name: "SumBytes2",
38698 argLen: 1,
38699 reg: regInfo{},
38700 },
38701 {
38702 name: "SumBytes4",
38703 argLen: 1,
38704 reg: regInfo{},
38705 },
38706 {
38707 name: "SumBytes8",
38708 argLen: 1,
38709 reg: regInfo{},
38710 },
38711 {
38712 name: "STMG2",
38713 auxType: auxSymOff,
38714 argLen: 4,
38715 clobberFlags: true,
38716 faultOnNilArg0: true,
38717 symEffect: SymWrite,
38718 asm: s390x.ASTMG,
38719 reg: regInfo{
38720 inputs: []inputInfo{
38721 {1, 2},
38722 {2, 4},
38723 {0, 56318},
38724 },
38725 },
38726 },
38727 {
38728 name: "STMG3",
38729 auxType: auxSymOff,
38730 argLen: 5,
38731 clobberFlags: true,
38732 faultOnNilArg0: true,
38733 symEffect: SymWrite,
38734 asm: s390x.ASTMG,
38735 reg: regInfo{
38736 inputs: []inputInfo{
38737 {1, 2},
38738 {2, 4},
38739 {3, 8},
38740 {0, 56318},
38741 },
38742 },
38743 },
38744 {
38745 name: "STMG4",
38746 auxType: auxSymOff,
38747 argLen: 6,
38748 clobberFlags: true,
38749 faultOnNilArg0: true,
38750 symEffect: SymWrite,
38751 asm: s390x.ASTMG,
38752 reg: regInfo{
38753 inputs: []inputInfo{
38754 {1, 2},
38755 {2, 4},
38756 {3, 8},
38757 {4, 16},
38758 {0, 56318},
38759 },
38760 },
38761 },
38762 {
38763 name: "STM2",
38764 auxType: auxSymOff,
38765 argLen: 4,
38766 clobberFlags: true,
38767 faultOnNilArg0: true,
38768 symEffect: SymWrite,
38769 asm: s390x.ASTMY,
38770 reg: regInfo{
38771 inputs: []inputInfo{
38772 {1, 2},
38773 {2, 4},
38774 {0, 56318},
38775 },
38776 },
38777 },
38778 {
38779 name: "STM3",
38780 auxType: auxSymOff,
38781 argLen: 5,
38782 clobberFlags: true,
38783 faultOnNilArg0: true,
38784 symEffect: SymWrite,
38785 asm: s390x.ASTMY,
38786 reg: regInfo{
38787 inputs: []inputInfo{
38788 {1, 2},
38789 {2, 4},
38790 {3, 8},
38791 {0, 56318},
38792 },
38793 },
38794 },
38795 {
38796 name: "STM4",
38797 auxType: auxSymOff,
38798 argLen: 6,
38799 clobberFlags: true,
38800 faultOnNilArg0: true,
38801 symEffect: SymWrite,
38802 asm: s390x.ASTMY,
38803 reg: regInfo{
38804 inputs: []inputInfo{
38805 {1, 2},
38806 {2, 4},
38807 {3, 8},
38808 {4, 16},
38809 {0, 56318},
38810 },
38811 },
38812 },
38813 {
38814 name: "LoweredMove",
38815 auxType: auxInt64,
38816 argLen: 4,
38817 clobberFlags: true,
38818 faultOnNilArg0: true,
38819 faultOnNilArg1: true,
38820 reg: regInfo{
38821 inputs: []inputInfo{
38822 {0, 2},
38823 {1, 4},
38824 {2, 56319},
38825 },
38826 clobbers: 6,
38827 },
38828 },
38829 {
38830 name: "LoweredZero",
38831 auxType: auxInt64,
38832 argLen: 3,
38833 clobberFlags: true,
38834 faultOnNilArg0: true,
38835 reg: regInfo{
38836 inputs: []inputInfo{
38837 {0, 2},
38838 {1, 56319},
38839 },
38840 clobbers: 2,
38841 },
38842 },
38843
38844 {
38845 name: "LoweredStaticCall",
38846 auxType: auxCallOff,
38847 argLen: 1,
38848 call: true,
38849 reg: regInfo{
38850 clobbers: 844424930131967,
38851 },
38852 },
38853 {
38854 name: "LoweredTailCall",
38855 auxType: auxCallOff,
38856 argLen: 1,
38857 call: true,
38858 tailCall: true,
38859 reg: regInfo{
38860 clobbers: 844424930131967,
38861 },
38862 },
38863 {
38864 name: "LoweredClosureCall",
38865 auxType: auxCallOff,
38866 argLen: 3,
38867 call: true,
38868 reg: regInfo{
38869 inputs: []inputInfo{
38870 {0, 65535},
38871 {1, 65535},
38872 },
38873 clobbers: 844424930131967,
38874 },
38875 },
38876 {
38877 name: "LoweredInterCall",
38878 auxType: auxCallOff,
38879 argLen: 2,
38880 call: true,
38881 reg: regInfo{
38882 inputs: []inputInfo{
38883 {0, 65535},
38884 },
38885 clobbers: 844424930131967,
38886 },
38887 },
38888 {
38889 name: "LoweredAddr",
38890 auxType: auxSymOff,
38891 argLen: 1,
38892 rematerializeable: true,
38893 symEffect: SymAddr,
38894 reg: regInfo{
38895 inputs: []inputInfo{
38896 {0, 281474976776191},
38897 },
38898 outputs: []outputInfo{
38899 {0, 65535},
38900 },
38901 },
38902 },
38903 {
38904 name: "LoweredMove",
38905 auxType: auxInt64,
38906 argLen: 3,
38907 reg: regInfo{
38908 inputs: []inputInfo{
38909 {0, 65535},
38910 {1, 65535},
38911 },
38912 },
38913 },
38914 {
38915 name: "LoweredZero",
38916 auxType: auxInt64,
38917 argLen: 2,
38918 reg: regInfo{
38919 inputs: []inputInfo{
38920 {0, 65535},
38921 },
38922 },
38923 },
38924 {
38925 name: "LoweredGetClosurePtr",
38926 argLen: 0,
38927 reg: regInfo{
38928 outputs: []outputInfo{
38929 {0, 65535},
38930 },
38931 },
38932 },
38933 {
38934 name: "LoweredGetCallerPC",
38935 argLen: 0,
38936 rematerializeable: true,
38937 reg: regInfo{
38938 outputs: []outputInfo{
38939 {0, 65535},
38940 },
38941 },
38942 },
38943 {
38944 name: "LoweredGetCallerSP",
38945 argLen: 1,
38946 rematerializeable: true,
38947 reg: regInfo{
38948 outputs: []outputInfo{
38949 {0, 65535},
38950 },
38951 },
38952 },
38953 {
38954 name: "LoweredNilCheck",
38955 argLen: 2,
38956 nilCheck: true,
38957 faultOnNilArg0: true,
38958 reg: regInfo{
38959 inputs: []inputInfo{
38960 {0, 65535},
38961 },
38962 },
38963 },
38964 {
38965 name: "LoweredWB",
38966 auxType: auxInt64,
38967 argLen: 1,
38968 reg: regInfo{
38969 clobbers: 844424930131967,
38970 outputs: []outputInfo{
38971 {0, 65535},
38972 },
38973 },
38974 },
38975 {
38976 name: "LoweredConvert",
38977 argLen: 2,
38978 reg: regInfo{
38979 inputs: []inputInfo{
38980 {0, 65535},
38981 },
38982 outputs: []outputInfo{
38983 {0, 65535},
38984 },
38985 },
38986 },
38987 {
38988 name: "Select",
38989 argLen: 3,
38990 asm: wasm.ASelect,
38991 reg: regInfo{
38992 inputs: []inputInfo{
38993 {0, 281474976776191},
38994 {1, 281474976776191},
38995 {2, 281474976776191},
38996 },
38997 outputs: []outputInfo{
38998 {0, 65535},
38999 },
39000 },
39001 },
39002 {
39003 name: "I64Load8U",
39004 auxType: auxInt64,
39005 argLen: 2,
39006 asm: wasm.AI64Load8U,
39007 reg: regInfo{
39008 inputs: []inputInfo{
39009 {0, 1407374883618815},
39010 },
39011 outputs: []outputInfo{
39012 {0, 65535},
39013 },
39014 },
39015 },
39016 {
39017 name: "I64Load8S",
39018 auxType: auxInt64,
39019 argLen: 2,
39020 asm: wasm.AI64Load8S,
39021 reg: regInfo{
39022 inputs: []inputInfo{
39023 {0, 1407374883618815},
39024 },
39025 outputs: []outputInfo{
39026 {0, 65535},
39027 },
39028 },
39029 },
39030 {
39031 name: "I64Load16U",
39032 auxType: auxInt64,
39033 argLen: 2,
39034 asm: wasm.AI64Load16U,
39035 reg: regInfo{
39036 inputs: []inputInfo{
39037 {0, 1407374883618815},
39038 },
39039 outputs: []outputInfo{
39040 {0, 65535},
39041 },
39042 },
39043 },
39044 {
39045 name: "I64Load16S",
39046 auxType: auxInt64,
39047 argLen: 2,
39048 asm: wasm.AI64Load16S,
39049 reg: regInfo{
39050 inputs: []inputInfo{
39051 {0, 1407374883618815},
39052 },
39053 outputs: []outputInfo{
39054 {0, 65535},
39055 },
39056 },
39057 },
39058 {
39059 name: "I64Load32U",
39060 auxType: auxInt64,
39061 argLen: 2,
39062 asm: wasm.AI64Load32U,
39063 reg: regInfo{
39064 inputs: []inputInfo{
39065 {0, 1407374883618815},
39066 },
39067 outputs: []outputInfo{
39068 {0, 65535},
39069 },
39070 },
39071 },
39072 {
39073 name: "I64Load32S",
39074 auxType: auxInt64,
39075 argLen: 2,
39076 asm: wasm.AI64Load32S,
39077 reg: regInfo{
39078 inputs: []inputInfo{
39079 {0, 1407374883618815},
39080 },
39081 outputs: []outputInfo{
39082 {0, 65535},
39083 },
39084 },
39085 },
39086 {
39087 name: "I64Load",
39088 auxType: auxInt64,
39089 argLen: 2,
39090 asm: wasm.AI64Load,
39091 reg: regInfo{
39092 inputs: []inputInfo{
39093 {0, 1407374883618815},
39094 },
39095 outputs: []outputInfo{
39096 {0, 65535},
39097 },
39098 },
39099 },
39100 {
39101 name: "I64Store8",
39102 auxType: auxInt64,
39103 argLen: 3,
39104 asm: wasm.AI64Store8,
39105 reg: regInfo{
39106 inputs: []inputInfo{
39107 {1, 281474976776191},
39108 {0, 1407374883618815},
39109 },
39110 },
39111 },
39112 {
39113 name: "I64Store16",
39114 auxType: auxInt64,
39115 argLen: 3,
39116 asm: wasm.AI64Store16,
39117 reg: regInfo{
39118 inputs: []inputInfo{
39119 {1, 281474976776191},
39120 {0, 1407374883618815},
39121 },
39122 },
39123 },
39124 {
39125 name: "I64Store32",
39126 auxType: auxInt64,
39127 argLen: 3,
39128 asm: wasm.AI64Store32,
39129 reg: regInfo{
39130 inputs: []inputInfo{
39131 {1, 281474976776191},
39132 {0, 1407374883618815},
39133 },
39134 },
39135 },
39136 {
39137 name: "I64Store",
39138 auxType: auxInt64,
39139 argLen: 3,
39140 asm: wasm.AI64Store,
39141 reg: regInfo{
39142 inputs: []inputInfo{
39143 {1, 281474976776191},
39144 {0, 1407374883618815},
39145 },
39146 },
39147 },
39148 {
39149 name: "F32Load",
39150 auxType: auxInt64,
39151 argLen: 2,
39152 asm: wasm.AF32Load,
39153 reg: regInfo{
39154 inputs: []inputInfo{
39155 {0, 1407374883618815},
39156 },
39157 outputs: []outputInfo{
39158 {0, 4294901760},
39159 },
39160 },
39161 },
39162 {
39163 name: "F64Load",
39164 auxType: auxInt64,
39165 argLen: 2,
39166 asm: wasm.AF64Load,
39167 reg: regInfo{
39168 inputs: []inputInfo{
39169 {0, 1407374883618815},
39170 },
39171 outputs: []outputInfo{
39172 {0, 281470681743360},
39173 },
39174 },
39175 },
39176 {
39177 name: "F32Store",
39178 auxType: auxInt64,
39179 argLen: 3,
39180 asm: wasm.AF32Store,
39181 reg: regInfo{
39182 inputs: []inputInfo{
39183 {1, 4294901760},
39184 {0, 1407374883618815},
39185 },
39186 },
39187 },
39188 {
39189 name: "F64Store",
39190 auxType: auxInt64,
39191 argLen: 3,
39192 asm: wasm.AF64Store,
39193 reg: regInfo{
39194 inputs: []inputInfo{
39195 {1, 281470681743360},
39196 {0, 1407374883618815},
39197 },
39198 },
39199 },
39200 {
39201 name: "I64Const",
39202 auxType: auxInt64,
39203 argLen: 0,
39204 rematerializeable: true,
39205 reg: regInfo{
39206 outputs: []outputInfo{
39207 {0, 65535},
39208 },
39209 },
39210 },
39211 {
39212 name: "F32Const",
39213 auxType: auxFloat32,
39214 argLen: 0,
39215 rematerializeable: true,
39216 reg: regInfo{
39217 outputs: []outputInfo{
39218 {0, 4294901760},
39219 },
39220 },
39221 },
39222 {
39223 name: "F64Const",
39224 auxType: auxFloat64,
39225 argLen: 0,
39226 rematerializeable: true,
39227 reg: regInfo{
39228 outputs: []outputInfo{
39229 {0, 281470681743360},
39230 },
39231 },
39232 },
39233 {
39234 name: "I64Eqz",
39235 argLen: 1,
39236 asm: wasm.AI64Eqz,
39237 reg: regInfo{
39238 inputs: []inputInfo{
39239 {0, 281474976776191},
39240 },
39241 outputs: []outputInfo{
39242 {0, 65535},
39243 },
39244 },
39245 },
39246 {
39247 name: "I64Eq",
39248 argLen: 2,
39249 asm: wasm.AI64Eq,
39250 reg: regInfo{
39251 inputs: []inputInfo{
39252 {0, 281474976776191},
39253 {1, 281474976776191},
39254 },
39255 outputs: []outputInfo{
39256 {0, 65535},
39257 },
39258 },
39259 },
39260 {
39261 name: "I64Ne",
39262 argLen: 2,
39263 asm: wasm.AI64Ne,
39264 reg: regInfo{
39265 inputs: []inputInfo{
39266 {0, 281474976776191},
39267 {1, 281474976776191},
39268 },
39269 outputs: []outputInfo{
39270 {0, 65535},
39271 },
39272 },
39273 },
39274 {
39275 name: "I64LtS",
39276 argLen: 2,
39277 asm: wasm.AI64LtS,
39278 reg: regInfo{
39279 inputs: []inputInfo{
39280 {0, 281474976776191},
39281 {1, 281474976776191},
39282 },
39283 outputs: []outputInfo{
39284 {0, 65535},
39285 },
39286 },
39287 },
39288 {
39289 name: "I64LtU",
39290 argLen: 2,
39291 asm: wasm.AI64LtU,
39292 reg: regInfo{
39293 inputs: []inputInfo{
39294 {0, 281474976776191},
39295 {1, 281474976776191},
39296 },
39297 outputs: []outputInfo{
39298 {0, 65535},
39299 },
39300 },
39301 },
39302 {
39303 name: "I64GtS",
39304 argLen: 2,
39305 asm: wasm.AI64GtS,
39306 reg: regInfo{
39307 inputs: []inputInfo{
39308 {0, 281474976776191},
39309 {1, 281474976776191},
39310 },
39311 outputs: []outputInfo{
39312 {0, 65535},
39313 },
39314 },
39315 },
39316 {
39317 name: "I64GtU",
39318 argLen: 2,
39319 asm: wasm.AI64GtU,
39320 reg: regInfo{
39321 inputs: []inputInfo{
39322 {0, 281474976776191},
39323 {1, 281474976776191},
39324 },
39325 outputs: []outputInfo{
39326 {0, 65535},
39327 },
39328 },
39329 },
39330 {
39331 name: "I64LeS",
39332 argLen: 2,
39333 asm: wasm.AI64LeS,
39334 reg: regInfo{
39335 inputs: []inputInfo{
39336 {0, 281474976776191},
39337 {1, 281474976776191},
39338 },
39339 outputs: []outputInfo{
39340 {0, 65535},
39341 },
39342 },
39343 },
39344 {
39345 name: "I64LeU",
39346 argLen: 2,
39347 asm: wasm.AI64LeU,
39348 reg: regInfo{
39349 inputs: []inputInfo{
39350 {0, 281474976776191},
39351 {1, 281474976776191},
39352 },
39353 outputs: []outputInfo{
39354 {0, 65535},
39355 },
39356 },
39357 },
39358 {
39359 name: "I64GeS",
39360 argLen: 2,
39361 asm: wasm.AI64GeS,
39362 reg: regInfo{
39363 inputs: []inputInfo{
39364 {0, 281474976776191},
39365 {1, 281474976776191},
39366 },
39367 outputs: []outputInfo{
39368 {0, 65535},
39369 },
39370 },
39371 },
39372 {
39373 name: "I64GeU",
39374 argLen: 2,
39375 asm: wasm.AI64GeU,
39376 reg: regInfo{
39377 inputs: []inputInfo{
39378 {0, 281474976776191},
39379 {1, 281474976776191},
39380 },
39381 outputs: []outputInfo{
39382 {0, 65535},
39383 },
39384 },
39385 },
39386 {
39387 name: "F32Eq",
39388 argLen: 2,
39389 asm: wasm.AF32Eq,
39390 reg: regInfo{
39391 inputs: []inputInfo{
39392 {0, 4294901760},
39393 {1, 4294901760},
39394 },
39395 outputs: []outputInfo{
39396 {0, 65535},
39397 },
39398 },
39399 },
39400 {
39401 name: "F32Ne",
39402 argLen: 2,
39403 asm: wasm.AF32Ne,
39404 reg: regInfo{
39405 inputs: []inputInfo{
39406 {0, 4294901760},
39407 {1, 4294901760},
39408 },
39409 outputs: []outputInfo{
39410 {0, 65535},
39411 },
39412 },
39413 },
39414 {
39415 name: "F32Lt",
39416 argLen: 2,
39417 asm: wasm.AF32Lt,
39418 reg: regInfo{
39419 inputs: []inputInfo{
39420 {0, 4294901760},
39421 {1, 4294901760},
39422 },
39423 outputs: []outputInfo{
39424 {0, 65535},
39425 },
39426 },
39427 },
39428 {
39429 name: "F32Gt",
39430 argLen: 2,
39431 asm: wasm.AF32Gt,
39432 reg: regInfo{
39433 inputs: []inputInfo{
39434 {0, 4294901760},
39435 {1, 4294901760},
39436 },
39437 outputs: []outputInfo{
39438 {0, 65535},
39439 },
39440 },
39441 },
39442 {
39443 name: "F32Le",
39444 argLen: 2,
39445 asm: wasm.AF32Le,
39446 reg: regInfo{
39447 inputs: []inputInfo{
39448 {0, 4294901760},
39449 {1, 4294901760},
39450 },
39451 outputs: []outputInfo{
39452 {0, 65535},
39453 },
39454 },
39455 },
39456 {
39457 name: "F32Ge",
39458 argLen: 2,
39459 asm: wasm.AF32Ge,
39460 reg: regInfo{
39461 inputs: []inputInfo{
39462 {0, 4294901760},
39463 {1, 4294901760},
39464 },
39465 outputs: []outputInfo{
39466 {0, 65535},
39467 },
39468 },
39469 },
39470 {
39471 name: "F64Eq",
39472 argLen: 2,
39473 asm: wasm.AF64Eq,
39474 reg: regInfo{
39475 inputs: []inputInfo{
39476 {0, 281470681743360},
39477 {1, 281470681743360},
39478 },
39479 outputs: []outputInfo{
39480 {0, 65535},
39481 },
39482 },
39483 },
39484 {
39485 name: "F64Ne",
39486 argLen: 2,
39487 asm: wasm.AF64Ne,
39488 reg: regInfo{
39489 inputs: []inputInfo{
39490 {0, 281470681743360},
39491 {1, 281470681743360},
39492 },
39493 outputs: []outputInfo{
39494 {0, 65535},
39495 },
39496 },
39497 },
39498 {
39499 name: "F64Lt",
39500 argLen: 2,
39501 asm: wasm.AF64Lt,
39502 reg: regInfo{
39503 inputs: []inputInfo{
39504 {0, 281470681743360},
39505 {1, 281470681743360},
39506 },
39507 outputs: []outputInfo{
39508 {0, 65535},
39509 },
39510 },
39511 },
39512 {
39513 name: "F64Gt",
39514 argLen: 2,
39515 asm: wasm.AF64Gt,
39516 reg: regInfo{
39517 inputs: []inputInfo{
39518 {0, 281470681743360},
39519 {1, 281470681743360},
39520 },
39521 outputs: []outputInfo{
39522 {0, 65535},
39523 },
39524 },
39525 },
39526 {
39527 name: "F64Le",
39528 argLen: 2,
39529 asm: wasm.AF64Le,
39530 reg: regInfo{
39531 inputs: []inputInfo{
39532 {0, 281470681743360},
39533 {1, 281470681743360},
39534 },
39535 outputs: []outputInfo{
39536 {0, 65535},
39537 },
39538 },
39539 },
39540 {
39541 name: "F64Ge",
39542 argLen: 2,
39543 asm: wasm.AF64Ge,
39544 reg: regInfo{
39545 inputs: []inputInfo{
39546 {0, 281470681743360},
39547 {1, 281470681743360},
39548 },
39549 outputs: []outputInfo{
39550 {0, 65535},
39551 },
39552 },
39553 },
39554 {
39555 name: "I64Add",
39556 argLen: 2,
39557 asm: wasm.AI64Add,
39558 reg: regInfo{
39559 inputs: []inputInfo{
39560 {0, 281474976776191},
39561 {1, 281474976776191},
39562 },
39563 outputs: []outputInfo{
39564 {0, 65535},
39565 },
39566 },
39567 },
39568 {
39569 name: "I64AddConst",
39570 auxType: auxInt64,
39571 argLen: 1,
39572 asm: wasm.AI64Add,
39573 reg: regInfo{
39574 inputs: []inputInfo{
39575 {0, 281474976776191},
39576 },
39577 outputs: []outputInfo{
39578 {0, 65535},
39579 },
39580 },
39581 },
39582 {
39583 name: "I64Sub",
39584 argLen: 2,
39585 asm: wasm.AI64Sub,
39586 reg: regInfo{
39587 inputs: []inputInfo{
39588 {0, 281474976776191},
39589 {1, 281474976776191},
39590 },
39591 outputs: []outputInfo{
39592 {0, 65535},
39593 },
39594 },
39595 },
39596 {
39597 name: "I64Mul",
39598 argLen: 2,
39599 asm: wasm.AI64Mul,
39600 reg: regInfo{
39601 inputs: []inputInfo{
39602 {0, 281474976776191},
39603 {1, 281474976776191},
39604 },
39605 outputs: []outputInfo{
39606 {0, 65535},
39607 },
39608 },
39609 },
39610 {
39611 name: "I64DivS",
39612 argLen: 2,
39613 asm: wasm.AI64DivS,
39614 reg: regInfo{
39615 inputs: []inputInfo{
39616 {0, 281474976776191},
39617 {1, 281474976776191},
39618 },
39619 outputs: []outputInfo{
39620 {0, 65535},
39621 },
39622 },
39623 },
39624 {
39625 name: "I64DivU",
39626 argLen: 2,
39627 asm: wasm.AI64DivU,
39628 reg: regInfo{
39629 inputs: []inputInfo{
39630 {0, 281474976776191},
39631 {1, 281474976776191},
39632 },
39633 outputs: []outputInfo{
39634 {0, 65535},
39635 },
39636 },
39637 },
39638 {
39639 name: "I64RemS",
39640 argLen: 2,
39641 asm: wasm.AI64RemS,
39642 reg: regInfo{
39643 inputs: []inputInfo{
39644 {0, 281474976776191},
39645 {1, 281474976776191},
39646 },
39647 outputs: []outputInfo{
39648 {0, 65535},
39649 },
39650 },
39651 },
39652 {
39653 name: "I64RemU",
39654 argLen: 2,
39655 asm: wasm.AI64RemU,
39656 reg: regInfo{
39657 inputs: []inputInfo{
39658 {0, 281474976776191},
39659 {1, 281474976776191},
39660 },
39661 outputs: []outputInfo{
39662 {0, 65535},
39663 },
39664 },
39665 },
39666 {
39667 name: "I64And",
39668 argLen: 2,
39669 asm: wasm.AI64And,
39670 reg: regInfo{
39671 inputs: []inputInfo{
39672 {0, 281474976776191},
39673 {1, 281474976776191},
39674 },
39675 outputs: []outputInfo{
39676 {0, 65535},
39677 },
39678 },
39679 },
39680 {
39681 name: "I64Or",
39682 argLen: 2,
39683 asm: wasm.AI64Or,
39684 reg: regInfo{
39685 inputs: []inputInfo{
39686 {0, 281474976776191},
39687 {1, 281474976776191},
39688 },
39689 outputs: []outputInfo{
39690 {0, 65535},
39691 },
39692 },
39693 },
39694 {
39695 name: "I64Xor",
39696 argLen: 2,
39697 asm: wasm.AI64Xor,
39698 reg: regInfo{
39699 inputs: []inputInfo{
39700 {0, 281474976776191},
39701 {1, 281474976776191},
39702 },
39703 outputs: []outputInfo{
39704 {0, 65535},
39705 },
39706 },
39707 },
39708 {
39709 name: "I64Shl",
39710 argLen: 2,
39711 asm: wasm.AI64Shl,
39712 reg: regInfo{
39713 inputs: []inputInfo{
39714 {0, 281474976776191},
39715 {1, 281474976776191},
39716 },
39717 outputs: []outputInfo{
39718 {0, 65535},
39719 },
39720 },
39721 },
39722 {
39723 name: "I64ShrS",
39724 argLen: 2,
39725 asm: wasm.AI64ShrS,
39726 reg: regInfo{
39727 inputs: []inputInfo{
39728 {0, 281474976776191},
39729 {1, 281474976776191},
39730 },
39731 outputs: []outputInfo{
39732 {0, 65535},
39733 },
39734 },
39735 },
39736 {
39737 name: "I64ShrU",
39738 argLen: 2,
39739 asm: wasm.AI64ShrU,
39740 reg: regInfo{
39741 inputs: []inputInfo{
39742 {0, 281474976776191},
39743 {1, 281474976776191},
39744 },
39745 outputs: []outputInfo{
39746 {0, 65535},
39747 },
39748 },
39749 },
39750 {
39751 name: "F32Neg",
39752 argLen: 1,
39753 asm: wasm.AF32Neg,
39754 reg: regInfo{
39755 inputs: []inputInfo{
39756 {0, 4294901760},
39757 },
39758 outputs: []outputInfo{
39759 {0, 4294901760},
39760 },
39761 },
39762 },
39763 {
39764 name: "F32Add",
39765 argLen: 2,
39766 asm: wasm.AF32Add,
39767 reg: regInfo{
39768 inputs: []inputInfo{
39769 {0, 4294901760},
39770 {1, 4294901760},
39771 },
39772 outputs: []outputInfo{
39773 {0, 4294901760},
39774 },
39775 },
39776 },
39777 {
39778 name: "F32Sub",
39779 argLen: 2,
39780 asm: wasm.AF32Sub,
39781 reg: regInfo{
39782 inputs: []inputInfo{
39783 {0, 4294901760},
39784 {1, 4294901760},
39785 },
39786 outputs: []outputInfo{
39787 {0, 4294901760},
39788 },
39789 },
39790 },
39791 {
39792 name: "F32Mul",
39793 argLen: 2,
39794 asm: wasm.AF32Mul,
39795 reg: regInfo{
39796 inputs: []inputInfo{
39797 {0, 4294901760},
39798 {1, 4294901760},
39799 },
39800 outputs: []outputInfo{
39801 {0, 4294901760},
39802 },
39803 },
39804 },
39805 {
39806 name: "F32Div",
39807 argLen: 2,
39808 asm: wasm.AF32Div,
39809 reg: regInfo{
39810 inputs: []inputInfo{
39811 {0, 4294901760},
39812 {1, 4294901760},
39813 },
39814 outputs: []outputInfo{
39815 {0, 4294901760},
39816 },
39817 },
39818 },
39819 {
39820 name: "F64Neg",
39821 argLen: 1,
39822 asm: wasm.AF64Neg,
39823 reg: regInfo{
39824 inputs: []inputInfo{
39825 {0, 281470681743360},
39826 },
39827 outputs: []outputInfo{
39828 {0, 281470681743360},
39829 },
39830 },
39831 },
39832 {
39833 name: "F64Add",
39834 argLen: 2,
39835 asm: wasm.AF64Add,
39836 reg: regInfo{
39837 inputs: []inputInfo{
39838 {0, 281470681743360},
39839 {1, 281470681743360},
39840 },
39841 outputs: []outputInfo{
39842 {0, 281470681743360},
39843 },
39844 },
39845 },
39846 {
39847 name: "F64Sub",
39848 argLen: 2,
39849 asm: wasm.AF64Sub,
39850 reg: regInfo{
39851 inputs: []inputInfo{
39852 {0, 281470681743360},
39853 {1, 281470681743360},
39854 },
39855 outputs: []outputInfo{
39856 {0, 281470681743360},
39857 },
39858 },
39859 },
39860 {
39861 name: "F64Mul",
39862 argLen: 2,
39863 asm: wasm.AF64Mul,
39864 reg: regInfo{
39865 inputs: []inputInfo{
39866 {0, 281470681743360},
39867 {1, 281470681743360},
39868 },
39869 outputs: []outputInfo{
39870 {0, 281470681743360},
39871 },
39872 },
39873 },
39874 {
39875 name: "F64Div",
39876 argLen: 2,
39877 asm: wasm.AF64Div,
39878 reg: regInfo{
39879 inputs: []inputInfo{
39880 {0, 281470681743360},
39881 {1, 281470681743360},
39882 },
39883 outputs: []outputInfo{
39884 {0, 281470681743360},
39885 },
39886 },
39887 },
39888 {
39889 name: "I64TruncSatF64S",
39890 argLen: 1,
39891 asm: wasm.AI64TruncSatF64S,
39892 reg: regInfo{
39893 inputs: []inputInfo{
39894 {0, 281470681743360},
39895 },
39896 outputs: []outputInfo{
39897 {0, 65535},
39898 },
39899 },
39900 },
39901 {
39902 name: "I64TruncSatF64U",
39903 argLen: 1,
39904 asm: wasm.AI64TruncSatF64U,
39905 reg: regInfo{
39906 inputs: []inputInfo{
39907 {0, 281470681743360},
39908 },
39909 outputs: []outputInfo{
39910 {0, 65535},
39911 },
39912 },
39913 },
39914 {
39915 name: "I64TruncSatF32S",
39916 argLen: 1,
39917 asm: wasm.AI64TruncSatF32S,
39918 reg: regInfo{
39919 inputs: []inputInfo{
39920 {0, 4294901760},
39921 },
39922 outputs: []outputInfo{
39923 {0, 65535},
39924 },
39925 },
39926 },
39927 {
39928 name: "I64TruncSatF32U",
39929 argLen: 1,
39930 asm: wasm.AI64TruncSatF32U,
39931 reg: regInfo{
39932 inputs: []inputInfo{
39933 {0, 4294901760},
39934 },
39935 outputs: []outputInfo{
39936 {0, 65535},
39937 },
39938 },
39939 },
39940 {
39941 name: "F32ConvertI64S",
39942 argLen: 1,
39943 asm: wasm.AF32ConvertI64S,
39944 reg: regInfo{
39945 inputs: []inputInfo{
39946 {0, 65535},
39947 },
39948 outputs: []outputInfo{
39949 {0, 4294901760},
39950 },
39951 },
39952 },
39953 {
39954 name: "F32ConvertI64U",
39955 argLen: 1,
39956 asm: wasm.AF32ConvertI64U,
39957 reg: regInfo{
39958 inputs: []inputInfo{
39959 {0, 65535},
39960 },
39961 outputs: []outputInfo{
39962 {0, 4294901760},
39963 },
39964 },
39965 },
39966 {
39967 name: "F64ConvertI64S",
39968 argLen: 1,
39969 asm: wasm.AF64ConvertI64S,
39970 reg: regInfo{
39971 inputs: []inputInfo{
39972 {0, 65535},
39973 },
39974 outputs: []outputInfo{
39975 {0, 281470681743360},
39976 },
39977 },
39978 },
39979 {
39980 name: "F64ConvertI64U",
39981 argLen: 1,
39982 asm: wasm.AF64ConvertI64U,
39983 reg: regInfo{
39984 inputs: []inputInfo{
39985 {0, 65535},
39986 },
39987 outputs: []outputInfo{
39988 {0, 281470681743360},
39989 },
39990 },
39991 },
39992 {
39993 name: "F32DemoteF64",
39994 argLen: 1,
39995 asm: wasm.AF32DemoteF64,
39996 reg: regInfo{
39997 inputs: []inputInfo{
39998 {0, 281470681743360},
39999 },
40000 outputs: []outputInfo{
40001 {0, 4294901760},
40002 },
40003 },
40004 },
40005 {
40006 name: "F64PromoteF32",
40007 argLen: 1,
40008 asm: wasm.AF64PromoteF32,
40009 reg: regInfo{
40010 inputs: []inputInfo{
40011 {0, 4294901760},
40012 },
40013 outputs: []outputInfo{
40014 {0, 281470681743360},
40015 },
40016 },
40017 },
40018 {
40019 name: "I64Extend8S",
40020 argLen: 1,
40021 asm: wasm.AI64Extend8S,
40022 reg: regInfo{
40023 inputs: []inputInfo{
40024 {0, 281474976776191},
40025 },
40026 outputs: []outputInfo{
40027 {0, 65535},
40028 },
40029 },
40030 },
40031 {
40032 name: "I64Extend16S",
40033 argLen: 1,
40034 asm: wasm.AI64Extend16S,
40035 reg: regInfo{
40036 inputs: []inputInfo{
40037 {0, 281474976776191},
40038 },
40039 outputs: []outputInfo{
40040 {0, 65535},
40041 },
40042 },
40043 },
40044 {
40045 name: "I64Extend32S",
40046 argLen: 1,
40047 asm: wasm.AI64Extend32S,
40048 reg: regInfo{
40049 inputs: []inputInfo{
40050 {0, 281474976776191},
40051 },
40052 outputs: []outputInfo{
40053 {0, 65535},
40054 },
40055 },
40056 },
40057 {
40058 name: "F32Sqrt",
40059 argLen: 1,
40060 asm: wasm.AF32Sqrt,
40061 reg: regInfo{
40062 inputs: []inputInfo{
40063 {0, 4294901760},
40064 },
40065 outputs: []outputInfo{
40066 {0, 4294901760},
40067 },
40068 },
40069 },
40070 {
40071 name: "F32Trunc",
40072 argLen: 1,
40073 asm: wasm.AF32Trunc,
40074 reg: regInfo{
40075 inputs: []inputInfo{
40076 {0, 4294901760},
40077 },
40078 outputs: []outputInfo{
40079 {0, 4294901760},
40080 },
40081 },
40082 },
40083 {
40084 name: "F32Ceil",
40085 argLen: 1,
40086 asm: wasm.AF32Ceil,
40087 reg: regInfo{
40088 inputs: []inputInfo{
40089 {0, 4294901760},
40090 },
40091 outputs: []outputInfo{
40092 {0, 4294901760},
40093 },
40094 },
40095 },
40096 {
40097 name: "F32Floor",
40098 argLen: 1,
40099 asm: wasm.AF32Floor,
40100 reg: regInfo{
40101 inputs: []inputInfo{
40102 {0, 4294901760},
40103 },
40104 outputs: []outputInfo{
40105 {0, 4294901760},
40106 },
40107 },
40108 },
40109 {
40110 name: "F32Nearest",
40111 argLen: 1,
40112 asm: wasm.AF32Nearest,
40113 reg: regInfo{
40114 inputs: []inputInfo{
40115 {0, 4294901760},
40116 },
40117 outputs: []outputInfo{
40118 {0, 4294901760},
40119 },
40120 },
40121 },
40122 {
40123 name: "F32Abs",
40124 argLen: 1,
40125 asm: wasm.AF32Abs,
40126 reg: regInfo{
40127 inputs: []inputInfo{
40128 {0, 4294901760},
40129 },
40130 outputs: []outputInfo{
40131 {0, 4294901760},
40132 },
40133 },
40134 },
40135 {
40136 name: "F32Copysign",
40137 argLen: 2,
40138 asm: wasm.AF32Copysign,
40139 reg: regInfo{
40140 inputs: []inputInfo{
40141 {0, 4294901760},
40142 {1, 4294901760},
40143 },
40144 outputs: []outputInfo{
40145 {0, 4294901760},
40146 },
40147 },
40148 },
40149 {
40150 name: "F64Sqrt",
40151 argLen: 1,
40152 asm: wasm.AF64Sqrt,
40153 reg: regInfo{
40154 inputs: []inputInfo{
40155 {0, 281470681743360},
40156 },
40157 outputs: []outputInfo{
40158 {0, 281470681743360},
40159 },
40160 },
40161 },
40162 {
40163 name: "F64Trunc",
40164 argLen: 1,
40165 asm: wasm.AF64Trunc,
40166 reg: regInfo{
40167 inputs: []inputInfo{
40168 {0, 281470681743360},
40169 },
40170 outputs: []outputInfo{
40171 {0, 281470681743360},
40172 },
40173 },
40174 },
40175 {
40176 name: "F64Ceil",
40177 argLen: 1,
40178 asm: wasm.AF64Ceil,
40179 reg: regInfo{
40180 inputs: []inputInfo{
40181 {0, 281470681743360},
40182 },
40183 outputs: []outputInfo{
40184 {0, 281470681743360},
40185 },
40186 },
40187 },
40188 {
40189 name: "F64Floor",
40190 argLen: 1,
40191 asm: wasm.AF64Floor,
40192 reg: regInfo{
40193 inputs: []inputInfo{
40194 {0, 281470681743360},
40195 },
40196 outputs: []outputInfo{
40197 {0, 281470681743360},
40198 },
40199 },
40200 },
40201 {
40202 name: "F64Nearest",
40203 argLen: 1,
40204 asm: wasm.AF64Nearest,
40205 reg: regInfo{
40206 inputs: []inputInfo{
40207 {0, 281470681743360},
40208 },
40209 outputs: []outputInfo{
40210 {0, 281470681743360},
40211 },
40212 },
40213 },
40214 {
40215 name: "F64Abs",
40216 argLen: 1,
40217 asm: wasm.AF64Abs,
40218 reg: regInfo{
40219 inputs: []inputInfo{
40220 {0, 281470681743360},
40221 },
40222 outputs: []outputInfo{
40223 {0, 281470681743360},
40224 },
40225 },
40226 },
40227 {
40228 name: "F64Copysign",
40229 argLen: 2,
40230 asm: wasm.AF64Copysign,
40231 reg: regInfo{
40232 inputs: []inputInfo{
40233 {0, 281470681743360},
40234 {1, 281470681743360},
40235 },
40236 outputs: []outputInfo{
40237 {0, 281470681743360},
40238 },
40239 },
40240 },
40241 {
40242 name: "I64Ctz",
40243 argLen: 1,
40244 asm: wasm.AI64Ctz,
40245 reg: regInfo{
40246 inputs: []inputInfo{
40247 {0, 281474976776191},
40248 },
40249 outputs: []outputInfo{
40250 {0, 65535},
40251 },
40252 },
40253 },
40254 {
40255 name: "I64Clz",
40256 argLen: 1,
40257 asm: wasm.AI64Clz,
40258 reg: regInfo{
40259 inputs: []inputInfo{
40260 {0, 281474976776191},
40261 },
40262 outputs: []outputInfo{
40263 {0, 65535},
40264 },
40265 },
40266 },
40267 {
40268 name: "I32Rotl",
40269 argLen: 2,
40270 asm: wasm.AI32Rotl,
40271 reg: regInfo{
40272 inputs: []inputInfo{
40273 {0, 281474976776191},
40274 {1, 281474976776191},
40275 },
40276 outputs: []outputInfo{
40277 {0, 65535},
40278 },
40279 },
40280 },
40281 {
40282 name: "I64Rotl",
40283 argLen: 2,
40284 asm: wasm.AI64Rotl,
40285 reg: regInfo{
40286 inputs: []inputInfo{
40287 {0, 281474976776191},
40288 {1, 281474976776191},
40289 },
40290 outputs: []outputInfo{
40291 {0, 65535},
40292 },
40293 },
40294 },
40295 {
40296 name: "I64Popcnt",
40297 argLen: 1,
40298 asm: wasm.AI64Popcnt,
40299 reg: regInfo{
40300 inputs: []inputInfo{
40301 {0, 281474976776191},
40302 },
40303 outputs: []outputInfo{
40304 {0, 65535},
40305 },
40306 },
40307 },
40308
40309 {
40310 name: "Add8",
40311 argLen: 2,
40312 commutative: true,
40313 generic: true,
40314 },
40315 {
40316 name: "Add16",
40317 argLen: 2,
40318 commutative: true,
40319 generic: true,
40320 },
40321 {
40322 name: "Add32",
40323 argLen: 2,
40324 commutative: true,
40325 generic: true,
40326 },
40327 {
40328 name: "Add64",
40329 argLen: 2,
40330 commutative: true,
40331 generic: true,
40332 },
40333 {
40334 name: "AddPtr",
40335 argLen: 2,
40336 generic: true,
40337 },
40338 {
40339 name: "Add32F",
40340 argLen: 2,
40341 commutative: true,
40342 generic: true,
40343 },
40344 {
40345 name: "Add64F",
40346 argLen: 2,
40347 commutative: true,
40348 generic: true,
40349 },
40350 {
40351 name: "Sub8",
40352 argLen: 2,
40353 generic: true,
40354 },
40355 {
40356 name: "Sub16",
40357 argLen: 2,
40358 generic: true,
40359 },
40360 {
40361 name: "Sub32",
40362 argLen: 2,
40363 generic: true,
40364 },
40365 {
40366 name: "Sub64",
40367 argLen: 2,
40368 generic: true,
40369 },
40370 {
40371 name: "SubPtr",
40372 argLen: 2,
40373 generic: true,
40374 },
40375 {
40376 name: "Sub32F",
40377 argLen: 2,
40378 generic: true,
40379 },
40380 {
40381 name: "Sub64F",
40382 argLen: 2,
40383 generic: true,
40384 },
40385 {
40386 name: "Mul8",
40387 argLen: 2,
40388 commutative: true,
40389 generic: true,
40390 },
40391 {
40392 name: "Mul16",
40393 argLen: 2,
40394 commutative: true,
40395 generic: true,
40396 },
40397 {
40398 name: "Mul32",
40399 argLen: 2,
40400 commutative: true,
40401 generic: true,
40402 },
40403 {
40404 name: "Mul64",
40405 argLen: 2,
40406 commutative: true,
40407 generic: true,
40408 },
40409 {
40410 name: "Mul32F",
40411 argLen: 2,
40412 commutative: true,
40413 generic: true,
40414 },
40415 {
40416 name: "Mul64F",
40417 argLen: 2,
40418 commutative: true,
40419 generic: true,
40420 },
40421 {
40422 name: "Div32F",
40423 argLen: 2,
40424 generic: true,
40425 },
40426 {
40427 name: "Div64F",
40428 argLen: 2,
40429 generic: true,
40430 },
40431 {
40432 name: "Hmul32",
40433 argLen: 2,
40434 commutative: true,
40435 generic: true,
40436 },
40437 {
40438 name: "Hmul32u",
40439 argLen: 2,
40440 commutative: true,
40441 generic: true,
40442 },
40443 {
40444 name: "Hmul64",
40445 argLen: 2,
40446 commutative: true,
40447 generic: true,
40448 },
40449 {
40450 name: "Hmul64u",
40451 argLen: 2,
40452 commutative: true,
40453 generic: true,
40454 },
40455 {
40456 name: "Mul32uhilo",
40457 argLen: 2,
40458 commutative: true,
40459 generic: true,
40460 },
40461 {
40462 name: "Mul64uhilo",
40463 argLen: 2,
40464 commutative: true,
40465 generic: true,
40466 },
40467 {
40468 name: "Mul32uover",
40469 argLen: 2,
40470 commutative: true,
40471 generic: true,
40472 },
40473 {
40474 name: "Mul64uover",
40475 argLen: 2,
40476 commutative: true,
40477 generic: true,
40478 },
40479 {
40480 name: "Avg32u",
40481 argLen: 2,
40482 generic: true,
40483 },
40484 {
40485 name: "Avg64u",
40486 argLen: 2,
40487 generic: true,
40488 },
40489 {
40490 name: "Div8",
40491 argLen: 2,
40492 generic: true,
40493 },
40494 {
40495 name: "Div8u",
40496 argLen: 2,
40497 generic: true,
40498 },
40499 {
40500 name: "Div16",
40501 auxType: auxBool,
40502 argLen: 2,
40503 generic: true,
40504 },
40505 {
40506 name: "Div16u",
40507 argLen: 2,
40508 generic: true,
40509 },
40510 {
40511 name: "Div32",
40512 auxType: auxBool,
40513 argLen: 2,
40514 generic: true,
40515 },
40516 {
40517 name: "Div32u",
40518 argLen: 2,
40519 generic: true,
40520 },
40521 {
40522 name: "Div64",
40523 auxType: auxBool,
40524 argLen: 2,
40525 generic: true,
40526 },
40527 {
40528 name: "Div64u",
40529 argLen: 2,
40530 generic: true,
40531 },
40532 {
40533 name: "Div128u",
40534 argLen: 3,
40535 generic: true,
40536 },
40537 {
40538 name: "Mod8",
40539 argLen: 2,
40540 generic: true,
40541 },
40542 {
40543 name: "Mod8u",
40544 argLen: 2,
40545 generic: true,
40546 },
40547 {
40548 name: "Mod16",
40549 auxType: auxBool,
40550 argLen: 2,
40551 generic: true,
40552 },
40553 {
40554 name: "Mod16u",
40555 argLen: 2,
40556 generic: true,
40557 },
40558 {
40559 name: "Mod32",
40560 auxType: auxBool,
40561 argLen: 2,
40562 generic: true,
40563 },
40564 {
40565 name: "Mod32u",
40566 argLen: 2,
40567 generic: true,
40568 },
40569 {
40570 name: "Mod64",
40571 auxType: auxBool,
40572 argLen: 2,
40573 generic: true,
40574 },
40575 {
40576 name: "Mod64u",
40577 argLen: 2,
40578 generic: true,
40579 },
40580 {
40581 name: "And8",
40582 argLen: 2,
40583 commutative: true,
40584 generic: true,
40585 },
40586 {
40587 name: "And16",
40588 argLen: 2,
40589 commutative: true,
40590 generic: true,
40591 },
40592 {
40593 name: "And32",
40594 argLen: 2,
40595 commutative: true,
40596 generic: true,
40597 },
40598 {
40599 name: "And64",
40600 argLen: 2,
40601 commutative: true,
40602 generic: true,
40603 },
40604 {
40605 name: "Or8",
40606 argLen: 2,
40607 commutative: true,
40608 generic: true,
40609 },
40610 {
40611 name: "Or16",
40612 argLen: 2,
40613 commutative: true,
40614 generic: true,
40615 },
40616 {
40617 name: "Or32",
40618 argLen: 2,
40619 commutative: true,
40620 generic: true,
40621 },
40622 {
40623 name: "Or64",
40624 argLen: 2,
40625 commutative: true,
40626 generic: true,
40627 },
40628 {
40629 name: "Xor8",
40630 argLen: 2,
40631 commutative: true,
40632 generic: true,
40633 },
40634 {
40635 name: "Xor16",
40636 argLen: 2,
40637 commutative: true,
40638 generic: true,
40639 },
40640 {
40641 name: "Xor32",
40642 argLen: 2,
40643 commutative: true,
40644 generic: true,
40645 },
40646 {
40647 name: "Xor64",
40648 argLen: 2,
40649 commutative: true,
40650 generic: true,
40651 },
40652 {
40653 name: "Lsh8x8",
40654 auxType: auxBool,
40655 argLen: 2,
40656 generic: true,
40657 },
40658 {
40659 name: "Lsh8x16",
40660 auxType: auxBool,
40661 argLen: 2,
40662 generic: true,
40663 },
40664 {
40665 name: "Lsh8x32",
40666 auxType: auxBool,
40667 argLen: 2,
40668 generic: true,
40669 },
40670 {
40671 name: "Lsh8x64",
40672 auxType: auxBool,
40673 argLen: 2,
40674 generic: true,
40675 },
40676 {
40677 name: "Lsh16x8",
40678 auxType: auxBool,
40679 argLen: 2,
40680 generic: true,
40681 },
40682 {
40683 name: "Lsh16x16",
40684 auxType: auxBool,
40685 argLen: 2,
40686 generic: true,
40687 },
40688 {
40689 name: "Lsh16x32",
40690 auxType: auxBool,
40691 argLen: 2,
40692 generic: true,
40693 },
40694 {
40695 name: "Lsh16x64",
40696 auxType: auxBool,
40697 argLen: 2,
40698 generic: true,
40699 },
40700 {
40701 name: "Lsh32x8",
40702 auxType: auxBool,
40703 argLen: 2,
40704 generic: true,
40705 },
40706 {
40707 name: "Lsh32x16",
40708 auxType: auxBool,
40709 argLen: 2,
40710 generic: true,
40711 },
40712 {
40713 name: "Lsh32x32",
40714 auxType: auxBool,
40715 argLen: 2,
40716 generic: true,
40717 },
40718 {
40719 name: "Lsh32x64",
40720 auxType: auxBool,
40721 argLen: 2,
40722 generic: true,
40723 },
40724 {
40725 name: "Lsh64x8",
40726 auxType: auxBool,
40727 argLen: 2,
40728 generic: true,
40729 },
40730 {
40731 name: "Lsh64x16",
40732 auxType: auxBool,
40733 argLen: 2,
40734 generic: true,
40735 },
40736 {
40737 name: "Lsh64x32",
40738 auxType: auxBool,
40739 argLen: 2,
40740 generic: true,
40741 },
40742 {
40743 name: "Lsh64x64",
40744 auxType: auxBool,
40745 argLen: 2,
40746 generic: true,
40747 },
40748 {
40749 name: "Rsh8x8",
40750 auxType: auxBool,
40751 argLen: 2,
40752 generic: true,
40753 },
40754 {
40755 name: "Rsh8x16",
40756 auxType: auxBool,
40757 argLen: 2,
40758 generic: true,
40759 },
40760 {
40761 name: "Rsh8x32",
40762 auxType: auxBool,
40763 argLen: 2,
40764 generic: true,
40765 },
40766 {
40767 name: "Rsh8x64",
40768 auxType: auxBool,
40769 argLen: 2,
40770 generic: true,
40771 },
40772 {
40773 name: "Rsh16x8",
40774 auxType: auxBool,
40775 argLen: 2,
40776 generic: true,
40777 },
40778 {
40779 name: "Rsh16x16",
40780 auxType: auxBool,
40781 argLen: 2,
40782 generic: true,
40783 },
40784 {
40785 name: "Rsh16x32",
40786 auxType: auxBool,
40787 argLen: 2,
40788 generic: true,
40789 },
40790 {
40791 name: "Rsh16x64",
40792 auxType: auxBool,
40793 argLen: 2,
40794 generic: true,
40795 },
40796 {
40797 name: "Rsh32x8",
40798 auxType: auxBool,
40799 argLen: 2,
40800 generic: true,
40801 },
40802 {
40803 name: "Rsh32x16",
40804 auxType: auxBool,
40805 argLen: 2,
40806 generic: true,
40807 },
40808 {
40809 name: "Rsh32x32",
40810 auxType: auxBool,
40811 argLen: 2,
40812 generic: true,
40813 },
40814 {
40815 name: "Rsh32x64",
40816 auxType: auxBool,
40817 argLen: 2,
40818 generic: true,
40819 },
40820 {
40821 name: "Rsh64x8",
40822 auxType: auxBool,
40823 argLen: 2,
40824 generic: true,
40825 },
40826 {
40827 name: "Rsh64x16",
40828 auxType: auxBool,
40829 argLen: 2,
40830 generic: true,
40831 },
40832 {
40833 name: "Rsh64x32",
40834 auxType: auxBool,
40835 argLen: 2,
40836 generic: true,
40837 },
40838 {
40839 name: "Rsh64x64",
40840 auxType: auxBool,
40841 argLen: 2,
40842 generic: true,
40843 },
40844 {
40845 name: "Rsh8Ux8",
40846 auxType: auxBool,
40847 argLen: 2,
40848 generic: true,
40849 },
40850 {
40851 name: "Rsh8Ux16",
40852 auxType: auxBool,
40853 argLen: 2,
40854 generic: true,
40855 },
40856 {
40857 name: "Rsh8Ux32",
40858 auxType: auxBool,
40859 argLen: 2,
40860 generic: true,
40861 },
40862 {
40863 name: "Rsh8Ux64",
40864 auxType: auxBool,
40865 argLen: 2,
40866 generic: true,
40867 },
40868 {
40869 name: "Rsh16Ux8",
40870 auxType: auxBool,
40871 argLen: 2,
40872 generic: true,
40873 },
40874 {
40875 name: "Rsh16Ux16",
40876 auxType: auxBool,
40877 argLen: 2,
40878 generic: true,
40879 },
40880 {
40881 name: "Rsh16Ux32",
40882 auxType: auxBool,
40883 argLen: 2,
40884 generic: true,
40885 },
40886 {
40887 name: "Rsh16Ux64",
40888 auxType: auxBool,
40889 argLen: 2,
40890 generic: true,
40891 },
40892 {
40893 name: "Rsh32Ux8",
40894 auxType: auxBool,
40895 argLen: 2,
40896 generic: true,
40897 },
40898 {
40899 name: "Rsh32Ux16",
40900 auxType: auxBool,
40901 argLen: 2,
40902 generic: true,
40903 },
40904 {
40905 name: "Rsh32Ux32",
40906 auxType: auxBool,
40907 argLen: 2,
40908 generic: true,
40909 },
40910 {
40911 name: "Rsh32Ux64",
40912 auxType: auxBool,
40913 argLen: 2,
40914 generic: true,
40915 },
40916 {
40917 name: "Rsh64Ux8",
40918 auxType: auxBool,
40919 argLen: 2,
40920 generic: true,
40921 },
40922 {
40923 name: "Rsh64Ux16",
40924 auxType: auxBool,
40925 argLen: 2,
40926 generic: true,
40927 },
40928 {
40929 name: "Rsh64Ux32",
40930 auxType: auxBool,
40931 argLen: 2,
40932 generic: true,
40933 },
40934 {
40935 name: "Rsh64Ux64",
40936 auxType: auxBool,
40937 argLen: 2,
40938 generic: true,
40939 },
40940 {
40941 name: "Eq8",
40942 argLen: 2,
40943 commutative: true,
40944 generic: true,
40945 },
40946 {
40947 name: "Eq16",
40948 argLen: 2,
40949 commutative: true,
40950 generic: true,
40951 },
40952 {
40953 name: "Eq32",
40954 argLen: 2,
40955 commutative: true,
40956 generic: true,
40957 },
40958 {
40959 name: "Eq64",
40960 argLen: 2,
40961 commutative: true,
40962 generic: true,
40963 },
40964 {
40965 name: "EqPtr",
40966 argLen: 2,
40967 commutative: true,
40968 generic: true,
40969 },
40970 {
40971 name: "EqInter",
40972 argLen: 2,
40973 generic: true,
40974 },
40975 {
40976 name: "EqSlice",
40977 argLen: 2,
40978 generic: true,
40979 },
40980 {
40981 name: "Eq32F",
40982 argLen: 2,
40983 commutative: true,
40984 generic: true,
40985 },
40986 {
40987 name: "Eq64F",
40988 argLen: 2,
40989 commutative: true,
40990 generic: true,
40991 },
40992 {
40993 name: "Neq8",
40994 argLen: 2,
40995 commutative: true,
40996 generic: true,
40997 },
40998 {
40999 name: "Neq16",
41000 argLen: 2,
41001 commutative: true,
41002 generic: true,
41003 },
41004 {
41005 name: "Neq32",
41006 argLen: 2,
41007 commutative: true,
41008 generic: true,
41009 },
41010 {
41011 name: "Neq64",
41012 argLen: 2,
41013 commutative: true,
41014 generic: true,
41015 },
41016 {
41017 name: "NeqPtr",
41018 argLen: 2,
41019 commutative: true,
41020 generic: true,
41021 },
41022 {
41023 name: "NeqInter",
41024 argLen: 2,
41025 generic: true,
41026 },
41027 {
41028 name: "NeqSlice",
41029 argLen: 2,
41030 generic: true,
41031 },
41032 {
41033 name: "Neq32F",
41034 argLen: 2,
41035 commutative: true,
41036 generic: true,
41037 },
41038 {
41039 name: "Neq64F",
41040 argLen: 2,
41041 commutative: true,
41042 generic: true,
41043 },
41044 {
41045 name: "Less8",
41046 argLen: 2,
41047 generic: true,
41048 },
41049 {
41050 name: "Less8U",
41051 argLen: 2,
41052 generic: true,
41053 },
41054 {
41055 name: "Less16",
41056 argLen: 2,
41057 generic: true,
41058 },
41059 {
41060 name: "Less16U",
41061 argLen: 2,
41062 generic: true,
41063 },
41064 {
41065 name: "Less32",
41066 argLen: 2,
41067 generic: true,
41068 },
41069 {
41070 name: "Less32U",
41071 argLen: 2,
41072 generic: true,
41073 },
41074 {
41075 name: "Less64",
41076 argLen: 2,
41077 generic: true,
41078 },
41079 {
41080 name: "Less64U",
41081 argLen: 2,
41082 generic: true,
41083 },
41084 {
41085 name: "Less32F",
41086 argLen: 2,
41087 generic: true,
41088 },
41089 {
41090 name: "Less64F",
41091 argLen: 2,
41092 generic: true,
41093 },
41094 {
41095 name: "Leq8",
41096 argLen: 2,
41097 generic: true,
41098 },
41099 {
41100 name: "Leq8U",
41101 argLen: 2,
41102 generic: true,
41103 },
41104 {
41105 name: "Leq16",
41106 argLen: 2,
41107 generic: true,
41108 },
41109 {
41110 name: "Leq16U",
41111 argLen: 2,
41112 generic: true,
41113 },
41114 {
41115 name: "Leq32",
41116 argLen: 2,
41117 generic: true,
41118 },
41119 {
41120 name: "Leq32U",
41121 argLen: 2,
41122 generic: true,
41123 },
41124 {
41125 name: "Leq64",
41126 argLen: 2,
41127 generic: true,
41128 },
41129 {
41130 name: "Leq64U",
41131 argLen: 2,
41132 generic: true,
41133 },
41134 {
41135 name: "Leq32F",
41136 argLen: 2,
41137 generic: true,
41138 },
41139 {
41140 name: "Leq64F",
41141 argLen: 2,
41142 generic: true,
41143 },
41144 {
41145 name: "CondSelect",
41146 argLen: 3,
41147 generic: true,
41148 },
41149 {
41150 name: "AndB",
41151 argLen: 2,
41152 commutative: true,
41153 generic: true,
41154 },
41155 {
41156 name: "OrB",
41157 argLen: 2,
41158 commutative: true,
41159 generic: true,
41160 },
41161 {
41162 name: "EqB",
41163 argLen: 2,
41164 commutative: true,
41165 generic: true,
41166 },
41167 {
41168 name: "NeqB",
41169 argLen: 2,
41170 commutative: true,
41171 generic: true,
41172 },
41173 {
41174 name: "Not",
41175 argLen: 1,
41176 generic: true,
41177 },
41178 {
41179 name: "Neg8",
41180 argLen: 1,
41181 generic: true,
41182 },
41183 {
41184 name: "Neg16",
41185 argLen: 1,
41186 generic: true,
41187 },
41188 {
41189 name: "Neg32",
41190 argLen: 1,
41191 generic: true,
41192 },
41193 {
41194 name: "Neg64",
41195 argLen: 1,
41196 generic: true,
41197 },
41198 {
41199 name: "Neg32F",
41200 argLen: 1,
41201 generic: true,
41202 },
41203 {
41204 name: "Neg64F",
41205 argLen: 1,
41206 generic: true,
41207 },
41208 {
41209 name: "Com8",
41210 argLen: 1,
41211 generic: true,
41212 },
41213 {
41214 name: "Com16",
41215 argLen: 1,
41216 generic: true,
41217 },
41218 {
41219 name: "Com32",
41220 argLen: 1,
41221 generic: true,
41222 },
41223 {
41224 name: "Com64",
41225 argLen: 1,
41226 generic: true,
41227 },
41228 {
41229 name: "Ctz8",
41230 argLen: 1,
41231 generic: true,
41232 },
41233 {
41234 name: "Ctz16",
41235 argLen: 1,
41236 generic: true,
41237 },
41238 {
41239 name: "Ctz32",
41240 argLen: 1,
41241 generic: true,
41242 },
41243 {
41244 name: "Ctz64",
41245 argLen: 1,
41246 generic: true,
41247 },
41248 {
41249 name: "Ctz64On32",
41250 argLen: 2,
41251 generic: true,
41252 },
41253 {
41254 name: "Ctz8NonZero",
41255 argLen: 1,
41256 generic: true,
41257 },
41258 {
41259 name: "Ctz16NonZero",
41260 argLen: 1,
41261 generic: true,
41262 },
41263 {
41264 name: "Ctz32NonZero",
41265 argLen: 1,
41266 generic: true,
41267 },
41268 {
41269 name: "Ctz64NonZero",
41270 argLen: 1,
41271 generic: true,
41272 },
41273 {
41274 name: "BitLen8",
41275 argLen: 1,
41276 generic: true,
41277 },
41278 {
41279 name: "BitLen16",
41280 argLen: 1,
41281 generic: true,
41282 },
41283 {
41284 name: "BitLen32",
41285 argLen: 1,
41286 generic: true,
41287 },
41288 {
41289 name: "BitLen64",
41290 argLen: 1,
41291 generic: true,
41292 },
41293 {
41294 name: "Bswap16",
41295 argLen: 1,
41296 generic: true,
41297 },
41298 {
41299 name: "Bswap32",
41300 argLen: 1,
41301 generic: true,
41302 },
41303 {
41304 name: "Bswap64",
41305 argLen: 1,
41306 generic: true,
41307 },
41308 {
41309 name: "BitRev8",
41310 argLen: 1,
41311 generic: true,
41312 },
41313 {
41314 name: "BitRev16",
41315 argLen: 1,
41316 generic: true,
41317 },
41318 {
41319 name: "BitRev32",
41320 argLen: 1,
41321 generic: true,
41322 },
41323 {
41324 name: "BitRev64",
41325 argLen: 1,
41326 generic: true,
41327 },
41328 {
41329 name: "PopCount8",
41330 argLen: 1,
41331 generic: true,
41332 },
41333 {
41334 name: "PopCount16",
41335 argLen: 1,
41336 generic: true,
41337 },
41338 {
41339 name: "PopCount32",
41340 argLen: 1,
41341 generic: true,
41342 },
41343 {
41344 name: "PopCount64",
41345 argLen: 1,
41346 generic: true,
41347 },
41348 {
41349 name: "RotateLeft64",
41350 argLen: 2,
41351 generic: true,
41352 },
41353 {
41354 name: "RotateLeft32",
41355 argLen: 2,
41356 generic: true,
41357 },
41358 {
41359 name: "RotateLeft16",
41360 argLen: 2,
41361 generic: true,
41362 },
41363 {
41364 name: "RotateLeft8",
41365 argLen: 2,
41366 generic: true,
41367 },
41368 {
41369 name: "Sqrt",
41370 argLen: 1,
41371 generic: true,
41372 },
41373 {
41374 name: "Sqrt32",
41375 argLen: 1,
41376 generic: true,
41377 },
41378 {
41379 name: "Floor",
41380 argLen: 1,
41381 generic: true,
41382 },
41383 {
41384 name: "Ceil",
41385 argLen: 1,
41386 generic: true,
41387 },
41388 {
41389 name: "Trunc",
41390 argLen: 1,
41391 generic: true,
41392 },
41393 {
41394 name: "Round",
41395 argLen: 1,
41396 generic: true,
41397 },
41398 {
41399 name: "RoundToEven",
41400 argLen: 1,
41401 generic: true,
41402 },
41403 {
41404 name: "Abs",
41405 argLen: 1,
41406 generic: true,
41407 },
41408 {
41409 name: "Copysign",
41410 argLen: 2,
41411 generic: true,
41412 },
41413 {
41414 name: "Min64",
41415 argLen: 2,
41416 generic: true,
41417 },
41418 {
41419 name: "Max64",
41420 argLen: 2,
41421 generic: true,
41422 },
41423 {
41424 name: "Min64u",
41425 argLen: 2,
41426 generic: true,
41427 },
41428 {
41429 name: "Max64u",
41430 argLen: 2,
41431 generic: true,
41432 },
41433 {
41434 name: "Min64F",
41435 argLen: 2,
41436 generic: true,
41437 },
41438 {
41439 name: "Min32F",
41440 argLen: 2,
41441 generic: true,
41442 },
41443 {
41444 name: "Max64F",
41445 argLen: 2,
41446 generic: true,
41447 },
41448 {
41449 name: "Max32F",
41450 argLen: 2,
41451 generic: true,
41452 },
41453 {
41454 name: "FMA",
41455 argLen: 3,
41456 generic: true,
41457 },
41458 {
41459 name: "Phi",
41460 argLen: -1,
41461 zeroWidth: true,
41462 generic: true,
41463 },
41464 {
41465 name: "Copy",
41466 argLen: 1,
41467 generic: true,
41468 },
41469 {
41470 name: "Convert",
41471 argLen: 2,
41472 resultInArg0: true,
41473 zeroWidth: true,
41474 generic: true,
41475 },
41476 {
41477 name: "ConstBool",
41478 auxType: auxBool,
41479 argLen: 0,
41480 generic: true,
41481 },
41482 {
41483 name: "ConstString",
41484 auxType: auxString,
41485 argLen: 0,
41486 generic: true,
41487 },
41488 {
41489 name: "ConstNil",
41490 argLen: 0,
41491 generic: true,
41492 },
41493 {
41494 name: "Const8",
41495 auxType: auxInt8,
41496 argLen: 0,
41497 generic: true,
41498 },
41499 {
41500 name: "Const16",
41501 auxType: auxInt16,
41502 argLen: 0,
41503 generic: true,
41504 },
41505 {
41506 name: "Const32",
41507 auxType: auxInt32,
41508 argLen: 0,
41509 generic: true,
41510 },
41511 {
41512 name: "Const64",
41513 auxType: auxInt64,
41514 argLen: 0,
41515 generic: true,
41516 },
41517 {
41518 name: "Const32F",
41519 auxType: auxFloat32,
41520 argLen: 0,
41521 generic: true,
41522 },
41523 {
41524 name: "Const64F",
41525 auxType: auxFloat64,
41526 argLen: 0,
41527 generic: true,
41528 },
41529 {
41530 name: "ConstInterface",
41531 argLen: 0,
41532 generic: true,
41533 },
41534 {
41535 name: "ConstSlice",
41536 argLen: 0,
41537 generic: true,
41538 },
41539 {
41540 name: "InitMem",
41541 argLen: 0,
41542 zeroWidth: true,
41543 generic: true,
41544 },
41545 {
41546 name: "Arg",
41547 auxType: auxSymOff,
41548 argLen: 0,
41549 zeroWidth: true,
41550 symEffect: SymRead,
41551 generic: true,
41552 },
41553 {
41554 name: "ArgIntReg",
41555 auxType: auxNameOffsetInt8,
41556 argLen: 0,
41557 zeroWidth: true,
41558 generic: true,
41559 },
41560 {
41561 name: "ArgFloatReg",
41562 auxType: auxNameOffsetInt8,
41563 argLen: 0,
41564 zeroWidth: true,
41565 generic: true,
41566 },
41567 {
41568 name: "Addr",
41569 auxType: auxSym,
41570 argLen: 1,
41571 symEffect: SymAddr,
41572 generic: true,
41573 },
41574 {
41575 name: "LocalAddr",
41576 auxType: auxSym,
41577 argLen: 2,
41578 symEffect: SymAddr,
41579 generic: true,
41580 },
41581 {
41582 name: "SP",
41583 argLen: 0,
41584 zeroWidth: true,
41585 fixedReg: true,
41586 generic: true,
41587 },
41588 {
41589 name: "SB",
41590 argLen: 0,
41591 zeroWidth: true,
41592 fixedReg: true,
41593 generic: true,
41594 },
41595 {
41596 name: "SPanchored",
41597 argLen: 2,
41598 zeroWidth: true,
41599 generic: true,
41600 },
41601 {
41602 name: "Load",
41603 argLen: 2,
41604 generic: true,
41605 },
41606 {
41607 name: "Dereference",
41608 argLen: 2,
41609 generic: true,
41610 },
41611 {
41612 name: "Store",
41613 auxType: auxTyp,
41614 argLen: 3,
41615 generic: true,
41616 },
41617 {
41618 name: "Move",
41619 auxType: auxTypSize,
41620 argLen: 3,
41621 generic: true,
41622 },
41623 {
41624 name: "Zero",
41625 auxType: auxTypSize,
41626 argLen: 2,
41627 generic: true,
41628 },
41629 {
41630 name: "StoreWB",
41631 auxType: auxTyp,
41632 argLen: 3,
41633 generic: true,
41634 },
41635 {
41636 name: "MoveWB",
41637 auxType: auxTypSize,
41638 argLen: 3,
41639 generic: true,
41640 },
41641 {
41642 name: "ZeroWB",
41643 auxType: auxTypSize,
41644 argLen: 2,
41645 generic: true,
41646 },
41647 {
41648 name: "WBend",
41649 argLen: 1,
41650 generic: true,
41651 },
41652 {
41653 name: "WB",
41654 auxType: auxInt64,
41655 argLen: 1,
41656 generic: true,
41657 },
41658 {
41659 name: "HasCPUFeature",
41660 auxType: auxSym,
41661 argLen: 0,
41662 symEffect: SymNone,
41663 generic: true,
41664 },
41665 {
41666 name: "PanicBounds",
41667 auxType: auxInt64,
41668 argLen: 3,
41669 call: true,
41670 generic: true,
41671 },
41672 {
41673 name: "PanicExtend",
41674 auxType: auxInt64,
41675 argLen: 4,
41676 call: true,
41677 generic: true,
41678 },
41679 {
41680 name: "ClosureCall",
41681 auxType: auxCallOff,
41682 argLen: -1,
41683 call: true,
41684 generic: true,
41685 },
41686 {
41687 name: "StaticCall",
41688 auxType: auxCallOff,
41689 argLen: -1,
41690 call: true,
41691 generic: true,
41692 },
41693 {
41694 name: "InterCall",
41695 auxType: auxCallOff,
41696 argLen: -1,
41697 call: true,
41698 generic: true,
41699 },
41700 {
41701 name: "TailCall",
41702 auxType: auxCallOff,
41703 argLen: -1,
41704 call: true,
41705 generic: true,
41706 },
41707 {
41708 name: "ClosureLECall",
41709 auxType: auxCallOff,
41710 argLen: -1,
41711 call: true,
41712 generic: true,
41713 },
41714 {
41715 name: "StaticLECall",
41716 auxType: auxCallOff,
41717 argLen: -1,
41718 call: true,
41719 generic: true,
41720 },
41721 {
41722 name: "InterLECall",
41723 auxType: auxCallOff,
41724 argLen: -1,
41725 call: true,
41726 generic: true,
41727 },
41728 {
41729 name: "TailLECall",
41730 auxType: auxCallOff,
41731 argLen: -1,
41732 call: true,
41733 generic: true,
41734 },
41735 {
41736 name: "SignExt8to16",
41737 argLen: 1,
41738 generic: true,
41739 },
41740 {
41741 name: "SignExt8to32",
41742 argLen: 1,
41743 generic: true,
41744 },
41745 {
41746 name: "SignExt8to64",
41747 argLen: 1,
41748 generic: true,
41749 },
41750 {
41751 name: "SignExt16to32",
41752 argLen: 1,
41753 generic: true,
41754 },
41755 {
41756 name: "SignExt16to64",
41757 argLen: 1,
41758 generic: true,
41759 },
41760 {
41761 name: "SignExt32to64",
41762 argLen: 1,
41763 generic: true,
41764 },
41765 {
41766 name: "ZeroExt8to16",
41767 argLen: 1,
41768 generic: true,
41769 },
41770 {
41771 name: "ZeroExt8to32",
41772 argLen: 1,
41773 generic: true,
41774 },
41775 {
41776 name: "ZeroExt8to64",
41777 argLen: 1,
41778 generic: true,
41779 },
41780 {
41781 name: "ZeroExt16to32",
41782 argLen: 1,
41783 generic: true,
41784 },
41785 {
41786 name: "ZeroExt16to64",
41787 argLen: 1,
41788 generic: true,
41789 },
41790 {
41791 name: "ZeroExt32to64",
41792 argLen: 1,
41793 generic: true,
41794 },
41795 {
41796 name: "Trunc16to8",
41797 argLen: 1,
41798 generic: true,
41799 },
41800 {
41801 name: "Trunc32to8",
41802 argLen: 1,
41803 generic: true,
41804 },
41805 {
41806 name: "Trunc32to16",
41807 argLen: 1,
41808 generic: true,
41809 },
41810 {
41811 name: "Trunc64to8",
41812 argLen: 1,
41813 generic: true,
41814 },
41815 {
41816 name: "Trunc64to16",
41817 argLen: 1,
41818 generic: true,
41819 },
41820 {
41821 name: "Trunc64to32",
41822 argLen: 1,
41823 generic: true,
41824 },
41825 {
41826 name: "Cvt32to32F",
41827 argLen: 1,
41828 generic: true,
41829 },
41830 {
41831 name: "Cvt32to64F",
41832 argLen: 1,
41833 generic: true,
41834 },
41835 {
41836 name: "Cvt64to32F",
41837 argLen: 1,
41838 generic: true,
41839 },
41840 {
41841 name: "Cvt64to64F",
41842 argLen: 1,
41843 generic: true,
41844 },
41845 {
41846 name: "Cvt32Fto32",
41847 argLen: 1,
41848 generic: true,
41849 },
41850 {
41851 name: "Cvt32Fto64",
41852 argLen: 1,
41853 generic: true,
41854 },
41855 {
41856 name: "Cvt64Fto32",
41857 argLen: 1,
41858 generic: true,
41859 },
41860 {
41861 name: "Cvt64Fto64",
41862 argLen: 1,
41863 generic: true,
41864 },
41865 {
41866 name: "Cvt32Fto64F",
41867 argLen: 1,
41868 generic: true,
41869 },
41870 {
41871 name: "Cvt64Fto32F",
41872 argLen: 1,
41873 generic: true,
41874 },
41875 {
41876 name: "CvtBoolToUint8",
41877 argLen: 1,
41878 generic: true,
41879 },
41880 {
41881 name: "Round32F",
41882 argLen: 1,
41883 generic: true,
41884 },
41885 {
41886 name: "Round64F",
41887 argLen: 1,
41888 generic: true,
41889 },
41890 {
41891 name: "IsNonNil",
41892 argLen: 1,
41893 generic: true,
41894 },
41895 {
41896 name: "IsInBounds",
41897 argLen: 2,
41898 generic: true,
41899 },
41900 {
41901 name: "IsSliceInBounds",
41902 argLen: 2,
41903 generic: true,
41904 },
41905 {
41906 name: "NilCheck",
41907 argLen: 2,
41908 nilCheck: true,
41909 generic: true,
41910 },
41911 {
41912 name: "GetG",
41913 argLen: 1,
41914 zeroWidth: true,
41915 generic: true,
41916 },
41917 {
41918 name: "GetClosurePtr",
41919 argLen: 0,
41920 generic: true,
41921 },
41922 {
41923 name: "GetCallerPC",
41924 argLen: 0,
41925 generic: true,
41926 },
41927 {
41928 name: "GetCallerSP",
41929 argLen: 1,
41930 generic: true,
41931 },
41932 {
41933 name: "PtrIndex",
41934 argLen: 2,
41935 generic: true,
41936 },
41937 {
41938 name: "OffPtr",
41939 auxType: auxInt64,
41940 argLen: 1,
41941 generic: true,
41942 },
41943 {
41944 name: "SliceMake",
41945 argLen: 3,
41946 generic: true,
41947 },
41948 {
41949 name: "SlicePtr",
41950 argLen: 1,
41951 generic: true,
41952 },
41953 {
41954 name: "SliceLen",
41955 argLen: 1,
41956 generic: true,
41957 },
41958 {
41959 name: "SliceCap",
41960 argLen: 1,
41961 generic: true,
41962 },
41963 {
41964 name: "SlicePtrUnchecked",
41965 argLen: 1,
41966 generic: true,
41967 },
41968 {
41969 name: "ComplexMake",
41970 argLen: 2,
41971 generic: true,
41972 },
41973 {
41974 name: "ComplexReal",
41975 argLen: 1,
41976 generic: true,
41977 },
41978 {
41979 name: "ComplexImag",
41980 argLen: 1,
41981 generic: true,
41982 },
41983 {
41984 name: "StringMake",
41985 argLen: 2,
41986 generic: true,
41987 },
41988 {
41989 name: "StringPtr",
41990 argLen: 1,
41991 generic: true,
41992 },
41993 {
41994 name: "StringLen",
41995 argLen: 1,
41996 generic: true,
41997 },
41998 {
41999 name: "IMake",
42000 argLen: 2,
42001 generic: true,
42002 },
42003 {
42004 name: "ITab",
42005 argLen: 1,
42006 generic: true,
42007 },
42008 {
42009 name: "IData",
42010 argLen: 1,
42011 generic: true,
42012 },
42013 {
42014 name: "StructMake",
42015 argLen: -1,
42016 generic: true,
42017 },
42018 {
42019 name: "StructSelect",
42020 auxType: auxInt64,
42021 argLen: 1,
42022 generic: true,
42023 },
42024 {
42025 name: "ArrayMake0",
42026 argLen: 0,
42027 generic: true,
42028 },
42029 {
42030 name: "ArrayMake1",
42031 argLen: 1,
42032 generic: true,
42033 },
42034 {
42035 name: "ArraySelect",
42036 auxType: auxInt64,
42037 argLen: 1,
42038 generic: true,
42039 },
42040 {
42041 name: "StoreReg",
42042 argLen: 1,
42043 generic: true,
42044 },
42045 {
42046 name: "LoadReg",
42047 argLen: 1,
42048 generic: true,
42049 },
42050 {
42051 name: "FwdRef",
42052 auxType: auxSym,
42053 argLen: 0,
42054 symEffect: SymNone,
42055 generic: true,
42056 },
42057 {
42058 name: "Unknown",
42059 argLen: 0,
42060 generic: true,
42061 },
42062 {
42063 name: "VarDef",
42064 auxType: auxSym,
42065 argLen: 1,
42066 zeroWidth: true,
42067 symEffect: SymNone,
42068 generic: true,
42069 },
42070 {
42071 name: "VarLive",
42072 auxType: auxSym,
42073 argLen: 1,
42074 zeroWidth: true,
42075 symEffect: SymRead,
42076 generic: true,
42077 },
42078 {
42079 name: "KeepAlive",
42080 argLen: 2,
42081 zeroWidth: true,
42082 generic: true,
42083 },
42084 {
42085 name: "InlMark",
42086 auxType: auxInt32,
42087 argLen: 1,
42088 generic: true,
42089 },
42090 {
42091 name: "Int64Make",
42092 argLen: 2,
42093 generic: true,
42094 },
42095 {
42096 name: "Int64Hi",
42097 argLen: 1,
42098 generic: true,
42099 },
42100 {
42101 name: "Int64Lo",
42102 argLen: 1,
42103 generic: true,
42104 },
42105 {
42106 name: "Add32carry",
42107 argLen: 2,
42108 commutative: true,
42109 generic: true,
42110 },
42111 {
42112 name: "Add32withcarry",
42113 argLen: 3,
42114 commutative: true,
42115 generic: true,
42116 },
42117 {
42118 name: "Sub32carry",
42119 argLen: 2,
42120 generic: true,
42121 },
42122 {
42123 name: "Sub32withcarry",
42124 argLen: 3,
42125 generic: true,
42126 },
42127 {
42128 name: "Add64carry",
42129 argLen: 3,
42130 commutative: true,
42131 generic: true,
42132 },
42133 {
42134 name: "Sub64borrow",
42135 argLen: 3,
42136 generic: true,
42137 },
42138 {
42139 name: "Signmask",
42140 argLen: 1,
42141 generic: true,
42142 },
42143 {
42144 name: "Zeromask",
42145 argLen: 1,
42146 generic: true,
42147 },
42148 {
42149 name: "Slicemask",
42150 argLen: 1,
42151 generic: true,
42152 },
42153 {
42154 name: "SpectreIndex",
42155 argLen: 2,
42156 generic: true,
42157 },
42158 {
42159 name: "SpectreSliceIndex",
42160 argLen: 2,
42161 generic: true,
42162 },
42163 {
42164 name: "Cvt32Uto32F",
42165 argLen: 1,
42166 generic: true,
42167 },
42168 {
42169 name: "Cvt32Uto64F",
42170 argLen: 1,
42171 generic: true,
42172 },
42173 {
42174 name: "Cvt32Fto32U",
42175 argLen: 1,
42176 generic: true,
42177 },
42178 {
42179 name: "Cvt64Fto32U",
42180 argLen: 1,
42181 generic: true,
42182 },
42183 {
42184 name: "Cvt64Uto32F",
42185 argLen: 1,
42186 generic: true,
42187 },
42188 {
42189 name: "Cvt64Uto64F",
42190 argLen: 1,
42191 generic: true,
42192 },
42193 {
42194 name: "Cvt32Fto64U",
42195 argLen: 1,
42196 generic: true,
42197 },
42198 {
42199 name: "Cvt64Fto64U",
42200 argLen: 1,
42201 generic: true,
42202 },
42203 {
42204 name: "Select0",
42205 argLen: 1,
42206 zeroWidth: true,
42207 generic: true,
42208 },
42209 {
42210 name: "Select1",
42211 argLen: 1,
42212 zeroWidth: true,
42213 generic: true,
42214 },
42215 {
42216 name: "MakeTuple",
42217 argLen: 2,
42218 generic: true,
42219 },
42220 {
42221 name: "SelectN",
42222 auxType: auxInt64,
42223 argLen: 1,
42224 generic: true,
42225 },
42226 {
42227 name: "SelectNAddr",
42228 auxType: auxInt64,
42229 argLen: 1,
42230 generic: true,
42231 },
42232 {
42233 name: "MakeResult",
42234 argLen: -1,
42235 generic: true,
42236 },
42237 {
42238 name: "AtomicLoad8",
42239 argLen: 2,
42240 generic: true,
42241 },
42242 {
42243 name: "AtomicLoad32",
42244 argLen: 2,
42245 generic: true,
42246 },
42247 {
42248 name: "AtomicLoad64",
42249 argLen: 2,
42250 generic: true,
42251 },
42252 {
42253 name: "AtomicLoadPtr",
42254 argLen: 2,
42255 generic: true,
42256 },
42257 {
42258 name: "AtomicLoadAcq32",
42259 argLen: 2,
42260 generic: true,
42261 },
42262 {
42263 name: "AtomicLoadAcq64",
42264 argLen: 2,
42265 generic: true,
42266 },
42267 {
42268 name: "AtomicStore8",
42269 argLen: 3,
42270 hasSideEffects: true,
42271 generic: true,
42272 },
42273 {
42274 name: "AtomicStore32",
42275 argLen: 3,
42276 hasSideEffects: true,
42277 generic: true,
42278 },
42279 {
42280 name: "AtomicStore64",
42281 argLen: 3,
42282 hasSideEffects: true,
42283 generic: true,
42284 },
42285 {
42286 name: "AtomicStorePtrNoWB",
42287 argLen: 3,
42288 hasSideEffects: true,
42289 generic: true,
42290 },
42291 {
42292 name: "AtomicStoreRel32",
42293 argLen: 3,
42294 hasSideEffects: true,
42295 generic: true,
42296 },
42297 {
42298 name: "AtomicStoreRel64",
42299 argLen: 3,
42300 hasSideEffects: true,
42301 generic: true,
42302 },
42303 {
42304 name: "AtomicExchange8",
42305 argLen: 3,
42306 hasSideEffects: true,
42307 generic: true,
42308 },
42309 {
42310 name: "AtomicExchange32",
42311 argLen: 3,
42312 hasSideEffects: true,
42313 generic: true,
42314 },
42315 {
42316 name: "AtomicExchange64",
42317 argLen: 3,
42318 hasSideEffects: true,
42319 generic: true,
42320 },
42321 {
42322 name: "AtomicAdd32",
42323 argLen: 3,
42324 hasSideEffects: true,
42325 generic: true,
42326 },
42327 {
42328 name: "AtomicAdd64",
42329 argLen: 3,
42330 hasSideEffects: true,
42331 generic: true,
42332 },
42333 {
42334 name: "AtomicCompareAndSwap32",
42335 argLen: 4,
42336 hasSideEffects: true,
42337 generic: true,
42338 },
42339 {
42340 name: "AtomicCompareAndSwap64",
42341 argLen: 4,
42342 hasSideEffects: true,
42343 generic: true,
42344 },
42345 {
42346 name: "AtomicCompareAndSwapRel32",
42347 argLen: 4,
42348 hasSideEffects: true,
42349 generic: true,
42350 },
42351 {
42352 name: "AtomicAnd8",
42353 argLen: 3,
42354 hasSideEffects: true,
42355 generic: true,
42356 },
42357 {
42358 name: "AtomicOr8",
42359 argLen: 3,
42360 hasSideEffects: true,
42361 generic: true,
42362 },
42363 {
42364 name: "AtomicAnd32",
42365 argLen: 3,
42366 hasSideEffects: true,
42367 generic: true,
42368 },
42369 {
42370 name: "AtomicOr32",
42371 argLen: 3,
42372 hasSideEffects: true,
42373 generic: true,
42374 },
42375 {
42376 name: "AtomicAnd64value",
42377 argLen: 3,
42378 hasSideEffects: true,
42379 generic: true,
42380 },
42381 {
42382 name: "AtomicAnd32value",
42383 argLen: 3,
42384 hasSideEffects: true,
42385 generic: true,
42386 },
42387 {
42388 name: "AtomicAnd8value",
42389 argLen: 3,
42390 hasSideEffects: true,
42391 generic: true,
42392 },
42393 {
42394 name: "AtomicOr64value",
42395 argLen: 3,
42396 hasSideEffects: true,
42397 generic: true,
42398 },
42399 {
42400 name: "AtomicOr32value",
42401 argLen: 3,
42402 hasSideEffects: true,
42403 generic: true,
42404 },
42405 {
42406 name: "AtomicOr8value",
42407 argLen: 3,
42408 hasSideEffects: true,
42409 generic: true,
42410 },
42411 {
42412 name: "AtomicStore8Variant",
42413 argLen: 3,
42414 hasSideEffects: true,
42415 generic: true,
42416 },
42417 {
42418 name: "AtomicStore32Variant",
42419 argLen: 3,
42420 hasSideEffects: true,
42421 generic: true,
42422 },
42423 {
42424 name: "AtomicStore64Variant",
42425 argLen: 3,
42426 hasSideEffects: true,
42427 generic: true,
42428 },
42429 {
42430 name: "AtomicAdd32Variant",
42431 argLen: 3,
42432 hasSideEffects: true,
42433 generic: true,
42434 },
42435 {
42436 name: "AtomicAdd64Variant",
42437 argLen: 3,
42438 hasSideEffects: true,
42439 generic: true,
42440 },
42441 {
42442 name: "AtomicExchange8Variant",
42443 argLen: 3,
42444 hasSideEffects: true,
42445 generic: true,
42446 },
42447 {
42448 name: "AtomicExchange32Variant",
42449 argLen: 3,
42450 hasSideEffects: true,
42451 generic: true,
42452 },
42453 {
42454 name: "AtomicExchange64Variant",
42455 argLen: 3,
42456 hasSideEffects: true,
42457 generic: true,
42458 },
42459 {
42460 name: "AtomicCompareAndSwap32Variant",
42461 argLen: 4,
42462 hasSideEffects: true,
42463 generic: true,
42464 },
42465 {
42466 name: "AtomicCompareAndSwap64Variant",
42467 argLen: 4,
42468 hasSideEffects: true,
42469 generic: true,
42470 },
42471 {
42472 name: "AtomicAnd64valueVariant",
42473 argLen: 3,
42474 hasSideEffects: true,
42475 generic: true,
42476 },
42477 {
42478 name: "AtomicOr64valueVariant",
42479 argLen: 3,
42480 hasSideEffects: true,
42481 generic: true,
42482 },
42483 {
42484 name: "AtomicAnd32valueVariant",
42485 argLen: 3,
42486 hasSideEffects: true,
42487 generic: true,
42488 },
42489 {
42490 name: "AtomicOr32valueVariant",
42491 argLen: 3,
42492 hasSideEffects: true,
42493 generic: true,
42494 },
42495 {
42496 name: "AtomicAnd8valueVariant",
42497 argLen: 3,
42498 hasSideEffects: true,
42499 generic: true,
42500 },
42501 {
42502 name: "AtomicOr8valueVariant",
42503 argLen: 3,
42504 hasSideEffects: true,
42505 generic: true,
42506 },
42507 {
42508 name: "PubBarrier",
42509 argLen: 1,
42510 hasSideEffects: true,
42511 generic: true,
42512 },
42513 {
42514 name: "Clobber",
42515 auxType: auxSymOff,
42516 argLen: 0,
42517 symEffect: SymNone,
42518 generic: true,
42519 },
42520 {
42521 name: "ClobberReg",
42522 argLen: 0,
42523 generic: true,
42524 },
42525 {
42526 name: "PrefetchCache",
42527 argLen: 2,
42528 hasSideEffects: true,
42529 generic: true,
42530 },
42531 {
42532 name: "PrefetchCacheStreamed",
42533 argLen: 2,
42534 hasSideEffects: true,
42535 generic: true,
42536 },
42537 }
42538
42539 func (o Op) Asm() obj.As { return opcodeTable[o].asm }
42540 func (o Op) Scale() int16 { return int16(opcodeTable[o].scale) }
42541 func (o Op) String() string { return opcodeTable[o].name }
42542 func (o Op) SymEffect() SymEffect { return opcodeTable[o].symEffect }
42543 func (o Op) IsCall() bool { return opcodeTable[o].call }
42544 func (o Op) IsTailCall() bool { return opcodeTable[o].tailCall }
42545 func (o Op) HasSideEffects() bool { return opcodeTable[o].hasSideEffects }
42546 func (o Op) UnsafePoint() bool { return opcodeTable[o].unsafePoint }
42547 func (o Op) ResultInArg0() bool { return opcodeTable[o].resultInArg0 }
42548
42549 var registers386 = [...]Register{
42550 {0, x86.REG_AX, "AX"},
42551 {1, x86.REG_CX, "CX"},
42552 {2, x86.REG_DX, "DX"},
42553 {3, x86.REG_BX, "BX"},
42554 {4, x86.REGSP, "SP"},
42555 {5, x86.REG_BP, "BP"},
42556 {6, x86.REG_SI, "SI"},
42557 {7, x86.REG_DI, "DI"},
42558 {8, x86.REG_X0, "X0"},
42559 {9, x86.REG_X1, "X1"},
42560 {10, x86.REG_X2, "X2"},
42561 {11, x86.REG_X3, "X3"},
42562 {12, x86.REG_X4, "X4"},
42563 {13, x86.REG_X5, "X5"},
42564 {14, x86.REG_X6, "X6"},
42565 {15, x86.REG_X7, "X7"},
42566 {16, 0, "SB"},
42567 }
42568 var paramIntReg386 = []int8(nil)
42569 var paramFloatReg386 = []int8(nil)
42570 var gpRegMask386 = regMask(239)
42571 var fpRegMask386 = regMask(65280)
42572 var specialRegMask386 = regMask(0)
42573 var framepointerReg386 = int8(5)
42574 var linkReg386 = int8(-1)
42575 var registersAMD64 = [...]Register{
42576 {0, x86.REG_AX, "AX"},
42577 {1, x86.REG_CX, "CX"},
42578 {2, x86.REG_DX, "DX"},
42579 {3, x86.REG_BX, "BX"},
42580 {4, x86.REGSP, "SP"},
42581 {5, x86.REG_BP, "BP"},
42582 {6, x86.REG_SI, "SI"},
42583 {7, x86.REG_DI, "DI"},
42584 {8, x86.REG_R8, "R8"},
42585 {9, x86.REG_R9, "R9"},
42586 {10, x86.REG_R10, "R10"},
42587 {11, x86.REG_R11, "R11"},
42588 {12, x86.REG_R12, "R12"},
42589 {13, x86.REG_R13, "R13"},
42590 {14, x86.REGG, "g"},
42591 {15, x86.REG_R15, "R15"},
42592 {16, x86.REG_X0, "X0"},
42593 {17, x86.REG_X1, "X1"},
42594 {18, x86.REG_X2, "X2"},
42595 {19, x86.REG_X3, "X3"},
42596 {20, x86.REG_X4, "X4"},
42597 {21, x86.REG_X5, "X5"},
42598 {22, x86.REG_X6, "X6"},
42599 {23, x86.REG_X7, "X7"},
42600 {24, x86.REG_X8, "X8"},
42601 {25, x86.REG_X9, "X9"},
42602 {26, x86.REG_X10, "X10"},
42603 {27, x86.REG_X11, "X11"},
42604 {28, x86.REG_X12, "X12"},
42605 {29, x86.REG_X13, "X13"},
42606 {30, x86.REG_X14, "X14"},
42607 {31, x86.REG_X15, "X15"},
42608 {32, 0, "SB"},
42609 }
42610 var paramIntRegAMD64 = []int8{0, 3, 1, 7, 6, 8, 9, 10, 11}
42611 var paramFloatRegAMD64 = []int8{16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30}
42612 var gpRegMaskAMD64 = regMask(49135)
42613 var fpRegMaskAMD64 = regMask(2147418112)
42614 var specialRegMaskAMD64 = regMask(2147483648)
42615 var framepointerRegAMD64 = int8(5)
42616 var linkRegAMD64 = int8(-1)
42617 var registersARM = [...]Register{
42618 {0, arm.REG_R0, "R0"},
42619 {1, arm.REG_R1, "R1"},
42620 {2, arm.REG_R2, "R2"},
42621 {3, arm.REG_R3, "R3"},
42622 {4, arm.REG_R4, "R4"},
42623 {5, arm.REG_R5, "R5"},
42624 {6, arm.REG_R6, "R6"},
42625 {7, arm.REG_R7, "R7"},
42626 {8, arm.REG_R8, "R8"},
42627 {9, arm.REG_R9, "R9"},
42628 {10, arm.REGG, "g"},
42629 {11, arm.REG_R11, "R11"},
42630 {12, arm.REG_R12, "R12"},
42631 {13, arm.REGSP, "SP"},
42632 {14, arm.REG_R14, "R14"},
42633 {15, arm.REG_R15, "R15"},
42634 {16, arm.REG_F0, "F0"},
42635 {17, arm.REG_F1, "F1"},
42636 {18, arm.REG_F2, "F2"},
42637 {19, arm.REG_F3, "F3"},
42638 {20, arm.REG_F4, "F4"},
42639 {21, arm.REG_F5, "F5"},
42640 {22, arm.REG_F6, "F6"},
42641 {23, arm.REG_F7, "F7"},
42642 {24, arm.REG_F8, "F8"},
42643 {25, arm.REG_F9, "F9"},
42644 {26, arm.REG_F10, "F10"},
42645 {27, arm.REG_F11, "F11"},
42646 {28, arm.REG_F12, "F12"},
42647 {29, arm.REG_F13, "F13"},
42648 {30, arm.REG_F14, "F14"},
42649 {31, arm.REG_F15, "F15"},
42650 {32, 0, "SB"},
42651 }
42652 var paramIntRegARM = []int8(nil)
42653 var paramFloatRegARM = []int8(nil)
42654 var gpRegMaskARM = regMask(21503)
42655 var fpRegMaskARM = regMask(4294901760)
42656 var specialRegMaskARM = regMask(0)
42657 var framepointerRegARM = int8(-1)
42658 var linkRegARM = int8(14)
42659 var registersARM64 = [...]Register{
42660 {0, arm64.REG_R0, "R0"},
42661 {1, arm64.REG_R1, "R1"},
42662 {2, arm64.REG_R2, "R2"},
42663 {3, arm64.REG_R3, "R3"},
42664 {4, arm64.REG_R4, "R4"},
42665 {5, arm64.REG_R5, "R5"},
42666 {6, arm64.REG_R6, "R6"},
42667 {7, arm64.REG_R7, "R7"},
42668 {8, arm64.REG_R8, "R8"},
42669 {9, arm64.REG_R9, "R9"},
42670 {10, arm64.REG_R10, "R10"},
42671 {11, arm64.REG_R11, "R11"},
42672 {12, arm64.REG_R12, "R12"},
42673 {13, arm64.REG_R13, "R13"},
42674 {14, arm64.REG_R14, "R14"},
42675 {15, arm64.REG_R15, "R15"},
42676 {16, arm64.REG_R16, "R16"},
42677 {17, arm64.REG_R17, "R17"},
42678 {18, arm64.REG_R19, "R19"},
42679 {19, arm64.REG_R20, "R20"},
42680 {20, arm64.REG_R21, "R21"},
42681 {21, arm64.REG_R22, "R22"},
42682 {22, arm64.REG_R23, "R23"},
42683 {23, arm64.REG_R24, "R24"},
42684 {24, arm64.REG_R25, "R25"},
42685 {25, arm64.REG_R26, "R26"},
42686 {26, arm64.REGG, "g"},
42687 {27, arm64.REG_R29, "R29"},
42688 {28, arm64.REG_R30, "R30"},
42689 {29, arm64.REGZERO, "ZERO"},
42690 {30, arm64.REGSP, "SP"},
42691 {31, arm64.REG_F0, "F0"},
42692 {32, arm64.REG_F1, "F1"},
42693 {33, arm64.REG_F2, "F2"},
42694 {34, arm64.REG_F3, "F3"},
42695 {35, arm64.REG_F4, "F4"},
42696 {36, arm64.REG_F5, "F5"},
42697 {37, arm64.REG_F6, "F6"},
42698 {38, arm64.REG_F7, "F7"},
42699 {39, arm64.REG_F8, "F8"},
42700 {40, arm64.REG_F9, "F9"},
42701 {41, arm64.REG_F10, "F10"},
42702 {42, arm64.REG_F11, "F11"},
42703 {43, arm64.REG_F12, "F12"},
42704 {44, arm64.REG_F13, "F13"},
42705 {45, arm64.REG_F14, "F14"},
42706 {46, arm64.REG_F15, "F15"},
42707 {47, arm64.REG_F16, "F16"},
42708 {48, arm64.REG_F17, "F17"},
42709 {49, arm64.REG_F18, "F18"},
42710 {50, arm64.REG_F19, "F19"},
42711 {51, arm64.REG_F20, "F20"},
42712 {52, arm64.REG_F21, "F21"},
42713 {53, arm64.REG_F22, "F22"},
42714 {54, arm64.REG_F23, "F23"},
42715 {55, arm64.REG_F24, "F24"},
42716 {56, arm64.REG_F25, "F25"},
42717 {57, arm64.REG_F26, "F26"},
42718 {58, arm64.REG_F27, "F27"},
42719 {59, arm64.REG_F28, "F28"},
42720 {60, arm64.REG_F29, "F29"},
42721 {61, arm64.REG_F30, "F30"},
42722 {62, arm64.REG_F31, "F31"},
42723 {63, 0, "SB"},
42724 }
42725 var paramIntRegARM64 = []int8{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}
42726 var paramFloatRegARM64 = []int8{31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46}
42727 var gpRegMaskARM64 = regMask(335544319)
42728 var fpRegMaskARM64 = regMask(9223372034707292160)
42729 var specialRegMaskARM64 = regMask(0)
42730 var framepointerRegARM64 = int8(-1)
42731 var linkRegARM64 = int8(28)
42732 var registersLOONG64 = [...]Register{
42733 {0, loong64.REG_R0, "R0"},
42734 {1, loong64.REG_R1, "R1"},
42735 {2, loong64.REGSP, "SP"},
42736 {3, loong64.REG_R4, "R4"},
42737 {4, loong64.REG_R5, "R5"},
42738 {5, loong64.REG_R6, "R6"},
42739 {6, loong64.REG_R7, "R7"},
42740 {7, loong64.REG_R8, "R8"},
42741 {8, loong64.REG_R9, "R9"},
42742 {9, loong64.REG_R10, "R10"},
42743 {10, loong64.REG_R11, "R11"},
42744 {11, loong64.REG_R12, "R12"},
42745 {12, loong64.REG_R13, "R13"},
42746 {13, loong64.REG_R14, "R14"},
42747 {14, loong64.REG_R15, "R15"},
42748 {15, loong64.REG_R16, "R16"},
42749 {16, loong64.REG_R17, "R17"},
42750 {17, loong64.REG_R18, "R18"},
42751 {18, loong64.REG_R19, "R19"},
42752 {19, loong64.REG_R20, "R20"},
42753 {20, loong64.REG_R21, "R21"},
42754 {21, loong64.REGG, "g"},
42755 {22, loong64.REG_R23, "R23"},
42756 {23, loong64.REG_R24, "R24"},
42757 {24, loong64.REG_R25, "R25"},
42758 {25, loong64.REG_R26, "R26"},
42759 {26, loong64.REG_R27, "R27"},
42760 {27, loong64.REG_R28, "R28"},
42761 {28, loong64.REG_R29, "R29"},
42762 {29, loong64.REG_R31, "R31"},
42763 {30, loong64.REG_F0, "F0"},
42764 {31, loong64.REG_F1, "F1"},
42765 {32, loong64.REG_F2, "F2"},
42766 {33, loong64.REG_F3, "F3"},
42767 {34, loong64.REG_F4, "F4"},
42768 {35, loong64.REG_F5, "F5"},
42769 {36, loong64.REG_F6, "F6"},
42770 {37, loong64.REG_F7, "F7"},
42771 {38, loong64.REG_F8, "F8"},
42772 {39, loong64.REG_F9, "F9"},
42773 {40, loong64.REG_F10, "F10"},
42774 {41, loong64.REG_F11, "F11"},
42775 {42, loong64.REG_F12, "F12"},
42776 {43, loong64.REG_F13, "F13"},
42777 {44, loong64.REG_F14, "F14"},
42778 {45, loong64.REG_F15, "F15"},
42779 {46, loong64.REG_F16, "F16"},
42780 {47, loong64.REG_F17, "F17"},
42781 {48, loong64.REG_F18, "F18"},
42782 {49, loong64.REG_F19, "F19"},
42783 {50, loong64.REG_F20, "F20"},
42784 {51, loong64.REG_F21, "F21"},
42785 {52, loong64.REG_F22, "F22"},
42786 {53, loong64.REG_F23, "F23"},
42787 {54, loong64.REG_F24, "F24"},
42788 {55, loong64.REG_F25, "F25"},
42789 {56, loong64.REG_F26, "F26"},
42790 {57, loong64.REG_F27, "F27"},
42791 {58, loong64.REG_F28, "F28"},
42792 {59, loong64.REG_F29, "F29"},
42793 {60, loong64.REG_F30, "F30"},
42794 {61, loong64.REG_F31, "F31"},
42795 {62, 0, "SB"},
42796 }
42797 var paramIntRegLOONG64 = []int8{3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18}
42798 var paramFloatRegLOONG64 = []int8{30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45}
42799 var gpRegMaskLOONG64 = regMask(1071644664)
42800 var fpRegMaskLOONG64 = regMask(4611686017353646080)
42801 var specialRegMaskLOONG64 = regMask(0)
42802 var framepointerRegLOONG64 = int8(-1)
42803 var linkRegLOONG64 = int8(1)
42804 var registersMIPS = [...]Register{
42805 {0, mips.REG_R0, "R0"},
42806 {1, mips.REG_R1, "R1"},
42807 {2, mips.REG_R2, "R2"},
42808 {3, mips.REG_R3, "R3"},
42809 {4, mips.REG_R4, "R4"},
42810 {5, mips.REG_R5, "R5"},
42811 {6, mips.REG_R6, "R6"},
42812 {7, mips.REG_R7, "R7"},
42813 {8, mips.REG_R8, "R8"},
42814 {9, mips.REG_R9, "R9"},
42815 {10, mips.REG_R10, "R10"},
42816 {11, mips.REG_R11, "R11"},
42817 {12, mips.REG_R12, "R12"},
42818 {13, mips.REG_R13, "R13"},
42819 {14, mips.REG_R14, "R14"},
42820 {15, mips.REG_R15, "R15"},
42821 {16, mips.REG_R16, "R16"},
42822 {17, mips.REG_R17, "R17"},
42823 {18, mips.REG_R18, "R18"},
42824 {19, mips.REG_R19, "R19"},
42825 {20, mips.REG_R20, "R20"},
42826 {21, mips.REG_R21, "R21"},
42827 {22, mips.REG_R22, "R22"},
42828 {23, mips.REG_R24, "R24"},
42829 {24, mips.REG_R25, "R25"},
42830 {25, mips.REG_R28, "R28"},
42831 {26, mips.REGSP, "SP"},
42832 {27, mips.REGG, "g"},
42833 {28, mips.REG_R31, "R31"},
42834 {29, mips.REG_F0, "F0"},
42835 {30, mips.REG_F2, "F2"},
42836 {31, mips.REG_F4, "F4"},
42837 {32, mips.REG_F6, "F6"},
42838 {33, mips.REG_F8, "F8"},
42839 {34, mips.REG_F10, "F10"},
42840 {35, mips.REG_F12, "F12"},
42841 {36, mips.REG_F14, "F14"},
42842 {37, mips.REG_F16, "F16"},
42843 {38, mips.REG_F18, "F18"},
42844 {39, mips.REG_F20, "F20"},
42845 {40, mips.REG_F22, "F22"},
42846 {41, mips.REG_F24, "F24"},
42847 {42, mips.REG_F26, "F26"},
42848 {43, mips.REG_F28, "F28"},
42849 {44, mips.REG_F30, "F30"},
42850 {45, mips.REG_HI, "HI"},
42851 {46, mips.REG_LO, "LO"},
42852 {47, 0, "SB"},
42853 }
42854 var paramIntRegMIPS = []int8(nil)
42855 var paramFloatRegMIPS = []int8(nil)
42856 var gpRegMaskMIPS = regMask(335544318)
42857 var fpRegMaskMIPS = regMask(35183835217920)
42858 var specialRegMaskMIPS = regMask(105553116266496)
42859 var framepointerRegMIPS = int8(-1)
42860 var linkRegMIPS = int8(28)
42861 var registersMIPS64 = [...]Register{
42862 {0, mips.REG_R0, "R0"},
42863 {1, mips.REG_R1, "R1"},
42864 {2, mips.REG_R2, "R2"},
42865 {3, mips.REG_R3, "R3"},
42866 {4, mips.REG_R4, "R4"},
42867 {5, mips.REG_R5, "R5"},
42868 {6, mips.REG_R6, "R6"},
42869 {7, mips.REG_R7, "R7"},
42870 {8, mips.REG_R8, "R8"},
42871 {9, mips.REG_R9, "R9"},
42872 {10, mips.REG_R10, "R10"},
42873 {11, mips.REG_R11, "R11"},
42874 {12, mips.REG_R12, "R12"},
42875 {13, mips.REG_R13, "R13"},
42876 {14, mips.REG_R14, "R14"},
42877 {15, mips.REG_R15, "R15"},
42878 {16, mips.REG_R16, "R16"},
42879 {17, mips.REG_R17, "R17"},
42880 {18, mips.REG_R18, "R18"},
42881 {19, mips.REG_R19, "R19"},
42882 {20, mips.REG_R20, "R20"},
42883 {21, mips.REG_R21, "R21"},
42884 {22, mips.REG_R22, "R22"},
42885 {23, mips.REG_R24, "R24"},
42886 {24, mips.REG_R25, "R25"},
42887 {25, mips.REGSP, "SP"},
42888 {26, mips.REGG, "g"},
42889 {27, mips.REG_R31, "R31"},
42890 {28, mips.REG_F0, "F0"},
42891 {29, mips.REG_F1, "F1"},
42892 {30, mips.REG_F2, "F2"},
42893 {31, mips.REG_F3, "F3"},
42894 {32, mips.REG_F4, "F4"},
42895 {33, mips.REG_F5, "F5"},
42896 {34, mips.REG_F6, "F6"},
42897 {35, mips.REG_F7, "F7"},
42898 {36, mips.REG_F8, "F8"},
42899 {37, mips.REG_F9, "F9"},
42900 {38, mips.REG_F10, "F10"},
42901 {39, mips.REG_F11, "F11"},
42902 {40, mips.REG_F12, "F12"},
42903 {41, mips.REG_F13, "F13"},
42904 {42, mips.REG_F14, "F14"},
42905 {43, mips.REG_F15, "F15"},
42906 {44, mips.REG_F16, "F16"},
42907 {45, mips.REG_F17, "F17"},
42908 {46, mips.REG_F18, "F18"},
42909 {47, mips.REG_F19, "F19"},
42910 {48, mips.REG_F20, "F20"},
42911 {49, mips.REG_F21, "F21"},
42912 {50, mips.REG_F22, "F22"},
42913 {51, mips.REG_F23, "F23"},
42914 {52, mips.REG_F24, "F24"},
42915 {53, mips.REG_F25, "F25"},
42916 {54, mips.REG_F26, "F26"},
42917 {55, mips.REG_F27, "F27"},
42918 {56, mips.REG_F28, "F28"},
42919 {57, mips.REG_F29, "F29"},
42920 {58, mips.REG_F30, "F30"},
42921 {59, mips.REG_F31, "F31"},
42922 {60, mips.REG_HI, "HI"},
42923 {61, mips.REG_LO, "LO"},
42924 {62, 0, "SB"},
42925 }
42926 var paramIntRegMIPS64 = []int8(nil)
42927 var paramFloatRegMIPS64 = []int8(nil)
42928 var gpRegMaskMIPS64 = regMask(167772158)
42929 var fpRegMaskMIPS64 = regMask(1152921504338411520)
42930 var specialRegMaskMIPS64 = regMask(3458764513820540928)
42931 var framepointerRegMIPS64 = int8(-1)
42932 var linkRegMIPS64 = int8(27)
42933 var registersPPC64 = [...]Register{
42934 {0, ppc64.REG_R0, "R0"},
42935 {1, ppc64.REGSP, "SP"},
42936 {2, 0, "SB"},
42937 {3, ppc64.REG_R3, "R3"},
42938 {4, ppc64.REG_R4, "R4"},
42939 {5, ppc64.REG_R5, "R5"},
42940 {6, ppc64.REG_R6, "R6"},
42941 {7, ppc64.REG_R7, "R7"},
42942 {8, ppc64.REG_R8, "R8"},
42943 {9, ppc64.REG_R9, "R9"},
42944 {10, ppc64.REG_R10, "R10"},
42945 {11, ppc64.REG_R11, "R11"},
42946 {12, ppc64.REG_R12, "R12"},
42947 {13, ppc64.REG_R13, "R13"},
42948 {14, ppc64.REG_R14, "R14"},
42949 {15, ppc64.REG_R15, "R15"},
42950 {16, ppc64.REG_R16, "R16"},
42951 {17, ppc64.REG_R17, "R17"},
42952 {18, ppc64.REG_R18, "R18"},
42953 {19, ppc64.REG_R19, "R19"},
42954 {20, ppc64.REG_R20, "R20"},
42955 {21, ppc64.REG_R21, "R21"},
42956 {22, ppc64.REG_R22, "R22"},
42957 {23, ppc64.REG_R23, "R23"},
42958 {24, ppc64.REG_R24, "R24"},
42959 {25, ppc64.REG_R25, "R25"},
42960 {26, ppc64.REG_R26, "R26"},
42961 {27, ppc64.REG_R27, "R27"},
42962 {28, ppc64.REG_R28, "R28"},
42963 {29, ppc64.REG_R29, "R29"},
42964 {30, ppc64.REGG, "g"},
42965 {31, ppc64.REG_R31, "R31"},
42966 {32, ppc64.REG_F0, "F0"},
42967 {33, ppc64.REG_F1, "F1"},
42968 {34, ppc64.REG_F2, "F2"},
42969 {35, ppc64.REG_F3, "F3"},
42970 {36, ppc64.REG_F4, "F4"},
42971 {37, ppc64.REG_F5, "F5"},
42972 {38, ppc64.REG_F6, "F6"},
42973 {39, ppc64.REG_F7, "F7"},
42974 {40, ppc64.REG_F8, "F8"},
42975 {41, ppc64.REG_F9, "F9"},
42976 {42, ppc64.REG_F10, "F10"},
42977 {43, ppc64.REG_F11, "F11"},
42978 {44, ppc64.REG_F12, "F12"},
42979 {45, ppc64.REG_F13, "F13"},
42980 {46, ppc64.REG_F14, "F14"},
42981 {47, ppc64.REG_F15, "F15"},
42982 {48, ppc64.REG_F16, "F16"},
42983 {49, ppc64.REG_F17, "F17"},
42984 {50, ppc64.REG_F18, "F18"},
42985 {51, ppc64.REG_F19, "F19"},
42986 {52, ppc64.REG_F20, "F20"},
42987 {53, ppc64.REG_F21, "F21"},
42988 {54, ppc64.REG_F22, "F22"},
42989 {55, ppc64.REG_F23, "F23"},
42990 {56, ppc64.REG_F24, "F24"},
42991 {57, ppc64.REG_F25, "F25"},
42992 {58, ppc64.REG_F26, "F26"},
42993 {59, ppc64.REG_F27, "F27"},
42994 {60, ppc64.REG_F28, "F28"},
42995 {61, ppc64.REG_F29, "F29"},
42996 {62, ppc64.REG_F30, "F30"},
42997 {63, ppc64.REG_XER, "XER"},
42998 }
42999 var paramIntRegPPC64 = []int8{3, 4, 5, 6, 7, 8, 9, 10, 14, 15, 16, 17}
43000 var paramFloatRegPPC64 = []int8{33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44}
43001 var gpRegMaskPPC64 = regMask(1073733624)
43002 var fpRegMaskPPC64 = regMask(9223372032559808512)
43003 var specialRegMaskPPC64 = regMask(9223372036854775808)
43004 var framepointerRegPPC64 = int8(-1)
43005 var linkRegPPC64 = int8(-1)
43006 var registersRISCV64 = [...]Register{
43007 {0, riscv.REG_X0, "X0"},
43008 {1, riscv.REGSP, "SP"},
43009 {2, riscv.REG_X3, "X3"},
43010 {3, riscv.REG_X4, "X4"},
43011 {4, riscv.REG_X5, "X5"},
43012 {5, riscv.REG_X6, "X6"},
43013 {6, riscv.REG_X7, "X7"},
43014 {7, riscv.REG_X8, "X8"},
43015 {8, riscv.REG_X9, "X9"},
43016 {9, riscv.REG_X10, "X10"},
43017 {10, riscv.REG_X11, "X11"},
43018 {11, riscv.REG_X12, "X12"},
43019 {12, riscv.REG_X13, "X13"},
43020 {13, riscv.REG_X14, "X14"},
43021 {14, riscv.REG_X15, "X15"},
43022 {15, riscv.REG_X16, "X16"},
43023 {16, riscv.REG_X17, "X17"},
43024 {17, riscv.REG_X18, "X18"},
43025 {18, riscv.REG_X19, "X19"},
43026 {19, riscv.REG_X20, "X20"},
43027 {20, riscv.REG_X21, "X21"},
43028 {21, riscv.REG_X22, "X22"},
43029 {22, riscv.REG_X23, "X23"},
43030 {23, riscv.REG_X24, "X24"},
43031 {24, riscv.REG_X25, "X25"},
43032 {25, riscv.REG_X26, "X26"},
43033 {26, riscv.REGG, "g"},
43034 {27, riscv.REG_X28, "X28"},
43035 {28, riscv.REG_X29, "X29"},
43036 {29, riscv.REG_X30, "X30"},
43037 {30, riscv.REG_X31, "X31"},
43038 {31, riscv.REG_F0, "F0"},
43039 {32, riscv.REG_F1, "F1"},
43040 {33, riscv.REG_F2, "F2"},
43041 {34, riscv.REG_F3, "F3"},
43042 {35, riscv.REG_F4, "F4"},
43043 {36, riscv.REG_F5, "F5"},
43044 {37, riscv.REG_F6, "F6"},
43045 {38, riscv.REG_F7, "F7"},
43046 {39, riscv.REG_F8, "F8"},
43047 {40, riscv.REG_F9, "F9"},
43048 {41, riscv.REG_F10, "F10"},
43049 {42, riscv.REG_F11, "F11"},
43050 {43, riscv.REG_F12, "F12"},
43051 {44, riscv.REG_F13, "F13"},
43052 {45, riscv.REG_F14, "F14"},
43053 {46, riscv.REG_F15, "F15"},
43054 {47, riscv.REG_F16, "F16"},
43055 {48, riscv.REG_F17, "F17"},
43056 {49, riscv.REG_F18, "F18"},
43057 {50, riscv.REG_F19, "F19"},
43058 {51, riscv.REG_F20, "F20"},
43059 {52, riscv.REG_F21, "F21"},
43060 {53, riscv.REG_F22, "F22"},
43061 {54, riscv.REG_F23, "F23"},
43062 {55, riscv.REG_F24, "F24"},
43063 {56, riscv.REG_F25, "F25"},
43064 {57, riscv.REG_F26, "F26"},
43065 {58, riscv.REG_F27, "F27"},
43066 {59, riscv.REG_F28, "F28"},
43067 {60, riscv.REG_F29, "F29"},
43068 {61, riscv.REG_F30, "F30"},
43069 {62, riscv.REG_F31, "F31"},
43070 {63, 0, "SB"},
43071 }
43072 var paramIntRegRISCV64 = []int8{9, 10, 11, 12, 13, 14, 15, 16, 7, 8, 17, 18, 19, 20, 21, 22}
43073 var paramFloatRegRISCV64 = []int8{41, 42, 43, 44, 45, 46, 47, 48, 39, 40, 49, 50, 51, 52, 53, 54}
43074 var gpRegMaskRISCV64 = regMask(1006632944)
43075 var fpRegMaskRISCV64 = regMask(9223372034707292160)
43076 var specialRegMaskRISCV64 = regMask(0)
43077 var framepointerRegRISCV64 = int8(-1)
43078 var linkRegRISCV64 = int8(0)
43079 var registersS390X = [...]Register{
43080 {0, s390x.REG_R0, "R0"},
43081 {1, s390x.REG_R1, "R1"},
43082 {2, s390x.REG_R2, "R2"},
43083 {3, s390x.REG_R3, "R3"},
43084 {4, s390x.REG_R4, "R4"},
43085 {5, s390x.REG_R5, "R5"},
43086 {6, s390x.REG_R6, "R6"},
43087 {7, s390x.REG_R7, "R7"},
43088 {8, s390x.REG_R8, "R8"},
43089 {9, s390x.REG_R9, "R9"},
43090 {10, s390x.REG_R10, "R10"},
43091 {11, s390x.REG_R11, "R11"},
43092 {12, s390x.REG_R12, "R12"},
43093 {13, s390x.REGG, "g"},
43094 {14, s390x.REG_R14, "R14"},
43095 {15, s390x.REGSP, "SP"},
43096 {16, s390x.REG_F0, "F0"},
43097 {17, s390x.REG_F1, "F1"},
43098 {18, s390x.REG_F2, "F2"},
43099 {19, s390x.REG_F3, "F3"},
43100 {20, s390x.REG_F4, "F4"},
43101 {21, s390x.REG_F5, "F5"},
43102 {22, s390x.REG_F6, "F6"},
43103 {23, s390x.REG_F7, "F7"},
43104 {24, s390x.REG_F8, "F8"},
43105 {25, s390x.REG_F9, "F9"},
43106 {26, s390x.REG_F10, "F10"},
43107 {27, s390x.REG_F11, "F11"},
43108 {28, s390x.REG_F12, "F12"},
43109 {29, s390x.REG_F13, "F13"},
43110 {30, s390x.REG_F14, "F14"},
43111 {31, s390x.REG_F15, "F15"},
43112 {32, 0, "SB"},
43113 }
43114 var paramIntRegS390X = []int8(nil)
43115 var paramFloatRegS390X = []int8(nil)
43116 var gpRegMaskS390X = regMask(23551)
43117 var fpRegMaskS390X = regMask(4294901760)
43118 var specialRegMaskS390X = regMask(0)
43119 var framepointerRegS390X = int8(-1)
43120 var linkRegS390X = int8(14)
43121 var registersWasm = [...]Register{
43122 {0, wasm.REG_R0, "R0"},
43123 {1, wasm.REG_R1, "R1"},
43124 {2, wasm.REG_R2, "R2"},
43125 {3, wasm.REG_R3, "R3"},
43126 {4, wasm.REG_R4, "R4"},
43127 {5, wasm.REG_R5, "R5"},
43128 {6, wasm.REG_R6, "R6"},
43129 {7, wasm.REG_R7, "R7"},
43130 {8, wasm.REG_R8, "R8"},
43131 {9, wasm.REG_R9, "R9"},
43132 {10, wasm.REG_R10, "R10"},
43133 {11, wasm.REG_R11, "R11"},
43134 {12, wasm.REG_R12, "R12"},
43135 {13, wasm.REG_R13, "R13"},
43136 {14, wasm.REG_R14, "R14"},
43137 {15, wasm.REG_R15, "R15"},
43138 {16, wasm.REG_F0, "F0"},
43139 {17, wasm.REG_F1, "F1"},
43140 {18, wasm.REG_F2, "F2"},
43141 {19, wasm.REG_F3, "F3"},
43142 {20, wasm.REG_F4, "F4"},
43143 {21, wasm.REG_F5, "F5"},
43144 {22, wasm.REG_F6, "F6"},
43145 {23, wasm.REG_F7, "F7"},
43146 {24, wasm.REG_F8, "F8"},
43147 {25, wasm.REG_F9, "F9"},
43148 {26, wasm.REG_F10, "F10"},
43149 {27, wasm.REG_F11, "F11"},
43150 {28, wasm.REG_F12, "F12"},
43151 {29, wasm.REG_F13, "F13"},
43152 {30, wasm.REG_F14, "F14"},
43153 {31, wasm.REG_F15, "F15"},
43154 {32, wasm.REG_F16, "F16"},
43155 {33, wasm.REG_F17, "F17"},
43156 {34, wasm.REG_F18, "F18"},
43157 {35, wasm.REG_F19, "F19"},
43158 {36, wasm.REG_F20, "F20"},
43159 {37, wasm.REG_F21, "F21"},
43160 {38, wasm.REG_F22, "F22"},
43161 {39, wasm.REG_F23, "F23"},
43162 {40, wasm.REG_F24, "F24"},
43163 {41, wasm.REG_F25, "F25"},
43164 {42, wasm.REG_F26, "F26"},
43165 {43, wasm.REG_F27, "F27"},
43166 {44, wasm.REG_F28, "F28"},
43167 {45, wasm.REG_F29, "F29"},
43168 {46, wasm.REG_F30, "F30"},
43169 {47, wasm.REG_F31, "F31"},
43170 {48, wasm.REGSP, "SP"},
43171 {49, wasm.REGG, "g"},
43172 {50, 0, "SB"},
43173 }
43174 var paramIntRegWasm = []int8(nil)
43175 var paramFloatRegWasm = []int8(nil)
43176 var gpRegMaskWasm = regMask(65535)
43177 var fpRegMaskWasm = regMask(281474976645120)
43178 var fp32RegMaskWasm = regMask(4294901760)
43179 var fp64RegMaskWasm = regMask(281470681743360)
43180 var specialRegMaskWasm = regMask(0)
43181 var framepointerRegWasm = int8(-1)
43182 var linkRegWasm = int8(-1)
43183
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