1
2
3 package ssa
4
5 import (
6 "cmd/internal/obj"
7 "cmd/internal/obj/arm"
8 "cmd/internal/obj/arm64"
9 "cmd/internal/obj/loong64"
10 "cmd/internal/obj/mips"
11 "cmd/internal/obj/ppc64"
12 "cmd/internal/obj/riscv"
13 "cmd/internal/obj/s390x"
14 "cmd/internal/obj/wasm"
15 "cmd/internal/obj/x86"
16 )
17
18 const (
19 BlockInvalid BlockKind = iota
20
21 Block386EQ
22 Block386NE
23 Block386LT
24 Block386LE
25 Block386GT
26 Block386GE
27 Block386OS
28 Block386OC
29 Block386ULT
30 Block386ULE
31 Block386UGT
32 Block386UGE
33 Block386EQF
34 Block386NEF
35 Block386ORD
36 Block386NAN
37
38 BlockAMD64EQ
39 BlockAMD64NE
40 BlockAMD64LT
41 BlockAMD64LE
42 BlockAMD64GT
43 BlockAMD64GE
44 BlockAMD64OS
45 BlockAMD64OC
46 BlockAMD64ULT
47 BlockAMD64ULE
48 BlockAMD64UGT
49 BlockAMD64UGE
50 BlockAMD64EQF
51 BlockAMD64NEF
52 BlockAMD64ORD
53 BlockAMD64NAN
54 BlockAMD64JUMPTABLE
55
56 BlockARMEQ
57 BlockARMNE
58 BlockARMLT
59 BlockARMLE
60 BlockARMGT
61 BlockARMGE
62 BlockARMULT
63 BlockARMULE
64 BlockARMUGT
65 BlockARMUGE
66 BlockARMLTnoov
67 BlockARMLEnoov
68 BlockARMGTnoov
69 BlockARMGEnoov
70
71 BlockARM64EQ
72 BlockARM64NE
73 BlockARM64LT
74 BlockARM64LE
75 BlockARM64GT
76 BlockARM64GE
77 BlockARM64ULT
78 BlockARM64ULE
79 BlockARM64UGT
80 BlockARM64UGE
81 BlockARM64Z
82 BlockARM64NZ
83 BlockARM64ZW
84 BlockARM64NZW
85 BlockARM64TBZ
86 BlockARM64TBNZ
87 BlockARM64FLT
88 BlockARM64FLE
89 BlockARM64FGT
90 BlockARM64FGE
91 BlockARM64LTnoov
92 BlockARM64LEnoov
93 BlockARM64GTnoov
94 BlockARM64GEnoov
95 BlockARM64JUMPTABLE
96
97 BlockLOONG64EQ
98 BlockLOONG64NE
99 BlockLOONG64LTZ
100 BlockLOONG64LEZ
101 BlockLOONG64GTZ
102 BlockLOONG64GEZ
103 BlockLOONG64FPT
104 BlockLOONG64FPF
105 BlockLOONG64BEQ
106 BlockLOONG64BNE
107 BlockLOONG64BGE
108 BlockLOONG64BLT
109 BlockLOONG64BGEU
110 BlockLOONG64BLTU
111
112 BlockMIPSEQ
113 BlockMIPSNE
114 BlockMIPSLTZ
115 BlockMIPSLEZ
116 BlockMIPSGTZ
117 BlockMIPSGEZ
118 BlockMIPSFPT
119 BlockMIPSFPF
120
121 BlockMIPS64EQ
122 BlockMIPS64NE
123 BlockMIPS64LTZ
124 BlockMIPS64LEZ
125 BlockMIPS64GTZ
126 BlockMIPS64GEZ
127 BlockMIPS64FPT
128 BlockMIPS64FPF
129
130 BlockPPC64EQ
131 BlockPPC64NE
132 BlockPPC64LT
133 BlockPPC64LE
134 BlockPPC64GT
135 BlockPPC64GE
136 BlockPPC64FLT
137 BlockPPC64FLE
138 BlockPPC64FGT
139 BlockPPC64FGE
140
141 BlockRISCV64BEQ
142 BlockRISCV64BNE
143 BlockRISCV64BLT
144 BlockRISCV64BGE
145 BlockRISCV64BLTU
146 BlockRISCV64BGEU
147 BlockRISCV64BEQZ
148 BlockRISCV64BNEZ
149 BlockRISCV64BLEZ
150 BlockRISCV64BGEZ
151 BlockRISCV64BLTZ
152 BlockRISCV64BGTZ
153
154 BlockS390XBRC
155 BlockS390XCRJ
156 BlockS390XCGRJ
157 BlockS390XCLRJ
158 BlockS390XCLGRJ
159 BlockS390XCIJ
160 BlockS390XCGIJ
161 BlockS390XCLIJ
162 BlockS390XCLGIJ
163
164 BlockPlain
165 BlockIf
166 BlockDefer
167 BlockRet
168 BlockRetJmp
169 BlockExit
170 BlockJumpTable
171 BlockFirst
172 )
173
174 var blockString = [...]string{
175 BlockInvalid: "BlockInvalid",
176
177 Block386EQ: "EQ",
178 Block386NE: "NE",
179 Block386LT: "LT",
180 Block386LE: "LE",
181 Block386GT: "GT",
182 Block386GE: "GE",
183 Block386OS: "OS",
184 Block386OC: "OC",
185 Block386ULT: "ULT",
186 Block386ULE: "ULE",
187 Block386UGT: "UGT",
188 Block386UGE: "UGE",
189 Block386EQF: "EQF",
190 Block386NEF: "NEF",
191 Block386ORD: "ORD",
192 Block386NAN: "NAN",
193
194 BlockAMD64EQ: "EQ",
195 BlockAMD64NE: "NE",
196 BlockAMD64LT: "LT",
197 BlockAMD64LE: "LE",
198 BlockAMD64GT: "GT",
199 BlockAMD64GE: "GE",
200 BlockAMD64OS: "OS",
201 BlockAMD64OC: "OC",
202 BlockAMD64ULT: "ULT",
203 BlockAMD64ULE: "ULE",
204 BlockAMD64UGT: "UGT",
205 BlockAMD64UGE: "UGE",
206 BlockAMD64EQF: "EQF",
207 BlockAMD64NEF: "NEF",
208 BlockAMD64ORD: "ORD",
209 BlockAMD64NAN: "NAN",
210 BlockAMD64JUMPTABLE: "JUMPTABLE",
211
212 BlockARMEQ: "EQ",
213 BlockARMNE: "NE",
214 BlockARMLT: "LT",
215 BlockARMLE: "LE",
216 BlockARMGT: "GT",
217 BlockARMGE: "GE",
218 BlockARMULT: "ULT",
219 BlockARMULE: "ULE",
220 BlockARMUGT: "UGT",
221 BlockARMUGE: "UGE",
222 BlockARMLTnoov: "LTnoov",
223 BlockARMLEnoov: "LEnoov",
224 BlockARMGTnoov: "GTnoov",
225 BlockARMGEnoov: "GEnoov",
226
227 BlockARM64EQ: "EQ",
228 BlockARM64NE: "NE",
229 BlockARM64LT: "LT",
230 BlockARM64LE: "LE",
231 BlockARM64GT: "GT",
232 BlockARM64GE: "GE",
233 BlockARM64ULT: "ULT",
234 BlockARM64ULE: "ULE",
235 BlockARM64UGT: "UGT",
236 BlockARM64UGE: "UGE",
237 BlockARM64Z: "Z",
238 BlockARM64NZ: "NZ",
239 BlockARM64ZW: "ZW",
240 BlockARM64NZW: "NZW",
241 BlockARM64TBZ: "TBZ",
242 BlockARM64TBNZ: "TBNZ",
243 BlockARM64FLT: "FLT",
244 BlockARM64FLE: "FLE",
245 BlockARM64FGT: "FGT",
246 BlockARM64FGE: "FGE",
247 BlockARM64LTnoov: "LTnoov",
248 BlockARM64LEnoov: "LEnoov",
249 BlockARM64GTnoov: "GTnoov",
250 BlockARM64GEnoov: "GEnoov",
251 BlockARM64JUMPTABLE: "JUMPTABLE",
252
253 BlockLOONG64EQ: "EQ",
254 BlockLOONG64NE: "NE",
255 BlockLOONG64LTZ: "LTZ",
256 BlockLOONG64LEZ: "LEZ",
257 BlockLOONG64GTZ: "GTZ",
258 BlockLOONG64GEZ: "GEZ",
259 BlockLOONG64FPT: "FPT",
260 BlockLOONG64FPF: "FPF",
261 BlockLOONG64BEQ: "BEQ",
262 BlockLOONG64BNE: "BNE",
263 BlockLOONG64BGE: "BGE",
264 BlockLOONG64BLT: "BLT",
265 BlockLOONG64BGEU: "BGEU",
266 BlockLOONG64BLTU: "BLTU",
267
268 BlockMIPSEQ: "EQ",
269 BlockMIPSNE: "NE",
270 BlockMIPSLTZ: "LTZ",
271 BlockMIPSLEZ: "LEZ",
272 BlockMIPSGTZ: "GTZ",
273 BlockMIPSGEZ: "GEZ",
274 BlockMIPSFPT: "FPT",
275 BlockMIPSFPF: "FPF",
276
277 BlockMIPS64EQ: "EQ",
278 BlockMIPS64NE: "NE",
279 BlockMIPS64LTZ: "LTZ",
280 BlockMIPS64LEZ: "LEZ",
281 BlockMIPS64GTZ: "GTZ",
282 BlockMIPS64GEZ: "GEZ",
283 BlockMIPS64FPT: "FPT",
284 BlockMIPS64FPF: "FPF",
285
286 BlockPPC64EQ: "EQ",
287 BlockPPC64NE: "NE",
288 BlockPPC64LT: "LT",
289 BlockPPC64LE: "LE",
290 BlockPPC64GT: "GT",
291 BlockPPC64GE: "GE",
292 BlockPPC64FLT: "FLT",
293 BlockPPC64FLE: "FLE",
294 BlockPPC64FGT: "FGT",
295 BlockPPC64FGE: "FGE",
296
297 BlockRISCV64BEQ: "BEQ",
298 BlockRISCV64BNE: "BNE",
299 BlockRISCV64BLT: "BLT",
300 BlockRISCV64BGE: "BGE",
301 BlockRISCV64BLTU: "BLTU",
302 BlockRISCV64BGEU: "BGEU",
303 BlockRISCV64BEQZ: "BEQZ",
304 BlockRISCV64BNEZ: "BNEZ",
305 BlockRISCV64BLEZ: "BLEZ",
306 BlockRISCV64BGEZ: "BGEZ",
307 BlockRISCV64BLTZ: "BLTZ",
308 BlockRISCV64BGTZ: "BGTZ",
309
310 BlockS390XBRC: "BRC",
311 BlockS390XCRJ: "CRJ",
312 BlockS390XCGRJ: "CGRJ",
313 BlockS390XCLRJ: "CLRJ",
314 BlockS390XCLGRJ: "CLGRJ",
315 BlockS390XCIJ: "CIJ",
316 BlockS390XCGIJ: "CGIJ",
317 BlockS390XCLIJ: "CLIJ",
318 BlockS390XCLGIJ: "CLGIJ",
319
320 BlockPlain: "Plain",
321 BlockIf: "If",
322 BlockDefer: "Defer",
323 BlockRet: "Ret",
324 BlockRetJmp: "RetJmp",
325 BlockExit: "Exit",
326 BlockJumpTable: "JumpTable",
327 BlockFirst: "First",
328 }
329
330 func (k BlockKind) String() string { return blockString[k] }
331 func (k BlockKind) AuxIntType() string {
332 switch k {
333 case BlockARM64TBZ:
334 return "int64"
335 case BlockARM64TBNZ:
336 return "int64"
337 case BlockS390XCIJ:
338 return "int8"
339 case BlockS390XCGIJ:
340 return "int8"
341 case BlockS390XCLIJ:
342 return "uint8"
343 case BlockS390XCLGIJ:
344 return "uint8"
345 }
346 return ""
347 }
348
349 const (
350 OpInvalid Op = iota
351
352 Op386ADDSS
353 Op386ADDSD
354 Op386SUBSS
355 Op386SUBSD
356 Op386MULSS
357 Op386MULSD
358 Op386DIVSS
359 Op386DIVSD
360 Op386MOVSSload
361 Op386MOVSDload
362 Op386MOVSSconst
363 Op386MOVSDconst
364 Op386MOVSSloadidx1
365 Op386MOVSSloadidx4
366 Op386MOVSDloadidx1
367 Op386MOVSDloadidx8
368 Op386MOVSSstore
369 Op386MOVSDstore
370 Op386MOVSSstoreidx1
371 Op386MOVSSstoreidx4
372 Op386MOVSDstoreidx1
373 Op386MOVSDstoreidx8
374 Op386ADDSSload
375 Op386ADDSDload
376 Op386SUBSSload
377 Op386SUBSDload
378 Op386MULSSload
379 Op386MULSDload
380 Op386DIVSSload
381 Op386DIVSDload
382 Op386ADDL
383 Op386ADDLconst
384 Op386ADDLcarry
385 Op386ADDLconstcarry
386 Op386ADCL
387 Op386ADCLconst
388 Op386SUBL
389 Op386SUBLconst
390 Op386SUBLcarry
391 Op386SUBLconstcarry
392 Op386SBBL
393 Op386SBBLconst
394 Op386MULL
395 Op386MULLconst
396 Op386MULLU
397 Op386HMULL
398 Op386HMULLU
399 Op386MULLQU
400 Op386AVGLU
401 Op386DIVL
402 Op386DIVW
403 Op386DIVLU
404 Op386DIVWU
405 Op386MODL
406 Op386MODW
407 Op386MODLU
408 Op386MODWU
409 Op386ANDL
410 Op386ANDLconst
411 Op386ORL
412 Op386ORLconst
413 Op386XORL
414 Op386XORLconst
415 Op386CMPL
416 Op386CMPW
417 Op386CMPB
418 Op386CMPLconst
419 Op386CMPWconst
420 Op386CMPBconst
421 Op386CMPLload
422 Op386CMPWload
423 Op386CMPBload
424 Op386CMPLconstload
425 Op386CMPWconstload
426 Op386CMPBconstload
427 Op386UCOMISS
428 Op386UCOMISD
429 Op386TESTL
430 Op386TESTW
431 Op386TESTB
432 Op386TESTLconst
433 Op386TESTWconst
434 Op386TESTBconst
435 Op386SHLL
436 Op386SHLLconst
437 Op386SHRL
438 Op386SHRW
439 Op386SHRB
440 Op386SHRLconst
441 Op386SHRWconst
442 Op386SHRBconst
443 Op386SARL
444 Op386SARW
445 Op386SARB
446 Op386SARLconst
447 Op386SARWconst
448 Op386SARBconst
449 Op386ROLL
450 Op386ROLW
451 Op386ROLB
452 Op386ROLLconst
453 Op386ROLWconst
454 Op386ROLBconst
455 Op386ADDLload
456 Op386SUBLload
457 Op386MULLload
458 Op386ANDLload
459 Op386ORLload
460 Op386XORLload
461 Op386ADDLloadidx4
462 Op386SUBLloadidx4
463 Op386MULLloadidx4
464 Op386ANDLloadidx4
465 Op386ORLloadidx4
466 Op386XORLloadidx4
467 Op386NEGL
468 Op386NOTL
469 Op386BSFL
470 Op386BSFW
471 Op386LoweredCtz32
472 Op386LoweredCtz64
473 Op386BSRL
474 Op386BSRW
475 Op386BSWAPL
476 Op386SQRTSD
477 Op386SQRTSS
478 Op386SBBLcarrymask
479 Op386SETEQ
480 Op386SETNE
481 Op386SETL
482 Op386SETLE
483 Op386SETG
484 Op386SETGE
485 Op386SETB
486 Op386SETBE
487 Op386SETA
488 Op386SETAE
489 Op386SETO
490 Op386SETEQF
491 Op386SETNEF
492 Op386SETORD
493 Op386SETNAN
494 Op386SETGF
495 Op386SETGEF
496 Op386MOVBLSX
497 Op386MOVBLZX
498 Op386MOVWLSX
499 Op386MOVWLZX
500 Op386MOVLconst
501 Op386CVTTSD2SL
502 Op386CVTTSS2SL
503 Op386CVTSL2SS
504 Op386CVTSL2SD
505 Op386CVTSD2SS
506 Op386CVTSS2SD
507 Op386PXOR
508 Op386LEAL
509 Op386LEAL1
510 Op386LEAL2
511 Op386LEAL4
512 Op386LEAL8
513 Op386MOVBload
514 Op386MOVBLSXload
515 Op386MOVWload
516 Op386MOVWLSXload
517 Op386MOVLload
518 Op386MOVBstore
519 Op386MOVWstore
520 Op386MOVLstore
521 Op386ADDLmodify
522 Op386SUBLmodify
523 Op386ANDLmodify
524 Op386ORLmodify
525 Op386XORLmodify
526 Op386ADDLmodifyidx4
527 Op386SUBLmodifyidx4
528 Op386ANDLmodifyidx4
529 Op386ORLmodifyidx4
530 Op386XORLmodifyidx4
531 Op386ADDLconstmodify
532 Op386ANDLconstmodify
533 Op386ORLconstmodify
534 Op386XORLconstmodify
535 Op386ADDLconstmodifyidx4
536 Op386ANDLconstmodifyidx4
537 Op386ORLconstmodifyidx4
538 Op386XORLconstmodifyidx4
539 Op386MOVBloadidx1
540 Op386MOVWloadidx1
541 Op386MOVWloadidx2
542 Op386MOVLloadidx1
543 Op386MOVLloadidx4
544 Op386MOVBstoreidx1
545 Op386MOVWstoreidx1
546 Op386MOVWstoreidx2
547 Op386MOVLstoreidx1
548 Op386MOVLstoreidx4
549 Op386MOVBstoreconst
550 Op386MOVWstoreconst
551 Op386MOVLstoreconst
552 Op386MOVBstoreconstidx1
553 Op386MOVWstoreconstidx1
554 Op386MOVWstoreconstidx2
555 Op386MOVLstoreconstidx1
556 Op386MOVLstoreconstidx4
557 Op386DUFFZERO
558 Op386REPSTOSL
559 Op386CALLstatic
560 Op386CALLtail
561 Op386CALLclosure
562 Op386CALLinter
563 Op386DUFFCOPY
564 Op386REPMOVSL
565 Op386InvertFlags
566 Op386LoweredGetG
567 Op386LoweredGetClosurePtr
568 Op386LoweredGetCallerPC
569 Op386LoweredGetCallerSP
570 Op386LoweredNilCheck
571 Op386LoweredWB
572 Op386LoweredPanicBoundsA
573 Op386LoweredPanicBoundsB
574 Op386LoweredPanicBoundsC
575 Op386LoweredPanicExtendA
576 Op386LoweredPanicExtendB
577 Op386LoweredPanicExtendC
578 Op386FlagEQ
579 Op386FlagLT_ULT
580 Op386FlagLT_UGT
581 Op386FlagGT_UGT
582 Op386FlagGT_ULT
583 Op386MOVSSconst1
584 Op386MOVSDconst1
585 Op386MOVSSconst2
586 Op386MOVSDconst2
587
588 OpAMD64ADDSS
589 OpAMD64ADDSD
590 OpAMD64SUBSS
591 OpAMD64SUBSD
592 OpAMD64MULSS
593 OpAMD64MULSD
594 OpAMD64DIVSS
595 OpAMD64DIVSD
596 OpAMD64MOVSSload
597 OpAMD64MOVSDload
598 OpAMD64MOVSSconst
599 OpAMD64MOVSDconst
600 OpAMD64MOVSSloadidx1
601 OpAMD64MOVSSloadidx4
602 OpAMD64MOVSDloadidx1
603 OpAMD64MOVSDloadidx8
604 OpAMD64MOVSSstore
605 OpAMD64MOVSDstore
606 OpAMD64MOVSSstoreidx1
607 OpAMD64MOVSSstoreidx4
608 OpAMD64MOVSDstoreidx1
609 OpAMD64MOVSDstoreidx8
610 OpAMD64ADDSSload
611 OpAMD64ADDSDload
612 OpAMD64SUBSSload
613 OpAMD64SUBSDload
614 OpAMD64MULSSload
615 OpAMD64MULSDload
616 OpAMD64DIVSSload
617 OpAMD64DIVSDload
618 OpAMD64ADDSSloadidx1
619 OpAMD64ADDSSloadidx4
620 OpAMD64ADDSDloadidx1
621 OpAMD64ADDSDloadidx8
622 OpAMD64SUBSSloadidx1
623 OpAMD64SUBSSloadidx4
624 OpAMD64SUBSDloadidx1
625 OpAMD64SUBSDloadidx8
626 OpAMD64MULSSloadidx1
627 OpAMD64MULSSloadidx4
628 OpAMD64MULSDloadidx1
629 OpAMD64MULSDloadidx8
630 OpAMD64DIVSSloadidx1
631 OpAMD64DIVSSloadidx4
632 OpAMD64DIVSDloadidx1
633 OpAMD64DIVSDloadidx8
634 OpAMD64ADDQ
635 OpAMD64ADDL
636 OpAMD64ADDQconst
637 OpAMD64ADDLconst
638 OpAMD64ADDQconstmodify
639 OpAMD64ADDLconstmodify
640 OpAMD64SUBQ
641 OpAMD64SUBL
642 OpAMD64SUBQconst
643 OpAMD64SUBLconst
644 OpAMD64MULQ
645 OpAMD64MULL
646 OpAMD64MULQconst
647 OpAMD64MULLconst
648 OpAMD64MULLU
649 OpAMD64MULQU
650 OpAMD64HMULQ
651 OpAMD64HMULL
652 OpAMD64HMULQU
653 OpAMD64HMULLU
654 OpAMD64AVGQU
655 OpAMD64DIVQ
656 OpAMD64DIVL
657 OpAMD64DIVW
658 OpAMD64DIVQU
659 OpAMD64DIVLU
660 OpAMD64DIVWU
661 OpAMD64NEGLflags
662 OpAMD64ADDQcarry
663 OpAMD64ADCQ
664 OpAMD64ADDQconstcarry
665 OpAMD64ADCQconst
666 OpAMD64SUBQborrow
667 OpAMD64SBBQ
668 OpAMD64SUBQconstborrow
669 OpAMD64SBBQconst
670 OpAMD64MULQU2
671 OpAMD64DIVQU2
672 OpAMD64ANDQ
673 OpAMD64ANDL
674 OpAMD64ANDQconst
675 OpAMD64ANDLconst
676 OpAMD64ANDQconstmodify
677 OpAMD64ANDLconstmodify
678 OpAMD64ORQ
679 OpAMD64ORL
680 OpAMD64ORQconst
681 OpAMD64ORLconst
682 OpAMD64ORQconstmodify
683 OpAMD64ORLconstmodify
684 OpAMD64XORQ
685 OpAMD64XORL
686 OpAMD64XORQconst
687 OpAMD64XORLconst
688 OpAMD64XORQconstmodify
689 OpAMD64XORLconstmodify
690 OpAMD64CMPQ
691 OpAMD64CMPL
692 OpAMD64CMPW
693 OpAMD64CMPB
694 OpAMD64CMPQconst
695 OpAMD64CMPLconst
696 OpAMD64CMPWconst
697 OpAMD64CMPBconst
698 OpAMD64CMPQload
699 OpAMD64CMPLload
700 OpAMD64CMPWload
701 OpAMD64CMPBload
702 OpAMD64CMPQconstload
703 OpAMD64CMPLconstload
704 OpAMD64CMPWconstload
705 OpAMD64CMPBconstload
706 OpAMD64CMPQloadidx8
707 OpAMD64CMPQloadidx1
708 OpAMD64CMPLloadidx4
709 OpAMD64CMPLloadidx1
710 OpAMD64CMPWloadidx2
711 OpAMD64CMPWloadidx1
712 OpAMD64CMPBloadidx1
713 OpAMD64CMPQconstloadidx8
714 OpAMD64CMPQconstloadidx1
715 OpAMD64CMPLconstloadidx4
716 OpAMD64CMPLconstloadidx1
717 OpAMD64CMPWconstloadidx2
718 OpAMD64CMPWconstloadidx1
719 OpAMD64CMPBconstloadidx1
720 OpAMD64UCOMISS
721 OpAMD64UCOMISD
722 OpAMD64BTL
723 OpAMD64BTQ
724 OpAMD64BTCL
725 OpAMD64BTCQ
726 OpAMD64BTRL
727 OpAMD64BTRQ
728 OpAMD64BTSL
729 OpAMD64BTSQ
730 OpAMD64BTLconst
731 OpAMD64BTQconst
732 OpAMD64BTCQconst
733 OpAMD64BTRQconst
734 OpAMD64BTSQconst
735 OpAMD64BTSQconstmodify
736 OpAMD64BTRQconstmodify
737 OpAMD64BTCQconstmodify
738 OpAMD64TESTQ
739 OpAMD64TESTL
740 OpAMD64TESTW
741 OpAMD64TESTB
742 OpAMD64TESTQconst
743 OpAMD64TESTLconst
744 OpAMD64TESTWconst
745 OpAMD64TESTBconst
746 OpAMD64SHLQ
747 OpAMD64SHLL
748 OpAMD64SHLQconst
749 OpAMD64SHLLconst
750 OpAMD64SHRQ
751 OpAMD64SHRL
752 OpAMD64SHRW
753 OpAMD64SHRB
754 OpAMD64SHRQconst
755 OpAMD64SHRLconst
756 OpAMD64SHRWconst
757 OpAMD64SHRBconst
758 OpAMD64SARQ
759 OpAMD64SARL
760 OpAMD64SARW
761 OpAMD64SARB
762 OpAMD64SARQconst
763 OpAMD64SARLconst
764 OpAMD64SARWconst
765 OpAMD64SARBconst
766 OpAMD64SHRDQ
767 OpAMD64SHLDQ
768 OpAMD64ROLQ
769 OpAMD64ROLL
770 OpAMD64ROLW
771 OpAMD64ROLB
772 OpAMD64RORQ
773 OpAMD64RORL
774 OpAMD64RORW
775 OpAMD64RORB
776 OpAMD64ROLQconst
777 OpAMD64ROLLconst
778 OpAMD64ROLWconst
779 OpAMD64ROLBconst
780 OpAMD64ADDLload
781 OpAMD64ADDQload
782 OpAMD64SUBQload
783 OpAMD64SUBLload
784 OpAMD64ANDLload
785 OpAMD64ANDQload
786 OpAMD64ORQload
787 OpAMD64ORLload
788 OpAMD64XORQload
789 OpAMD64XORLload
790 OpAMD64ADDLloadidx1
791 OpAMD64ADDLloadidx4
792 OpAMD64ADDLloadidx8
793 OpAMD64ADDQloadidx1
794 OpAMD64ADDQloadidx8
795 OpAMD64SUBLloadidx1
796 OpAMD64SUBLloadidx4
797 OpAMD64SUBLloadidx8
798 OpAMD64SUBQloadidx1
799 OpAMD64SUBQloadidx8
800 OpAMD64ANDLloadidx1
801 OpAMD64ANDLloadidx4
802 OpAMD64ANDLloadidx8
803 OpAMD64ANDQloadidx1
804 OpAMD64ANDQloadidx8
805 OpAMD64ORLloadidx1
806 OpAMD64ORLloadidx4
807 OpAMD64ORLloadidx8
808 OpAMD64ORQloadidx1
809 OpAMD64ORQloadidx8
810 OpAMD64XORLloadidx1
811 OpAMD64XORLloadidx4
812 OpAMD64XORLloadidx8
813 OpAMD64XORQloadidx1
814 OpAMD64XORQloadidx8
815 OpAMD64ADDQmodify
816 OpAMD64SUBQmodify
817 OpAMD64ANDQmodify
818 OpAMD64ORQmodify
819 OpAMD64XORQmodify
820 OpAMD64ADDLmodify
821 OpAMD64SUBLmodify
822 OpAMD64ANDLmodify
823 OpAMD64ORLmodify
824 OpAMD64XORLmodify
825 OpAMD64ADDQmodifyidx1
826 OpAMD64ADDQmodifyidx8
827 OpAMD64SUBQmodifyidx1
828 OpAMD64SUBQmodifyidx8
829 OpAMD64ANDQmodifyidx1
830 OpAMD64ANDQmodifyidx8
831 OpAMD64ORQmodifyidx1
832 OpAMD64ORQmodifyidx8
833 OpAMD64XORQmodifyidx1
834 OpAMD64XORQmodifyidx8
835 OpAMD64ADDLmodifyidx1
836 OpAMD64ADDLmodifyidx4
837 OpAMD64ADDLmodifyidx8
838 OpAMD64SUBLmodifyidx1
839 OpAMD64SUBLmodifyidx4
840 OpAMD64SUBLmodifyidx8
841 OpAMD64ANDLmodifyidx1
842 OpAMD64ANDLmodifyidx4
843 OpAMD64ANDLmodifyidx8
844 OpAMD64ORLmodifyidx1
845 OpAMD64ORLmodifyidx4
846 OpAMD64ORLmodifyidx8
847 OpAMD64XORLmodifyidx1
848 OpAMD64XORLmodifyidx4
849 OpAMD64XORLmodifyidx8
850 OpAMD64ADDQconstmodifyidx1
851 OpAMD64ADDQconstmodifyidx8
852 OpAMD64ANDQconstmodifyidx1
853 OpAMD64ANDQconstmodifyidx8
854 OpAMD64ORQconstmodifyidx1
855 OpAMD64ORQconstmodifyidx8
856 OpAMD64XORQconstmodifyidx1
857 OpAMD64XORQconstmodifyidx8
858 OpAMD64ADDLconstmodifyidx1
859 OpAMD64ADDLconstmodifyidx4
860 OpAMD64ADDLconstmodifyidx8
861 OpAMD64ANDLconstmodifyidx1
862 OpAMD64ANDLconstmodifyidx4
863 OpAMD64ANDLconstmodifyidx8
864 OpAMD64ORLconstmodifyidx1
865 OpAMD64ORLconstmodifyidx4
866 OpAMD64ORLconstmodifyidx8
867 OpAMD64XORLconstmodifyidx1
868 OpAMD64XORLconstmodifyidx4
869 OpAMD64XORLconstmodifyidx8
870 OpAMD64NEGQ
871 OpAMD64NEGL
872 OpAMD64NOTQ
873 OpAMD64NOTL
874 OpAMD64BSFQ
875 OpAMD64BSFL
876 OpAMD64BSRQ
877 OpAMD64BSRL
878 OpAMD64CMOVQEQ
879 OpAMD64CMOVQNE
880 OpAMD64CMOVQLT
881 OpAMD64CMOVQGT
882 OpAMD64CMOVQLE
883 OpAMD64CMOVQGE
884 OpAMD64CMOVQLS
885 OpAMD64CMOVQHI
886 OpAMD64CMOVQCC
887 OpAMD64CMOVQCS
888 OpAMD64CMOVLEQ
889 OpAMD64CMOVLNE
890 OpAMD64CMOVLLT
891 OpAMD64CMOVLGT
892 OpAMD64CMOVLLE
893 OpAMD64CMOVLGE
894 OpAMD64CMOVLLS
895 OpAMD64CMOVLHI
896 OpAMD64CMOVLCC
897 OpAMD64CMOVLCS
898 OpAMD64CMOVWEQ
899 OpAMD64CMOVWNE
900 OpAMD64CMOVWLT
901 OpAMD64CMOVWGT
902 OpAMD64CMOVWLE
903 OpAMD64CMOVWGE
904 OpAMD64CMOVWLS
905 OpAMD64CMOVWHI
906 OpAMD64CMOVWCC
907 OpAMD64CMOVWCS
908 OpAMD64CMOVQEQF
909 OpAMD64CMOVQNEF
910 OpAMD64CMOVQGTF
911 OpAMD64CMOVQGEF
912 OpAMD64CMOVLEQF
913 OpAMD64CMOVLNEF
914 OpAMD64CMOVLGTF
915 OpAMD64CMOVLGEF
916 OpAMD64CMOVWEQF
917 OpAMD64CMOVWNEF
918 OpAMD64CMOVWGTF
919 OpAMD64CMOVWGEF
920 OpAMD64BSWAPQ
921 OpAMD64BSWAPL
922 OpAMD64POPCNTQ
923 OpAMD64POPCNTL
924 OpAMD64SQRTSD
925 OpAMD64SQRTSS
926 OpAMD64ROUNDSD
927 OpAMD64VFMADD231SD
928 OpAMD64MINSD
929 OpAMD64MINSS
930 OpAMD64SBBQcarrymask
931 OpAMD64SBBLcarrymask
932 OpAMD64SETEQ
933 OpAMD64SETNE
934 OpAMD64SETL
935 OpAMD64SETLE
936 OpAMD64SETG
937 OpAMD64SETGE
938 OpAMD64SETB
939 OpAMD64SETBE
940 OpAMD64SETA
941 OpAMD64SETAE
942 OpAMD64SETO
943 OpAMD64SETEQstore
944 OpAMD64SETNEstore
945 OpAMD64SETLstore
946 OpAMD64SETLEstore
947 OpAMD64SETGstore
948 OpAMD64SETGEstore
949 OpAMD64SETBstore
950 OpAMD64SETBEstore
951 OpAMD64SETAstore
952 OpAMD64SETAEstore
953 OpAMD64SETEQstoreidx1
954 OpAMD64SETNEstoreidx1
955 OpAMD64SETLstoreidx1
956 OpAMD64SETLEstoreidx1
957 OpAMD64SETGstoreidx1
958 OpAMD64SETGEstoreidx1
959 OpAMD64SETBstoreidx1
960 OpAMD64SETBEstoreidx1
961 OpAMD64SETAstoreidx1
962 OpAMD64SETAEstoreidx1
963 OpAMD64SETEQF
964 OpAMD64SETNEF
965 OpAMD64SETORD
966 OpAMD64SETNAN
967 OpAMD64SETGF
968 OpAMD64SETGEF
969 OpAMD64MOVBQSX
970 OpAMD64MOVBQZX
971 OpAMD64MOVWQSX
972 OpAMD64MOVWQZX
973 OpAMD64MOVLQSX
974 OpAMD64MOVLQZX
975 OpAMD64MOVLconst
976 OpAMD64MOVQconst
977 OpAMD64CVTTSD2SL
978 OpAMD64CVTTSD2SQ
979 OpAMD64CVTTSS2SL
980 OpAMD64CVTTSS2SQ
981 OpAMD64CVTSL2SS
982 OpAMD64CVTSL2SD
983 OpAMD64CVTSQ2SS
984 OpAMD64CVTSQ2SD
985 OpAMD64CVTSD2SS
986 OpAMD64CVTSS2SD
987 OpAMD64MOVQi2f
988 OpAMD64MOVQf2i
989 OpAMD64MOVLi2f
990 OpAMD64MOVLf2i
991 OpAMD64PXOR
992 OpAMD64POR
993 OpAMD64LEAQ
994 OpAMD64LEAL
995 OpAMD64LEAW
996 OpAMD64LEAQ1
997 OpAMD64LEAL1
998 OpAMD64LEAW1
999 OpAMD64LEAQ2
1000 OpAMD64LEAL2
1001 OpAMD64LEAW2
1002 OpAMD64LEAQ4
1003 OpAMD64LEAL4
1004 OpAMD64LEAW4
1005 OpAMD64LEAQ8
1006 OpAMD64LEAL8
1007 OpAMD64LEAW8
1008 OpAMD64MOVBload
1009 OpAMD64MOVBQSXload
1010 OpAMD64MOVWload
1011 OpAMD64MOVWQSXload
1012 OpAMD64MOVLload
1013 OpAMD64MOVLQSXload
1014 OpAMD64MOVQload
1015 OpAMD64MOVBstore
1016 OpAMD64MOVWstore
1017 OpAMD64MOVLstore
1018 OpAMD64MOVQstore
1019 OpAMD64MOVOload
1020 OpAMD64MOVOstore
1021 OpAMD64MOVBloadidx1
1022 OpAMD64MOVWloadidx1
1023 OpAMD64MOVWloadidx2
1024 OpAMD64MOVLloadidx1
1025 OpAMD64MOVLloadidx4
1026 OpAMD64MOVLloadidx8
1027 OpAMD64MOVQloadidx1
1028 OpAMD64MOVQloadidx8
1029 OpAMD64MOVBstoreidx1
1030 OpAMD64MOVWstoreidx1
1031 OpAMD64MOVWstoreidx2
1032 OpAMD64MOVLstoreidx1
1033 OpAMD64MOVLstoreidx4
1034 OpAMD64MOVLstoreidx8
1035 OpAMD64MOVQstoreidx1
1036 OpAMD64MOVQstoreidx8
1037 OpAMD64MOVBstoreconst
1038 OpAMD64MOVWstoreconst
1039 OpAMD64MOVLstoreconst
1040 OpAMD64MOVQstoreconst
1041 OpAMD64MOVOstoreconst
1042 OpAMD64MOVBstoreconstidx1
1043 OpAMD64MOVWstoreconstidx1
1044 OpAMD64MOVWstoreconstidx2
1045 OpAMD64MOVLstoreconstidx1
1046 OpAMD64MOVLstoreconstidx4
1047 OpAMD64MOVQstoreconstidx1
1048 OpAMD64MOVQstoreconstidx8
1049 OpAMD64DUFFZERO
1050 OpAMD64REPSTOSQ
1051 OpAMD64CALLstatic
1052 OpAMD64CALLtail
1053 OpAMD64CALLclosure
1054 OpAMD64CALLinter
1055 OpAMD64DUFFCOPY
1056 OpAMD64REPMOVSQ
1057 OpAMD64InvertFlags
1058 OpAMD64LoweredGetG
1059 OpAMD64LoweredGetClosurePtr
1060 OpAMD64LoweredGetCallerPC
1061 OpAMD64LoweredGetCallerSP
1062 OpAMD64LoweredNilCheck
1063 OpAMD64LoweredWB
1064 OpAMD64LoweredHasCPUFeature
1065 OpAMD64LoweredPanicBoundsA
1066 OpAMD64LoweredPanicBoundsB
1067 OpAMD64LoweredPanicBoundsC
1068 OpAMD64FlagEQ
1069 OpAMD64FlagLT_ULT
1070 OpAMD64FlagLT_UGT
1071 OpAMD64FlagGT_UGT
1072 OpAMD64FlagGT_ULT
1073 OpAMD64MOVBatomicload
1074 OpAMD64MOVLatomicload
1075 OpAMD64MOVQatomicload
1076 OpAMD64XCHGB
1077 OpAMD64XCHGL
1078 OpAMD64XCHGQ
1079 OpAMD64XADDLlock
1080 OpAMD64XADDQlock
1081 OpAMD64AddTupleFirst32
1082 OpAMD64AddTupleFirst64
1083 OpAMD64CMPXCHGLlock
1084 OpAMD64CMPXCHGQlock
1085 OpAMD64ANDBlock
1086 OpAMD64ANDLlock
1087 OpAMD64ANDQlock
1088 OpAMD64ORBlock
1089 OpAMD64ORLlock
1090 OpAMD64ORQlock
1091 OpAMD64LoweredAtomicAnd64
1092 OpAMD64LoweredAtomicAnd32
1093 OpAMD64LoweredAtomicOr64
1094 OpAMD64LoweredAtomicOr32
1095 OpAMD64PrefetchT0
1096 OpAMD64PrefetchNTA
1097 OpAMD64ANDNQ
1098 OpAMD64ANDNL
1099 OpAMD64BLSIQ
1100 OpAMD64BLSIL
1101 OpAMD64BLSMSKQ
1102 OpAMD64BLSMSKL
1103 OpAMD64BLSRQ
1104 OpAMD64BLSRL
1105 OpAMD64TZCNTQ
1106 OpAMD64TZCNTL
1107 OpAMD64LZCNTQ
1108 OpAMD64LZCNTL
1109 OpAMD64MOVBEWstore
1110 OpAMD64MOVBELload
1111 OpAMD64MOVBELstore
1112 OpAMD64MOVBEQload
1113 OpAMD64MOVBEQstore
1114 OpAMD64MOVBELloadidx1
1115 OpAMD64MOVBELloadidx4
1116 OpAMD64MOVBELloadidx8
1117 OpAMD64MOVBEQloadidx1
1118 OpAMD64MOVBEQloadidx8
1119 OpAMD64MOVBEWstoreidx1
1120 OpAMD64MOVBEWstoreidx2
1121 OpAMD64MOVBELstoreidx1
1122 OpAMD64MOVBELstoreidx4
1123 OpAMD64MOVBELstoreidx8
1124 OpAMD64MOVBEQstoreidx1
1125 OpAMD64MOVBEQstoreidx8
1126 OpAMD64SARXQ
1127 OpAMD64SARXL
1128 OpAMD64SHLXQ
1129 OpAMD64SHLXL
1130 OpAMD64SHRXQ
1131 OpAMD64SHRXL
1132 OpAMD64SARXLload
1133 OpAMD64SARXQload
1134 OpAMD64SHLXLload
1135 OpAMD64SHLXQload
1136 OpAMD64SHRXLload
1137 OpAMD64SHRXQload
1138 OpAMD64SARXLloadidx1
1139 OpAMD64SARXLloadidx4
1140 OpAMD64SARXLloadidx8
1141 OpAMD64SARXQloadidx1
1142 OpAMD64SARXQloadidx8
1143 OpAMD64SHLXLloadidx1
1144 OpAMD64SHLXLloadidx4
1145 OpAMD64SHLXLloadidx8
1146 OpAMD64SHLXQloadidx1
1147 OpAMD64SHLXQloadidx8
1148 OpAMD64SHRXLloadidx1
1149 OpAMD64SHRXLloadidx4
1150 OpAMD64SHRXLloadidx8
1151 OpAMD64SHRXQloadidx1
1152 OpAMD64SHRXQloadidx8
1153 OpAMD64PUNPCKLBW
1154 OpAMD64PSHUFLW
1155 OpAMD64PSHUFBbroadcast
1156 OpAMD64VPBROADCASTB
1157 OpAMD64PSIGNB
1158 OpAMD64PCMPEQB
1159 OpAMD64PMOVMSKB
1160
1161 OpARMADD
1162 OpARMADDconst
1163 OpARMSUB
1164 OpARMSUBconst
1165 OpARMRSB
1166 OpARMRSBconst
1167 OpARMMUL
1168 OpARMHMUL
1169 OpARMHMULU
1170 OpARMCALLudiv
1171 OpARMADDS
1172 OpARMADDSconst
1173 OpARMADC
1174 OpARMADCconst
1175 OpARMSUBS
1176 OpARMSUBSconst
1177 OpARMRSBSconst
1178 OpARMSBC
1179 OpARMSBCconst
1180 OpARMRSCconst
1181 OpARMMULLU
1182 OpARMMULA
1183 OpARMMULS
1184 OpARMADDF
1185 OpARMADDD
1186 OpARMSUBF
1187 OpARMSUBD
1188 OpARMMULF
1189 OpARMMULD
1190 OpARMNMULF
1191 OpARMNMULD
1192 OpARMDIVF
1193 OpARMDIVD
1194 OpARMMULAF
1195 OpARMMULAD
1196 OpARMMULSF
1197 OpARMMULSD
1198 OpARMFMULAD
1199 OpARMAND
1200 OpARMANDconst
1201 OpARMOR
1202 OpARMORconst
1203 OpARMXOR
1204 OpARMXORconst
1205 OpARMBIC
1206 OpARMBICconst
1207 OpARMBFX
1208 OpARMBFXU
1209 OpARMMVN
1210 OpARMNEGF
1211 OpARMNEGD
1212 OpARMSQRTD
1213 OpARMSQRTF
1214 OpARMABSD
1215 OpARMCLZ
1216 OpARMREV
1217 OpARMREV16
1218 OpARMRBIT
1219 OpARMSLL
1220 OpARMSLLconst
1221 OpARMSRL
1222 OpARMSRLconst
1223 OpARMSRA
1224 OpARMSRAconst
1225 OpARMSRR
1226 OpARMSRRconst
1227 OpARMADDshiftLL
1228 OpARMADDshiftRL
1229 OpARMADDshiftRA
1230 OpARMSUBshiftLL
1231 OpARMSUBshiftRL
1232 OpARMSUBshiftRA
1233 OpARMRSBshiftLL
1234 OpARMRSBshiftRL
1235 OpARMRSBshiftRA
1236 OpARMANDshiftLL
1237 OpARMANDshiftRL
1238 OpARMANDshiftRA
1239 OpARMORshiftLL
1240 OpARMORshiftRL
1241 OpARMORshiftRA
1242 OpARMXORshiftLL
1243 OpARMXORshiftRL
1244 OpARMXORshiftRA
1245 OpARMXORshiftRR
1246 OpARMBICshiftLL
1247 OpARMBICshiftRL
1248 OpARMBICshiftRA
1249 OpARMMVNshiftLL
1250 OpARMMVNshiftRL
1251 OpARMMVNshiftRA
1252 OpARMADCshiftLL
1253 OpARMADCshiftRL
1254 OpARMADCshiftRA
1255 OpARMSBCshiftLL
1256 OpARMSBCshiftRL
1257 OpARMSBCshiftRA
1258 OpARMRSCshiftLL
1259 OpARMRSCshiftRL
1260 OpARMRSCshiftRA
1261 OpARMADDSshiftLL
1262 OpARMADDSshiftRL
1263 OpARMADDSshiftRA
1264 OpARMSUBSshiftLL
1265 OpARMSUBSshiftRL
1266 OpARMSUBSshiftRA
1267 OpARMRSBSshiftLL
1268 OpARMRSBSshiftRL
1269 OpARMRSBSshiftRA
1270 OpARMADDshiftLLreg
1271 OpARMADDshiftRLreg
1272 OpARMADDshiftRAreg
1273 OpARMSUBshiftLLreg
1274 OpARMSUBshiftRLreg
1275 OpARMSUBshiftRAreg
1276 OpARMRSBshiftLLreg
1277 OpARMRSBshiftRLreg
1278 OpARMRSBshiftRAreg
1279 OpARMANDshiftLLreg
1280 OpARMANDshiftRLreg
1281 OpARMANDshiftRAreg
1282 OpARMORshiftLLreg
1283 OpARMORshiftRLreg
1284 OpARMORshiftRAreg
1285 OpARMXORshiftLLreg
1286 OpARMXORshiftRLreg
1287 OpARMXORshiftRAreg
1288 OpARMBICshiftLLreg
1289 OpARMBICshiftRLreg
1290 OpARMBICshiftRAreg
1291 OpARMMVNshiftLLreg
1292 OpARMMVNshiftRLreg
1293 OpARMMVNshiftRAreg
1294 OpARMADCshiftLLreg
1295 OpARMADCshiftRLreg
1296 OpARMADCshiftRAreg
1297 OpARMSBCshiftLLreg
1298 OpARMSBCshiftRLreg
1299 OpARMSBCshiftRAreg
1300 OpARMRSCshiftLLreg
1301 OpARMRSCshiftRLreg
1302 OpARMRSCshiftRAreg
1303 OpARMADDSshiftLLreg
1304 OpARMADDSshiftRLreg
1305 OpARMADDSshiftRAreg
1306 OpARMSUBSshiftLLreg
1307 OpARMSUBSshiftRLreg
1308 OpARMSUBSshiftRAreg
1309 OpARMRSBSshiftLLreg
1310 OpARMRSBSshiftRLreg
1311 OpARMRSBSshiftRAreg
1312 OpARMCMP
1313 OpARMCMPconst
1314 OpARMCMN
1315 OpARMCMNconst
1316 OpARMTST
1317 OpARMTSTconst
1318 OpARMTEQ
1319 OpARMTEQconst
1320 OpARMCMPF
1321 OpARMCMPD
1322 OpARMCMPshiftLL
1323 OpARMCMPshiftRL
1324 OpARMCMPshiftRA
1325 OpARMCMNshiftLL
1326 OpARMCMNshiftRL
1327 OpARMCMNshiftRA
1328 OpARMTSTshiftLL
1329 OpARMTSTshiftRL
1330 OpARMTSTshiftRA
1331 OpARMTEQshiftLL
1332 OpARMTEQshiftRL
1333 OpARMTEQshiftRA
1334 OpARMCMPshiftLLreg
1335 OpARMCMPshiftRLreg
1336 OpARMCMPshiftRAreg
1337 OpARMCMNshiftLLreg
1338 OpARMCMNshiftRLreg
1339 OpARMCMNshiftRAreg
1340 OpARMTSTshiftLLreg
1341 OpARMTSTshiftRLreg
1342 OpARMTSTshiftRAreg
1343 OpARMTEQshiftLLreg
1344 OpARMTEQshiftRLreg
1345 OpARMTEQshiftRAreg
1346 OpARMCMPF0
1347 OpARMCMPD0
1348 OpARMMOVWconst
1349 OpARMMOVFconst
1350 OpARMMOVDconst
1351 OpARMMOVWaddr
1352 OpARMMOVBload
1353 OpARMMOVBUload
1354 OpARMMOVHload
1355 OpARMMOVHUload
1356 OpARMMOVWload
1357 OpARMMOVFload
1358 OpARMMOVDload
1359 OpARMMOVBstore
1360 OpARMMOVHstore
1361 OpARMMOVWstore
1362 OpARMMOVFstore
1363 OpARMMOVDstore
1364 OpARMMOVWloadidx
1365 OpARMMOVWloadshiftLL
1366 OpARMMOVWloadshiftRL
1367 OpARMMOVWloadshiftRA
1368 OpARMMOVBUloadidx
1369 OpARMMOVBloadidx
1370 OpARMMOVHUloadidx
1371 OpARMMOVHloadidx
1372 OpARMMOVWstoreidx
1373 OpARMMOVWstoreshiftLL
1374 OpARMMOVWstoreshiftRL
1375 OpARMMOVWstoreshiftRA
1376 OpARMMOVBstoreidx
1377 OpARMMOVHstoreidx
1378 OpARMMOVBreg
1379 OpARMMOVBUreg
1380 OpARMMOVHreg
1381 OpARMMOVHUreg
1382 OpARMMOVWreg
1383 OpARMMOVWnop
1384 OpARMMOVWF
1385 OpARMMOVWD
1386 OpARMMOVWUF
1387 OpARMMOVWUD
1388 OpARMMOVFW
1389 OpARMMOVDW
1390 OpARMMOVFWU
1391 OpARMMOVDWU
1392 OpARMMOVFD
1393 OpARMMOVDF
1394 OpARMCMOVWHSconst
1395 OpARMCMOVWLSconst
1396 OpARMSRAcond
1397 OpARMCALLstatic
1398 OpARMCALLtail
1399 OpARMCALLclosure
1400 OpARMCALLinter
1401 OpARMLoweredNilCheck
1402 OpARMEqual
1403 OpARMNotEqual
1404 OpARMLessThan
1405 OpARMLessEqual
1406 OpARMGreaterThan
1407 OpARMGreaterEqual
1408 OpARMLessThanU
1409 OpARMLessEqualU
1410 OpARMGreaterThanU
1411 OpARMGreaterEqualU
1412 OpARMDUFFZERO
1413 OpARMDUFFCOPY
1414 OpARMLoweredZero
1415 OpARMLoweredMove
1416 OpARMLoweredGetClosurePtr
1417 OpARMLoweredGetCallerSP
1418 OpARMLoweredGetCallerPC
1419 OpARMLoweredPanicBoundsA
1420 OpARMLoweredPanicBoundsB
1421 OpARMLoweredPanicBoundsC
1422 OpARMLoweredPanicExtendA
1423 OpARMLoweredPanicExtendB
1424 OpARMLoweredPanicExtendC
1425 OpARMFlagConstant
1426 OpARMInvertFlags
1427 OpARMLoweredWB
1428
1429 OpARM64ADCSflags
1430 OpARM64ADCzerocarry
1431 OpARM64ADD
1432 OpARM64ADDconst
1433 OpARM64ADDSconstflags
1434 OpARM64ADDSflags
1435 OpARM64SUB
1436 OpARM64SUBconst
1437 OpARM64SBCSflags
1438 OpARM64SUBSflags
1439 OpARM64MUL
1440 OpARM64MULW
1441 OpARM64MNEG
1442 OpARM64MNEGW
1443 OpARM64MULH
1444 OpARM64UMULH
1445 OpARM64MULL
1446 OpARM64UMULL
1447 OpARM64DIV
1448 OpARM64UDIV
1449 OpARM64DIVW
1450 OpARM64UDIVW
1451 OpARM64MOD
1452 OpARM64UMOD
1453 OpARM64MODW
1454 OpARM64UMODW
1455 OpARM64FADDS
1456 OpARM64FADDD
1457 OpARM64FSUBS
1458 OpARM64FSUBD
1459 OpARM64FMULS
1460 OpARM64FMULD
1461 OpARM64FNMULS
1462 OpARM64FNMULD
1463 OpARM64FDIVS
1464 OpARM64FDIVD
1465 OpARM64AND
1466 OpARM64ANDconst
1467 OpARM64OR
1468 OpARM64ORconst
1469 OpARM64XOR
1470 OpARM64XORconst
1471 OpARM64BIC
1472 OpARM64EON
1473 OpARM64ORN
1474 OpARM64MVN
1475 OpARM64NEG
1476 OpARM64NEGSflags
1477 OpARM64NGCzerocarry
1478 OpARM64FABSD
1479 OpARM64FNEGS
1480 OpARM64FNEGD
1481 OpARM64FSQRTD
1482 OpARM64FSQRTS
1483 OpARM64FMIND
1484 OpARM64FMINS
1485 OpARM64FMAXD
1486 OpARM64FMAXS
1487 OpARM64REV
1488 OpARM64REVW
1489 OpARM64REV16
1490 OpARM64REV16W
1491 OpARM64RBIT
1492 OpARM64RBITW
1493 OpARM64CLZ
1494 OpARM64CLZW
1495 OpARM64VCNT
1496 OpARM64VUADDLV
1497 OpARM64LoweredRound32F
1498 OpARM64LoweredRound64F
1499 OpARM64FMADDS
1500 OpARM64FMADDD
1501 OpARM64FNMADDS
1502 OpARM64FNMADDD
1503 OpARM64FMSUBS
1504 OpARM64FMSUBD
1505 OpARM64FNMSUBS
1506 OpARM64FNMSUBD
1507 OpARM64MADD
1508 OpARM64MADDW
1509 OpARM64MSUB
1510 OpARM64MSUBW
1511 OpARM64SLL
1512 OpARM64SLLconst
1513 OpARM64SRL
1514 OpARM64SRLconst
1515 OpARM64SRA
1516 OpARM64SRAconst
1517 OpARM64ROR
1518 OpARM64RORW
1519 OpARM64RORconst
1520 OpARM64RORWconst
1521 OpARM64EXTRconst
1522 OpARM64EXTRWconst
1523 OpARM64CMP
1524 OpARM64CMPconst
1525 OpARM64CMPW
1526 OpARM64CMPWconst
1527 OpARM64CMN
1528 OpARM64CMNconst
1529 OpARM64CMNW
1530 OpARM64CMNWconst
1531 OpARM64TST
1532 OpARM64TSTconst
1533 OpARM64TSTW
1534 OpARM64TSTWconst
1535 OpARM64FCMPS
1536 OpARM64FCMPD
1537 OpARM64FCMPS0
1538 OpARM64FCMPD0
1539 OpARM64MVNshiftLL
1540 OpARM64MVNshiftRL
1541 OpARM64MVNshiftRA
1542 OpARM64MVNshiftRO
1543 OpARM64NEGshiftLL
1544 OpARM64NEGshiftRL
1545 OpARM64NEGshiftRA
1546 OpARM64ADDshiftLL
1547 OpARM64ADDshiftRL
1548 OpARM64ADDshiftRA
1549 OpARM64SUBshiftLL
1550 OpARM64SUBshiftRL
1551 OpARM64SUBshiftRA
1552 OpARM64ANDshiftLL
1553 OpARM64ANDshiftRL
1554 OpARM64ANDshiftRA
1555 OpARM64ANDshiftRO
1556 OpARM64ORshiftLL
1557 OpARM64ORshiftRL
1558 OpARM64ORshiftRA
1559 OpARM64ORshiftRO
1560 OpARM64XORshiftLL
1561 OpARM64XORshiftRL
1562 OpARM64XORshiftRA
1563 OpARM64XORshiftRO
1564 OpARM64BICshiftLL
1565 OpARM64BICshiftRL
1566 OpARM64BICshiftRA
1567 OpARM64BICshiftRO
1568 OpARM64EONshiftLL
1569 OpARM64EONshiftRL
1570 OpARM64EONshiftRA
1571 OpARM64EONshiftRO
1572 OpARM64ORNshiftLL
1573 OpARM64ORNshiftRL
1574 OpARM64ORNshiftRA
1575 OpARM64ORNshiftRO
1576 OpARM64CMPshiftLL
1577 OpARM64CMPshiftRL
1578 OpARM64CMPshiftRA
1579 OpARM64CMNshiftLL
1580 OpARM64CMNshiftRL
1581 OpARM64CMNshiftRA
1582 OpARM64TSTshiftLL
1583 OpARM64TSTshiftRL
1584 OpARM64TSTshiftRA
1585 OpARM64TSTshiftRO
1586 OpARM64BFI
1587 OpARM64BFXIL
1588 OpARM64SBFIZ
1589 OpARM64SBFX
1590 OpARM64UBFIZ
1591 OpARM64UBFX
1592 OpARM64MOVDconst
1593 OpARM64FMOVSconst
1594 OpARM64FMOVDconst
1595 OpARM64MOVDaddr
1596 OpARM64MOVBload
1597 OpARM64MOVBUload
1598 OpARM64MOVHload
1599 OpARM64MOVHUload
1600 OpARM64MOVWload
1601 OpARM64MOVWUload
1602 OpARM64MOVDload
1603 OpARM64LDP
1604 OpARM64FMOVSload
1605 OpARM64FMOVDload
1606 OpARM64MOVDloadidx
1607 OpARM64MOVWloadidx
1608 OpARM64MOVWUloadidx
1609 OpARM64MOVHloadidx
1610 OpARM64MOVHUloadidx
1611 OpARM64MOVBloadidx
1612 OpARM64MOVBUloadidx
1613 OpARM64FMOVSloadidx
1614 OpARM64FMOVDloadidx
1615 OpARM64MOVHloadidx2
1616 OpARM64MOVHUloadidx2
1617 OpARM64MOVWloadidx4
1618 OpARM64MOVWUloadidx4
1619 OpARM64MOVDloadidx8
1620 OpARM64FMOVSloadidx4
1621 OpARM64FMOVDloadidx8
1622 OpARM64MOVBstore
1623 OpARM64MOVHstore
1624 OpARM64MOVWstore
1625 OpARM64MOVDstore
1626 OpARM64STP
1627 OpARM64FMOVSstore
1628 OpARM64FMOVDstore
1629 OpARM64MOVBstoreidx
1630 OpARM64MOVHstoreidx
1631 OpARM64MOVWstoreidx
1632 OpARM64MOVDstoreidx
1633 OpARM64FMOVSstoreidx
1634 OpARM64FMOVDstoreidx
1635 OpARM64MOVHstoreidx2
1636 OpARM64MOVWstoreidx4
1637 OpARM64MOVDstoreidx8
1638 OpARM64FMOVSstoreidx4
1639 OpARM64FMOVDstoreidx8
1640 OpARM64MOVBstorezero
1641 OpARM64MOVHstorezero
1642 OpARM64MOVWstorezero
1643 OpARM64MOVDstorezero
1644 OpARM64MOVQstorezero
1645 OpARM64MOVBstorezeroidx
1646 OpARM64MOVHstorezeroidx
1647 OpARM64MOVWstorezeroidx
1648 OpARM64MOVDstorezeroidx
1649 OpARM64MOVHstorezeroidx2
1650 OpARM64MOVWstorezeroidx4
1651 OpARM64MOVDstorezeroidx8
1652 OpARM64FMOVDgpfp
1653 OpARM64FMOVDfpgp
1654 OpARM64FMOVSgpfp
1655 OpARM64FMOVSfpgp
1656 OpARM64MOVBreg
1657 OpARM64MOVBUreg
1658 OpARM64MOVHreg
1659 OpARM64MOVHUreg
1660 OpARM64MOVWreg
1661 OpARM64MOVWUreg
1662 OpARM64MOVDreg
1663 OpARM64MOVDnop
1664 OpARM64SCVTFWS
1665 OpARM64SCVTFWD
1666 OpARM64UCVTFWS
1667 OpARM64UCVTFWD
1668 OpARM64SCVTFS
1669 OpARM64SCVTFD
1670 OpARM64UCVTFS
1671 OpARM64UCVTFD
1672 OpARM64FCVTZSSW
1673 OpARM64FCVTZSDW
1674 OpARM64FCVTZUSW
1675 OpARM64FCVTZUDW
1676 OpARM64FCVTZSS
1677 OpARM64FCVTZSD
1678 OpARM64FCVTZUS
1679 OpARM64FCVTZUD
1680 OpARM64FCVTSD
1681 OpARM64FCVTDS
1682 OpARM64FRINTAD
1683 OpARM64FRINTMD
1684 OpARM64FRINTND
1685 OpARM64FRINTPD
1686 OpARM64FRINTZD
1687 OpARM64CSEL
1688 OpARM64CSEL0
1689 OpARM64CSINC
1690 OpARM64CSINV
1691 OpARM64CSNEG
1692 OpARM64CSETM
1693 OpARM64CALLstatic
1694 OpARM64CALLtail
1695 OpARM64CALLclosure
1696 OpARM64CALLinter
1697 OpARM64LoweredNilCheck
1698 OpARM64Equal
1699 OpARM64NotEqual
1700 OpARM64LessThan
1701 OpARM64LessEqual
1702 OpARM64GreaterThan
1703 OpARM64GreaterEqual
1704 OpARM64LessThanU
1705 OpARM64LessEqualU
1706 OpARM64GreaterThanU
1707 OpARM64GreaterEqualU
1708 OpARM64LessThanF
1709 OpARM64LessEqualF
1710 OpARM64GreaterThanF
1711 OpARM64GreaterEqualF
1712 OpARM64NotLessThanF
1713 OpARM64NotLessEqualF
1714 OpARM64NotGreaterThanF
1715 OpARM64NotGreaterEqualF
1716 OpARM64LessThanNoov
1717 OpARM64GreaterEqualNoov
1718 OpARM64DUFFZERO
1719 OpARM64LoweredZero
1720 OpARM64DUFFCOPY
1721 OpARM64LoweredMove
1722 OpARM64LoweredGetClosurePtr
1723 OpARM64LoweredGetCallerSP
1724 OpARM64LoweredGetCallerPC
1725 OpARM64FlagConstant
1726 OpARM64InvertFlags
1727 OpARM64LDAR
1728 OpARM64LDARB
1729 OpARM64LDARW
1730 OpARM64STLRB
1731 OpARM64STLR
1732 OpARM64STLRW
1733 OpARM64LoweredAtomicExchange64
1734 OpARM64LoweredAtomicExchange32
1735 OpARM64LoweredAtomicExchange8
1736 OpARM64LoweredAtomicExchange64Variant
1737 OpARM64LoweredAtomicExchange32Variant
1738 OpARM64LoweredAtomicExchange8Variant
1739 OpARM64LoweredAtomicAdd64
1740 OpARM64LoweredAtomicAdd32
1741 OpARM64LoweredAtomicAdd64Variant
1742 OpARM64LoweredAtomicAdd32Variant
1743 OpARM64LoweredAtomicCas64
1744 OpARM64LoweredAtomicCas32
1745 OpARM64LoweredAtomicCas64Variant
1746 OpARM64LoweredAtomicCas32Variant
1747 OpARM64LoweredAtomicAnd8
1748 OpARM64LoweredAtomicOr8
1749 OpARM64LoweredAtomicAnd64
1750 OpARM64LoweredAtomicOr64
1751 OpARM64LoweredAtomicAnd32
1752 OpARM64LoweredAtomicOr32
1753 OpARM64LoweredAtomicAnd8Variant
1754 OpARM64LoweredAtomicOr8Variant
1755 OpARM64LoweredAtomicAnd64Variant
1756 OpARM64LoweredAtomicOr64Variant
1757 OpARM64LoweredAtomicAnd32Variant
1758 OpARM64LoweredAtomicOr32Variant
1759 OpARM64LoweredWB
1760 OpARM64LoweredPanicBoundsA
1761 OpARM64LoweredPanicBoundsB
1762 OpARM64LoweredPanicBoundsC
1763 OpARM64PRFM
1764 OpARM64DMB
1765
1766 OpLOONG64NEGV
1767 OpLOONG64NEGF
1768 OpLOONG64NEGD
1769 OpLOONG64SQRTD
1770 OpLOONG64SQRTF
1771 OpLOONG64ABSD
1772 OpLOONG64CLZW
1773 OpLOONG64CLZV
1774 OpLOONG64CTZW
1775 OpLOONG64CTZV
1776 OpLOONG64REVB2H
1777 OpLOONG64REVB2W
1778 OpLOONG64REVBV
1779 OpLOONG64BITREV4B
1780 OpLOONG64BITREVW
1781 OpLOONG64BITREVV
1782 OpLOONG64VPCNT64
1783 OpLOONG64VPCNT32
1784 OpLOONG64VPCNT16
1785 OpLOONG64ADDV
1786 OpLOONG64ADDVconst
1787 OpLOONG64SUBV
1788 OpLOONG64SUBVconst
1789 OpLOONG64MULV
1790 OpLOONG64MULHV
1791 OpLOONG64MULHVU
1792 OpLOONG64DIVV
1793 OpLOONG64DIVVU
1794 OpLOONG64REMV
1795 OpLOONG64REMVU
1796 OpLOONG64ADDF
1797 OpLOONG64ADDD
1798 OpLOONG64SUBF
1799 OpLOONG64SUBD
1800 OpLOONG64MULF
1801 OpLOONG64MULD
1802 OpLOONG64DIVF
1803 OpLOONG64DIVD
1804 OpLOONG64AND
1805 OpLOONG64ANDconst
1806 OpLOONG64OR
1807 OpLOONG64ORconst
1808 OpLOONG64XOR
1809 OpLOONG64XORconst
1810 OpLOONG64NOR
1811 OpLOONG64NORconst
1812 OpLOONG64FMADDF
1813 OpLOONG64FMADDD
1814 OpLOONG64FMSUBF
1815 OpLOONG64FMSUBD
1816 OpLOONG64FNMADDF
1817 OpLOONG64FNMADDD
1818 OpLOONG64FNMSUBF
1819 OpLOONG64FNMSUBD
1820 OpLOONG64FMINF
1821 OpLOONG64FMIND
1822 OpLOONG64FMAXF
1823 OpLOONG64FMAXD
1824 OpLOONG64MASKEQZ
1825 OpLOONG64MASKNEZ
1826 OpLOONG64FCOPYSGD
1827 OpLOONG64SLLV
1828 OpLOONG64SLLVconst
1829 OpLOONG64SRLV
1830 OpLOONG64SRLVconst
1831 OpLOONG64SRAV
1832 OpLOONG64SRAVconst
1833 OpLOONG64ROTR
1834 OpLOONG64ROTRV
1835 OpLOONG64ROTRconst
1836 OpLOONG64ROTRVconst
1837 OpLOONG64SGT
1838 OpLOONG64SGTconst
1839 OpLOONG64SGTU
1840 OpLOONG64SGTUconst
1841 OpLOONG64CMPEQF
1842 OpLOONG64CMPEQD
1843 OpLOONG64CMPGEF
1844 OpLOONG64CMPGED
1845 OpLOONG64CMPGTF
1846 OpLOONG64CMPGTD
1847 OpLOONG64BSTRPICKW
1848 OpLOONG64BSTRPICKV
1849 OpLOONG64MOVVconst
1850 OpLOONG64MOVFconst
1851 OpLOONG64MOVDconst
1852 OpLOONG64MOVVaddr
1853 OpLOONG64MOVBload
1854 OpLOONG64MOVBUload
1855 OpLOONG64MOVHload
1856 OpLOONG64MOVHUload
1857 OpLOONG64MOVWload
1858 OpLOONG64MOVWUload
1859 OpLOONG64MOVVload
1860 OpLOONG64MOVFload
1861 OpLOONG64MOVDload
1862 OpLOONG64MOVVloadidx
1863 OpLOONG64MOVWloadidx
1864 OpLOONG64MOVWUloadidx
1865 OpLOONG64MOVHloadidx
1866 OpLOONG64MOVHUloadidx
1867 OpLOONG64MOVBloadidx
1868 OpLOONG64MOVBUloadidx
1869 OpLOONG64MOVFloadidx
1870 OpLOONG64MOVDloadidx
1871 OpLOONG64MOVBstore
1872 OpLOONG64MOVHstore
1873 OpLOONG64MOVWstore
1874 OpLOONG64MOVVstore
1875 OpLOONG64MOVFstore
1876 OpLOONG64MOVDstore
1877 OpLOONG64MOVBstoreidx
1878 OpLOONG64MOVHstoreidx
1879 OpLOONG64MOVWstoreidx
1880 OpLOONG64MOVVstoreidx
1881 OpLOONG64MOVFstoreidx
1882 OpLOONG64MOVDstoreidx
1883 OpLOONG64MOVBstorezero
1884 OpLOONG64MOVHstorezero
1885 OpLOONG64MOVWstorezero
1886 OpLOONG64MOVVstorezero
1887 OpLOONG64MOVBstorezeroidx
1888 OpLOONG64MOVHstorezeroidx
1889 OpLOONG64MOVWstorezeroidx
1890 OpLOONG64MOVVstorezeroidx
1891 OpLOONG64MOVWfpgp
1892 OpLOONG64MOVWgpfp
1893 OpLOONG64MOVVfpgp
1894 OpLOONG64MOVVgpfp
1895 OpLOONG64MOVBreg
1896 OpLOONG64MOVBUreg
1897 OpLOONG64MOVHreg
1898 OpLOONG64MOVHUreg
1899 OpLOONG64MOVWreg
1900 OpLOONG64MOVWUreg
1901 OpLOONG64MOVVreg
1902 OpLOONG64MOVVnop
1903 OpLOONG64MOVWF
1904 OpLOONG64MOVWD
1905 OpLOONG64MOVVF
1906 OpLOONG64MOVVD
1907 OpLOONG64TRUNCFW
1908 OpLOONG64TRUNCDW
1909 OpLOONG64TRUNCFV
1910 OpLOONG64TRUNCDV
1911 OpLOONG64MOVFD
1912 OpLOONG64MOVDF
1913 OpLOONG64LoweredRound32F
1914 OpLOONG64LoweredRound64F
1915 OpLOONG64CALLstatic
1916 OpLOONG64CALLtail
1917 OpLOONG64CALLclosure
1918 OpLOONG64CALLinter
1919 OpLOONG64DUFFZERO
1920 OpLOONG64DUFFCOPY
1921 OpLOONG64LoweredZero
1922 OpLOONG64LoweredMove
1923 OpLOONG64LoweredAtomicLoad8
1924 OpLOONG64LoweredAtomicLoad32
1925 OpLOONG64LoweredAtomicLoad64
1926 OpLOONG64LoweredAtomicStore8
1927 OpLOONG64LoweredAtomicStore32
1928 OpLOONG64LoweredAtomicStore64
1929 OpLOONG64LoweredAtomicStore8Variant
1930 OpLOONG64LoweredAtomicStore32Variant
1931 OpLOONG64LoweredAtomicStore64Variant
1932 OpLOONG64LoweredAtomicExchange32
1933 OpLOONG64LoweredAtomicExchange64
1934 OpLOONG64LoweredAtomicExchange8Variant
1935 OpLOONG64LoweredAtomicAdd32
1936 OpLOONG64LoweredAtomicAdd64
1937 OpLOONG64LoweredAtomicCas32
1938 OpLOONG64LoweredAtomicCas64
1939 OpLOONG64LoweredAtomicCas64Variant
1940 OpLOONG64LoweredAtomicCas32Variant
1941 OpLOONG64LoweredAtomicAnd32
1942 OpLOONG64LoweredAtomicOr32
1943 OpLOONG64LoweredAtomicAnd32value
1944 OpLOONG64LoweredAtomicAnd64value
1945 OpLOONG64LoweredAtomicOr32value
1946 OpLOONG64LoweredAtomicOr64value
1947 OpLOONG64LoweredNilCheck
1948 OpLOONG64FPFlagTrue
1949 OpLOONG64FPFlagFalse
1950 OpLOONG64LoweredGetClosurePtr
1951 OpLOONG64LoweredGetCallerSP
1952 OpLOONG64LoweredGetCallerPC
1953 OpLOONG64LoweredWB
1954 OpLOONG64LoweredPubBarrier
1955 OpLOONG64LoweredPanicBoundsA
1956 OpLOONG64LoweredPanicBoundsB
1957 OpLOONG64LoweredPanicBoundsC
1958
1959 OpMIPSADD
1960 OpMIPSADDconst
1961 OpMIPSSUB
1962 OpMIPSSUBconst
1963 OpMIPSMUL
1964 OpMIPSMULT
1965 OpMIPSMULTU
1966 OpMIPSDIV
1967 OpMIPSDIVU
1968 OpMIPSADDF
1969 OpMIPSADDD
1970 OpMIPSSUBF
1971 OpMIPSSUBD
1972 OpMIPSMULF
1973 OpMIPSMULD
1974 OpMIPSDIVF
1975 OpMIPSDIVD
1976 OpMIPSAND
1977 OpMIPSANDconst
1978 OpMIPSOR
1979 OpMIPSORconst
1980 OpMIPSXOR
1981 OpMIPSXORconst
1982 OpMIPSNOR
1983 OpMIPSNORconst
1984 OpMIPSNEG
1985 OpMIPSNEGF
1986 OpMIPSNEGD
1987 OpMIPSABSD
1988 OpMIPSSQRTD
1989 OpMIPSSQRTF
1990 OpMIPSSLL
1991 OpMIPSSLLconst
1992 OpMIPSSRL
1993 OpMIPSSRLconst
1994 OpMIPSSRA
1995 OpMIPSSRAconst
1996 OpMIPSCLZ
1997 OpMIPSSGT
1998 OpMIPSSGTconst
1999 OpMIPSSGTzero
2000 OpMIPSSGTU
2001 OpMIPSSGTUconst
2002 OpMIPSSGTUzero
2003 OpMIPSCMPEQF
2004 OpMIPSCMPEQD
2005 OpMIPSCMPGEF
2006 OpMIPSCMPGED
2007 OpMIPSCMPGTF
2008 OpMIPSCMPGTD
2009 OpMIPSMOVWconst
2010 OpMIPSMOVFconst
2011 OpMIPSMOVDconst
2012 OpMIPSMOVWaddr
2013 OpMIPSMOVBload
2014 OpMIPSMOVBUload
2015 OpMIPSMOVHload
2016 OpMIPSMOVHUload
2017 OpMIPSMOVWload
2018 OpMIPSMOVFload
2019 OpMIPSMOVDload
2020 OpMIPSMOVBstore
2021 OpMIPSMOVHstore
2022 OpMIPSMOVWstore
2023 OpMIPSMOVFstore
2024 OpMIPSMOVDstore
2025 OpMIPSMOVBstorezero
2026 OpMIPSMOVHstorezero
2027 OpMIPSMOVWstorezero
2028 OpMIPSMOVWfpgp
2029 OpMIPSMOVWgpfp
2030 OpMIPSMOVBreg
2031 OpMIPSMOVBUreg
2032 OpMIPSMOVHreg
2033 OpMIPSMOVHUreg
2034 OpMIPSMOVWreg
2035 OpMIPSMOVWnop
2036 OpMIPSCMOVZ
2037 OpMIPSCMOVZzero
2038 OpMIPSMOVWF
2039 OpMIPSMOVWD
2040 OpMIPSTRUNCFW
2041 OpMIPSTRUNCDW
2042 OpMIPSMOVFD
2043 OpMIPSMOVDF
2044 OpMIPSCALLstatic
2045 OpMIPSCALLtail
2046 OpMIPSCALLclosure
2047 OpMIPSCALLinter
2048 OpMIPSLoweredAtomicLoad8
2049 OpMIPSLoweredAtomicLoad32
2050 OpMIPSLoweredAtomicStore8
2051 OpMIPSLoweredAtomicStore32
2052 OpMIPSLoweredAtomicStorezero
2053 OpMIPSLoweredAtomicExchange
2054 OpMIPSLoweredAtomicAdd
2055 OpMIPSLoweredAtomicAddconst
2056 OpMIPSLoweredAtomicCas
2057 OpMIPSLoweredAtomicAnd
2058 OpMIPSLoweredAtomicOr
2059 OpMIPSLoweredZero
2060 OpMIPSLoweredMove
2061 OpMIPSLoweredNilCheck
2062 OpMIPSFPFlagTrue
2063 OpMIPSFPFlagFalse
2064 OpMIPSLoweredGetClosurePtr
2065 OpMIPSLoweredGetCallerSP
2066 OpMIPSLoweredGetCallerPC
2067 OpMIPSLoweredWB
2068 OpMIPSLoweredPanicBoundsA
2069 OpMIPSLoweredPanicBoundsB
2070 OpMIPSLoweredPanicBoundsC
2071 OpMIPSLoweredPanicExtendA
2072 OpMIPSLoweredPanicExtendB
2073 OpMIPSLoweredPanicExtendC
2074
2075 OpMIPS64ADDV
2076 OpMIPS64ADDVconst
2077 OpMIPS64SUBV
2078 OpMIPS64SUBVconst
2079 OpMIPS64MULV
2080 OpMIPS64MULVU
2081 OpMIPS64DIVV
2082 OpMIPS64DIVVU
2083 OpMIPS64ADDF
2084 OpMIPS64ADDD
2085 OpMIPS64SUBF
2086 OpMIPS64SUBD
2087 OpMIPS64MULF
2088 OpMIPS64MULD
2089 OpMIPS64DIVF
2090 OpMIPS64DIVD
2091 OpMIPS64AND
2092 OpMIPS64ANDconst
2093 OpMIPS64OR
2094 OpMIPS64ORconst
2095 OpMIPS64XOR
2096 OpMIPS64XORconst
2097 OpMIPS64NOR
2098 OpMIPS64NORconst
2099 OpMIPS64NEGV
2100 OpMIPS64NEGF
2101 OpMIPS64NEGD
2102 OpMIPS64ABSD
2103 OpMIPS64SQRTD
2104 OpMIPS64SQRTF
2105 OpMIPS64SLLV
2106 OpMIPS64SLLVconst
2107 OpMIPS64SRLV
2108 OpMIPS64SRLVconst
2109 OpMIPS64SRAV
2110 OpMIPS64SRAVconst
2111 OpMIPS64SGT
2112 OpMIPS64SGTconst
2113 OpMIPS64SGTU
2114 OpMIPS64SGTUconst
2115 OpMIPS64CMPEQF
2116 OpMIPS64CMPEQD
2117 OpMIPS64CMPGEF
2118 OpMIPS64CMPGED
2119 OpMIPS64CMPGTF
2120 OpMIPS64CMPGTD
2121 OpMIPS64MOVVconst
2122 OpMIPS64MOVFconst
2123 OpMIPS64MOVDconst
2124 OpMIPS64MOVVaddr
2125 OpMIPS64MOVBload
2126 OpMIPS64MOVBUload
2127 OpMIPS64MOVHload
2128 OpMIPS64MOVHUload
2129 OpMIPS64MOVWload
2130 OpMIPS64MOVWUload
2131 OpMIPS64MOVVload
2132 OpMIPS64MOVFload
2133 OpMIPS64MOVDload
2134 OpMIPS64MOVBstore
2135 OpMIPS64MOVHstore
2136 OpMIPS64MOVWstore
2137 OpMIPS64MOVVstore
2138 OpMIPS64MOVFstore
2139 OpMIPS64MOVDstore
2140 OpMIPS64MOVBstorezero
2141 OpMIPS64MOVHstorezero
2142 OpMIPS64MOVWstorezero
2143 OpMIPS64MOVVstorezero
2144 OpMIPS64MOVWfpgp
2145 OpMIPS64MOVWgpfp
2146 OpMIPS64MOVVfpgp
2147 OpMIPS64MOVVgpfp
2148 OpMIPS64MOVBreg
2149 OpMIPS64MOVBUreg
2150 OpMIPS64MOVHreg
2151 OpMIPS64MOVHUreg
2152 OpMIPS64MOVWreg
2153 OpMIPS64MOVWUreg
2154 OpMIPS64MOVVreg
2155 OpMIPS64MOVVnop
2156 OpMIPS64MOVWF
2157 OpMIPS64MOVWD
2158 OpMIPS64MOVVF
2159 OpMIPS64MOVVD
2160 OpMIPS64TRUNCFW
2161 OpMIPS64TRUNCDW
2162 OpMIPS64TRUNCFV
2163 OpMIPS64TRUNCDV
2164 OpMIPS64MOVFD
2165 OpMIPS64MOVDF
2166 OpMIPS64CALLstatic
2167 OpMIPS64CALLtail
2168 OpMIPS64CALLclosure
2169 OpMIPS64CALLinter
2170 OpMIPS64DUFFZERO
2171 OpMIPS64DUFFCOPY
2172 OpMIPS64LoweredZero
2173 OpMIPS64LoweredMove
2174 OpMIPS64LoweredAtomicAnd32
2175 OpMIPS64LoweredAtomicOr32
2176 OpMIPS64LoweredAtomicLoad8
2177 OpMIPS64LoweredAtomicLoad32
2178 OpMIPS64LoweredAtomicLoad64
2179 OpMIPS64LoweredAtomicStore8
2180 OpMIPS64LoweredAtomicStore32
2181 OpMIPS64LoweredAtomicStore64
2182 OpMIPS64LoweredAtomicStorezero32
2183 OpMIPS64LoweredAtomicStorezero64
2184 OpMIPS64LoweredAtomicExchange32
2185 OpMIPS64LoweredAtomicExchange64
2186 OpMIPS64LoweredAtomicAdd32
2187 OpMIPS64LoweredAtomicAdd64
2188 OpMIPS64LoweredAtomicAddconst32
2189 OpMIPS64LoweredAtomicAddconst64
2190 OpMIPS64LoweredAtomicCas32
2191 OpMIPS64LoweredAtomicCas64
2192 OpMIPS64LoweredNilCheck
2193 OpMIPS64FPFlagTrue
2194 OpMIPS64FPFlagFalse
2195 OpMIPS64LoweredGetClosurePtr
2196 OpMIPS64LoweredGetCallerSP
2197 OpMIPS64LoweredGetCallerPC
2198 OpMIPS64LoweredWB
2199 OpMIPS64LoweredPanicBoundsA
2200 OpMIPS64LoweredPanicBoundsB
2201 OpMIPS64LoweredPanicBoundsC
2202
2203 OpPPC64ADD
2204 OpPPC64ADDCC
2205 OpPPC64ADDconst
2206 OpPPC64ADDCCconst
2207 OpPPC64FADD
2208 OpPPC64FADDS
2209 OpPPC64SUB
2210 OpPPC64SUBCC
2211 OpPPC64SUBFCconst
2212 OpPPC64FSUB
2213 OpPPC64FSUBS
2214 OpPPC64XSMINJDP
2215 OpPPC64XSMAXJDP
2216 OpPPC64MULLD
2217 OpPPC64MULLW
2218 OpPPC64MULLDconst
2219 OpPPC64MULLWconst
2220 OpPPC64MADDLD
2221 OpPPC64MULHD
2222 OpPPC64MULHW
2223 OpPPC64MULHDU
2224 OpPPC64MULHDUCC
2225 OpPPC64MULHWU
2226 OpPPC64FMUL
2227 OpPPC64FMULS
2228 OpPPC64FMADD
2229 OpPPC64FMADDS
2230 OpPPC64FMSUB
2231 OpPPC64FMSUBS
2232 OpPPC64SRAD
2233 OpPPC64SRAW
2234 OpPPC64SRD
2235 OpPPC64SRW
2236 OpPPC64SLD
2237 OpPPC64SLW
2238 OpPPC64ROTL
2239 OpPPC64ROTLW
2240 OpPPC64CLRLSLWI
2241 OpPPC64CLRLSLDI
2242 OpPPC64ADDC
2243 OpPPC64SUBC
2244 OpPPC64ADDCconst
2245 OpPPC64SUBCconst
2246 OpPPC64ADDE
2247 OpPPC64ADDZE
2248 OpPPC64SUBE
2249 OpPPC64ADDZEzero
2250 OpPPC64SUBZEzero
2251 OpPPC64SRADconst
2252 OpPPC64SRAWconst
2253 OpPPC64SRDconst
2254 OpPPC64SRWconst
2255 OpPPC64SLDconst
2256 OpPPC64SLWconst
2257 OpPPC64ROTLconst
2258 OpPPC64ROTLWconst
2259 OpPPC64EXTSWSLconst
2260 OpPPC64RLWINM
2261 OpPPC64RLWNM
2262 OpPPC64RLWMI
2263 OpPPC64RLDICL
2264 OpPPC64RLDICLCC
2265 OpPPC64RLDICR
2266 OpPPC64CNTLZD
2267 OpPPC64CNTLZDCC
2268 OpPPC64CNTLZW
2269 OpPPC64CNTTZD
2270 OpPPC64CNTTZW
2271 OpPPC64POPCNTD
2272 OpPPC64POPCNTW
2273 OpPPC64POPCNTB
2274 OpPPC64FDIV
2275 OpPPC64FDIVS
2276 OpPPC64DIVD
2277 OpPPC64DIVW
2278 OpPPC64DIVDU
2279 OpPPC64DIVWU
2280 OpPPC64MODUD
2281 OpPPC64MODSD
2282 OpPPC64MODUW
2283 OpPPC64MODSW
2284 OpPPC64FCTIDZ
2285 OpPPC64FCTIWZ
2286 OpPPC64FCFID
2287 OpPPC64FCFIDS
2288 OpPPC64FRSP
2289 OpPPC64MFVSRD
2290 OpPPC64MTVSRD
2291 OpPPC64AND
2292 OpPPC64ANDN
2293 OpPPC64ANDNCC
2294 OpPPC64ANDCC
2295 OpPPC64OR
2296 OpPPC64ORN
2297 OpPPC64ORCC
2298 OpPPC64NOR
2299 OpPPC64NORCC
2300 OpPPC64XOR
2301 OpPPC64XORCC
2302 OpPPC64EQV
2303 OpPPC64NEG
2304 OpPPC64NEGCC
2305 OpPPC64BRD
2306 OpPPC64BRW
2307 OpPPC64BRH
2308 OpPPC64FNEG
2309 OpPPC64FSQRT
2310 OpPPC64FSQRTS
2311 OpPPC64FFLOOR
2312 OpPPC64FCEIL
2313 OpPPC64FTRUNC
2314 OpPPC64FROUND
2315 OpPPC64FABS
2316 OpPPC64FNABS
2317 OpPPC64FCPSGN
2318 OpPPC64ORconst
2319 OpPPC64XORconst
2320 OpPPC64ANDCCconst
2321 OpPPC64ANDconst
2322 OpPPC64MOVBreg
2323 OpPPC64MOVBZreg
2324 OpPPC64MOVHreg
2325 OpPPC64MOVHZreg
2326 OpPPC64MOVWreg
2327 OpPPC64MOVWZreg
2328 OpPPC64MOVBZload
2329 OpPPC64MOVHload
2330 OpPPC64MOVHZload
2331 OpPPC64MOVWload
2332 OpPPC64MOVWZload
2333 OpPPC64MOVDload
2334 OpPPC64MOVDBRload
2335 OpPPC64MOVWBRload
2336 OpPPC64MOVHBRload
2337 OpPPC64MOVBZloadidx
2338 OpPPC64MOVHloadidx
2339 OpPPC64MOVHZloadidx
2340 OpPPC64MOVWloadidx
2341 OpPPC64MOVWZloadidx
2342 OpPPC64MOVDloadidx
2343 OpPPC64MOVHBRloadidx
2344 OpPPC64MOVWBRloadidx
2345 OpPPC64MOVDBRloadidx
2346 OpPPC64FMOVDloadidx
2347 OpPPC64FMOVSloadidx
2348 OpPPC64DCBT
2349 OpPPC64MOVDBRstore
2350 OpPPC64MOVWBRstore
2351 OpPPC64MOVHBRstore
2352 OpPPC64FMOVDload
2353 OpPPC64FMOVSload
2354 OpPPC64MOVBstore
2355 OpPPC64MOVHstore
2356 OpPPC64MOVWstore
2357 OpPPC64MOVDstore
2358 OpPPC64FMOVDstore
2359 OpPPC64FMOVSstore
2360 OpPPC64MOVBstoreidx
2361 OpPPC64MOVHstoreidx
2362 OpPPC64MOVWstoreidx
2363 OpPPC64MOVDstoreidx
2364 OpPPC64FMOVDstoreidx
2365 OpPPC64FMOVSstoreidx
2366 OpPPC64MOVHBRstoreidx
2367 OpPPC64MOVWBRstoreidx
2368 OpPPC64MOVDBRstoreidx
2369 OpPPC64MOVBstorezero
2370 OpPPC64MOVHstorezero
2371 OpPPC64MOVWstorezero
2372 OpPPC64MOVDstorezero
2373 OpPPC64MOVDaddr
2374 OpPPC64MOVDconst
2375 OpPPC64FMOVDconst
2376 OpPPC64FMOVSconst
2377 OpPPC64FCMPU
2378 OpPPC64CMP
2379 OpPPC64CMPU
2380 OpPPC64CMPW
2381 OpPPC64CMPWU
2382 OpPPC64CMPconst
2383 OpPPC64CMPUconst
2384 OpPPC64CMPWconst
2385 OpPPC64CMPWUconst
2386 OpPPC64ISEL
2387 OpPPC64ISELZ
2388 OpPPC64SETBC
2389 OpPPC64SETBCR
2390 OpPPC64Equal
2391 OpPPC64NotEqual
2392 OpPPC64LessThan
2393 OpPPC64FLessThan
2394 OpPPC64LessEqual
2395 OpPPC64FLessEqual
2396 OpPPC64GreaterThan
2397 OpPPC64FGreaterThan
2398 OpPPC64GreaterEqual
2399 OpPPC64FGreaterEqual
2400 OpPPC64LoweredGetClosurePtr
2401 OpPPC64LoweredGetCallerSP
2402 OpPPC64LoweredGetCallerPC
2403 OpPPC64LoweredNilCheck
2404 OpPPC64LoweredRound32F
2405 OpPPC64LoweredRound64F
2406 OpPPC64CALLstatic
2407 OpPPC64CALLtail
2408 OpPPC64CALLclosure
2409 OpPPC64CALLinter
2410 OpPPC64LoweredZero
2411 OpPPC64LoweredZeroShort
2412 OpPPC64LoweredQuadZeroShort
2413 OpPPC64LoweredQuadZero
2414 OpPPC64LoweredMove
2415 OpPPC64LoweredMoveShort
2416 OpPPC64LoweredQuadMove
2417 OpPPC64LoweredQuadMoveShort
2418 OpPPC64LoweredAtomicStore8
2419 OpPPC64LoweredAtomicStore32
2420 OpPPC64LoweredAtomicStore64
2421 OpPPC64LoweredAtomicLoad8
2422 OpPPC64LoweredAtomicLoad32
2423 OpPPC64LoweredAtomicLoad64
2424 OpPPC64LoweredAtomicLoadPtr
2425 OpPPC64LoweredAtomicAdd32
2426 OpPPC64LoweredAtomicAdd64
2427 OpPPC64LoweredAtomicExchange8
2428 OpPPC64LoweredAtomicExchange32
2429 OpPPC64LoweredAtomicExchange64
2430 OpPPC64LoweredAtomicCas64
2431 OpPPC64LoweredAtomicCas32
2432 OpPPC64LoweredAtomicAnd8
2433 OpPPC64LoweredAtomicAnd32
2434 OpPPC64LoweredAtomicOr8
2435 OpPPC64LoweredAtomicOr32
2436 OpPPC64LoweredWB
2437 OpPPC64LoweredPubBarrier
2438 OpPPC64LoweredPanicBoundsA
2439 OpPPC64LoweredPanicBoundsB
2440 OpPPC64LoweredPanicBoundsC
2441 OpPPC64InvertFlags
2442 OpPPC64FlagEQ
2443 OpPPC64FlagLT
2444 OpPPC64FlagGT
2445
2446 OpRISCV64ADD
2447 OpRISCV64ADDI
2448 OpRISCV64ADDIW
2449 OpRISCV64NEG
2450 OpRISCV64NEGW
2451 OpRISCV64SUB
2452 OpRISCV64SUBW
2453 OpRISCV64MUL
2454 OpRISCV64MULW
2455 OpRISCV64MULH
2456 OpRISCV64MULHU
2457 OpRISCV64LoweredMuluhilo
2458 OpRISCV64LoweredMuluover
2459 OpRISCV64DIV
2460 OpRISCV64DIVU
2461 OpRISCV64DIVW
2462 OpRISCV64DIVUW
2463 OpRISCV64REM
2464 OpRISCV64REMU
2465 OpRISCV64REMW
2466 OpRISCV64REMUW
2467 OpRISCV64MOVaddr
2468 OpRISCV64MOVDconst
2469 OpRISCV64MOVBload
2470 OpRISCV64MOVHload
2471 OpRISCV64MOVWload
2472 OpRISCV64MOVDload
2473 OpRISCV64MOVBUload
2474 OpRISCV64MOVHUload
2475 OpRISCV64MOVWUload
2476 OpRISCV64MOVBstore
2477 OpRISCV64MOVHstore
2478 OpRISCV64MOVWstore
2479 OpRISCV64MOVDstore
2480 OpRISCV64MOVBstorezero
2481 OpRISCV64MOVHstorezero
2482 OpRISCV64MOVWstorezero
2483 OpRISCV64MOVDstorezero
2484 OpRISCV64MOVBreg
2485 OpRISCV64MOVHreg
2486 OpRISCV64MOVWreg
2487 OpRISCV64MOVDreg
2488 OpRISCV64MOVBUreg
2489 OpRISCV64MOVHUreg
2490 OpRISCV64MOVWUreg
2491 OpRISCV64MOVDnop
2492 OpRISCV64SLL
2493 OpRISCV64SLLW
2494 OpRISCV64SRA
2495 OpRISCV64SRAW
2496 OpRISCV64SRL
2497 OpRISCV64SRLW
2498 OpRISCV64SLLI
2499 OpRISCV64SLLIW
2500 OpRISCV64SRAI
2501 OpRISCV64SRAIW
2502 OpRISCV64SRLI
2503 OpRISCV64SRLIW
2504 OpRISCV64SH1ADD
2505 OpRISCV64SH2ADD
2506 OpRISCV64SH3ADD
2507 OpRISCV64AND
2508 OpRISCV64ANDN
2509 OpRISCV64ANDI
2510 OpRISCV64NOT
2511 OpRISCV64OR
2512 OpRISCV64ORN
2513 OpRISCV64ORI
2514 OpRISCV64ROL
2515 OpRISCV64ROLW
2516 OpRISCV64ROR
2517 OpRISCV64RORI
2518 OpRISCV64RORIW
2519 OpRISCV64RORW
2520 OpRISCV64XNOR
2521 OpRISCV64XOR
2522 OpRISCV64XORI
2523 OpRISCV64MIN
2524 OpRISCV64MAX
2525 OpRISCV64MINU
2526 OpRISCV64MAXU
2527 OpRISCV64SEQZ
2528 OpRISCV64SNEZ
2529 OpRISCV64SLT
2530 OpRISCV64SLTI
2531 OpRISCV64SLTU
2532 OpRISCV64SLTIU
2533 OpRISCV64LoweredRound32F
2534 OpRISCV64LoweredRound64F
2535 OpRISCV64CALLstatic
2536 OpRISCV64CALLtail
2537 OpRISCV64CALLclosure
2538 OpRISCV64CALLinter
2539 OpRISCV64DUFFZERO
2540 OpRISCV64DUFFCOPY
2541 OpRISCV64LoweredZero
2542 OpRISCV64LoweredMove
2543 OpRISCV64LoweredAtomicLoad8
2544 OpRISCV64LoweredAtomicLoad32
2545 OpRISCV64LoweredAtomicLoad64
2546 OpRISCV64LoweredAtomicStore8
2547 OpRISCV64LoweredAtomicStore32
2548 OpRISCV64LoweredAtomicStore64
2549 OpRISCV64LoweredAtomicExchange32
2550 OpRISCV64LoweredAtomicExchange64
2551 OpRISCV64LoweredAtomicAdd32
2552 OpRISCV64LoweredAtomicAdd64
2553 OpRISCV64LoweredAtomicCas32
2554 OpRISCV64LoweredAtomicCas64
2555 OpRISCV64LoweredAtomicAnd32
2556 OpRISCV64LoweredAtomicOr32
2557 OpRISCV64LoweredNilCheck
2558 OpRISCV64LoweredGetClosurePtr
2559 OpRISCV64LoweredGetCallerSP
2560 OpRISCV64LoweredGetCallerPC
2561 OpRISCV64LoweredWB
2562 OpRISCV64LoweredPubBarrier
2563 OpRISCV64LoweredPanicBoundsA
2564 OpRISCV64LoweredPanicBoundsB
2565 OpRISCV64LoweredPanicBoundsC
2566 OpRISCV64FADDS
2567 OpRISCV64FSUBS
2568 OpRISCV64FMULS
2569 OpRISCV64FDIVS
2570 OpRISCV64FMADDS
2571 OpRISCV64FMSUBS
2572 OpRISCV64FNMADDS
2573 OpRISCV64FNMSUBS
2574 OpRISCV64FSQRTS
2575 OpRISCV64FNEGS
2576 OpRISCV64FMVSX
2577 OpRISCV64FCVTSW
2578 OpRISCV64FCVTSL
2579 OpRISCV64FCVTWS
2580 OpRISCV64FCVTLS
2581 OpRISCV64FMOVWload
2582 OpRISCV64FMOVWstore
2583 OpRISCV64FEQS
2584 OpRISCV64FNES
2585 OpRISCV64FLTS
2586 OpRISCV64FLES
2587 OpRISCV64LoweredFMAXS
2588 OpRISCV64LoweredFMINS
2589 OpRISCV64FADDD
2590 OpRISCV64FSUBD
2591 OpRISCV64FMULD
2592 OpRISCV64FDIVD
2593 OpRISCV64FMADDD
2594 OpRISCV64FMSUBD
2595 OpRISCV64FNMADDD
2596 OpRISCV64FNMSUBD
2597 OpRISCV64FSQRTD
2598 OpRISCV64FNEGD
2599 OpRISCV64FABSD
2600 OpRISCV64FSGNJD
2601 OpRISCV64FMVDX
2602 OpRISCV64FCVTDW
2603 OpRISCV64FCVTDL
2604 OpRISCV64FCVTWD
2605 OpRISCV64FCVTLD
2606 OpRISCV64FCVTDS
2607 OpRISCV64FCVTSD
2608 OpRISCV64FMOVDload
2609 OpRISCV64FMOVDstore
2610 OpRISCV64FEQD
2611 OpRISCV64FNED
2612 OpRISCV64FLTD
2613 OpRISCV64FLED
2614 OpRISCV64LoweredFMIND
2615 OpRISCV64LoweredFMAXD
2616
2617 OpS390XFADDS
2618 OpS390XFADD
2619 OpS390XFSUBS
2620 OpS390XFSUB
2621 OpS390XFMULS
2622 OpS390XFMUL
2623 OpS390XFDIVS
2624 OpS390XFDIV
2625 OpS390XFNEGS
2626 OpS390XFNEG
2627 OpS390XFMADDS
2628 OpS390XFMADD
2629 OpS390XFMSUBS
2630 OpS390XFMSUB
2631 OpS390XLPDFR
2632 OpS390XLNDFR
2633 OpS390XCPSDR
2634 OpS390XFIDBR
2635 OpS390XFMOVSload
2636 OpS390XFMOVDload
2637 OpS390XFMOVSconst
2638 OpS390XFMOVDconst
2639 OpS390XFMOVSloadidx
2640 OpS390XFMOVDloadidx
2641 OpS390XFMOVSstore
2642 OpS390XFMOVDstore
2643 OpS390XFMOVSstoreidx
2644 OpS390XFMOVDstoreidx
2645 OpS390XADD
2646 OpS390XADDW
2647 OpS390XADDconst
2648 OpS390XADDWconst
2649 OpS390XADDload
2650 OpS390XADDWload
2651 OpS390XSUB
2652 OpS390XSUBW
2653 OpS390XSUBconst
2654 OpS390XSUBWconst
2655 OpS390XSUBload
2656 OpS390XSUBWload
2657 OpS390XMULLD
2658 OpS390XMULLW
2659 OpS390XMULLDconst
2660 OpS390XMULLWconst
2661 OpS390XMULLDload
2662 OpS390XMULLWload
2663 OpS390XMULHD
2664 OpS390XMULHDU
2665 OpS390XDIVD
2666 OpS390XDIVW
2667 OpS390XDIVDU
2668 OpS390XDIVWU
2669 OpS390XMODD
2670 OpS390XMODW
2671 OpS390XMODDU
2672 OpS390XMODWU
2673 OpS390XAND
2674 OpS390XANDW
2675 OpS390XANDconst
2676 OpS390XANDWconst
2677 OpS390XANDload
2678 OpS390XANDWload
2679 OpS390XOR
2680 OpS390XORW
2681 OpS390XORconst
2682 OpS390XORWconst
2683 OpS390XORload
2684 OpS390XORWload
2685 OpS390XXOR
2686 OpS390XXORW
2687 OpS390XXORconst
2688 OpS390XXORWconst
2689 OpS390XXORload
2690 OpS390XXORWload
2691 OpS390XADDC
2692 OpS390XADDCconst
2693 OpS390XADDE
2694 OpS390XSUBC
2695 OpS390XSUBE
2696 OpS390XCMP
2697 OpS390XCMPW
2698 OpS390XCMPU
2699 OpS390XCMPWU
2700 OpS390XCMPconst
2701 OpS390XCMPWconst
2702 OpS390XCMPUconst
2703 OpS390XCMPWUconst
2704 OpS390XFCMPS
2705 OpS390XFCMP
2706 OpS390XLTDBR
2707 OpS390XLTEBR
2708 OpS390XSLD
2709 OpS390XSLW
2710 OpS390XSLDconst
2711 OpS390XSLWconst
2712 OpS390XSRD
2713 OpS390XSRW
2714 OpS390XSRDconst
2715 OpS390XSRWconst
2716 OpS390XSRAD
2717 OpS390XSRAW
2718 OpS390XSRADconst
2719 OpS390XSRAWconst
2720 OpS390XRLLG
2721 OpS390XRLL
2722 OpS390XRLLconst
2723 OpS390XRXSBG
2724 OpS390XRISBGZ
2725 OpS390XNEG
2726 OpS390XNEGW
2727 OpS390XNOT
2728 OpS390XNOTW
2729 OpS390XFSQRT
2730 OpS390XFSQRTS
2731 OpS390XLOCGR
2732 OpS390XMOVBreg
2733 OpS390XMOVBZreg
2734 OpS390XMOVHreg
2735 OpS390XMOVHZreg
2736 OpS390XMOVWreg
2737 OpS390XMOVWZreg
2738 OpS390XMOVDconst
2739 OpS390XLDGR
2740 OpS390XLGDR
2741 OpS390XCFDBRA
2742 OpS390XCGDBRA
2743 OpS390XCFEBRA
2744 OpS390XCGEBRA
2745 OpS390XCEFBRA
2746 OpS390XCDFBRA
2747 OpS390XCEGBRA
2748 OpS390XCDGBRA
2749 OpS390XCLFEBR
2750 OpS390XCLFDBR
2751 OpS390XCLGEBR
2752 OpS390XCLGDBR
2753 OpS390XCELFBR
2754 OpS390XCDLFBR
2755 OpS390XCELGBR
2756 OpS390XCDLGBR
2757 OpS390XLEDBR
2758 OpS390XLDEBR
2759 OpS390XMOVDaddr
2760 OpS390XMOVDaddridx
2761 OpS390XMOVBZload
2762 OpS390XMOVBload
2763 OpS390XMOVHZload
2764 OpS390XMOVHload
2765 OpS390XMOVWZload
2766 OpS390XMOVWload
2767 OpS390XMOVDload
2768 OpS390XMOVWBR
2769 OpS390XMOVDBR
2770 OpS390XMOVHBRload
2771 OpS390XMOVWBRload
2772 OpS390XMOVDBRload
2773 OpS390XMOVBstore
2774 OpS390XMOVHstore
2775 OpS390XMOVWstore
2776 OpS390XMOVDstore
2777 OpS390XMOVHBRstore
2778 OpS390XMOVWBRstore
2779 OpS390XMOVDBRstore
2780 OpS390XMVC
2781 OpS390XMOVBZloadidx
2782 OpS390XMOVBloadidx
2783 OpS390XMOVHZloadidx
2784 OpS390XMOVHloadidx
2785 OpS390XMOVWZloadidx
2786 OpS390XMOVWloadidx
2787 OpS390XMOVDloadidx
2788 OpS390XMOVHBRloadidx
2789 OpS390XMOVWBRloadidx
2790 OpS390XMOVDBRloadidx
2791 OpS390XMOVBstoreidx
2792 OpS390XMOVHstoreidx
2793 OpS390XMOVWstoreidx
2794 OpS390XMOVDstoreidx
2795 OpS390XMOVHBRstoreidx
2796 OpS390XMOVWBRstoreidx
2797 OpS390XMOVDBRstoreidx
2798 OpS390XMOVBstoreconst
2799 OpS390XMOVHstoreconst
2800 OpS390XMOVWstoreconst
2801 OpS390XMOVDstoreconst
2802 OpS390XCLEAR
2803 OpS390XCALLstatic
2804 OpS390XCALLtail
2805 OpS390XCALLclosure
2806 OpS390XCALLinter
2807 OpS390XInvertFlags
2808 OpS390XLoweredGetG
2809 OpS390XLoweredGetClosurePtr
2810 OpS390XLoweredGetCallerSP
2811 OpS390XLoweredGetCallerPC
2812 OpS390XLoweredNilCheck
2813 OpS390XLoweredRound32F
2814 OpS390XLoweredRound64F
2815 OpS390XLoweredWB
2816 OpS390XLoweredPanicBoundsA
2817 OpS390XLoweredPanicBoundsB
2818 OpS390XLoweredPanicBoundsC
2819 OpS390XFlagEQ
2820 OpS390XFlagLT
2821 OpS390XFlagGT
2822 OpS390XFlagOV
2823 OpS390XSYNC
2824 OpS390XMOVBZatomicload
2825 OpS390XMOVWZatomicload
2826 OpS390XMOVDatomicload
2827 OpS390XMOVBatomicstore
2828 OpS390XMOVWatomicstore
2829 OpS390XMOVDatomicstore
2830 OpS390XLAA
2831 OpS390XLAAG
2832 OpS390XAddTupleFirst32
2833 OpS390XAddTupleFirst64
2834 OpS390XLAN
2835 OpS390XLANfloor
2836 OpS390XLAO
2837 OpS390XLAOfloor
2838 OpS390XLoweredAtomicCas32
2839 OpS390XLoweredAtomicCas64
2840 OpS390XLoweredAtomicExchange32
2841 OpS390XLoweredAtomicExchange64
2842 OpS390XFLOGR
2843 OpS390XPOPCNT
2844 OpS390XMLGR
2845 OpS390XSumBytes2
2846 OpS390XSumBytes4
2847 OpS390XSumBytes8
2848 OpS390XSTMG2
2849 OpS390XSTMG3
2850 OpS390XSTMG4
2851 OpS390XSTM2
2852 OpS390XSTM3
2853 OpS390XSTM4
2854 OpS390XLoweredMove
2855 OpS390XLoweredZero
2856
2857 OpWasmLoweredStaticCall
2858 OpWasmLoweredTailCall
2859 OpWasmLoweredClosureCall
2860 OpWasmLoweredInterCall
2861 OpWasmLoweredAddr
2862 OpWasmLoweredMove
2863 OpWasmLoweredZero
2864 OpWasmLoweredGetClosurePtr
2865 OpWasmLoweredGetCallerPC
2866 OpWasmLoweredGetCallerSP
2867 OpWasmLoweredNilCheck
2868 OpWasmLoweredWB
2869 OpWasmLoweredConvert
2870 OpWasmSelect
2871 OpWasmI64Load8U
2872 OpWasmI64Load8S
2873 OpWasmI64Load16U
2874 OpWasmI64Load16S
2875 OpWasmI64Load32U
2876 OpWasmI64Load32S
2877 OpWasmI64Load
2878 OpWasmI64Store8
2879 OpWasmI64Store16
2880 OpWasmI64Store32
2881 OpWasmI64Store
2882 OpWasmF32Load
2883 OpWasmF64Load
2884 OpWasmF32Store
2885 OpWasmF64Store
2886 OpWasmI64Const
2887 OpWasmF32Const
2888 OpWasmF64Const
2889 OpWasmI64Eqz
2890 OpWasmI64Eq
2891 OpWasmI64Ne
2892 OpWasmI64LtS
2893 OpWasmI64LtU
2894 OpWasmI64GtS
2895 OpWasmI64GtU
2896 OpWasmI64LeS
2897 OpWasmI64LeU
2898 OpWasmI64GeS
2899 OpWasmI64GeU
2900 OpWasmF32Eq
2901 OpWasmF32Ne
2902 OpWasmF32Lt
2903 OpWasmF32Gt
2904 OpWasmF32Le
2905 OpWasmF32Ge
2906 OpWasmF64Eq
2907 OpWasmF64Ne
2908 OpWasmF64Lt
2909 OpWasmF64Gt
2910 OpWasmF64Le
2911 OpWasmF64Ge
2912 OpWasmI64Add
2913 OpWasmI64AddConst
2914 OpWasmI64Sub
2915 OpWasmI64Mul
2916 OpWasmI64DivS
2917 OpWasmI64DivU
2918 OpWasmI64RemS
2919 OpWasmI64RemU
2920 OpWasmI64And
2921 OpWasmI64Or
2922 OpWasmI64Xor
2923 OpWasmI64Shl
2924 OpWasmI64ShrS
2925 OpWasmI64ShrU
2926 OpWasmF32Neg
2927 OpWasmF32Add
2928 OpWasmF32Sub
2929 OpWasmF32Mul
2930 OpWasmF32Div
2931 OpWasmF64Neg
2932 OpWasmF64Add
2933 OpWasmF64Sub
2934 OpWasmF64Mul
2935 OpWasmF64Div
2936 OpWasmI64TruncSatF64S
2937 OpWasmI64TruncSatF64U
2938 OpWasmI64TruncSatF32S
2939 OpWasmI64TruncSatF32U
2940 OpWasmF32ConvertI64S
2941 OpWasmF32ConvertI64U
2942 OpWasmF64ConvertI64S
2943 OpWasmF64ConvertI64U
2944 OpWasmF32DemoteF64
2945 OpWasmF64PromoteF32
2946 OpWasmI64Extend8S
2947 OpWasmI64Extend16S
2948 OpWasmI64Extend32S
2949 OpWasmF32Sqrt
2950 OpWasmF32Trunc
2951 OpWasmF32Ceil
2952 OpWasmF32Floor
2953 OpWasmF32Nearest
2954 OpWasmF32Abs
2955 OpWasmF32Copysign
2956 OpWasmF64Sqrt
2957 OpWasmF64Trunc
2958 OpWasmF64Ceil
2959 OpWasmF64Floor
2960 OpWasmF64Nearest
2961 OpWasmF64Abs
2962 OpWasmF64Copysign
2963 OpWasmI64Ctz
2964 OpWasmI64Clz
2965 OpWasmI32Rotl
2966 OpWasmI64Rotl
2967 OpWasmI64Popcnt
2968
2969 OpAdd8
2970 OpAdd16
2971 OpAdd32
2972 OpAdd64
2973 OpAddPtr
2974 OpAdd32F
2975 OpAdd64F
2976 OpSub8
2977 OpSub16
2978 OpSub32
2979 OpSub64
2980 OpSubPtr
2981 OpSub32F
2982 OpSub64F
2983 OpMul8
2984 OpMul16
2985 OpMul32
2986 OpMul64
2987 OpMul32F
2988 OpMul64F
2989 OpDiv32F
2990 OpDiv64F
2991 OpHmul32
2992 OpHmul32u
2993 OpHmul64
2994 OpHmul64u
2995 OpMul32uhilo
2996 OpMul64uhilo
2997 OpMul32uover
2998 OpMul64uover
2999 OpAvg32u
3000 OpAvg64u
3001 OpDiv8
3002 OpDiv8u
3003 OpDiv16
3004 OpDiv16u
3005 OpDiv32
3006 OpDiv32u
3007 OpDiv64
3008 OpDiv64u
3009 OpDiv128u
3010 OpMod8
3011 OpMod8u
3012 OpMod16
3013 OpMod16u
3014 OpMod32
3015 OpMod32u
3016 OpMod64
3017 OpMod64u
3018 OpAnd8
3019 OpAnd16
3020 OpAnd32
3021 OpAnd64
3022 OpOr8
3023 OpOr16
3024 OpOr32
3025 OpOr64
3026 OpXor8
3027 OpXor16
3028 OpXor32
3029 OpXor64
3030 OpLsh8x8
3031 OpLsh8x16
3032 OpLsh8x32
3033 OpLsh8x64
3034 OpLsh16x8
3035 OpLsh16x16
3036 OpLsh16x32
3037 OpLsh16x64
3038 OpLsh32x8
3039 OpLsh32x16
3040 OpLsh32x32
3041 OpLsh32x64
3042 OpLsh64x8
3043 OpLsh64x16
3044 OpLsh64x32
3045 OpLsh64x64
3046 OpRsh8x8
3047 OpRsh8x16
3048 OpRsh8x32
3049 OpRsh8x64
3050 OpRsh16x8
3051 OpRsh16x16
3052 OpRsh16x32
3053 OpRsh16x64
3054 OpRsh32x8
3055 OpRsh32x16
3056 OpRsh32x32
3057 OpRsh32x64
3058 OpRsh64x8
3059 OpRsh64x16
3060 OpRsh64x32
3061 OpRsh64x64
3062 OpRsh8Ux8
3063 OpRsh8Ux16
3064 OpRsh8Ux32
3065 OpRsh8Ux64
3066 OpRsh16Ux8
3067 OpRsh16Ux16
3068 OpRsh16Ux32
3069 OpRsh16Ux64
3070 OpRsh32Ux8
3071 OpRsh32Ux16
3072 OpRsh32Ux32
3073 OpRsh32Ux64
3074 OpRsh64Ux8
3075 OpRsh64Ux16
3076 OpRsh64Ux32
3077 OpRsh64Ux64
3078 OpEq8
3079 OpEq16
3080 OpEq32
3081 OpEq64
3082 OpEqPtr
3083 OpEqInter
3084 OpEqSlice
3085 OpEq32F
3086 OpEq64F
3087 OpNeq8
3088 OpNeq16
3089 OpNeq32
3090 OpNeq64
3091 OpNeqPtr
3092 OpNeqInter
3093 OpNeqSlice
3094 OpNeq32F
3095 OpNeq64F
3096 OpLess8
3097 OpLess8U
3098 OpLess16
3099 OpLess16U
3100 OpLess32
3101 OpLess32U
3102 OpLess64
3103 OpLess64U
3104 OpLess32F
3105 OpLess64F
3106 OpLeq8
3107 OpLeq8U
3108 OpLeq16
3109 OpLeq16U
3110 OpLeq32
3111 OpLeq32U
3112 OpLeq64
3113 OpLeq64U
3114 OpLeq32F
3115 OpLeq64F
3116 OpCondSelect
3117 OpAndB
3118 OpOrB
3119 OpEqB
3120 OpNeqB
3121 OpNot
3122 OpNeg8
3123 OpNeg16
3124 OpNeg32
3125 OpNeg64
3126 OpNeg32F
3127 OpNeg64F
3128 OpCom8
3129 OpCom16
3130 OpCom32
3131 OpCom64
3132 OpCtz8
3133 OpCtz16
3134 OpCtz32
3135 OpCtz64
3136 OpCtz64On32
3137 OpCtz8NonZero
3138 OpCtz16NonZero
3139 OpCtz32NonZero
3140 OpCtz64NonZero
3141 OpBitLen8
3142 OpBitLen16
3143 OpBitLen32
3144 OpBitLen64
3145 OpBswap16
3146 OpBswap32
3147 OpBswap64
3148 OpBitRev8
3149 OpBitRev16
3150 OpBitRev32
3151 OpBitRev64
3152 OpPopCount8
3153 OpPopCount16
3154 OpPopCount32
3155 OpPopCount64
3156 OpRotateLeft64
3157 OpRotateLeft32
3158 OpRotateLeft16
3159 OpRotateLeft8
3160 OpSqrt
3161 OpSqrt32
3162 OpFloor
3163 OpCeil
3164 OpTrunc
3165 OpRound
3166 OpRoundToEven
3167 OpAbs
3168 OpCopysign
3169 OpMin64
3170 OpMax64
3171 OpMin64u
3172 OpMax64u
3173 OpMin64F
3174 OpMin32F
3175 OpMax64F
3176 OpMax32F
3177 OpFMA
3178 OpPhi
3179 OpCopy
3180 OpConvert
3181 OpConstBool
3182 OpConstString
3183 OpConstNil
3184 OpConst8
3185 OpConst16
3186 OpConst32
3187 OpConst64
3188 OpConst32F
3189 OpConst64F
3190 OpConstInterface
3191 OpConstSlice
3192 OpInitMem
3193 OpArg
3194 OpArgIntReg
3195 OpArgFloatReg
3196 OpAddr
3197 OpLocalAddr
3198 OpSP
3199 OpSB
3200 OpSPanchored
3201 OpLoad
3202 OpDereference
3203 OpStore
3204 OpMove
3205 OpZero
3206 OpStoreWB
3207 OpMoveWB
3208 OpZeroWB
3209 OpWBend
3210 OpWB
3211 OpHasCPUFeature
3212 OpPanicBounds
3213 OpPanicExtend
3214 OpClosureCall
3215 OpStaticCall
3216 OpInterCall
3217 OpTailCall
3218 OpClosureLECall
3219 OpStaticLECall
3220 OpInterLECall
3221 OpTailLECall
3222 OpSignExt8to16
3223 OpSignExt8to32
3224 OpSignExt8to64
3225 OpSignExt16to32
3226 OpSignExt16to64
3227 OpSignExt32to64
3228 OpZeroExt8to16
3229 OpZeroExt8to32
3230 OpZeroExt8to64
3231 OpZeroExt16to32
3232 OpZeroExt16to64
3233 OpZeroExt32to64
3234 OpTrunc16to8
3235 OpTrunc32to8
3236 OpTrunc32to16
3237 OpTrunc64to8
3238 OpTrunc64to16
3239 OpTrunc64to32
3240 OpCvt32to32F
3241 OpCvt32to64F
3242 OpCvt64to32F
3243 OpCvt64to64F
3244 OpCvt32Fto32
3245 OpCvt32Fto64
3246 OpCvt64Fto32
3247 OpCvt64Fto64
3248 OpCvt32Fto64F
3249 OpCvt64Fto32F
3250 OpCvtBoolToUint8
3251 OpRound32F
3252 OpRound64F
3253 OpIsNonNil
3254 OpIsInBounds
3255 OpIsSliceInBounds
3256 OpNilCheck
3257 OpGetG
3258 OpGetClosurePtr
3259 OpGetCallerPC
3260 OpGetCallerSP
3261 OpPtrIndex
3262 OpOffPtr
3263 OpSliceMake
3264 OpSlicePtr
3265 OpSliceLen
3266 OpSliceCap
3267 OpSlicePtrUnchecked
3268 OpComplexMake
3269 OpComplexReal
3270 OpComplexImag
3271 OpStringMake
3272 OpStringPtr
3273 OpStringLen
3274 OpIMake
3275 OpITab
3276 OpIData
3277 OpStructMake
3278 OpStructSelect
3279 OpArrayMake0
3280 OpArrayMake1
3281 OpArraySelect
3282 OpStoreReg
3283 OpLoadReg
3284 OpFwdRef
3285 OpUnknown
3286 OpVarDef
3287 OpVarLive
3288 OpKeepAlive
3289 OpInlMark
3290 OpInt64Make
3291 OpInt64Hi
3292 OpInt64Lo
3293 OpAdd32carry
3294 OpAdd32withcarry
3295 OpSub32carry
3296 OpSub32withcarry
3297 OpAdd64carry
3298 OpSub64borrow
3299 OpSignmask
3300 OpZeromask
3301 OpSlicemask
3302 OpSpectreIndex
3303 OpSpectreSliceIndex
3304 OpCvt32Uto32F
3305 OpCvt32Uto64F
3306 OpCvt32Fto32U
3307 OpCvt64Fto32U
3308 OpCvt64Uto32F
3309 OpCvt64Uto64F
3310 OpCvt32Fto64U
3311 OpCvt64Fto64U
3312 OpSelect0
3313 OpSelect1
3314 OpSelectN
3315 OpSelectNAddr
3316 OpMakeResult
3317 OpAtomicLoad8
3318 OpAtomicLoad32
3319 OpAtomicLoad64
3320 OpAtomicLoadPtr
3321 OpAtomicLoadAcq32
3322 OpAtomicLoadAcq64
3323 OpAtomicStore8
3324 OpAtomicStore32
3325 OpAtomicStore64
3326 OpAtomicStorePtrNoWB
3327 OpAtomicStoreRel32
3328 OpAtomicStoreRel64
3329 OpAtomicExchange8
3330 OpAtomicExchange32
3331 OpAtomicExchange64
3332 OpAtomicAdd32
3333 OpAtomicAdd64
3334 OpAtomicCompareAndSwap32
3335 OpAtomicCompareAndSwap64
3336 OpAtomicCompareAndSwapRel32
3337 OpAtomicAnd8
3338 OpAtomicOr8
3339 OpAtomicAnd32
3340 OpAtomicOr32
3341 OpAtomicAnd64value
3342 OpAtomicAnd32value
3343 OpAtomicAnd8value
3344 OpAtomicOr64value
3345 OpAtomicOr32value
3346 OpAtomicOr8value
3347 OpAtomicStore8Variant
3348 OpAtomicStore32Variant
3349 OpAtomicStore64Variant
3350 OpAtomicAdd32Variant
3351 OpAtomicAdd64Variant
3352 OpAtomicExchange8Variant
3353 OpAtomicExchange32Variant
3354 OpAtomicExchange64Variant
3355 OpAtomicCompareAndSwap32Variant
3356 OpAtomicCompareAndSwap64Variant
3357 OpAtomicAnd64valueVariant
3358 OpAtomicOr64valueVariant
3359 OpAtomicAnd32valueVariant
3360 OpAtomicOr32valueVariant
3361 OpAtomicAnd8valueVariant
3362 OpAtomicOr8valueVariant
3363 OpPubBarrier
3364 OpClobber
3365 OpClobberReg
3366 OpPrefetchCache
3367 OpPrefetchCacheStreamed
3368 )
3369
3370 var opcodeTable = [...]opInfo{
3371 {name: "OpInvalid"},
3372
3373 {
3374 name: "ADDSS",
3375 argLen: 2,
3376 commutative: true,
3377 resultInArg0: true,
3378 asm: x86.AADDSS,
3379 reg: regInfo{
3380 inputs: []inputInfo{
3381 {0, 65280},
3382 {1, 65280},
3383 },
3384 outputs: []outputInfo{
3385 {0, 65280},
3386 },
3387 },
3388 },
3389 {
3390 name: "ADDSD",
3391 argLen: 2,
3392 commutative: true,
3393 resultInArg0: true,
3394 asm: x86.AADDSD,
3395 reg: regInfo{
3396 inputs: []inputInfo{
3397 {0, 65280},
3398 {1, 65280},
3399 },
3400 outputs: []outputInfo{
3401 {0, 65280},
3402 },
3403 },
3404 },
3405 {
3406 name: "SUBSS",
3407 argLen: 2,
3408 resultInArg0: true,
3409 asm: x86.ASUBSS,
3410 reg: regInfo{
3411 inputs: []inputInfo{
3412 {0, 65280},
3413 {1, 65280},
3414 },
3415 outputs: []outputInfo{
3416 {0, 65280},
3417 },
3418 },
3419 },
3420 {
3421 name: "SUBSD",
3422 argLen: 2,
3423 resultInArg0: true,
3424 asm: x86.ASUBSD,
3425 reg: regInfo{
3426 inputs: []inputInfo{
3427 {0, 65280},
3428 {1, 65280},
3429 },
3430 outputs: []outputInfo{
3431 {0, 65280},
3432 },
3433 },
3434 },
3435 {
3436 name: "MULSS",
3437 argLen: 2,
3438 commutative: true,
3439 resultInArg0: true,
3440 asm: x86.AMULSS,
3441 reg: regInfo{
3442 inputs: []inputInfo{
3443 {0, 65280},
3444 {1, 65280},
3445 },
3446 outputs: []outputInfo{
3447 {0, 65280},
3448 },
3449 },
3450 },
3451 {
3452 name: "MULSD",
3453 argLen: 2,
3454 commutative: true,
3455 resultInArg0: true,
3456 asm: x86.AMULSD,
3457 reg: regInfo{
3458 inputs: []inputInfo{
3459 {0, 65280},
3460 {1, 65280},
3461 },
3462 outputs: []outputInfo{
3463 {0, 65280},
3464 },
3465 },
3466 },
3467 {
3468 name: "DIVSS",
3469 argLen: 2,
3470 resultInArg0: true,
3471 asm: x86.ADIVSS,
3472 reg: regInfo{
3473 inputs: []inputInfo{
3474 {0, 65280},
3475 {1, 65280},
3476 },
3477 outputs: []outputInfo{
3478 {0, 65280},
3479 },
3480 },
3481 },
3482 {
3483 name: "DIVSD",
3484 argLen: 2,
3485 resultInArg0: true,
3486 asm: x86.ADIVSD,
3487 reg: regInfo{
3488 inputs: []inputInfo{
3489 {0, 65280},
3490 {1, 65280},
3491 },
3492 outputs: []outputInfo{
3493 {0, 65280},
3494 },
3495 },
3496 },
3497 {
3498 name: "MOVSSload",
3499 auxType: auxSymOff,
3500 argLen: 2,
3501 faultOnNilArg0: true,
3502 symEffect: SymRead,
3503 asm: x86.AMOVSS,
3504 reg: regInfo{
3505 inputs: []inputInfo{
3506 {0, 65791},
3507 },
3508 outputs: []outputInfo{
3509 {0, 65280},
3510 },
3511 },
3512 },
3513 {
3514 name: "MOVSDload",
3515 auxType: auxSymOff,
3516 argLen: 2,
3517 faultOnNilArg0: true,
3518 symEffect: SymRead,
3519 asm: x86.AMOVSD,
3520 reg: regInfo{
3521 inputs: []inputInfo{
3522 {0, 65791},
3523 },
3524 outputs: []outputInfo{
3525 {0, 65280},
3526 },
3527 },
3528 },
3529 {
3530 name: "MOVSSconst",
3531 auxType: auxFloat32,
3532 argLen: 0,
3533 rematerializeable: true,
3534 asm: x86.AMOVSS,
3535 reg: regInfo{
3536 outputs: []outputInfo{
3537 {0, 65280},
3538 },
3539 },
3540 },
3541 {
3542 name: "MOVSDconst",
3543 auxType: auxFloat64,
3544 argLen: 0,
3545 rematerializeable: true,
3546 asm: x86.AMOVSD,
3547 reg: regInfo{
3548 outputs: []outputInfo{
3549 {0, 65280},
3550 },
3551 },
3552 },
3553 {
3554 name: "MOVSSloadidx1",
3555 auxType: auxSymOff,
3556 argLen: 3,
3557 symEffect: SymRead,
3558 asm: x86.AMOVSS,
3559 reg: regInfo{
3560 inputs: []inputInfo{
3561 {1, 255},
3562 {0, 65791},
3563 },
3564 outputs: []outputInfo{
3565 {0, 65280},
3566 },
3567 },
3568 },
3569 {
3570 name: "MOVSSloadidx4",
3571 auxType: auxSymOff,
3572 argLen: 3,
3573 symEffect: SymRead,
3574 asm: x86.AMOVSS,
3575 reg: regInfo{
3576 inputs: []inputInfo{
3577 {1, 255},
3578 {0, 65791},
3579 },
3580 outputs: []outputInfo{
3581 {0, 65280},
3582 },
3583 },
3584 },
3585 {
3586 name: "MOVSDloadidx1",
3587 auxType: auxSymOff,
3588 argLen: 3,
3589 symEffect: SymRead,
3590 asm: x86.AMOVSD,
3591 reg: regInfo{
3592 inputs: []inputInfo{
3593 {1, 255},
3594 {0, 65791},
3595 },
3596 outputs: []outputInfo{
3597 {0, 65280},
3598 },
3599 },
3600 },
3601 {
3602 name: "MOVSDloadidx8",
3603 auxType: auxSymOff,
3604 argLen: 3,
3605 symEffect: SymRead,
3606 asm: x86.AMOVSD,
3607 reg: regInfo{
3608 inputs: []inputInfo{
3609 {1, 255},
3610 {0, 65791},
3611 },
3612 outputs: []outputInfo{
3613 {0, 65280},
3614 },
3615 },
3616 },
3617 {
3618 name: "MOVSSstore",
3619 auxType: auxSymOff,
3620 argLen: 3,
3621 faultOnNilArg0: true,
3622 symEffect: SymWrite,
3623 asm: x86.AMOVSS,
3624 reg: regInfo{
3625 inputs: []inputInfo{
3626 {1, 65280},
3627 {0, 65791},
3628 },
3629 },
3630 },
3631 {
3632 name: "MOVSDstore",
3633 auxType: auxSymOff,
3634 argLen: 3,
3635 faultOnNilArg0: true,
3636 symEffect: SymWrite,
3637 asm: x86.AMOVSD,
3638 reg: regInfo{
3639 inputs: []inputInfo{
3640 {1, 65280},
3641 {0, 65791},
3642 },
3643 },
3644 },
3645 {
3646 name: "MOVSSstoreidx1",
3647 auxType: auxSymOff,
3648 argLen: 4,
3649 symEffect: SymWrite,
3650 asm: x86.AMOVSS,
3651 reg: regInfo{
3652 inputs: []inputInfo{
3653 {1, 255},
3654 {2, 65280},
3655 {0, 65791},
3656 },
3657 },
3658 },
3659 {
3660 name: "MOVSSstoreidx4",
3661 auxType: auxSymOff,
3662 argLen: 4,
3663 symEffect: SymWrite,
3664 asm: x86.AMOVSS,
3665 reg: regInfo{
3666 inputs: []inputInfo{
3667 {1, 255},
3668 {2, 65280},
3669 {0, 65791},
3670 },
3671 },
3672 },
3673 {
3674 name: "MOVSDstoreidx1",
3675 auxType: auxSymOff,
3676 argLen: 4,
3677 symEffect: SymWrite,
3678 asm: x86.AMOVSD,
3679 reg: regInfo{
3680 inputs: []inputInfo{
3681 {1, 255},
3682 {2, 65280},
3683 {0, 65791},
3684 },
3685 },
3686 },
3687 {
3688 name: "MOVSDstoreidx8",
3689 auxType: auxSymOff,
3690 argLen: 4,
3691 symEffect: SymWrite,
3692 asm: x86.AMOVSD,
3693 reg: regInfo{
3694 inputs: []inputInfo{
3695 {1, 255},
3696 {2, 65280},
3697 {0, 65791},
3698 },
3699 },
3700 },
3701 {
3702 name: "ADDSSload",
3703 auxType: auxSymOff,
3704 argLen: 3,
3705 resultInArg0: true,
3706 faultOnNilArg1: true,
3707 symEffect: SymRead,
3708 asm: x86.AADDSS,
3709 reg: regInfo{
3710 inputs: []inputInfo{
3711 {0, 65280},
3712 {1, 65791},
3713 },
3714 outputs: []outputInfo{
3715 {0, 65280},
3716 },
3717 },
3718 },
3719 {
3720 name: "ADDSDload",
3721 auxType: auxSymOff,
3722 argLen: 3,
3723 resultInArg0: true,
3724 faultOnNilArg1: true,
3725 symEffect: SymRead,
3726 asm: x86.AADDSD,
3727 reg: regInfo{
3728 inputs: []inputInfo{
3729 {0, 65280},
3730 {1, 65791},
3731 },
3732 outputs: []outputInfo{
3733 {0, 65280},
3734 },
3735 },
3736 },
3737 {
3738 name: "SUBSSload",
3739 auxType: auxSymOff,
3740 argLen: 3,
3741 resultInArg0: true,
3742 faultOnNilArg1: true,
3743 symEffect: SymRead,
3744 asm: x86.ASUBSS,
3745 reg: regInfo{
3746 inputs: []inputInfo{
3747 {0, 65280},
3748 {1, 65791},
3749 },
3750 outputs: []outputInfo{
3751 {0, 65280},
3752 },
3753 },
3754 },
3755 {
3756 name: "SUBSDload",
3757 auxType: auxSymOff,
3758 argLen: 3,
3759 resultInArg0: true,
3760 faultOnNilArg1: true,
3761 symEffect: SymRead,
3762 asm: x86.ASUBSD,
3763 reg: regInfo{
3764 inputs: []inputInfo{
3765 {0, 65280},
3766 {1, 65791},
3767 },
3768 outputs: []outputInfo{
3769 {0, 65280},
3770 },
3771 },
3772 },
3773 {
3774 name: "MULSSload",
3775 auxType: auxSymOff,
3776 argLen: 3,
3777 resultInArg0: true,
3778 faultOnNilArg1: true,
3779 symEffect: SymRead,
3780 asm: x86.AMULSS,
3781 reg: regInfo{
3782 inputs: []inputInfo{
3783 {0, 65280},
3784 {1, 65791},
3785 },
3786 outputs: []outputInfo{
3787 {0, 65280},
3788 },
3789 },
3790 },
3791 {
3792 name: "MULSDload",
3793 auxType: auxSymOff,
3794 argLen: 3,
3795 resultInArg0: true,
3796 faultOnNilArg1: true,
3797 symEffect: SymRead,
3798 asm: x86.AMULSD,
3799 reg: regInfo{
3800 inputs: []inputInfo{
3801 {0, 65280},
3802 {1, 65791},
3803 },
3804 outputs: []outputInfo{
3805 {0, 65280},
3806 },
3807 },
3808 },
3809 {
3810 name: "DIVSSload",
3811 auxType: auxSymOff,
3812 argLen: 3,
3813 resultInArg0: true,
3814 faultOnNilArg1: true,
3815 symEffect: SymRead,
3816 asm: x86.ADIVSS,
3817 reg: regInfo{
3818 inputs: []inputInfo{
3819 {0, 65280},
3820 {1, 65791},
3821 },
3822 outputs: []outputInfo{
3823 {0, 65280},
3824 },
3825 },
3826 },
3827 {
3828 name: "DIVSDload",
3829 auxType: auxSymOff,
3830 argLen: 3,
3831 resultInArg0: true,
3832 faultOnNilArg1: true,
3833 symEffect: SymRead,
3834 asm: x86.ADIVSD,
3835 reg: regInfo{
3836 inputs: []inputInfo{
3837 {0, 65280},
3838 {1, 65791},
3839 },
3840 outputs: []outputInfo{
3841 {0, 65280},
3842 },
3843 },
3844 },
3845 {
3846 name: "ADDL",
3847 argLen: 2,
3848 commutative: true,
3849 clobberFlags: true,
3850 asm: x86.AADDL,
3851 reg: regInfo{
3852 inputs: []inputInfo{
3853 {1, 239},
3854 {0, 255},
3855 },
3856 outputs: []outputInfo{
3857 {0, 239},
3858 },
3859 },
3860 },
3861 {
3862 name: "ADDLconst",
3863 auxType: auxInt32,
3864 argLen: 1,
3865 clobberFlags: true,
3866 asm: x86.AADDL,
3867 reg: regInfo{
3868 inputs: []inputInfo{
3869 {0, 255},
3870 },
3871 outputs: []outputInfo{
3872 {0, 239},
3873 },
3874 },
3875 },
3876 {
3877 name: "ADDLcarry",
3878 argLen: 2,
3879 commutative: true,
3880 resultInArg0: true,
3881 asm: x86.AADDL,
3882 reg: regInfo{
3883 inputs: []inputInfo{
3884 {0, 239},
3885 {1, 239},
3886 },
3887 outputs: []outputInfo{
3888 {1, 0},
3889 {0, 239},
3890 },
3891 },
3892 },
3893 {
3894 name: "ADDLconstcarry",
3895 auxType: auxInt32,
3896 argLen: 1,
3897 resultInArg0: true,
3898 asm: x86.AADDL,
3899 reg: regInfo{
3900 inputs: []inputInfo{
3901 {0, 239},
3902 },
3903 outputs: []outputInfo{
3904 {1, 0},
3905 {0, 239},
3906 },
3907 },
3908 },
3909 {
3910 name: "ADCL",
3911 argLen: 3,
3912 commutative: true,
3913 resultInArg0: true,
3914 clobberFlags: true,
3915 asm: x86.AADCL,
3916 reg: regInfo{
3917 inputs: []inputInfo{
3918 {0, 239},
3919 {1, 239},
3920 },
3921 outputs: []outputInfo{
3922 {0, 239},
3923 },
3924 },
3925 },
3926 {
3927 name: "ADCLconst",
3928 auxType: auxInt32,
3929 argLen: 2,
3930 resultInArg0: true,
3931 clobberFlags: true,
3932 asm: x86.AADCL,
3933 reg: regInfo{
3934 inputs: []inputInfo{
3935 {0, 239},
3936 },
3937 outputs: []outputInfo{
3938 {0, 239},
3939 },
3940 },
3941 },
3942 {
3943 name: "SUBL",
3944 argLen: 2,
3945 resultInArg0: true,
3946 clobberFlags: true,
3947 asm: x86.ASUBL,
3948 reg: regInfo{
3949 inputs: []inputInfo{
3950 {0, 239},
3951 {1, 239},
3952 },
3953 outputs: []outputInfo{
3954 {0, 239},
3955 },
3956 },
3957 },
3958 {
3959 name: "SUBLconst",
3960 auxType: auxInt32,
3961 argLen: 1,
3962 resultInArg0: true,
3963 clobberFlags: true,
3964 asm: x86.ASUBL,
3965 reg: regInfo{
3966 inputs: []inputInfo{
3967 {0, 239},
3968 },
3969 outputs: []outputInfo{
3970 {0, 239},
3971 },
3972 },
3973 },
3974 {
3975 name: "SUBLcarry",
3976 argLen: 2,
3977 resultInArg0: true,
3978 asm: x86.ASUBL,
3979 reg: regInfo{
3980 inputs: []inputInfo{
3981 {0, 239},
3982 {1, 239},
3983 },
3984 outputs: []outputInfo{
3985 {1, 0},
3986 {0, 239},
3987 },
3988 },
3989 },
3990 {
3991 name: "SUBLconstcarry",
3992 auxType: auxInt32,
3993 argLen: 1,
3994 resultInArg0: true,
3995 asm: x86.ASUBL,
3996 reg: regInfo{
3997 inputs: []inputInfo{
3998 {0, 239},
3999 },
4000 outputs: []outputInfo{
4001 {1, 0},
4002 {0, 239},
4003 },
4004 },
4005 },
4006 {
4007 name: "SBBL",
4008 argLen: 3,
4009 resultInArg0: true,
4010 clobberFlags: true,
4011 asm: x86.ASBBL,
4012 reg: regInfo{
4013 inputs: []inputInfo{
4014 {0, 239},
4015 {1, 239},
4016 },
4017 outputs: []outputInfo{
4018 {0, 239},
4019 },
4020 },
4021 },
4022 {
4023 name: "SBBLconst",
4024 auxType: auxInt32,
4025 argLen: 2,
4026 resultInArg0: true,
4027 clobberFlags: true,
4028 asm: x86.ASBBL,
4029 reg: regInfo{
4030 inputs: []inputInfo{
4031 {0, 239},
4032 },
4033 outputs: []outputInfo{
4034 {0, 239},
4035 },
4036 },
4037 },
4038 {
4039 name: "MULL",
4040 argLen: 2,
4041 commutative: true,
4042 resultInArg0: true,
4043 clobberFlags: true,
4044 asm: x86.AIMULL,
4045 reg: regInfo{
4046 inputs: []inputInfo{
4047 {0, 239},
4048 {1, 239},
4049 },
4050 outputs: []outputInfo{
4051 {0, 239},
4052 },
4053 },
4054 },
4055 {
4056 name: "MULLconst",
4057 auxType: auxInt32,
4058 argLen: 1,
4059 clobberFlags: true,
4060 asm: x86.AIMUL3L,
4061 reg: regInfo{
4062 inputs: []inputInfo{
4063 {0, 239},
4064 },
4065 outputs: []outputInfo{
4066 {0, 239},
4067 },
4068 },
4069 },
4070 {
4071 name: "MULLU",
4072 argLen: 2,
4073 commutative: true,
4074 clobberFlags: true,
4075 asm: x86.AMULL,
4076 reg: regInfo{
4077 inputs: []inputInfo{
4078 {0, 1},
4079 {1, 255},
4080 },
4081 clobbers: 4,
4082 outputs: []outputInfo{
4083 {1, 0},
4084 {0, 1},
4085 },
4086 },
4087 },
4088 {
4089 name: "HMULL",
4090 argLen: 2,
4091 commutative: true,
4092 clobberFlags: true,
4093 asm: x86.AIMULL,
4094 reg: regInfo{
4095 inputs: []inputInfo{
4096 {0, 1},
4097 {1, 255},
4098 },
4099 clobbers: 1,
4100 outputs: []outputInfo{
4101 {0, 4},
4102 },
4103 },
4104 },
4105 {
4106 name: "HMULLU",
4107 argLen: 2,
4108 commutative: true,
4109 clobberFlags: true,
4110 asm: x86.AMULL,
4111 reg: regInfo{
4112 inputs: []inputInfo{
4113 {0, 1},
4114 {1, 255},
4115 },
4116 clobbers: 1,
4117 outputs: []outputInfo{
4118 {0, 4},
4119 },
4120 },
4121 },
4122 {
4123 name: "MULLQU",
4124 argLen: 2,
4125 commutative: true,
4126 clobberFlags: true,
4127 asm: x86.AMULL,
4128 reg: regInfo{
4129 inputs: []inputInfo{
4130 {0, 1},
4131 {1, 255},
4132 },
4133 outputs: []outputInfo{
4134 {0, 4},
4135 {1, 1},
4136 },
4137 },
4138 },
4139 {
4140 name: "AVGLU",
4141 argLen: 2,
4142 commutative: true,
4143 resultInArg0: true,
4144 clobberFlags: true,
4145 reg: regInfo{
4146 inputs: []inputInfo{
4147 {0, 239},
4148 {1, 239},
4149 },
4150 outputs: []outputInfo{
4151 {0, 239},
4152 },
4153 },
4154 },
4155 {
4156 name: "DIVL",
4157 auxType: auxBool,
4158 argLen: 2,
4159 clobberFlags: true,
4160 asm: x86.AIDIVL,
4161 reg: regInfo{
4162 inputs: []inputInfo{
4163 {0, 1},
4164 {1, 251},
4165 },
4166 clobbers: 4,
4167 outputs: []outputInfo{
4168 {0, 1},
4169 },
4170 },
4171 },
4172 {
4173 name: "DIVW",
4174 auxType: auxBool,
4175 argLen: 2,
4176 clobberFlags: true,
4177 asm: x86.AIDIVW,
4178 reg: regInfo{
4179 inputs: []inputInfo{
4180 {0, 1},
4181 {1, 251},
4182 },
4183 clobbers: 4,
4184 outputs: []outputInfo{
4185 {0, 1},
4186 },
4187 },
4188 },
4189 {
4190 name: "DIVLU",
4191 argLen: 2,
4192 clobberFlags: true,
4193 asm: x86.ADIVL,
4194 reg: regInfo{
4195 inputs: []inputInfo{
4196 {0, 1},
4197 {1, 251},
4198 },
4199 clobbers: 4,
4200 outputs: []outputInfo{
4201 {0, 1},
4202 },
4203 },
4204 },
4205 {
4206 name: "DIVWU",
4207 argLen: 2,
4208 clobberFlags: true,
4209 asm: x86.ADIVW,
4210 reg: regInfo{
4211 inputs: []inputInfo{
4212 {0, 1},
4213 {1, 251},
4214 },
4215 clobbers: 4,
4216 outputs: []outputInfo{
4217 {0, 1},
4218 },
4219 },
4220 },
4221 {
4222 name: "MODL",
4223 auxType: auxBool,
4224 argLen: 2,
4225 clobberFlags: true,
4226 asm: x86.AIDIVL,
4227 reg: regInfo{
4228 inputs: []inputInfo{
4229 {0, 1},
4230 {1, 251},
4231 },
4232 clobbers: 1,
4233 outputs: []outputInfo{
4234 {0, 4},
4235 },
4236 },
4237 },
4238 {
4239 name: "MODW",
4240 auxType: auxBool,
4241 argLen: 2,
4242 clobberFlags: true,
4243 asm: x86.AIDIVW,
4244 reg: regInfo{
4245 inputs: []inputInfo{
4246 {0, 1},
4247 {1, 251},
4248 },
4249 clobbers: 1,
4250 outputs: []outputInfo{
4251 {0, 4},
4252 },
4253 },
4254 },
4255 {
4256 name: "MODLU",
4257 argLen: 2,
4258 clobberFlags: true,
4259 asm: x86.ADIVL,
4260 reg: regInfo{
4261 inputs: []inputInfo{
4262 {0, 1},
4263 {1, 251},
4264 },
4265 clobbers: 1,
4266 outputs: []outputInfo{
4267 {0, 4},
4268 },
4269 },
4270 },
4271 {
4272 name: "MODWU",
4273 argLen: 2,
4274 clobberFlags: true,
4275 asm: x86.ADIVW,
4276 reg: regInfo{
4277 inputs: []inputInfo{
4278 {0, 1},
4279 {1, 251},
4280 },
4281 clobbers: 1,
4282 outputs: []outputInfo{
4283 {0, 4},
4284 },
4285 },
4286 },
4287 {
4288 name: "ANDL",
4289 argLen: 2,
4290 commutative: true,
4291 resultInArg0: true,
4292 clobberFlags: true,
4293 asm: x86.AANDL,
4294 reg: regInfo{
4295 inputs: []inputInfo{
4296 {0, 239},
4297 {1, 239},
4298 },
4299 outputs: []outputInfo{
4300 {0, 239},
4301 },
4302 },
4303 },
4304 {
4305 name: "ANDLconst",
4306 auxType: auxInt32,
4307 argLen: 1,
4308 resultInArg0: true,
4309 clobberFlags: true,
4310 asm: x86.AANDL,
4311 reg: regInfo{
4312 inputs: []inputInfo{
4313 {0, 239},
4314 },
4315 outputs: []outputInfo{
4316 {0, 239},
4317 },
4318 },
4319 },
4320 {
4321 name: "ORL",
4322 argLen: 2,
4323 commutative: true,
4324 resultInArg0: true,
4325 clobberFlags: true,
4326 asm: x86.AORL,
4327 reg: regInfo{
4328 inputs: []inputInfo{
4329 {0, 239},
4330 {1, 239},
4331 },
4332 outputs: []outputInfo{
4333 {0, 239},
4334 },
4335 },
4336 },
4337 {
4338 name: "ORLconst",
4339 auxType: auxInt32,
4340 argLen: 1,
4341 resultInArg0: true,
4342 clobberFlags: true,
4343 asm: x86.AORL,
4344 reg: regInfo{
4345 inputs: []inputInfo{
4346 {0, 239},
4347 },
4348 outputs: []outputInfo{
4349 {0, 239},
4350 },
4351 },
4352 },
4353 {
4354 name: "XORL",
4355 argLen: 2,
4356 commutative: true,
4357 resultInArg0: true,
4358 clobberFlags: true,
4359 asm: x86.AXORL,
4360 reg: regInfo{
4361 inputs: []inputInfo{
4362 {0, 239},
4363 {1, 239},
4364 },
4365 outputs: []outputInfo{
4366 {0, 239},
4367 },
4368 },
4369 },
4370 {
4371 name: "XORLconst",
4372 auxType: auxInt32,
4373 argLen: 1,
4374 resultInArg0: true,
4375 clobberFlags: true,
4376 asm: x86.AXORL,
4377 reg: regInfo{
4378 inputs: []inputInfo{
4379 {0, 239},
4380 },
4381 outputs: []outputInfo{
4382 {0, 239},
4383 },
4384 },
4385 },
4386 {
4387 name: "CMPL",
4388 argLen: 2,
4389 asm: x86.ACMPL,
4390 reg: regInfo{
4391 inputs: []inputInfo{
4392 {0, 255},
4393 {1, 255},
4394 },
4395 },
4396 },
4397 {
4398 name: "CMPW",
4399 argLen: 2,
4400 asm: x86.ACMPW,
4401 reg: regInfo{
4402 inputs: []inputInfo{
4403 {0, 255},
4404 {1, 255},
4405 },
4406 },
4407 },
4408 {
4409 name: "CMPB",
4410 argLen: 2,
4411 asm: x86.ACMPB,
4412 reg: regInfo{
4413 inputs: []inputInfo{
4414 {0, 255},
4415 {1, 255},
4416 },
4417 },
4418 },
4419 {
4420 name: "CMPLconst",
4421 auxType: auxInt32,
4422 argLen: 1,
4423 asm: x86.ACMPL,
4424 reg: regInfo{
4425 inputs: []inputInfo{
4426 {0, 255},
4427 },
4428 },
4429 },
4430 {
4431 name: "CMPWconst",
4432 auxType: auxInt16,
4433 argLen: 1,
4434 asm: x86.ACMPW,
4435 reg: regInfo{
4436 inputs: []inputInfo{
4437 {0, 255},
4438 },
4439 },
4440 },
4441 {
4442 name: "CMPBconst",
4443 auxType: auxInt8,
4444 argLen: 1,
4445 asm: x86.ACMPB,
4446 reg: regInfo{
4447 inputs: []inputInfo{
4448 {0, 255},
4449 },
4450 },
4451 },
4452 {
4453 name: "CMPLload",
4454 auxType: auxSymOff,
4455 argLen: 3,
4456 faultOnNilArg0: true,
4457 symEffect: SymRead,
4458 asm: x86.ACMPL,
4459 reg: regInfo{
4460 inputs: []inputInfo{
4461 {1, 255},
4462 {0, 65791},
4463 },
4464 },
4465 },
4466 {
4467 name: "CMPWload",
4468 auxType: auxSymOff,
4469 argLen: 3,
4470 faultOnNilArg0: true,
4471 symEffect: SymRead,
4472 asm: x86.ACMPW,
4473 reg: regInfo{
4474 inputs: []inputInfo{
4475 {1, 255},
4476 {0, 65791},
4477 },
4478 },
4479 },
4480 {
4481 name: "CMPBload",
4482 auxType: auxSymOff,
4483 argLen: 3,
4484 faultOnNilArg0: true,
4485 symEffect: SymRead,
4486 asm: x86.ACMPB,
4487 reg: regInfo{
4488 inputs: []inputInfo{
4489 {1, 255},
4490 {0, 65791},
4491 },
4492 },
4493 },
4494 {
4495 name: "CMPLconstload",
4496 auxType: auxSymValAndOff,
4497 argLen: 2,
4498 faultOnNilArg0: true,
4499 symEffect: SymRead,
4500 asm: x86.ACMPL,
4501 reg: regInfo{
4502 inputs: []inputInfo{
4503 {0, 65791},
4504 },
4505 },
4506 },
4507 {
4508 name: "CMPWconstload",
4509 auxType: auxSymValAndOff,
4510 argLen: 2,
4511 faultOnNilArg0: true,
4512 symEffect: SymRead,
4513 asm: x86.ACMPW,
4514 reg: regInfo{
4515 inputs: []inputInfo{
4516 {0, 65791},
4517 },
4518 },
4519 },
4520 {
4521 name: "CMPBconstload",
4522 auxType: auxSymValAndOff,
4523 argLen: 2,
4524 faultOnNilArg0: true,
4525 symEffect: SymRead,
4526 asm: x86.ACMPB,
4527 reg: regInfo{
4528 inputs: []inputInfo{
4529 {0, 65791},
4530 },
4531 },
4532 },
4533 {
4534 name: "UCOMISS",
4535 argLen: 2,
4536 asm: x86.AUCOMISS,
4537 reg: regInfo{
4538 inputs: []inputInfo{
4539 {0, 65280},
4540 {1, 65280},
4541 },
4542 },
4543 },
4544 {
4545 name: "UCOMISD",
4546 argLen: 2,
4547 asm: x86.AUCOMISD,
4548 reg: regInfo{
4549 inputs: []inputInfo{
4550 {0, 65280},
4551 {1, 65280},
4552 },
4553 },
4554 },
4555 {
4556 name: "TESTL",
4557 argLen: 2,
4558 commutative: true,
4559 asm: x86.ATESTL,
4560 reg: regInfo{
4561 inputs: []inputInfo{
4562 {0, 255},
4563 {1, 255},
4564 },
4565 },
4566 },
4567 {
4568 name: "TESTW",
4569 argLen: 2,
4570 commutative: true,
4571 asm: x86.ATESTW,
4572 reg: regInfo{
4573 inputs: []inputInfo{
4574 {0, 255},
4575 {1, 255},
4576 },
4577 },
4578 },
4579 {
4580 name: "TESTB",
4581 argLen: 2,
4582 commutative: true,
4583 asm: x86.ATESTB,
4584 reg: regInfo{
4585 inputs: []inputInfo{
4586 {0, 255},
4587 {1, 255},
4588 },
4589 },
4590 },
4591 {
4592 name: "TESTLconst",
4593 auxType: auxInt32,
4594 argLen: 1,
4595 asm: x86.ATESTL,
4596 reg: regInfo{
4597 inputs: []inputInfo{
4598 {0, 255},
4599 },
4600 },
4601 },
4602 {
4603 name: "TESTWconst",
4604 auxType: auxInt16,
4605 argLen: 1,
4606 asm: x86.ATESTW,
4607 reg: regInfo{
4608 inputs: []inputInfo{
4609 {0, 255},
4610 },
4611 },
4612 },
4613 {
4614 name: "TESTBconst",
4615 auxType: auxInt8,
4616 argLen: 1,
4617 asm: x86.ATESTB,
4618 reg: regInfo{
4619 inputs: []inputInfo{
4620 {0, 255},
4621 },
4622 },
4623 },
4624 {
4625 name: "SHLL",
4626 argLen: 2,
4627 resultInArg0: true,
4628 clobberFlags: true,
4629 asm: x86.ASHLL,
4630 reg: regInfo{
4631 inputs: []inputInfo{
4632 {1, 2},
4633 {0, 239},
4634 },
4635 outputs: []outputInfo{
4636 {0, 239},
4637 },
4638 },
4639 },
4640 {
4641 name: "SHLLconst",
4642 auxType: auxInt32,
4643 argLen: 1,
4644 resultInArg0: true,
4645 clobberFlags: true,
4646 asm: x86.ASHLL,
4647 reg: regInfo{
4648 inputs: []inputInfo{
4649 {0, 239},
4650 },
4651 outputs: []outputInfo{
4652 {0, 239},
4653 },
4654 },
4655 },
4656 {
4657 name: "SHRL",
4658 argLen: 2,
4659 resultInArg0: true,
4660 clobberFlags: true,
4661 asm: x86.ASHRL,
4662 reg: regInfo{
4663 inputs: []inputInfo{
4664 {1, 2},
4665 {0, 239},
4666 },
4667 outputs: []outputInfo{
4668 {0, 239},
4669 },
4670 },
4671 },
4672 {
4673 name: "SHRW",
4674 argLen: 2,
4675 resultInArg0: true,
4676 clobberFlags: true,
4677 asm: x86.ASHRW,
4678 reg: regInfo{
4679 inputs: []inputInfo{
4680 {1, 2},
4681 {0, 239},
4682 },
4683 outputs: []outputInfo{
4684 {0, 239},
4685 },
4686 },
4687 },
4688 {
4689 name: "SHRB",
4690 argLen: 2,
4691 resultInArg0: true,
4692 clobberFlags: true,
4693 asm: x86.ASHRB,
4694 reg: regInfo{
4695 inputs: []inputInfo{
4696 {1, 2},
4697 {0, 239},
4698 },
4699 outputs: []outputInfo{
4700 {0, 239},
4701 },
4702 },
4703 },
4704 {
4705 name: "SHRLconst",
4706 auxType: auxInt32,
4707 argLen: 1,
4708 resultInArg0: true,
4709 clobberFlags: true,
4710 asm: x86.ASHRL,
4711 reg: regInfo{
4712 inputs: []inputInfo{
4713 {0, 239},
4714 },
4715 outputs: []outputInfo{
4716 {0, 239},
4717 },
4718 },
4719 },
4720 {
4721 name: "SHRWconst",
4722 auxType: auxInt16,
4723 argLen: 1,
4724 resultInArg0: true,
4725 clobberFlags: true,
4726 asm: x86.ASHRW,
4727 reg: regInfo{
4728 inputs: []inputInfo{
4729 {0, 239},
4730 },
4731 outputs: []outputInfo{
4732 {0, 239},
4733 },
4734 },
4735 },
4736 {
4737 name: "SHRBconst",
4738 auxType: auxInt8,
4739 argLen: 1,
4740 resultInArg0: true,
4741 clobberFlags: true,
4742 asm: x86.ASHRB,
4743 reg: regInfo{
4744 inputs: []inputInfo{
4745 {0, 239},
4746 },
4747 outputs: []outputInfo{
4748 {0, 239},
4749 },
4750 },
4751 },
4752 {
4753 name: "SARL",
4754 argLen: 2,
4755 resultInArg0: true,
4756 clobberFlags: true,
4757 asm: x86.ASARL,
4758 reg: regInfo{
4759 inputs: []inputInfo{
4760 {1, 2},
4761 {0, 239},
4762 },
4763 outputs: []outputInfo{
4764 {0, 239},
4765 },
4766 },
4767 },
4768 {
4769 name: "SARW",
4770 argLen: 2,
4771 resultInArg0: true,
4772 clobberFlags: true,
4773 asm: x86.ASARW,
4774 reg: regInfo{
4775 inputs: []inputInfo{
4776 {1, 2},
4777 {0, 239},
4778 },
4779 outputs: []outputInfo{
4780 {0, 239},
4781 },
4782 },
4783 },
4784 {
4785 name: "SARB",
4786 argLen: 2,
4787 resultInArg0: true,
4788 clobberFlags: true,
4789 asm: x86.ASARB,
4790 reg: regInfo{
4791 inputs: []inputInfo{
4792 {1, 2},
4793 {0, 239},
4794 },
4795 outputs: []outputInfo{
4796 {0, 239},
4797 },
4798 },
4799 },
4800 {
4801 name: "SARLconst",
4802 auxType: auxInt32,
4803 argLen: 1,
4804 resultInArg0: true,
4805 clobberFlags: true,
4806 asm: x86.ASARL,
4807 reg: regInfo{
4808 inputs: []inputInfo{
4809 {0, 239},
4810 },
4811 outputs: []outputInfo{
4812 {0, 239},
4813 },
4814 },
4815 },
4816 {
4817 name: "SARWconst",
4818 auxType: auxInt16,
4819 argLen: 1,
4820 resultInArg0: true,
4821 clobberFlags: true,
4822 asm: x86.ASARW,
4823 reg: regInfo{
4824 inputs: []inputInfo{
4825 {0, 239},
4826 },
4827 outputs: []outputInfo{
4828 {0, 239},
4829 },
4830 },
4831 },
4832 {
4833 name: "SARBconst",
4834 auxType: auxInt8,
4835 argLen: 1,
4836 resultInArg0: true,
4837 clobberFlags: true,
4838 asm: x86.ASARB,
4839 reg: regInfo{
4840 inputs: []inputInfo{
4841 {0, 239},
4842 },
4843 outputs: []outputInfo{
4844 {0, 239},
4845 },
4846 },
4847 },
4848 {
4849 name: "ROLL",
4850 argLen: 2,
4851 resultInArg0: true,
4852 clobberFlags: true,
4853 asm: x86.AROLL,
4854 reg: regInfo{
4855 inputs: []inputInfo{
4856 {1, 2},
4857 {0, 239},
4858 },
4859 outputs: []outputInfo{
4860 {0, 239},
4861 },
4862 },
4863 },
4864 {
4865 name: "ROLW",
4866 argLen: 2,
4867 resultInArg0: true,
4868 clobberFlags: true,
4869 asm: x86.AROLW,
4870 reg: regInfo{
4871 inputs: []inputInfo{
4872 {1, 2},
4873 {0, 239},
4874 },
4875 outputs: []outputInfo{
4876 {0, 239},
4877 },
4878 },
4879 },
4880 {
4881 name: "ROLB",
4882 argLen: 2,
4883 resultInArg0: true,
4884 clobberFlags: true,
4885 asm: x86.AROLB,
4886 reg: regInfo{
4887 inputs: []inputInfo{
4888 {1, 2},
4889 {0, 239},
4890 },
4891 outputs: []outputInfo{
4892 {0, 239},
4893 },
4894 },
4895 },
4896 {
4897 name: "ROLLconst",
4898 auxType: auxInt32,
4899 argLen: 1,
4900 resultInArg0: true,
4901 clobberFlags: true,
4902 asm: x86.AROLL,
4903 reg: regInfo{
4904 inputs: []inputInfo{
4905 {0, 239},
4906 },
4907 outputs: []outputInfo{
4908 {0, 239},
4909 },
4910 },
4911 },
4912 {
4913 name: "ROLWconst",
4914 auxType: auxInt16,
4915 argLen: 1,
4916 resultInArg0: true,
4917 clobberFlags: true,
4918 asm: x86.AROLW,
4919 reg: regInfo{
4920 inputs: []inputInfo{
4921 {0, 239},
4922 },
4923 outputs: []outputInfo{
4924 {0, 239},
4925 },
4926 },
4927 },
4928 {
4929 name: "ROLBconst",
4930 auxType: auxInt8,
4931 argLen: 1,
4932 resultInArg0: true,
4933 clobberFlags: true,
4934 asm: x86.AROLB,
4935 reg: regInfo{
4936 inputs: []inputInfo{
4937 {0, 239},
4938 },
4939 outputs: []outputInfo{
4940 {0, 239},
4941 },
4942 },
4943 },
4944 {
4945 name: "ADDLload",
4946 auxType: auxSymOff,
4947 argLen: 3,
4948 resultInArg0: true,
4949 clobberFlags: true,
4950 faultOnNilArg1: true,
4951 symEffect: SymRead,
4952 asm: x86.AADDL,
4953 reg: regInfo{
4954 inputs: []inputInfo{
4955 {0, 239},
4956 {1, 65791},
4957 },
4958 outputs: []outputInfo{
4959 {0, 239},
4960 },
4961 },
4962 },
4963 {
4964 name: "SUBLload",
4965 auxType: auxSymOff,
4966 argLen: 3,
4967 resultInArg0: true,
4968 clobberFlags: true,
4969 faultOnNilArg1: true,
4970 symEffect: SymRead,
4971 asm: x86.ASUBL,
4972 reg: regInfo{
4973 inputs: []inputInfo{
4974 {0, 239},
4975 {1, 65791},
4976 },
4977 outputs: []outputInfo{
4978 {0, 239},
4979 },
4980 },
4981 },
4982 {
4983 name: "MULLload",
4984 auxType: auxSymOff,
4985 argLen: 3,
4986 resultInArg0: true,
4987 clobberFlags: true,
4988 faultOnNilArg1: true,
4989 symEffect: SymRead,
4990 asm: x86.AIMULL,
4991 reg: regInfo{
4992 inputs: []inputInfo{
4993 {0, 239},
4994 {1, 65791},
4995 },
4996 outputs: []outputInfo{
4997 {0, 239},
4998 },
4999 },
5000 },
5001 {
5002 name: "ANDLload",
5003 auxType: auxSymOff,
5004 argLen: 3,
5005 resultInArg0: true,
5006 clobberFlags: true,
5007 faultOnNilArg1: true,
5008 symEffect: SymRead,
5009 asm: x86.AANDL,
5010 reg: regInfo{
5011 inputs: []inputInfo{
5012 {0, 239},
5013 {1, 65791},
5014 },
5015 outputs: []outputInfo{
5016 {0, 239},
5017 },
5018 },
5019 },
5020 {
5021 name: "ORLload",
5022 auxType: auxSymOff,
5023 argLen: 3,
5024 resultInArg0: true,
5025 clobberFlags: true,
5026 faultOnNilArg1: true,
5027 symEffect: SymRead,
5028 asm: x86.AORL,
5029 reg: regInfo{
5030 inputs: []inputInfo{
5031 {0, 239},
5032 {1, 65791},
5033 },
5034 outputs: []outputInfo{
5035 {0, 239},
5036 },
5037 },
5038 },
5039 {
5040 name: "XORLload",
5041 auxType: auxSymOff,
5042 argLen: 3,
5043 resultInArg0: true,
5044 clobberFlags: true,
5045 faultOnNilArg1: true,
5046 symEffect: SymRead,
5047 asm: x86.AXORL,
5048 reg: regInfo{
5049 inputs: []inputInfo{
5050 {0, 239},
5051 {1, 65791},
5052 },
5053 outputs: []outputInfo{
5054 {0, 239},
5055 },
5056 },
5057 },
5058 {
5059 name: "ADDLloadidx4",
5060 auxType: auxSymOff,
5061 argLen: 4,
5062 resultInArg0: true,
5063 clobberFlags: true,
5064 symEffect: SymRead,
5065 asm: x86.AADDL,
5066 reg: regInfo{
5067 inputs: []inputInfo{
5068 {0, 239},
5069 {2, 255},
5070 {1, 65791},
5071 },
5072 outputs: []outputInfo{
5073 {0, 239},
5074 },
5075 },
5076 },
5077 {
5078 name: "SUBLloadidx4",
5079 auxType: auxSymOff,
5080 argLen: 4,
5081 resultInArg0: true,
5082 clobberFlags: true,
5083 symEffect: SymRead,
5084 asm: x86.ASUBL,
5085 reg: regInfo{
5086 inputs: []inputInfo{
5087 {0, 239},
5088 {2, 255},
5089 {1, 65791},
5090 },
5091 outputs: []outputInfo{
5092 {0, 239},
5093 },
5094 },
5095 },
5096 {
5097 name: "MULLloadidx4",
5098 auxType: auxSymOff,
5099 argLen: 4,
5100 resultInArg0: true,
5101 clobberFlags: true,
5102 symEffect: SymRead,
5103 asm: x86.AIMULL,
5104 reg: regInfo{
5105 inputs: []inputInfo{
5106 {0, 239},
5107 {2, 255},
5108 {1, 65791},
5109 },
5110 outputs: []outputInfo{
5111 {0, 239},
5112 },
5113 },
5114 },
5115 {
5116 name: "ANDLloadidx4",
5117 auxType: auxSymOff,
5118 argLen: 4,
5119 resultInArg0: true,
5120 clobberFlags: true,
5121 symEffect: SymRead,
5122 asm: x86.AANDL,
5123 reg: regInfo{
5124 inputs: []inputInfo{
5125 {0, 239},
5126 {2, 255},
5127 {1, 65791},
5128 },
5129 outputs: []outputInfo{
5130 {0, 239},
5131 },
5132 },
5133 },
5134 {
5135 name: "ORLloadidx4",
5136 auxType: auxSymOff,
5137 argLen: 4,
5138 resultInArg0: true,
5139 clobberFlags: true,
5140 symEffect: SymRead,
5141 asm: x86.AORL,
5142 reg: regInfo{
5143 inputs: []inputInfo{
5144 {0, 239},
5145 {2, 255},
5146 {1, 65791},
5147 },
5148 outputs: []outputInfo{
5149 {0, 239},
5150 },
5151 },
5152 },
5153 {
5154 name: "XORLloadidx4",
5155 auxType: auxSymOff,
5156 argLen: 4,
5157 resultInArg0: true,
5158 clobberFlags: true,
5159 symEffect: SymRead,
5160 asm: x86.AXORL,
5161 reg: regInfo{
5162 inputs: []inputInfo{
5163 {0, 239},
5164 {2, 255},
5165 {1, 65791},
5166 },
5167 outputs: []outputInfo{
5168 {0, 239},
5169 },
5170 },
5171 },
5172 {
5173 name: "NEGL",
5174 argLen: 1,
5175 resultInArg0: true,
5176 clobberFlags: true,
5177 asm: x86.ANEGL,
5178 reg: regInfo{
5179 inputs: []inputInfo{
5180 {0, 239},
5181 },
5182 outputs: []outputInfo{
5183 {0, 239},
5184 },
5185 },
5186 },
5187 {
5188 name: "NOTL",
5189 argLen: 1,
5190 resultInArg0: true,
5191 asm: x86.ANOTL,
5192 reg: regInfo{
5193 inputs: []inputInfo{
5194 {0, 239},
5195 },
5196 outputs: []outputInfo{
5197 {0, 239},
5198 },
5199 },
5200 },
5201 {
5202 name: "BSFL",
5203 argLen: 1,
5204 clobberFlags: true,
5205 asm: x86.ABSFL,
5206 reg: regInfo{
5207 inputs: []inputInfo{
5208 {0, 239},
5209 },
5210 outputs: []outputInfo{
5211 {0, 239},
5212 },
5213 },
5214 },
5215 {
5216 name: "BSFW",
5217 argLen: 1,
5218 clobberFlags: true,
5219 asm: x86.ABSFW,
5220 reg: regInfo{
5221 inputs: []inputInfo{
5222 {0, 239},
5223 },
5224 outputs: []outputInfo{
5225 {0, 239},
5226 },
5227 },
5228 },
5229 {
5230 name: "LoweredCtz32",
5231 argLen: 1,
5232 clobberFlags: true,
5233 reg: regInfo{
5234 inputs: []inputInfo{
5235 {0, 239},
5236 },
5237 outputs: []outputInfo{
5238 {0, 239},
5239 },
5240 },
5241 },
5242 {
5243 name: "LoweredCtz64",
5244 argLen: 2,
5245 resultNotInArgs: true,
5246 clobberFlags: true,
5247 reg: regInfo{
5248 inputs: []inputInfo{
5249 {0, 239},
5250 {1, 239},
5251 },
5252 outputs: []outputInfo{
5253 {0, 239},
5254 },
5255 },
5256 },
5257 {
5258 name: "BSRL",
5259 argLen: 1,
5260 clobberFlags: true,
5261 asm: x86.ABSRL,
5262 reg: regInfo{
5263 inputs: []inputInfo{
5264 {0, 239},
5265 },
5266 outputs: []outputInfo{
5267 {0, 239},
5268 },
5269 },
5270 },
5271 {
5272 name: "BSRW",
5273 argLen: 1,
5274 clobberFlags: true,
5275 asm: x86.ABSRW,
5276 reg: regInfo{
5277 inputs: []inputInfo{
5278 {0, 239},
5279 },
5280 outputs: []outputInfo{
5281 {0, 239},
5282 },
5283 },
5284 },
5285 {
5286 name: "BSWAPL",
5287 argLen: 1,
5288 resultInArg0: true,
5289 asm: x86.ABSWAPL,
5290 reg: regInfo{
5291 inputs: []inputInfo{
5292 {0, 239},
5293 },
5294 outputs: []outputInfo{
5295 {0, 239},
5296 },
5297 },
5298 },
5299 {
5300 name: "SQRTSD",
5301 argLen: 1,
5302 asm: x86.ASQRTSD,
5303 reg: regInfo{
5304 inputs: []inputInfo{
5305 {0, 65280},
5306 },
5307 outputs: []outputInfo{
5308 {0, 65280},
5309 },
5310 },
5311 },
5312 {
5313 name: "SQRTSS",
5314 argLen: 1,
5315 asm: x86.ASQRTSS,
5316 reg: regInfo{
5317 inputs: []inputInfo{
5318 {0, 65280},
5319 },
5320 outputs: []outputInfo{
5321 {0, 65280},
5322 },
5323 },
5324 },
5325 {
5326 name: "SBBLcarrymask",
5327 argLen: 1,
5328 asm: x86.ASBBL,
5329 reg: regInfo{
5330 outputs: []outputInfo{
5331 {0, 239},
5332 },
5333 },
5334 },
5335 {
5336 name: "SETEQ",
5337 argLen: 1,
5338 asm: x86.ASETEQ,
5339 reg: regInfo{
5340 outputs: []outputInfo{
5341 {0, 239},
5342 },
5343 },
5344 },
5345 {
5346 name: "SETNE",
5347 argLen: 1,
5348 asm: x86.ASETNE,
5349 reg: regInfo{
5350 outputs: []outputInfo{
5351 {0, 239},
5352 },
5353 },
5354 },
5355 {
5356 name: "SETL",
5357 argLen: 1,
5358 asm: x86.ASETLT,
5359 reg: regInfo{
5360 outputs: []outputInfo{
5361 {0, 239},
5362 },
5363 },
5364 },
5365 {
5366 name: "SETLE",
5367 argLen: 1,
5368 asm: x86.ASETLE,
5369 reg: regInfo{
5370 outputs: []outputInfo{
5371 {0, 239},
5372 },
5373 },
5374 },
5375 {
5376 name: "SETG",
5377 argLen: 1,
5378 asm: x86.ASETGT,
5379 reg: regInfo{
5380 outputs: []outputInfo{
5381 {0, 239},
5382 },
5383 },
5384 },
5385 {
5386 name: "SETGE",
5387 argLen: 1,
5388 asm: x86.ASETGE,
5389 reg: regInfo{
5390 outputs: []outputInfo{
5391 {0, 239},
5392 },
5393 },
5394 },
5395 {
5396 name: "SETB",
5397 argLen: 1,
5398 asm: x86.ASETCS,
5399 reg: regInfo{
5400 outputs: []outputInfo{
5401 {0, 239},
5402 },
5403 },
5404 },
5405 {
5406 name: "SETBE",
5407 argLen: 1,
5408 asm: x86.ASETLS,
5409 reg: regInfo{
5410 outputs: []outputInfo{
5411 {0, 239},
5412 },
5413 },
5414 },
5415 {
5416 name: "SETA",
5417 argLen: 1,
5418 asm: x86.ASETHI,
5419 reg: regInfo{
5420 outputs: []outputInfo{
5421 {0, 239},
5422 },
5423 },
5424 },
5425 {
5426 name: "SETAE",
5427 argLen: 1,
5428 asm: x86.ASETCC,
5429 reg: regInfo{
5430 outputs: []outputInfo{
5431 {0, 239},
5432 },
5433 },
5434 },
5435 {
5436 name: "SETO",
5437 argLen: 1,
5438 asm: x86.ASETOS,
5439 reg: regInfo{
5440 outputs: []outputInfo{
5441 {0, 239},
5442 },
5443 },
5444 },
5445 {
5446 name: "SETEQF",
5447 argLen: 1,
5448 clobberFlags: true,
5449 asm: x86.ASETEQ,
5450 reg: regInfo{
5451 clobbers: 1,
5452 outputs: []outputInfo{
5453 {0, 238},
5454 },
5455 },
5456 },
5457 {
5458 name: "SETNEF",
5459 argLen: 1,
5460 clobberFlags: true,
5461 asm: x86.ASETNE,
5462 reg: regInfo{
5463 clobbers: 1,
5464 outputs: []outputInfo{
5465 {0, 238},
5466 },
5467 },
5468 },
5469 {
5470 name: "SETORD",
5471 argLen: 1,
5472 asm: x86.ASETPC,
5473 reg: regInfo{
5474 outputs: []outputInfo{
5475 {0, 239},
5476 },
5477 },
5478 },
5479 {
5480 name: "SETNAN",
5481 argLen: 1,
5482 asm: x86.ASETPS,
5483 reg: regInfo{
5484 outputs: []outputInfo{
5485 {0, 239},
5486 },
5487 },
5488 },
5489 {
5490 name: "SETGF",
5491 argLen: 1,
5492 asm: x86.ASETHI,
5493 reg: regInfo{
5494 outputs: []outputInfo{
5495 {0, 239},
5496 },
5497 },
5498 },
5499 {
5500 name: "SETGEF",
5501 argLen: 1,
5502 asm: x86.ASETCC,
5503 reg: regInfo{
5504 outputs: []outputInfo{
5505 {0, 239},
5506 },
5507 },
5508 },
5509 {
5510 name: "MOVBLSX",
5511 argLen: 1,
5512 asm: x86.AMOVBLSX,
5513 reg: regInfo{
5514 inputs: []inputInfo{
5515 {0, 239},
5516 },
5517 outputs: []outputInfo{
5518 {0, 239},
5519 },
5520 },
5521 },
5522 {
5523 name: "MOVBLZX",
5524 argLen: 1,
5525 asm: x86.AMOVBLZX,
5526 reg: regInfo{
5527 inputs: []inputInfo{
5528 {0, 239},
5529 },
5530 outputs: []outputInfo{
5531 {0, 239},
5532 },
5533 },
5534 },
5535 {
5536 name: "MOVWLSX",
5537 argLen: 1,
5538 asm: x86.AMOVWLSX,
5539 reg: regInfo{
5540 inputs: []inputInfo{
5541 {0, 239},
5542 },
5543 outputs: []outputInfo{
5544 {0, 239},
5545 },
5546 },
5547 },
5548 {
5549 name: "MOVWLZX",
5550 argLen: 1,
5551 asm: x86.AMOVWLZX,
5552 reg: regInfo{
5553 inputs: []inputInfo{
5554 {0, 239},
5555 },
5556 outputs: []outputInfo{
5557 {0, 239},
5558 },
5559 },
5560 },
5561 {
5562 name: "MOVLconst",
5563 auxType: auxInt32,
5564 argLen: 0,
5565 rematerializeable: true,
5566 asm: x86.AMOVL,
5567 reg: regInfo{
5568 outputs: []outputInfo{
5569 {0, 239},
5570 },
5571 },
5572 },
5573 {
5574 name: "CVTTSD2SL",
5575 argLen: 1,
5576 asm: x86.ACVTTSD2SL,
5577 reg: regInfo{
5578 inputs: []inputInfo{
5579 {0, 65280},
5580 },
5581 outputs: []outputInfo{
5582 {0, 239},
5583 },
5584 },
5585 },
5586 {
5587 name: "CVTTSS2SL",
5588 argLen: 1,
5589 asm: x86.ACVTTSS2SL,
5590 reg: regInfo{
5591 inputs: []inputInfo{
5592 {0, 65280},
5593 },
5594 outputs: []outputInfo{
5595 {0, 239},
5596 },
5597 },
5598 },
5599 {
5600 name: "CVTSL2SS",
5601 argLen: 1,
5602 asm: x86.ACVTSL2SS,
5603 reg: regInfo{
5604 inputs: []inputInfo{
5605 {0, 239},
5606 },
5607 outputs: []outputInfo{
5608 {0, 65280},
5609 },
5610 },
5611 },
5612 {
5613 name: "CVTSL2SD",
5614 argLen: 1,
5615 asm: x86.ACVTSL2SD,
5616 reg: regInfo{
5617 inputs: []inputInfo{
5618 {0, 239},
5619 },
5620 outputs: []outputInfo{
5621 {0, 65280},
5622 },
5623 },
5624 },
5625 {
5626 name: "CVTSD2SS",
5627 argLen: 1,
5628 asm: x86.ACVTSD2SS,
5629 reg: regInfo{
5630 inputs: []inputInfo{
5631 {0, 65280},
5632 },
5633 outputs: []outputInfo{
5634 {0, 65280},
5635 },
5636 },
5637 },
5638 {
5639 name: "CVTSS2SD",
5640 argLen: 1,
5641 asm: x86.ACVTSS2SD,
5642 reg: regInfo{
5643 inputs: []inputInfo{
5644 {0, 65280},
5645 },
5646 outputs: []outputInfo{
5647 {0, 65280},
5648 },
5649 },
5650 },
5651 {
5652 name: "PXOR",
5653 argLen: 2,
5654 commutative: true,
5655 resultInArg0: true,
5656 asm: x86.APXOR,
5657 reg: regInfo{
5658 inputs: []inputInfo{
5659 {0, 65280},
5660 {1, 65280},
5661 },
5662 outputs: []outputInfo{
5663 {0, 65280},
5664 },
5665 },
5666 },
5667 {
5668 name: "LEAL",
5669 auxType: auxSymOff,
5670 argLen: 1,
5671 rematerializeable: true,
5672 symEffect: SymAddr,
5673 reg: regInfo{
5674 inputs: []inputInfo{
5675 {0, 65791},
5676 },
5677 outputs: []outputInfo{
5678 {0, 239},
5679 },
5680 },
5681 },
5682 {
5683 name: "LEAL1",
5684 auxType: auxSymOff,
5685 argLen: 2,
5686 commutative: true,
5687 symEffect: SymAddr,
5688 reg: regInfo{
5689 inputs: []inputInfo{
5690 {1, 255},
5691 {0, 65791},
5692 },
5693 outputs: []outputInfo{
5694 {0, 239},
5695 },
5696 },
5697 },
5698 {
5699 name: "LEAL2",
5700 auxType: auxSymOff,
5701 argLen: 2,
5702 symEffect: SymAddr,
5703 reg: regInfo{
5704 inputs: []inputInfo{
5705 {1, 255},
5706 {0, 65791},
5707 },
5708 outputs: []outputInfo{
5709 {0, 239},
5710 },
5711 },
5712 },
5713 {
5714 name: "LEAL4",
5715 auxType: auxSymOff,
5716 argLen: 2,
5717 symEffect: SymAddr,
5718 reg: regInfo{
5719 inputs: []inputInfo{
5720 {1, 255},
5721 {0, 65791},
5722 },
5723 outputs: []outputInfo{
5724 {0, 239},
5725 },
5726 },
5727 },
5728 {
5729 name: "LEAL8",
5730 auxType: auxSymOff,
5731 argLen: 2,
5732 symEffect: SymAddr,
5733 reg: regInfo{
5734 inputs: []inputInfo{
5735 {1, 255},
5736 {0, 65791},
5737 },
5738 outputs: []outputInfo{
5739 {0, 239},
5740 },
5741 },
5742 },
5743 {
5744 name: "MOVBload",
5745 auxType: auxSymOff,
5746 argLen: 2,
5747 faultOnNilArg0: true,
5748 symEffect: SymRead,
5749 asm: x86.AMOVBLZX,
5750 reg: regInfo{
5751 inputs: []inputInfo{
5752 {0, 65791},
5753 },
5754 outputs: []outputInfo{
5755 {0, 239},
5756 },
5757 },
5758 },
5759 {
5760 name: "MOVBLSXload",
5761 auxType: auxSymOff,
5762 argLen: 2,
5763 faultOnNilArg0: true,
5764 symEffect: SymRead,
5765 asm: x86.AMOVBLSX,
5766 reg: regInfo{
5767 inputs: []inputInfo{
5768 {0, 65791},
5769 },
5770 outputs: []outputInfo{
5771 {0, 239},
5772 },
5773 },
5774 },
5775 {
5776 name: "MOVWload",
5777 auxType: auxSymOff,
5778 argLen: 2,
5779 faultOnNilArg0: true,
5780 symEffect: SymRead,
5781 asm: x86.AMOVWLZX,
5782 reg: regInfo{
5783 inputs: []inputInfo{
5784 {0, 65791},
5785 },
5786 outputs: []outputInfo{
5787 {0, 239},
5788 },
5789 },
5790 },
5791 {
5792 name: "MOVWLSXload",
5793 auxType: auxSymOff,
5794 argLen: 2,
5795 faultOnNilArg0: true,
5796 symEffect: SymRead,
5797 asm: x86.AMOVWLSX,
5798 reg: regInfo{
5799 inputs: []inputInfo{
5800 {0, 65791},
5801 },
5802 outputs: []outputInfo{
5803 {0, 239},
5804 },
5805 },
5806 },
5807 {
5808 name: "MOVLload",
5809 auxType: auxSymOff,
5810 argLen: 2,
5811 faultOnNilArg0: true,
5812 symEffect: SymRead,
5813 asm: x86.AMOVL,
5814 reg: regInfo{
5815 inputs: []inputInfo{
5816 {0, 65791},
5817 },
5818 outputs: []outputInfo{
5819 {0, 239},
5820 },
5821 },
5822 },
5823 {
5824 name: "MOVBstore",
5825 auxType: auxSymOff,
5826 argLen: 3,
5827 faultOnNilArg0: true,
5828 symEffect: SymWrite,
5829 asm: x86.AMOVB,
5830 reg: regInfo{
5831 inputs: []inputInfo{
5832 {1, 255},
5833 {0, 65791},
5834 },
5835 },
5836 },
5837 {
5838 name: "MOVWstore",
5839 auxType: auxSymOff,
5840 argLen: 3,
5841 faultOnNilArg0: true,
5842 symEffect: SymWrite,
5843 asm: x86.AMOVW,
5844 reg: regInfo{
5845 inputs: []inputInfo{
5846 {1, 255},
5847 {0, 65791},
5848 },
5849 },
5850 },
5851 {
5852 name: "MOVLstore",
5853 auxType: auxSymOff,
5854 argLen: 3,
5855 faultOnNilArg0: true,
5856 symEffect: SymWrite,
5857 asm: x86.AMOVL,
5858 reg: regInfo{
5859 inputs: []inputInfo{
5860 {1, 255},
5861 {0, 65791},
5862 },
5863 },
5864 },
5865 {
5866 name: "ADDLmodify",
5867 auxType: auxSymOff,
5868 argLen: 3,
5869 clobberFlags: true,
5870 faultOnNilArg0: true,
5871 symEffect: SymRead | SymWrite,
5872 asm: x86.AADDL,
5873 reg: regInfo{
5874 inputs: []inputInfo{
5875 {1, 255},
5876 {0, 65791},
5877 },
5878 },
5879 },
5880 {
5881 name: "SUBLmodify",
5882 auxType: auxSymOff,
5883 argLen: 3,
5884 clobberFlags: true,
5885 faultOnNilArg0: true,
5886 symEffect: SymRead | SymWrite,
5887 asm: x86.ASUBL,
5888 reg: regInfo{
5889 inputs: []inputInfo{
5890 {1, 255},
5891 {0, 65791},
5892 },
5893 },
5894 },
5895 {
5896 name: "ANDLmodify",
5897 auxType: auxSymOff,
5898 argLen: 3,
5899 clobberFlags: true,
5900 faultOnNilArg0: true,
5901 symEffect: SymRead | SymWrite,
5902 asm: x86.AANDL,
5903 reg: regInfo{
5904 inputs: []inputInfo{
5905 {1, 255},
5906 {0, 65791},
5907 },
5908 },
5909 },
5910 {
5911 name: "ORLmodify",
5912 auxType: auxSymOff,
5913 argLen: 3,
5914 clobberFlags: true,
5915 faultOnNilArg0: true,
5916 symEffect: SymRead | SymWrite,
5917 asm: x86.AORL,
5918 reg: regInfo{
5919 inputs: []inputInfo{
5920 {1, 255},
5921 {0, 65791},
5922 },
5923 },
5924 },
5925 {
5926 name: "XORLmodify",
5927 auxType: auxSymOff,
5928 argLen: 3,
5929 clobberFlags: true,
5930 faultOnNilArg0: true,
5931 symEffect: SymRead | SymWrite,
5932 asm: x86.AXORL,
5933 reg: regInfo{
5934 inputs: []inputInfo{
5935 {1, 255},
5936 {0, 65791},
5937 },
5938 },
5939 },
5940 {
5941 name: "ADDLmodifyidx4",
5942 auxType: auxSymOff,
5943 argLen: 4,
5944 clobberFlags: true,
5945 symEffect: SymRead | SymWrite,
5946 asm: x86.AADDL,
5947 reg: regInfo{
5948 inputs: []inputInfo{
5949 {1, 255},
5950 {2, 255},
5951 {0, 65791},
5952 },
5953 },
5954 },
5955 {
5956 name: "SUBLmodifyidx4",
5957 auxType: auxSymOff,
5958 argLen: 4,
5959 clobberFlags: true,
5960 symEffect: SymRead | SymWrite,
5961 asm: x86.ASUBL,
5962 reg: regInfo{
5963 inputs: []inputInfo{
5964 {1, 255},
5965 {2, 255},
5966 {0, 65791},
5967 },
5968 },
5969 },
5970 {
5971 name: "ANDLmodifyidx4",
5972 auxType: auxSymOff,
5973 argLen: 4,
5974 clobberFlags: true,
5975 symEffect: SymRead | SymWrite,
5976 asm: x86.AANDL,
5977 reg: regInfo{
5978 inputs: []inputInfo{
5979 {1, 255},
5980 {2, 255},
5981 {0, 65791},
5982 },
5983 },
5984 },
5985 {
5986 name: "ORLmodifyidx4",
5987 auxType: auxSymOff,
5988 argLen: 4,
5989 clobberFlags: true,
5990 symEffect: SymRead | SymWrite,
5991 asm: x86.AORL,
5992 reg: regInfo{
5993 inputs: []inputInfo{
5994 {1, 255},
5995 {2, 255},
5996 {0, 65791},
5997 },
5998 },
5999 },
6000 {
6001 name: "XORLmodifyidx4",
6002 auxType: auxSymOff,
6003 argLen: 4,
6004 clobberFlags: true,
6005 symEffect: SymRead | SymWrite,
6006 asm: x86.AXORL,
6007 reg: regInfo{
6008 inputs: []inputInfo{
6009 {1, 255},
6010 {2, 255},
6011 {0, 65791},
6012 },
6013 },
6014 },
6015 {
6016 name: "ADDLconstmodify",
6017 auxType: auxSymValAndOff,
6018 argLen: 2,
6019 clobberFlags: true,
6020 faultOnNilArg0: true,
6021 symEffect: SymRead | SymWrite,
6022 asm: x86.AADDL,
6023 reg: regInfo{
6024 inputs: []inputInfo{
6025 {0, 65791},
6026 },
6027 },
6028 },
6029 {
6030 name: "ANDLconstmodify",
6031 auxType: auxSymValAndOff,
6032 argLen: 2,
6033 clobberFlags: true,
6034 faultOnNilArg0: true,
6035 symEffect: SymRead | SymWrite,
6036 asm: x86.AANDL,
6037 reg: regInfo{
6038 inputs: []inputInfo{
6039 {0, 65791},
6040 },
6041 },
6042 },
6043 {
6044 name: "ORLconstmodify",
6045 auxType: auxSymValAndOff,
6046 argLen: 2,
6047 clobberFlags: true,
6048 faultOnNilArg0: true,
6049 symEffect: SymRead | SymWrite,
6050 asm: x86.AORL,
6051 reg: regInfo{
6052 inputs: []inputInfo{
6053 {0, 65791},
6054 },
6055 },
6056 },
6057 {
6058 name: "XORLconstmodify",
6059 auxType: auxSymValAndOff,
6060 argLen: 2,
6061 clobberFlags: true,
6062 faultOnNilArg0: true,
6063 symEffect: SymRead | SymWrite,
6064 asm: x86.AXORL,
6065 reg: regInfo{
6066 inputs: []inputInfo{
6067 {0, 65791},
6068 },
6069 },
6070 },
6071 {
6072 name: "ADDLconstmodifyidx4",
6073 auxType: auxSymValAndOff,
6074 argLen: 3,
6075 clobberFlags: true,
6076 symEffect: SymRead | SymWrite,
6077 asm: x86.AADDL,
6078 reg: regInfo{
6079 inputs: []inputInfo{
6080 {1, 255},
6081 {0, 65791},
6082 },
6083 },
6084 },
6085 {
6086 name: "ANDLconstmodifyidx4",
6087 auxType: auxSymValAndOff,
6088 argLen: 3,
6089 clobberFlags: true,
6090 symEffect: SymRead | SymWrite,
6091 asm: x86.AANDL,
6092 reg: regInfo{
6093 inputs: []inputInfo{
6094 {1, 255},
6095 {0, 65791},
6096 },
6097 },
6098 },
6099 {
6100 name: "ORLconstmodifyidx4",
6101 auxType: auxSymValAndOff,
6102 argLen: 3,
6103 clobberFlags: true,
6104 symEffect: SymRead | SymWrite,
6105 asm: x86.AORL,
6106 reg: regInfo{
6107 inputs: []inputInfo{
6108 {1, 255},
6109 {0, 65791},
6110 },
6111 },
6112 },
6113 {
6114 name: "XORLconstmodifyidx4",
6115 auxType: auxSymValAndOff,
6116 argLen: 3,
6117 clobberFlags: true,
6118 symEffect: SymRead | SymWrite,
6119 asm: x86.AXORL,
6120 reg: regInfo{
6121 inputs: []inputInfo{
6122 {1, 255},
6123 {0, 65791},
6124 },
6125 },
6126 },
6127 {
6128 name: "MOVBloadidx1",
6129 auxType: auxSymOff,
6130 argLen: 3,
6131 commutative: true,
6132 symEffect: SymRead,
6133 asm: x86.AMOVBLZX,
6134 reg: regInfo{
6135 inputs: []inputInfo{
6136 {1, 255},
6137 {0, 65791},
6138 },
6139 outputs: []outputInfo{
6140 {0, 239},
6141 },
6142 },
6143 },
6144 {
6145 name: "MOVWloadidx1",
6146 auxType: auxSymOff,
6147 argLen: 3,
6148 commutative: true,
6149 symEffect: SymRead,
6150 asm: x86.AMOVWLZX,
6151 reg: regInfo{
6152 inputs: []inputInfo{
6153 {1, 255},
6154 {0, 65791},
6155 },
6156 outputs: []outputInfo{
6157 {0, 239},
6158 },
6159 },
6160 },
6161 {
6162 name: "MOVWloadidx2",
6163 auxType: auxSymOff,
6164 argLen: 3,
6165 symEffect: SymRead,
6166 asm: x86.AMOVWLZX,
6167 reg: regInfo{
6168 inputs: []inputInfo{
6169 {1, 255},
6170 {0, 65791},
6171 },
6172 outputs: []outputInfo{
6173 {0, 239},
6174 },
6175 },
6176 },
6177 {
6178 name: "MOVLloadidx1",
6179 auxType: auxSymOff,
6180 argLen: 3,
6181 commutative: true,
6182 symEffect: SymRead,
6183 asm: x86.AMOVL,
6184 reg: regInfo{
6185 inputs: []inputInfo{
6186 {1, 255},
6187 {0, 65791},
6188 },
6189 outputs: []outputInfo{
6190 {0, 239},
6191 },
6192 },
6193 },
6194 {
6195 name: "MOVLloadidx4",
6196 auxType: auxSymOff,
6197 argLen: 3,
6198 symEffect: SymRead,
6199 asm: x86.AMOVL,
6200 reg: regInfo{
6201 inputs: []inputInfo{
6202 {1, 255},
6203 {0, 65791},
6204 },
6205 outputs: []outputInfo{
6206 {0, 239},
6207 },
6208 },
6209 },
6210 {
6211 name: "MOVBstoreidx1",
6212 auxType: auxSymOff,
6213 argLen: 4,
6214 commutative: true,
6215 symEffect: SymWrite,
6216 asm: x86.AMOVB,
6217 reg: regInfo{
6218 inputs: []inputInfo{
6219 {1, 255},
6220 {2, 255},
6221 {0, 65791},
6222 },
6223 },
6224 },
6225 {
6226 name: "MOVWstoreidx1",
6227 auxType: auxSymOff,
6228 argLen: 4,
6229 commutative: true,
6230 symEffect: SymWrite,
6231 asm: x86.AMOVW,
6232 reg: regInfo{
6233 inputs: []inputInfo{
6234 {1, 255},
6235 {2, 255},
6236 {0, 65791},
6237 },
6238 },
6239 },
6240 {
6241 name: "MOVWstoreidx2",
6242 auxType: auxSymOff,
6243 argLen: 4,
6244 symEffect: SymWrite,
6245 asm: x86.AMOVW,
6246 reg: regInfo{
6247 inputs: []inputInfo{
6248 {1, 255},
6249 {2, 255},
6250 {0, 65791},
6251 },
6252 },
6253 },
6254 {
6255 name: "MOVLstoreidx1",
6256 auxType: auxSymOff,
6257 argLen: 4,
6258 commutative: true,
6259 symEffect: SymWrite,
6260 asm: x86.AMOVL,
6261 reg: regInfo{
6262 inputs: []inputInfo{
6263 {1, 255},
6264 {2, 255},
6265 {0, 65791},
6266 },
6267 },
6268 },
6269 {
6270 name: "MOVLstoreidx4",
6271 auxType: auxSymOff,
6272 argLen: 4,
6273 symEffect: SymWrite,
6274 asm: x86.AMOVL,
6275 reg: regInfo{
6276 inputs: []inputInfo{
6277 {1, 255},
6278 {2, 255},
6279 {0, 65791},
6280 },
6281 },
6282 },
6283 {
6284 name: "MOVBstoreconst",
6285 auxType: auxSymValAndOff,
6286 argLen: 2,
6287 faultOnNilArg0: true,
6288 symEffect: SymWrite,
6289 asm: x86.AMOVB,
6290 reg: regInfo{
6291 inputs: []inputInfo{
6292 {0, 65791},
6293 },
6294 },
6295 },
6296 {
6297 name: "MOVWstoreconst",
6298 auxType: auxSymValAndOff,
6299 argLen: 2,
6300 faultOnNilArg0: true,
6301 symEffect: SymWrite,
6302 asm: x86.AMOVW,
6303 reg: regInfo{
6304 inputs: []inputInfo{
6305 {0, 65791},
6306 },
6307 },
6308 },
6309 {
6310 name: "MOVLstoreconst",
6311 auxType: auxSymValAndOff,
6312 argLen: 2,
6313 faultOnNilArg0: true,
6314 symEffect: SymWrite,
6315 asm: x86.AMOVL,
6316 reg: regInfo{
6317 inputs: []inputInfo{
6318 {0, 65791},
6319 },
6320 },
6321 },
6322 {
6323 name: "MOVBstoreconstidx1",
6324 auxType: auxSymValAndOff,
6325 argLen: 3,
6326 symEffect: SymWrite,
6327 asm: x86.AMOVB,
6328 reg: regInfo{
6329 inputs: []inputInfo{
6330 {1, 255},
6331 {0, 65791},
6332 },
6333 },
6334 },
6335 {
6336 name: "MOVWstoreconstidx1",
6337 auxType: auxSymValAndOff,
6338 argLen: 3,
6339 symEffect: SymWrite,
6340 asm: x86.AMOVW,
6341 reg: regInfo{
6342 inputs: []inputInfo{
6343 {1, 255},
6344 {0, 65791},
6345 },
6346 },
6347 },
6348 {
6349 name: "MOVWstoreconstidx2",
6350 auxType: auxSymValAndOff,
6351 argLen: 3,
6352 symEffect: SymWrite,
6353 asm: x86.AMOVW,
6354 reg: regInfo{
6355 inputs: []inputInfo{
6356 {1, 255},
6357 {0, 65791},
6358 },
6359 },
6360 },
6361 {
6362 name: "MOVLstoreconstidx1",
6363 auxType: auxSymValAndOff,
6364 argLen: 3,
6365 symEffect: SymWrite,
6366 asm: x86.AMOVL,
6367 reg: regInfo{
6368 inputs: []inputInfo{
6369 {1, 255},
6370 {0, 65791},
6371 },
6372 },
6373 },
6374 {
6375 name: "MOVLstoreconstidx4",
6376 auxType: auxSymValAndOff,
6377 argLen: 3,
6378 symEffect: SymWrite,
6379 asm: x86.AMOVL,
6380 reg: regInfo{
6381 inputs: []inputInfo{
6382 {1, 255},
6383 {0, 65791},
6384 },
6385 },
6386 },
6387 {
6388 name: "DUFFZERO",
6389 auxType: auxInt64,
6390 argLen: 3,
6391 faultOnNilArg0: true,
6392 reg: regInfo{
6393 inputs: []inputInfo{
6394 {0, 128},
6395 {1, 1},
6396 },
6397 clobbers: 130,
6398 },
6399 },
6400 {
6401 name: "REPSTOSL",
6402 argLen: 4,
6403 faultOnNilArg0: true,
6404 reg: regInfo{
6405 inputs: []inputInfo{
6406 {0, 128},
6407 {1, 2},
6408 {2, 1},
6409 },
6410 clobbers: 130,
6411 },
6412 },
6413 {
6414 name: "CALLstatic",
6415 auxType: auxCallOff,
6416 argLen: 1,
6417 clobberFlags: true,
6418 call: true,
6419 reg: regInfo{
6420 clobbers: 65519,
6421 },
6422 },
6423 {
6424 name: "CALLtail",
6425 auxType: auxCallOff,
6426 argLen: 1,
6427 clobberFlags: true,
6428 call: true,
6429 tailCall: true,
6430 reg: regInfo{
6431 clobbers: 65519,
6432 },
6433 },
6434 {
6435 name: "CALLclosure",
6436 auxType: auxCallOff,
6437 argLen: 3,
6438 clobberFlags: true,
6439 call: true,
6440 reg: regInfo{
6441 inputs: []inputInfo{
6442 {1, 4},
6443 {0, 255},
6444 },
6445 clobbers: 65519,
6446 },
6447 },
6448 {
6449 name: "CALLinter",
6450 auxType: auxCallOff,
6451 argLen: 2,
6452 clobberFlags: true,
6453 call: true,
6454 reg: regInfo{
6455 inputs: []inputInfo{
6456 {0, 239},
6457 },
6458 clobbers: 65519,
6459 },
6460 },
6461 {
6462 name: "DUFFCOPY",
6463 auxType: auxInt64,
6464 argLen: 3,
6465 clobberFlags: true,
6466 faultOnNilArg0: true,
6467 faultOnNilArg1: true,
6468 reg: regInfo{
6469 inputs: []inputInfo{
6470 {0, 128},
6471 {1, 64},
6472 },
6473 clobbers: 194,
6474 },
6475 },
6476 {
6477 name: "REPMOVSL",
6478 argLen: 4,
6479 faultOnNilArg0: true,
6480 faultOnNilArg1: true,
6481 reg: regInfo{
6482 inputs: []inputInfo{
6483 {0, 128},
6484 {1, 64},
6485 {2, 2},
6486 },
6487 clobbers: 194,
6488 },
6489 },
6490 {
6491 name: "InvertFlags",
6492 argLen: 1,
6493 reg: regInfo{},
6494 },
6495 {
6496 name: "LoweredGetG",
6497 argLen: 1,
6498 reg: regInfo{
6499 outputs: []outputInfo{
6500 {0, 239},
6501 },
6502 },
6503 },
6504 {
6505 name: "LoweredGetClosurePtr",
6506 argLen: 0,
6507 zeroWidth: true,
6508 reg: regInfo{
6509 outputs: []outputInfo{
6510 {0, 4},
6511 },
6512 },
6513 },
6514 {
6515 name: "LoweredGetCallerPC",
6516 argLen: 0,
6517 rematerializeable: true,
6518 reg: regInfo{
6519 outputs: []outputInfo{
6520 {0, 239},
6521 },
6522 },
6523 },
6524 {
6525 name: "LoweredGetCallerSP",
6526 argLen: 1,
6527 rematerializeable: true,
6528 reg: regInfo{
6529 outputs: []outputInfo{
6530 {0, 239},
6531 },
6532 },
6533 },
6534 {
6535 name: "LoweredNilCheck",
6536 argLen: 2,
6537 clobberFlags: true,
6538 nilCheck: true,
6539 faultOnNilArg0: true,
6540 reg: regInfo{
6541 inputs: []inputInfo{
6542 {0, 255},
6543 },
6544 },
6545 },
6546 {
6547 name: "LoweredWB",
6548 auxType: auxInt64,
6549 argLen: 1,
6550 clobberFlags: true,
6551 reg: regInfo{
6552 clobbers: 65280,
6553 outputs: []outputInfo{
6554 {0, 128},
6555 },
6556 },
6557 },
6558 {
6559 name: "LoweredPanicBoundsA",
6560 auxType: auxInt64,
6561 argLen: 3,
6562 call: true,
6563 reg: regInfo{
6564 inputs: []inputInfo{
6565 {0, 4},
6566 {1, 8},
6567 },
6568 },
6569 },
6570 {
6571 name: "LoweredPanicBoundsB",
6572 auxType: auxInt64,
6573 argLen: 3,
6574 call: true,
6575 reg: regInfo{
6576 inputs: []inputInfo{
6577 {0, 2},
6578 {1, 4},
6579 },
6580 },
6581 },
6582 {
6583 name: "LoweredPanicBoundsC",
6584 auxType: auxInt64,
6585 argLen: 3,
6586 call: true,
6587 reg: regInfo{
6588 inputs: []inputInfo{
6589 {0, 1},
6590 {1, 2},
6591 },
6592 },
6593 },
6594 {
6595 name: "LoweredPanicExtendA",
6596 auxType: auxInt64,
6597 argLen: 4,
6598 call: true,
6599 reg: regInfo{
6600 inputs: []inputInfo{
6601 {0, 64},
6602 {1, 4},
6603 {2, 8},
6604 },
6605 },
6606 },
6607 {
6608 name: "LoweredPanicExtendB",
6609 auxType: auxInt64,
6610 argLen: 4,
6611 call: true,
6612 reg: regInfo{
6613 inputs: []inputInfo{
6614 {0, 64},
6615 {1, 2},
6616 {2, 4},
6617 },
6618 },
6619 },
6620 {
6621 name: "LoweredPanicExtendC",
6622 auxType: auxInt64,
6623 argLen: 4,
6624 call: true,
6625 reg: regInfo{
6626 inputs: []inputInfo{
6627 {0, 64},
6628 {1, 1},
6629 {2, 2},
6630 },
6631 },
6632 },
6633 {
6634 name: "FlagEQ",
6635 argLen: 0,
6636 reg: regInfo{},
6637 },
6638 {
6639 name: "FlagLT_ULT",
6640 argLen: 0,
6641 reg: regInfo{},
6642 },
6643 {
6644 name: "FlagLT_UGT",
6645 argLen: 0,
6646 reg: regInfo{},
6647 },
6648 {
6649 name: "FlagGT_UGT",
6650 argLen: 0,
6651 reg: regInfo{},
6652 },
6653 {
6654 name: "FlagGT_ULT",
6655 argLen: 0,
6656 reg: regInfo{},
6657 },
6658 {
6659 name: "MOVSSconst1",
6660 auxType: auxFloat32,
6661 argLen: 0,
6662 reg: regInfo{
6663 outputs: []outputInfo{
6664 {0, 239},
6665 },
6666 },
6667 },
6668 {
6669 name: "MOVSDconst1",
6670 auxType: auxFloat64,
6671 argLen: 0,
6672 reg: regInfo{
6673 outputs: []outputInfo{
6674 {0, 239},
6675 },
6676 },
6677 },
6678 {
6679 name: "MOVSSconst2",
6680 argLen: 1,
6681 asm: x86.AMOVSS,
6682 reg: regInfo{
6683 inputs: []inputInfo{
6684 {0, 239},
6685 },
6686 outputs: []outputInfo{
6687 {0, 65280},
6688 },
6689 },
6690 },
6691 {
6692 name: "MOVSDconst2",
6693 argLen: 1,
6694 asm: x86.AMOVSD,
6695 reg: regInfo{
6696 inputs: []inputInfo{
6697 {0, 239},
6698 },
6699 outputs: []outputInfo{
6700 {0, 65280},
6701 },
6702 },
6703 },
6704
6705 {
6706 name: "ADDSS",
6707 argLen: 2,
6708 commutative: true,
6709 resultInArg0: true,
6710 asm: x86.AADDSS,
6711 reg: regInfo{
6712 inputs: []inputInfo{
6713 {0, 2147418112},
6714 {1, 2147418112},
6715 },
6716 outputs: []outputInfo{
6717 {0, 2147418112},
6718 },
6719 },
6720 },
6721 {
6722 name: "ADDSD",
6723 argLen: 2,
6724 commutative: true,
6725 resultInArg0: true,
6726 asm: x86.AADDSD,
6727 reg: regInfo{
6728 inputs: []inputInfo{
6729 {0, 2147418112},
6730 {1, 2147418112},
6731 },
6732 outputs: []outputInfo{
6733 {0, 2147418112},
6734 },
6735 },
6736 },
6737 {
6738 name: "SUBSS",
6739 argLen: 2,
6740 resultInArg0: true,
6741 asm: x86.ASUBSS,
6742 reg: regInfo{
6743 inputs: []inputInfo{
6744 {0, 2147418112},
6745 {1, 2147418112},
6746 },
6747 outputs: []outputInfo{
6748 {0, 2147418112},
6749 },
6750 },
6751 },
6752 {
6753 name: "SUBSD",
6754 argLen: 2,
6755 resultInArg0: true,
6756 asm: x86.ASUBSD,
6757 reg: regInfo{
6758 inputs: []inputInfo{
6759 {0, 2147418112},
6760 {1, 2147418112},
6761 },
6762 outputs: []outputInfo{
6763 {0, 2147418112},
6764 },
6765 },
6766 },
6767 {
6768 name: "MULSS",
6769 argLen: 2,
6770 commutative: true,
6771 resultInArg0: true,
6772 asm: x86.AMULSS,
6773 reg: regInfo{
6774 inputs: []inputInfo{
6775 {0, 2147418112},
6776 {1, 2147418112},
6777 },
6778 outputs: []outputInfo{
6779 {0, 2147418112},
6780 },
6781 },
6782 },
6783 {
6784 name: "MULSD",
6785 argLen: 2,
6786 commutative: true,
6787 resultInArg0: true,
6788 asm: x86.AMULSD,
6789 reg: regInfo{
6790 inputs: []inputInfo{
6791 {0, 2147418112},
6792 {1, 2147418112},
6793 },
6794 outputs: []outputInfo{
6795 {0, 2147418112},
6796 },
6797 },
6798 },
6799 {
6800 name: "DIVSS",
6801 argLen: 2,
6802 resultInArg0: true,
6803 asm: x86.ADIVSS,
6804 reg: regInfo{
6805 inputs: []inputInfo{
6806 {0, 2147418112},
6807 {1, 2147418112},
6808 },
6809 outputs: []outputInfo{
6810 {0, 2147418112},
6811 },
6812 },
6813 },
6814 {
6815 name: "DIVSD",
6816 argLen: 2,
6817 resultInArg0: true,
6818 asm: x86.ADIVSD,
6819 reg: regInfo{
6820 inputs: []inputInfo{
6821 {0, 2147418112},
6822 {1, 2147418112},
6823 },
6824 outputs: []outputInfo{
6825 {0, 2147418112},
6826 },
6827 },
6828 },
6829 {
6830 name: "MOVSSload",
6831 auxType: auxSymOff,
6832 argLen: 2,
6833 faultOnNilArg0: true,
6834 symEffect: SymRead,
6835 asm: x86.AMOVSS,
6836 reg: regInfo{
6837 inputs: []inputInfo{
6838 {0, 4295016447},
6839 },
6840 outputs: []outputInfo{
6841 {0, 2147418112},
6842 },
6843 },
6844 },
6845 {
6846 name: "MOVSDload",
6847 auxType: auxSymOff,
6848 argLen: 2,
6849 faultOnNilArg0: true,
6850 symEffect: SymRead,
6851 asm: x86.AMOVSD,
6852 reg: regInfo{
6853 inputs: []inputInfo{
6854 {0, 4295016447},
6855 },
6856 outputs: []outputInfo{
6857 {0, 2147418112},
6858 },
6859 },
6860 },
6861 {
6862 name: "MOVSSconst",
6863 auxType: auxFloat32,
6864 argLen: 0,
6865 rematerializeable: true,
6866 asm: x86.AMOVSS,
6867 reg: regInfo{
6868 outputs: []outputInfo{
6869 {0, 2147418112},
6870 },
6871 },
6872 },
6873 {
6874 name: "MOVSDconst",
6875 auxType: auxFloat64,
6876 argLen: 0,
6877 rematerializeable: true,
6878 asm: x86.AMOVSD,
6879 reg: regInfo{
6880 outputs: []outputInfo{
6881 {0, 2147418112},
6882 },
6883 },
6884 },
6885 {
6886 name: "MOVSSloadidx1",
6887 auxType: auxSymOff,
6888 argLen: 3,
6889 symEffect: SymRead,
6890 asm: x86.AMOVSS,
6891 scale: 1,
6892 reg: regInfo{
6893 inputs: []inputInfo{
6894 {1, 49151},
6895 {0, 4295016447},
6896 },
6897 outputs: []outputInfo{
6898 {0, 2147418112},
6899 },
6900 },
6901 },
6902 {
6903 name: "MOVSSloadidx4",
6904 auxType: auxSymOff,
6905 argLen: 3,
6906 symEffect: SymRead,
6907 asm: x86.AMOVSS,
6908 scale: 4,
6909 reg: regInfo{
6910 inputs: []inputInfo{
6911 {1, 49151},
6912 {0, 4295016447},
6913 },
6914 outputs: []outputInfo{
6915 {0, 2147418112},
6916 },
6917 },
6918 },
6919 {
6920 name: "MOVSDloadidx1",
6921 auxType: auxSymOff,
6922 argLen: 3,
6923 symEffect: SymRead,
6924 asm: x86.AMOVSD,
6925 scale: 1,
6926 reg: regInfo{
6927 inputs: []inputInfo{
6928 {1, 49151},
6929 {0, 4295016447},
6930 },
6931 outputs: []outputInfo{
6932 {0, 2147418112},
6933 },
6934 },
6935 },
6936 {
6937 name: "MOVSDloadidx8",
6938 auxType: auxSymOff,
6939 argLen: 3,
6940 symEffect: SymRead,
6941 asm: x86.AMOVSD,
6942 scale: 8,
6943 reg: regInfo{
6944 inputs: []inputInfo{
6945 {1, 49151},
6946 {0, 4295016447},
6947 },
6948 outputs: []outputInfo{
6949 {0, 2147418112},
6950 },
6951 },
6952 },
6953 {
6954 name: "MOVSSstore",
6955 auxType: auxSymOff,
6956 argLen: 3,
6957 faultOnNilArg0: true,
6958 symEffect: SymWrite,
6959 asm: x86.AMOVSS,
6960 reg: regInfo{
6961 inputs: []inputInfo{
6962 {1, 2147418112},
6963 {0, 4295016447},
6964 },
6965 },
6966 },
6967 {
6968 name: "MOVSDstore",
6969 auxType: auxSymOff,
6970 argLen: 3,
6971 faultOnNilArg0: true,
6972 symEffect: SymWrite,
6973 asm: x86.AMOVSD,
6974 reg: regInfo{
6975 inputs: []inputInfo{
6976 {1, 2147418112},
6977 {0, 4295016447},
6978 },
6979 },
6980 },
6981 {
6982 name: "MOVSSstoreidx1",
6983 auxType: auxSymOff,
6984 argLen: 4,
6985 symEffect: SymWrite,
6986 asm: x86.AMOVSS,
6987 scale: 1,
6988 reg: regInfo{
6989 inputs: []inputInfo{
6990 {1, 49151},
6991 {2, 2147418112},
6992 {0, 4295016447},
6993 },
6994 },
6995 },
6996 {
6997 name: "MOVSSstoreidx4",
6998 auxType: auxSymOff,
6999 argLen: 4,
7000 symEffect: SymWrite,
7001 asm: x86.AMOVSS,
7002 scale: 4,
7003 reg: regInfo{
7004 inputs: []inputInfo{
7005 {1, 49151},
7006 {2, 2147418112},
7007 {0, 4295016447},
7008 },
7009 },
7010 },
7011 {
7012 name: "MOVSDstoreidx1",
7013 auxType: auxSymOff,
7014 argLen: 4,
7015 symEffect: SymWrite,
7016 asm: x86.AMOVSD,
7017 scale: 1,
7018 reg: regInfo{
7019 inputs: []inputInfo{
7020 {1, 49151},
7021 {2, 2147418112},
7022 {0, 4295016447},
7023 },
7024 },
7025 },
7026 {
7027 name: "MOVSDstoreidx8",
7028 auxType: auxSymOff,
7029 argLen: 4,
7030 symEffect: SymWrite,
7031 asm: x86.AMOVSD,
7032 scale: 8,
7033 reg: regInfo{
7034 inputs: []inputInfo{
7035 {1, 49151},
7036 {2, 2147418112},
7037 {0, 4295016447},
7038 },
7039 },
7040 },
7041 {
7042 name: "ADDSSload",
7043 auxType: auxSymOff,
7044 argLen: 3,
7045 resultInArg0: true,
7046 faultOnNilArg1: true,
7047 symEffect: SymRead,
7048 asm: x86.AADDSS,
7049 reg: regInfo{
7050 inputs: []inputInfo{
7051 {0, 2147418112},
7052 {1, 4295032831},
7053 },
7054 outputs: []outputInfo{
7055 {0, 2147418112},
7056 },
7057 },
7058 },
7059 {
7060 name: "ADDSDload",
7061 auxType: auxSymOff,
7062 argLen: 3,
7063 resultInArg0: true,
7064 faultOnNilArg1: true,
7065 symEffect: SymRead,
7066 asm: x86.AADDSD,
7067 reg: regInfo{
7068 inputs: []inputInfo{
7069 {0, 2147418112},
7070 {1, 4295032831},
7071 },
7072 outputs: []outputInfo{
7073 {0, 2147418112},
7074 },
7075 },
7076 },
7077 {
7078 name: "SUBSSload",
7079 auxType: auxSymOff,
7080 argLen: 3,
7081 resultInArg0: true,
7082 faultOnNilArg1: true,
7083 symEffect: SymRead,
7084 asm: x86.ASUBSS,
7085 reg: regInfo{
7086 inputs: []inputInfo{
7087 {0, 2147418112},
7088 {1, 4295032831},
7089 },
7090 outputs: []outputInfo{
7091 {0, 2147418112},
7092 },
7093 },
7094 },
7095 {
7096 name: "SUBSDload",
7097 auxType: auxSymOff,
7098 argLen: 3,
7099 resultInArg0: true,
7100 faultOnNilArg1: true,
7101 symEffect: SymRead,
7102 asm: x86.ASUBSD,
7103 reg: regInfo{
7104 inputs: []inputInfo{
7105 {0, 2147418112},
7106 {1, 4295032831},
7107 },
7108 outputs: []outputInfo{
7109 {0, 2147418112},
7110 },
7111 },
7112 },
7113 {
7114 name: "MULSSload",
7115 auxType: auxSymOff,
7116 argLen: 3,
7117 resultInArg0: true,
7118 faultOnNilArg1: true,
7119 symEffect: SymRead,
7120 asm: x86.AMULSS,
7121 reg: regInfo{
7122 inputs: []inputInfo{
7123 {0, 2147418112},
7124 {1, 4295032831},
7125 },
7126 outputs: []outputInfo{
7127 {0, 2147418112},
7128 },
7129 },
7130 },
7131 {
7132 name: "MULSDload",
7133 auxType: auxSymOff,
7134 argLen: 3,
7135 resultInArg0: true,
7136 faultOnNilArg1: true,
7137 symEffect: SymRead,
7138 asm: x86.AMULSD,
7139 reg: regInfo{
7140 inputs: []inputInfo{
7141 {0, 2147418112},
7142 {1, 4295032831},
7143 },
7144 outputs: []outputInfo{
7145 {0, 2147418112},
7146 },
7147 },
7148 },
7149 {
7150 name: "DIVSSload",
7151 auxType: auxSymOff,
7152 argLen: 3,
7153 resultInArg0: true,
7154 faultOnNilArg1: true,
7155 symEffect: SymRead,
7156 asm: x86.ADIVSS,
7157 reg: regInfo{
7158 inputs: []inputInfo{
7159 {0, 2147418112},
7160 {1, 4295032831},
7161 },
7162 outputs: []outputInfo{
7163 {0, 2147418112},
7164 },
7165 },
7166 },
7167 {
7168 name: "DIVSDload",
7169 auxType: auxSymOff,
7170 argLen: 3,
7171 resultInArg0: true,
7172 faultOnNilArg1: true,
7173 symEffect: SymRead,
7174 asm: x86.ADIVSD,
7175 reg: regInfo{
7176 inputs: []inputInfo{
7177 {0, 2147418112},
7178 {1, 4295032831},
7179 },
7180 outputs: []outputInfo{
7181 {0, 2147418112},
7182 },
7183 },
7184 },
7185 {
7186 name: "ADDSSloadidx1",
7187 auxType: auxSymOff,
7188 argLen: 4,
7189 resultInArg0: true,
7190 symEffect: SymRead,
7191 asm: x86.AADDSS,
7192 scale: 1,
7193 reg: regInfo{
7194 inputs: []inputInfo{
7195 {0, 2147418112},
7196 {2, 4295016447},
7197 {1, 4295032831},
7198 },
7199 outputs: []outputInfo{
7200 {0, 2147418112},
7201 },
7202 },
7203 },
7204 {
7205 name: "ADDSSloadidx4",
7206 auxType: auxSymOff,
7207 argLen: 4,
7208 resultInArg0: true,
7209 symEffect: SymRead,
7210 asm: x86.AADDSS,
7211 scale: 4,
7212 reg: regInfo{
7213 inputs: []inputInfo{
7214 {0, 2147418112},
7215 {2, 4295016447},
7216 {1, 4295032831},
7217 },
7218 outputs: []outputInfo{
7219 {0, 2147418112},
7220 },
7221 },
7222 },
7223 {
7224 name: "ADDSDloadidx1",
7225 auxType: auxSymOff,
7226 argLen: 4,
7227 resultInArg0: true,
7228 symEffect: SymRead,
7229 asm: x86.AADDSD,
7230 scale: 1,
7231 reg: regInfo{
7232 inputs: []inputInfo{
7233 {0, 2147418112},
7234 {2, 4295016447},
7235 {1, 4295032831},
7236 },
7237 outputs: []outputInfo{
7238 {0, 2147418112},
7239 },
7240 },
7241 },
7242 {
7243 name: "ADDSDloadidx8",
7244 auxType: auxSymOff,
7245 argLen: 4,
7246 resultInArg0: true,
7247 symEffect: SymRead,
7248 asm: x86.AADDSD,
7249 scale: 8,
7250 reg: regInfo{
7251 inputs: []inputInfo{
7252 {0, 2147418112},
7253 {2, 4295016447},
7254 {1, 4295032831},
7255 },
7256 outputs: []outputInfo{
7257 {0, 2147418112},
7258 },
7259 },
7260 },
7261 {
7262 name: "SUBSSloadidx1",
7263 auxType: auxSymOff,
7264 argLen: 4,
7265 resultInArg0: true,
7266 symEffect: SymRead,
7267 asm: x86.ASUBSS,
7268 scale: 1,
7269 reg: regInfo{
7270 inputs: []inputInfo{
7271 {0, 2147418112},
7272 {2, 4295016447},
7273 {1, 4295032831},
7274 },
7275 outputs: []outputInfo{
7276 {0, 2147418112},
7277 },
7278 },
7279 },
7280 {
7281 name: "SUBSSloadidx4",
7282 auxType: auxSymOff,
7283 argLen: 4,
7284 resultInArg0: true,
7285 symEffect: SymRead,
7286 asm: x86.ASUBSS,
7287 scale: 4,
7288 reg: regInfo{
7289 inputs: []inputInfo{
7290 {0, 2147418112},
7291 {2, 4295016447},
7292 {1, 4295032831},
7293 },
7294 outputs: []outputInfo{
7295 {0, 2147418112},
7296 },
7297 },
7298 },
7299 {
7300 name: "SUBSDloadidx1",
7301 auxType: auxSymOff,
7302 argLen: 4,
7303 resultInArg0: true,
7304 symEffect: SymRead,
7305 asm: x86.ASUBSD,
7306 scale: 1,
7307 reg: regInfo{
7308 inputs: []inputInfo{
7309 {0, 2147418112},
7310 {2, 4295016447},
7311 {1, 4295032831},
7312 },
7313 outputs: []outputInfo{
7314 {0, 2147418112},
7315 },
7316 },
7317 },
7318 {
7319 name: "SUBSDloadidx8",
7320 auxType: auxSymOff,
7321 argLen: 4,
7322 resultInArg0: true,
7323 symEffect: SymRead,
7324 asm: x86.ASUBSD,
7325 scale: 8,
7326 reg: regInfo{
7327 inputs: []inputInfo{
7328 {0, 2147418112},
7329 {2, 4295016447},
7330 {1, 4295032831},
7331 },
7332 outputs: []outputInfo{
7333 {0, 2147418112},
7334 },
7335 },
7336 },
7337 {
7338 name: "MULSSloadidx1",
7339 auxType: auxSymOff,
7340 argLen: 4,
7341 resultInArg0: true,
7342 symEffect: SymRead,
7343 asm: x86.AMULSS,
7344 scale: 1,
7345 reg: regInfo{
7346 inputs: []inputInfo{
7347 {0, 2147418112},
7348 {2, 4295016447},
7349 {1, 4295032831},
7350 },
7351 outputs: []outputInfo{
7352 {0, 2147418112},
7353 },
7354 },
7355 },
7356 {
7357 name: "MULSSloadidx4",
7358 auxType: auxSymOff,
7359 argLen: 4,
7360 resultInArg0: true,
7361 symEffect: SymRead,
7362 asm: x86.AMULSS,
7363 scale: 4,
7364 reg: regInfo{
7365 inputs: []inputInfo{
7366 {0, 2147418112},
7367 {2, 4295016447},
7368 {1, 4295032831},
7369 },
7370 outputs: []outputInfo{
7371 {0, 2147418112},
7372 },
7373 },
7374 },
7375 {
7376 name: "MULSDloadidx1",
7377 auxType: auxSymOff,
7378 argLen: 4,
7379 resultInArg0: true,
7380 symEffect: SymRead,
7381 asm: x86.AMULSD,
7382 scale: 1,
7383 reg: regInfo{
7384 inputs: []inputInfo{
7385 {0, 2147418112},
7386 {2, 4295016447},
7387 {1, 4295032831},
7388 },
7389 outputs: []outputInfo{
7390 {0, 2147418112},
7391 },
7392 },
7393 },
7394 {
7395 name: "MULSDloadidx8",
7396 auxType: auxSymOff,
7397 argLen: 4,
7398 resultInArg0: true,
7399 symEffect: SymRead,
7400 asm: x86.AMULSD,
7401 scale: 8,
7402 reg: regInfo{
7403 inputs: []inputInfo{
7404 {0, 2147418112},
7405 {2, 4295016447},
7406 {1, 4295032831},
7407 },
7408 outputs: []outputInfo{
7409 {0, 2147418112},
7410 },
7411 },
7412 },
7413 {
7414 name: "DIVSSloadidx1",
7415 auxType: auxSymOff,
7416 argLen: 4,
7417 resultInArg0: true,
7418 symEffect: SymRead,
7419 asm: x86.ADIVSS,
7420 scale: 1,
7421 reg: regInfo{
7422 inputs: []inputInfo{
7423 {0, 2147418112},
7424 {2, 4295016447},
7425 {1, 4295032831},
7426 },
7427 outputs: []outputInfo{
7428 {0, 2147418112},
7429 },
7430 },
7431 },
7432 {
7433 name: "DIVSSloadidx4",
7434 auxType: auxSymOff,
7435 argLen: 4,
7436 resultInArg0: true,
7437 symEffect: SymRead,
7438 asm: x86.ADIVSS,
7439 scale: 4,
7440 reg: regInfo{
7441 inputs: []inputInfo{
7442 {0, 2147418112},
7443 {2, 4295016447},
7444 {1, 4295032831},
7445 },
7446 outputs: []outputInfo{
7447 {0, 2147418112},
7448 },
7449 },
7450 },
7451 {
7452 name: "DIVSDloadidx1",
7453 auxType: auxSymOff,
7454 argLen: 4,
7455 resultInArg0: true,
7456 symEffect: SymRead,
7457 asm: x86.ADIVSD,
7458 scale: 1,
7459 reg: regInfo{
7460 inputs: []inputInfo{
7461 {0, 2147418112},
7462 {2, 4295016447},
7463 {1, 4295032831},
7464 },
7465 outputs: []outputInfo{
7466 {0, 2147418112},
7467 },
7468 },
7469 },
7470 {
7471 name: "DIVSDloadidx8",
7472 auxType: auxSymOff,
7473 argLen: 4,
7474 resultInArg0: true,
7475 symEffect: SymRead,
7476 asm: x86.ADIVSD,
7477 scale: 8,
7478 reg: regInfo{
7479 inputs: []inputInfo{
7480 {0, 2147418112},
7481 {2, 4295016447},
7482 {1, 4295032831},
7483 },
7484 outputs: []outputInfo{
7485 {0, 2147418112},
7486 },
7487 },
7488 },
7489 {
7490 name: "ADDQ",
7491 argLen: 2,
7492 commutative: true,
7493 clobberFlags: true,
7494 asm: x86.AADDQ,
7495 reg: regInfo{
7496 inputs: []inputInfo{
7497 {1, 49135},
7498 {0, 49151},
7499 },
7500 outputs: []outputInfo{
7501 {0, 49135},
7502 },
7503 },
7504 },
7505 {
7506 name: "ADDL",
7507 argLen: 2,
7508 commutative: true,
7509 clobberFlags: true,
7510 asm: x86.AADDL,
7511 reg: regInfo{
7512 inputs: []inputInfo{
7513 {1, 49135},
7514 {0, 49151},
7515 },
7516 outputs: []outputInfo{
7517 {0, 49135},
7518 },
7519 },
7520 },
7521 {
7522 name: "ADDQconst",
7523 auxType: auxInt32,
7524 argLen: 1,
7525 clobberFlags: true,
7526 asm: x86.AADDQ,
7527 reg: regInfo{
7528 inputs: []inputInfo{
7529 {0, 49151},
7530 },
7531 outputs: []outputInfo{
7532 {0, 49135},
7533 },
7534 },
7535 },
7536 {
7537 name: "ADDLconst",
7538 auxType: auxInt32,
7539 argLen: 1,
7540 clobberFlags: true,
7541 asm: x86.AADDL,
7542 reg: regInfo{
7543 inputs: []inputInfo{
7544 {0, 49151},
7545 },
7546 outputs: []outputInfo{
7547 {0, 49135},
7548 },
7549 },
7550 },
7551 {
7552 name: "ADDQconstmodify",
7553 auxType: auxSymValAndOff,
7554 argLen: 2,
7555 clobberFlags: true,
7556 faultOnNilArg0: true,
7557 symEffect: SymRead | SymWrite,
7558 asm: x86.AADDQ,
7559 reg: regInfo{
7560 inputs: []inputInfo{
7561 {0, 4295032831},
7562 },
7563 },
7564 },
7565 {
7566 name: "ADDLconstmodify",
7567 auxType: auxSymValAndOff,
7568 argLen: 2,
7569 clobberFlags: true,
7570 faultOnNilArg0: true,
7571 symEffect: SymRead | SymWrite,
7572 asm: x86.AADDL,
7573 reg: regInfo{
7574 inputs: []inputInfo{
7575 {0, 4295032831},
7576 },
7577 },
7578 },
7579 {
7580 name: "SUBQ",
7581 argLen: 2,
7582 resultInArg0: true,
7583 clobberFlags: true,
7584 asm: x86.ASUBQ,
7585 reg: regInfo{
7586 inputs: []inputInfo{
7587 {0, 49135},
7588 {1, 49135},
7589 },
7590 outputs: []outputInfo{
7591 {0, 49135},
7592 },
7593 },
7594 },
7595 {
7596 name: "SUBL",
7597 argLen: 2,
7598 resultInArg0: true,
7599 clobberFlags: true,
7600 asm: x86.ASUBL,
7601 reg: regInfo{
7602 inputs: []inputInfo{
7603 {0, 49135},
7604 {1, 49135},
7605 },
7606 outputs: []outputInfo{
7607 {0, 49135},
7608 },
7609 },
7610 },
7611 {
7612 name: "SUBQconst",
7613 auxType: auxInt32,
7614 argLen: 1,
7615 resultInArg0: true,
7616 clobberFlags: true,
7617 asm: x86.ASUBQ,
7618 reg: regInfo{
7619 inputs: []inputInfo{
7620 {0, 49135},
7621 },
7622 outputs: []outputInfo{
7623 {0, 49135},
7624 },
7625 },
7626 },
7627 {
7628 name: "SUBLconst",
7629 auxType: auxInt32,
7630 argLen: 1,
7631 resultInArg0: true,
7632 clobberFlags: true,
7633 asm: x86.ASUBL,
7634 reg: regInfo{
7635 inputs: []inputInfo{
7636 {0, 49135},
7637 },
7638 outputs: []outputInfo{
7639 {0, 49135},
7640 },
7641 },
7642 },
7643 {
7644 name: "MULQ",
7645 argLen: 2,
7646 commutative: true,
7647 resultInArg0: true,
7648 clobberFlags: true,
7649 asm: x86.AIMULQ,
7650 reg: regInfo{
7651 inputs: []inputInfo{
7652 {0, 49135},
7653 {1, 49135},
7654 },
7655 outputs: []outputInfo{
7656 {0, 49135},
7657 },
7658 },
7659 },
7660 {
7661 name: "MULL",
7662 argLen: 2,
7663 commutative: true,
7664 resultInArg0: true,
7665 clobberFlags: true,
7666 asm: x86.AIMULL,
7667 reg: regInfo{
7668 inputs: []inputInfo{
7669 {0, 49135},
7670 {1, 49135},
7671 },
7672 outputs: []outputInfo{
7673 {0, 49135},
7674 },
7675 },
7676 },
7677 {
7678 name: "MULQconst",
7679 auxType: auxInt32,
7680 argLen: 1,
7681 clobberFlags: true,
7682 asm: x86.AIMUL3Q,
7683 reg: regInfo{
7684 inputs: []inputInfo{
7685 {0, 49135},
7686 },
7687 outputs: []outputInfo{
7688 {0, 49135},
7689 },
7690 },
7691 },
7692 {
7693 name: "MULLconst",
7694 auxType: auxInt32,
7695 argLen: 1,
7696 clobberFlags: true,
7697 asm: x86.AIMUL3L,
7698 reg: regInfo{
7699 inputs: []inputInfo{
7700 {0, 49135},
7701 },
7702 outputs: []outputInfo{
7703 {0, 49135},
7704 },
7705 },
7706 },
7707 {
7708 name: "MULLU",
7709 argLen: 2,
7710 commutative: true,
7711 clobberFlags: true,
7712 asm: x86.AMULL,
7713 reg: regInfo{
7714 inputs: []inputInfo{
7715 {0, 1},
7716 {1, 49151},
7717 },
7718 clobbers: 4,
7719 outputs: []outputInfo{
7720 {1, 0},
7721 {0, 1},
7722 },
7723 },
7724 },
7725 {
7726 name: "MULQU",
7727 argLen: 2,
7728 commutative: true,
7729 clobberFlags: true,
7730 asm: x86.AMULQ,
7731 reg: regInfo{
7732 inputs: []inputInfo{
7733 {0, 1},
7734 {1, 49151},
7735 },
7736 clobbers: 4,
7737 outputs: []outputInfo{
7738 {1, 0},
7739 {0, 1},
7740 },
7741 },
7742 },
7743 {
7744 name: "HMULQ",
7745 argLen: 2,
7746 clobberFlags: true,
7747 asm: x86.AIMULQ,
7748 reg: regInfo{
7749 inputs: []inputInfo{
7750 {0, 1},
7751 {1, 49151},
7752 },
7753 clobbers: 1,
7754 outputs: []outputInfo{
7755 {0, 4},
7756 },
7757 },
7758 },
7759 {
7760 name: "HMULL",
7761 argLen: 2,
7762 clobberFlags: true,
7763 asm: x86.AIMULL,
7764 reg: regInfo{
7765 inputs: []inputInfo{
7766 {0, 1},
7767 {1, 49151},
7768 },
7769 clobbers: 1,
7770 outputs: []outputInfo{
7771 {0, 4},
7772 },
7773 },
7774 },
7775 {
7776 name: "HMULQU",
7777 argLen: 2,
7778 clobberFlags: true,
7779 asm: x86.AMULQ,
7780 reg: regInfo{
7781 inputs: []inputInfo{
7782 {0, 1},
7783 {1, 49151},
7784 },
7785 clobbers: 1,
7786 outputs: []outputInfo{
7787 {0, 4},
7788 },
7789 },
7790 },
7791 {
7792 name: "HMULLU",
7793 argLen: 2,
7794 clobberFlags: true,
7795 asm: x86.AMULL,
7796 reg: regInfo{
7797 inputs: []inputInfo{
7798 {0, 1},
7799 {1, 49151},
7800 },
7801 clobbers: 1,
7802 outputs: []outputInfo{
7803 {0, 4},
7804 },
7805 },
7806 },
7807 {
7808 name: "AVGQU",
7809 argLen: 2,
7810 commutative: true,
7811 resultInArg0: true,
7812 clobberFlags: true,
7813 reg: regInfo{
7814 inputs: []inputInfo{
7815 {0, 49135},
7816 {1, 49135},
7817 },
7818 outputs: []outputInfo{
7819 {0, 49135},
7820 },
7821 },
7822 },
7823 {
7824 name: "DIVQ",
7825 auxType: auxBool,
7826 argLen: 2,
7827 clobberFlags: true,
7828 asm: x86.AIDIVQ,
7829 reg: regInfo{
7830 inputs: []inputInfo{
7831 {0, 1},
7832 {1, 49147},
7833 },
7834 outputs: []outputInfo{
7835 {0, 1},
7836 {1, 4},
7837 },
7838 },
7839 },
7840 {
7841 name: "DIVL",
7842 auxType: auxBool,
7843 argLen: 2,
7844 clobberFlags: true,
7845 asm: x86.AIDIVL,
7846 reg: regInfo{
7847 inputs: []inputInfo{
7848 {0, 1},
7849 {1, 49147},
7850 },
7851 outputs: []outputInfo{
7852 {0, 1},
7853 {1, 4},
7854 },
7855 },
7856 },
7857 {
7858 name: "DIVW",
7859 auxType: auxBool,
7860 argLen: 2,
7861 clobberFlags: true,
7862 asm: x86.AIDIVW,
7863 reg: regInfo{
7864 inputs: []inputInfo{
7865 {0, 1},
7866 {1, 49147},
7867 },
7868 outputs: []outputInfo{
7869 {0, 1},
7870 {1, 4},
7871 },
7872 },
7873 },
7874 {
7875 name: "DIVQU",
7876 argLen: 2,
7877 clobberFlags: true,
7878 asm: x86.ADIVQ,
7879 reg: regInfo{
7880 inputs: []inputInfo{
7881 {0, 1},
7882 {1, 49147},
7883 },
7884 outputs: []outputInfo{
7885 {0, 1},
7886 {1, 4},
7887 },
7888 },
7889 },
7890 {
7891 name: "DIVLU",
7892 argLen: 2,
7893 clobberFlags: true,
7894 asm: x86.ADIVL,
7895 reg: regInfo{
7896 inputs: []inputInfo{
7897 {0, 1},
7898 {1, 49147},
7899 },
7900 outputs: []outputInfo{
7901 {0, 1},
7902 {1, 4},
7903 },
7904 },
7905 },
7906 {
7907 name: "DIVWU",
7908 argLen: 2,
7909 clobberFlags: true,
7910 asm: x86.ADIVW,
7911 reg: regInfo{
7912 inputs: []inputInfo{
7913 {0, 1},
7914 {1, 49147},
7915 },
7916 outputs: []outputInfo{
7917 {0, 1},
7918 {1, 4},
7919 },
7920 },
7921 },
7922 {
7923 name: "NEGLflags",
7924 argLen: 1,
7925 resultInArg0: true,
7926 asm: x86.ANEGL,
7927 reg: regInfo{
7928 inputs: []inputInfo{
7929 {0, 49135},
7930 },
7931 outputs: []outputInfo{
7932 {1, 0},
7933 {0, 49135},
7934 },
7935 },
7936 },
7937 {
7938 name: "ADDQcarry",
7939 argLen: 2,
7940 commutative: true,
7941 resultInArg0: true,
7942 asm: x86.AADDQ,
7943 reg: regInfo{
7944 inputs: []inputInfo{
7945 {0, 49135},
7946 {1, 49135},
7947 },
7948 outputs: []outputInfo{
7949 {1, 0},
7950 {0, 49135},
7951 },
7952 },
7953 },
7954 {
7955 name: "ADCQ",
7956 argLen: 3,
7957 commutative: true,
7958 resultInArg0: true,
7959 asm: x86.AADCQ,
7960 reg: regInfo{
7961 inputs: []inputInfo{
7962 {0, 49135},
7963 {1, 49135},
7964 },
7965 outputs: []outputInfo{
7966 {1, 0},
7967 {0, 49135},
7968 },
7969 },
7970 },
7971 {
7972 name: "ADDQconstcarry",
7973 auxType: auxInt32,
7974 argLen: 1,
7975 resultInArg0: true,
7976 asm: x86.AADDQ,
7977 reg: regInfo{
7978 inputs: []inputInfo{
7979 {0, 49135},
7980 },
7981 outputs: []outputInfo{
7982 {1, 0},
7983 {0, 49135},
7984 },
7985 },
7986 },
7987 {
7988 name: "ADCQconst",
7989 auxType: auxInt32,
7990 argLen: 2,
7991 resultInArg0: true,
7992 asm: x86.AADCQ,
7993 reg: regInfo{
7994 inputs: []inputInfo{
7995 {0, 49135},
7996 },
7997 outputs: []outputInfo{
7998 {1, 0},
7999 {0, 49135},
8000 },
8001 },
8002 },
8003 {
8004 name: "SUBQborrow",
8005 argLen: 2,
8006 resultInArg0: true,
8007 asm: x86.ASUBQ,
8008 reg: regInfo{
8009 inputs: []inputInfo{
8010 {0, 49135},
8011 {1, 49135},
8012 },
8013 outputs: []outputInfo{
8014 {1, 0},
8015 {0, 49135},
8016 },
8017 },
8018 },
8019 {
8020 name: "SBBQ",
8021 argLen: 3,
8022 resultInArg0: true,
8023 asm: x86.ASBBQ,
8024 reg: regInfo{
8025 inputs: []inputInfo{
8026 {0, 49135},
8027 {1, 49135},
8028 },
8029 outputs: []outputInfo{
8030 {1, 0},
8031 {0, 49135},
8032 },
8033 },
8034 },
8035 {
8036 name: "SUBQconstborrow",
8037 auxType: auxInt32,
8038 argLen: 1,
8039 resultInArg0: true,
8040 asm: x86.ASUBQ,
8041 reg: regInfo{
8042 inputs: []inputInfo{
8043 {0, 49135},
8044 },
8045 outputs: []outputInfo{
8046 {1, 0},
8047 {0, 49135},
8048 },
8049 },
8050 },
8051 {
8052 name: "SBBQconst",
8053 auxType: auxInt32,
8054 argLen: 2,
8055 resultInArg0: true,
8056 asm: x86.ASBBQ,
8057 reg: regInfo{
8058 inputs: []inputInfo{
8059 {0, 49135},
8060 },
8061 outputs: []outputInfo{
8062 {1, 0},
8063 {0, 49135},
8064 },
8065 },
8066 },
8067 {
8068 name: "MULQU2",
8069 argLen: 2,
8070 commutative: true,
8071 clobberFlags: true,
8072 asm: x86.AMULQ,
8073 reg: regInfo{
8074 inputs: []inputInfo{
8075 {0, 1},
8076 {1, 49151},
8077 },
8078 outputs: []outputInfo{
8079 {0, 4},
8080 {1, 1},
8081 },
8082 },
8083 },
8084 {
8085 name: "DIVQU2",
8086 argLen: 3,
8087 clobberFlags: true,
8088 asm: x86.ADIVQ,
8089 reg: regInfo{
8090 inputs: []inputInfo{
8091 {0, 4},
8092 {1, 1},
8093 {2, 49151},
8094 },
8095 outputs: []outputInfo{
8096 {0, 1},
8097 {1, 4},
8098 },
8099 },
8100 },
8101 {
8102 name: "ANDQ",
8103 argLen: 2,
8104 commutative: true,
8105 resultInArg0: true,
8106 clobberFlags: true,
8107 asm: x86.AANDQ,
8108 reg: regInfo{
8109 inputs: []inputInfo{
8110 {0, 49135},
8111 {1, 49135},
8112 },
8113 outputs: []outputInfo{
8114 {0, 49135},
8115 },
8116 },
8117 },
8118 {
8119 name: "ANDL",
8120 argLen: 2,
8121 commutative: true,
8122 resultInArg0: true,
8123 clobberFlags: true,
8124 asm: x86.AANDL,
8125 reg: regInfo{
8126 inputs: []inputInfo{
8127 {0, 49135},
8128 {1, 49135},
8129 },
8130 outputs: []outputInfo{
8131 {0, 49135},
8132 },
8133 },
8134 },
8135 {
8136 name: "ANDQconst",
8137 auxType: auxInt32,
8138 argLen: 1,
8139 resultInArg0: true,
8140 clobberFlags: true,
8141 asm: x86.AANDQ,
8142 reg: regInfo{
8143 inputs: []inputInfo{
8144 {0, 49135},
8145 },
8146 outputs: []outputInfo{
8147 {0, 49135},
8148 },
8149 },
8150 },
8151 {
8152 name: "ANDLconst",
8153 auxType: auxInt32,
8154 argLen: 1,
8155 resultInArg0: true,
8156 clobberFlags: true,
8157 asm: x86.AANDL,
8158 reg: regInfo{
8159 inputs: []inputInfo{
8160 {0, 49135},
8161 },
8162 outputs: []outputInfo{
8163 {0, 49135},
8164 },
8165 },
8166 },
8167 {
8168 name: "ANDQconstmodify",
8169 auxType: auxSymValAndOff,
8170 argLen: 2,
8171 clobberFlags: true,
8172 faultOnNilArg0: true,
8173 symEffect: SymRead | SymWrite,
8174 asm: x86.AANDQ,
8175 reg: regInfo{
8176 inputs: []inputInfo{
8177 {0, 4295032831},
8178 },
8179 },
8180 },
8181 {
8182 name: "ANDLconstmodify",
8183 auxType: auxSymValAndOff,
8184 argLen: 2,
8185 clobberFlags: true,
8186 faultOnNilArg0: true,
8187 symEffect: SymRead | SymWrite,
8188 asm: x86.AANDL,
8189 reg: regInfo{
8190 inputs: []inputInfo{
8191 {0, 4295032831},
8192 },
8193 },
8194 },
8195 {
8196 name: "ORQ",
8197 argLen: 2,
8198 commutative: true,
8199 resultInArg0: true,
8200 clobberFlags: true,
8201 asm: x86.AORQ,
8202 reg: regInfo{
8203 inputs: []inputInfo{
8204 {0, 49135},
8205 {1, 49135},
8206 },
8207 outputs: []outputInfo{
8208 {0, 49135},
8209 },
8210 },
8211 },
8212 {
8213 name: "ORL",
8214 argLen: 2,
8215 commutative: true,
8216 resultInArg0: true,
8217 clobberFlags: true,
8218 asm: x86.AORL,
8219 reg: regInfo{
8220 inputs: []inputInfo{
8221 {0, 49135},
8222 {1, 49135},
8223 },
8224 outputs: []outputInfo{
8225 {0, 49135},
8226 },
8227 },
8228 },
8229 {
8230 name: "ORQconst",
8231 auxType: auxInt32,
8232 argLen: 1,
8233 resultInArg0: true,
8234 clobberFlags: true,
8235 asm: x86.AORQ,
8236 reg: regInfo{
8237 inputs: []inputInfo{
8238 {0, 49135},
8239 },
8240 outputs: []outputInfo{
8241 {0, 49135},
8242 },
8243 },
8244 },
8245 {
8246 name: "ORLconst",
8247 auxType: auxInt32,
8248 argLen: 1,
8249 resultInArg0: true,
8250 clobberFlags: true,
8251 asm: x86.AORL,
8252 reg: regInfo{
8253 inputs: []inputInfo{
8254 {0, 49135},
8255 },
8256 outputs: []outputInfo{
8257 {0, 49135},
8258 },
8259 },
8260 },
8261 {
8262 name: "ORQconstmodify",
8263 auxType: auxSymValAndOff,
8264 argLen: 2,
8265 clobberFlags: true,
8266 faultOnNilArg0: true,
8267 symEffect: SymRead | SymWrite,
8268 asm: x86.AORQ,
8269 reg: regInfo{
8270 inputs: []inputInfo{
8271 {0, 4295032831},
8272 },
8273 },
8274 },
8275 {
8276 name: "ORLconstmodify",
8277 auxType: auxSymValAndOff,
8278 argLen: 2,
8279 clobberFlags: true,
8280 faultOnNilArg0: true,
8281 symEffect: SymRead | SymWrite,
8282 asm: x86.AORL,
8283 reg: regInfo{
8284 inputs: []inputInfo{
8285 {0, 4295032831},
8286 },
8287 },
8288 },
8289 {
8290 name: "XORQ",
8291 argLen: 2,
8292 commutative: true,
8293 resultInArg0: true,
8294 clobberFlags: true,
8295 asm: x86.AXORQ,
8296 reg: regInfo{
8297 inputs: []inputInfo{
8298 {0, 49135},
8299 {1, 49135},
8300 },
8301 outputs: []outputInfo{
8302 {0, 49135},
8303 },
8304 },
8305 },
8306 {
8307 name: "XORL",
8308 argLen: 2,
8309 commutative: true,
8310 resultInArg0: true,
8311 clobberFlags: true,
8312 asm: x86.AXORL,
8313 reg: regInfo{
8314 inputs: []inputInfo{
8315 {0, 49135},
8316 {1, 49135},
8317 },
8318 outputs: []outputInfo{
8319 {0, 49135},
8320 },
8321 },
8322 },
8323 {
8324 name: "XORQconst",
8325 auxType: auxInt32,
8326 argLen: 1,
8327 resultInArg0: true,
8328 clobberFlags: true,
8329 asm: x86.AXORQ,
8330 reg: regInfo{
8331 inputs: []inputInfo{
8332 {0, 49135},
8333 },
8334 outputs: []outputInfo{
8335 {0, 49135},
8336 },
8337 },
8338 },
8339 {
8340 name: "XORLconst",
8341 auxType: auxInt32,
8342 argLen: 1,
8343 resultInArg0: true,
8344 clobberFlags: true,
8345 asm: x86.AXORL,
8346 reg: regInfo{
8347 inputs: []inputInfo{
8348 {0, 49135},
8349 },
8350 outputs: []outputInfo{
8351 {0, 49135},
8352 },
8353 },
8354 },
8355 {
8356 name: "XORQconstmodify",
8357 auxType: auxSymValAndOff,
8358 argLen: 2,
8359 clobberFlags: true,
8360 faultOnNilArg0: true,
8361 symEffect: SymRead | SymWrite,
8362 asm: x86.AXORQ,
8363 reg: regInfo{
8364 inputs: []inputInfo{
8365 {0, 4295032831},
8366 },
8367 },
8368 },
8369 {
8370 name: "XORLconstmodify",
8371 auxType: auxSymValAndOff,
8372 argLen: 2,
8373 clobberFlags: true,
8374 faultOnNilArg0: true,
8375 symEffect: SymRead | SymWrite,
8376 asm: x86.AXORL,
8377 reg: regInfo{
8378 inputs: []inputInfo{
8379 {0, 4295032831},
8380 },
8381 },
8382 },
8383 {
8384 name: "CMPQ",
8385 argLen: 2,
8386 asm: x86.ACMPQ,
8387 reg: regInfo{
8388 inputs: []inputInfo{
8389 {0, 49151},
8390 {1, 49151},
8391 },
8392 },
8393 },
8394 {
8395 name: "CMPL",
8396 argLen: 2,
8397 asm: x86.ACMPL,
8398 reg: regInfo{
8399 inputs: []inputInfo{
8400 {0, 49151},
8401 {1, 49151},
8402 },
8403 },
8404 },
8405 {
8406 name: "CMPW",
8407 argLen: 2,
8408 asm: x86.ACMPW,
8409 reg: regInfo{
8410 inputs: []inputInfo{
8411 {0, 49151},
8412 {1, 49151},
8413 },
8414 },
8415 },
8416 {
8417 name: "CMPB",
8418 argLen: 2,
8419 asm: x86.ACMPB,
8420 reg: regInfo{
8421 inputs: []inputInfo{
8422 {0, 49151},
8423 {1, 49151},
8424 },
8425 },
8426 },
8427 {
8428 name: "CMPQconst",
8429 auxType: auxInt32,
8430 argLen: 1,
8431 asm: x86.ACMPQ,
8432 reg: regInfo{
8433 inputs: []inputInfo{
8434 {0, 49151},
8435 },
8436 },
8437 },
8438 {
8439 name: "CMPLconst",
8440 auxType: auxInt32,
8441 argLen: 1,
8442 asm: x86.ACMPL,
8443 reg: regInfo{
8444 inputs: []inputInfo{
8445 {0, 49151},
8446 },
8447 },
8448 },
8449 {
8450 name: "CMPWconst",
8451 auxType: auxInt16,
8452 argLen: 1,
8453 asm: x86.ACMPW,
8454 reg: regInfo{
8455 inputs: []inputInfo{
8456 {0, 49151},
8457 },
8458 },
8459 },
8460 {
8461 name: "CMPBconst",
8462 auxType: auxInt8,
8463 argLen: 1,
8464 asm: x86.ACMPB,
8465 reg: regInfo{
8466 inputs: []inputInfo{
8467 {0, 49151},
8468 },
8469 },
8470 },
8471 {
8472 name: "CMPQload",
8473 auxType: auxSymOff,
8474 argLen: 3,
8475 faultOnNilArg0: true,
8476 symEffect: SymRead,
8477 asm: x86.ACMPQ,
8478 reg: regInfo{
8479 inputs: []inputInfo{
8480 {1, 49151},
8481 {0, 4295032831},
8482 },
8483 },
8484 },
8485 {
8486 name: "CMPLload",
8487 auxType: auxSymOff,
8488 argLen: 3,
8489 faultOnNilArg0: true,
8490 symEffect: SymRead,
8491 asm: x86.ACMPL,
8492 reg: regInfo{
8493 inputs: []inputInfo{
8494 {1, 49151},
8495 {0, 4295032831},
8496 },
8497 },
8498 },
8499 {
8500 name: "CMPWload",
8501 auxType: auxSymOff,
8502 argLen: 3,
8503 faultOnNilArg0: true,
8504 symEffect: SymRead,
8505 asm: x86.ACMPW,
8506 reg: regInfo{
8507 inputs: []inputInfo{
8508 {1, 49151},
8509 {0, 4295032831},
8510 },
8511 },
8512 },
8513 {
8514 name: "CMPBload",
8515 auxType: auxSymOff,
8516 argLen: 3,
8517 faultOnNilArg0: true,
8518 symEffect: SymRead,
8519 asm: x86.ACMPB,
8520 reg: regInfo{
8521 inputs: []inputInfo{
8522 {1, 49151},
8523 {0, 4295032831},
8524 },
8525 },
8526 },
8527 {
8528 name: "CMPQconstload",
8529 auxType: auxSymValAndOff,
8530 argLen: 2,
8531 faultOnNilArg0: true,
8532 symEffect: SymRead,
8533 asm: x86.ACMPQ,
8534 reg: regInfo{
8535 inputs: []inputInfo{
8536 {0, 4295032831},
8537 },
8538 },
8539 },
8540 {
8541 name: "CMPLconstload",
8542 auxType: auxSymValAndOff,
8543 argLen: 2,
8544 faultOnNilArg0: true,
8545 symEffect: SymRead,
8546 asm: x86.ACMPL,
8547 reg: regInfo{
8548 inputs: []inputInfo{
8549 {0, 4295032831},
8550 },
8551 },
8552 },
8553 {
8554 name: "CMPWconstload",
8555 auxType: auxSymValAndOff,
8556 argLen: 2,
8557 faultOnNilArg0: true,
8558 symEffect: SymRead,
8559 asm: x86.ACMPW,
8560 reg: regInfo{
8561 inputs: []inputInfo{
8562 {0, 4295032831},
8563 },
8564 },
8565 },
8566 {
8567 name: "CMPBconstload",
8568 auxType: auxSymValAndOff,
8569 argLen: 2,
8570 faultOnNilArg0: true,
8571 symEffect: SymRead,
8572 asm: x86.ACMPB,
8573 reg: regInfo{
8574 inputs: []inputInfo{
8575 {0, 4295032831},
8576 },
8577 },
8578 },
8579 {
8580 name: "CMPQloadidx8",
8581 auxType: auxSymOff,
8582 argLen: 4,
8583 symEffect: SymRead,
8584 asm: x86.ACMPQ,
8585 scale: 8,
8586 reg: regInfo{
8587 inputs: []inputInfo{
8588 {1, 49151},
8589 {2, 49151},
8590 {0, 4295032831},
8591 },
8592 },
8593 },
8594 {
8595 name: "CMPQloadidx1",
8596 auxType: auxSymOff,
8597 argLen: 4,
8598 commutative: true,
8599 symEffect: SymRead,
8600 asm: x86.ACMPQ,
8601 scale: 1,
8602 reg: regInfo{
8603 inputs: []inputInfo{
8604 {1, 49151},
8605 {2, 49151},
8606 {0, 4295032831},
8607 },
8608 },
8609 },
8610 {
8611 name: "CMPLloadidx4",
8612 auxType: auxSymOff,
8613 argLen: 4,
8614 symEffect: SymRead,
8615 asm: x86.ACMPL,
8616 scale: 4,
8617 reg: regInfo{
8618 inputs: []inputInfo{
8619 {1, 49151},
8620 {2, 49151},
8621 {0, 4295032831},
8622 },
8623 },
8624 },
8625 {
8626 name: "CMPLloadidx1",
8627 auxType: auxSymOff,
8628 argLen: 4,
8629 commutative: true,
8630 symEffect: SymRead,
8631 asm: x86.ACMPL,
8632 scale: 1,
8633 reg: regInfo{
8634 inputs: []inputInfo{
8635 {1, 49151},
8636 {2, 49151},
8637 {0, 4295032831},
8638 },
8639 },
8640 },
8641 {
8642 name: "CMPWloadidx2",
8643 auxType: auxSymOff,
8644 argLen: 4,
8645 symEffect: SymRead,
8646 asm: x86.ACMPW,
8647 scale: 2,
8648 reg: regInfo{
8649 inputs: []inputInfo{
8650 {1, 49151},
8651 {2, 49151},
8652 {0, 4295032831},
8653 },
8654 },
8655 },
8656 {
8657 name: "CMPWloadidx1",
8658 auxType: auxSymOff,
8659 argLen: 4,
8660 commutative: true,
8661 symEffect: SymRead,
8662 asm: x86.ACMPW,
8663 scale: 1,
8664 reg: regInfo{
8665 inputs: []inputInfo{
8666 {1, 49151},
8667 {2, 49151},
8668 {0, 4295032831},
8669 },
8670 },
8671 },
8672 {
8673 name: "CMPBloadidx1",
8674 auxType: auxSymOff,
8675 argLen: 4,
8676 commutative: true,
8677 symEffect: SymRead,
8678 asm: x86.ACMPB,
8679 scale: 1,
8680 reg: regInfo{
8681 inputs: []inputInfo{
8682 {1, 49151},
8683 {2, 49151},
8684 {0, 4295032831},
8685 },
8686 },
8687 },
8688 {
8689 name: "CMPQconstloadidx8",
8690 auxType: auxSymValAndOff,
8691 argLen: 3,
8692 symEffect: SymRead,
8693 asm: x86.ACMPQ,
8694 scale: 8,
8695 reg: regInfo{
8696 inputs: []inputInfo{
8697 {1, 49151},
8698 {0, 4295032831},
8699 },
8700 },
8701 },
8702 {
8703 name: "CMPQconstloadidx1",
8704 auxType: auxSymValAndOff,
8705 argLen: 3,
8706 commutative: true,
8707 symEffect: SymRead,
8708 asm: x86.ACMPQ,
8709 scale: 1,
8710 reg: regInfo{
8711 inputs: []inputInfo{
8712 {1, 49151},
8713 {0, 4295032831},
8714 },
8715 },
8716 },
8717 {
8718 name: "CMPLconstloadidx4",
8719 auxType: auxSymValAndOff,
8720 argLen: 3,
8721 symEffect: SymRead,
8722 asm: x86.ACMPL,
8723 scale: 4,
8724 reg: regInfo{
8725 inputs: []inputInfo{
8726 {1, 49151},
8727 {0, 4295032831},
8728 },
8729 },
8730 },
8731 {
8732 name: "CMPLconstloadidx1",
8733 auxType: auxSymValAndOff,
8734 argLen: 3,
8735 commutative: true,
8736 symEffect: SymRead,
8737 asm: x86.ACMPL,
8738 scale: 1,
8739 reg: regInfo{
8740 inputs: []inputInfo{
8741 {1, 49151},
8742 {0, 4295032831},
8743 },
8744 },
8745 },
8746 {
8747 name: "CMPWconstloadidx2",
8748 auxType: auxSymValAndOff,
8749 argLen: 3,
8750 symEffect: SymRead,
8751 asm: x86.ACMPW,
8752 scale: 2,
8753 reg: regInfo{
8754 inputs: []inputInfo{
8755 {1, 49151},
8756 {0, 4295032831},
8757 },
8758 },
8759 },
8760 {
8761 name: "CMPWconstloadidx1",
8762 auxType: auxSymValAndOff,
8763 argLen: 3,
8764 commutative: true,
8765 symEffect: SymRead,
8766 asm: x86.ACMPW,
8767 scale: 1,
8768 reg: regInfo{
8769 inputs: []inputInfo{
8770 {1, 49151},
8771 {0, 4295032831},
8772 },
8773 },
8774 },
8775 {
8776 name: "CMPBconstloadidx1",
8777 auxType: auxSymValAndOff,
8778 argLen: 3,
8779 commutative: true,
8780 symEffect: SymRead,
8781 asm: x86.ACMPB,
8782 scale: 1,
8783 reg: regInfo{
8784 inputs: []inputInfo{
8785 {1, 49151},
8786 {0, 4295032831},
8787 },
8788 },
8789 },
8790 {
8791 name: "UCOMISS",
8792 argLen: 2,
8793 asm: x86.AUCOMISS,
8794 reg: regInfo{
8795 inputs: []inputInfo{
8796 {0, 2147418112},
8797 {1, 2147418112},
8798 },
8799 },
8800 },
8801 {
8802 name: "UCOMISD",
8803 argLen: 2,
8804 asm: x86.AUCOMISD,
8805 reg: regInfo{
8806 inputs: []inputInfo{
8807 {0, 2147418112},
8808 {1, 2147418112},
8809 },
8810 },
8811 },
8812 {
8813 name: "BTL",
8814 argLen: 2,
8815 asm: x86.ABTL,
8816 reg: regInfo{
8817 inputs: []inputInfo{
8818 {0, 49151},
8819 {1, 49151},
8820 },
8821 },
8822 },
8823 {
8824 name: "BTQ",
8825 argLen: 2,
8826 asm: x86.ABTQ,
8827 reg: regInfo{
8828 inputs: []inputInfo{
8829 {0, 49151},
8830 {1, 49151},
8831 },
8832 },
8833 },
8834 {
8835 name: "BTCL",
8836 argLen: 2,
8837 resultInArg0: true,
8838 clobberFlags: true,
8839 asm: x86.ABTCL,
8840 reg: regInfo{
8841 inputs: []inputInfo{
8842 {0, 49135},
8843 {1, 49135},
8844 },
8845 outputs: []outputInfo{
8846 {0, 49135},
8847 },
8848 },
8849 },
8850 {
8851 name: "BTCQ",
8852 argLen: 2,
8853 resultInArg0: true,
8854 clobberFlags: true,
8855 asm: x86.ABTCQ,
8856 reg: regInfo{
8857 inputs: []inputInfo{
8858 {0, 49135},
8859 {1, 49135},
8860 },
8861 outputs: []outputInfo{
8862 {0, 49135},
8863 },
8864 },
8865 },
8866 {
8867 name: "BTRL",
8868 argLen: 2,
8869 resultInArg0: true,
8870 clobberFlags: true,
8871 asm: x86.ABTRL,
8872 reg: regInfo{
8873 inputs: []inputInfo{
8874 {0, 49135},
8875 {1, 49135},
8876 },
8877 outputs: []outputInfo{
8878 {0, 49135},
8879 },
8880 },
8881 },
8882 {
8883 name: "BTRQ",
8884 argLen: 2,
8885 resultInArg0: true,
8886 clobberFlags: true,
8887 asm: x86.ABTRQ,
8888 reg: regInfo{
8889 inputs: []inputInfo{
8890 {0, 49135},
8891 {1, 49135},
8892 },
8893 outputs: []outputInfo{
8894 {0, 49135},
8895 },
8896 },
8897 },
8898 {
8899 name: "BTSL",
8900 argLen: 2,
8901 resultInArg0: true,
8902 clobberFlags: true,
8903 asm: x86.ABTSL,
8904 reg: regInfo{
8905 inputs: []inputInfo{
8906 {0, 49135},
8907 {1, 49135},
8908 },
8909 outputs: []outputInfo{
8910 {0, 49135},
8911 },
8912 },
8913 },
8914 {
8915 name: "BTSQ",
8916 argLen: 2,
8917 resultInArg0: true,
8918 clobberFlags: true,
8919 asm: x86.ABTSQ,
8920 reg: regInfo{
8921 inputs: []inputInfo{
8922 {0, 49135},
8923 {1, 49135},
8924 },
8925 outputs: []outputInfo{
8926 {0, 49135},
8927 },
8928 },
8929 },
8930 {
8931 name: "BTLconst",
8932 auxType: auxInt8,
8933 argLen: 1,
8934 asm: x86.ABTL,
8935 reg: regInfo{
8936 inputs: []inputInfo{
8937 {0, 49151},
8938 },
8939 },
8940 },
8941 {
8942 name: "BTQconst",
8943 auxType: auxInt8,
8944 argLen: 1,
8945 asm: x86.ABTQ,
8946 reg: regInfo{
8947 inputs: []inputInfo{
8948 {0, 49151},
8949 },
8950 },
8951 },
8952 {
8953 name: "BTCQconst",
8954 auxType: auxInt8,
8955 argLen: 1,
8956 resultInArg0: true,
8957 clobberFlags: true,
8958 asm: x86.ABTCQ,
8959 reg: regInfo{
8960 inputs: []inputInfo{
8961 {0, 49135},
8962 },
8963 outputs: []outputInfo{
8964 {0, 49135},
8965 },
8966 },
8967 },
8968 {
8969 name: "BTRQconst",
8970 auxType: auxInt8,
8971 argLen: 1,
8972 resultInArg0: true,
8973 clobberFlags: true,
8974 asm: x86.ABTRQ,
8975 reg: regInfo{
8976 inputs: []inputInfo{
8977 {0, 49135},
8978 },
8979 outputs: []outputInfo{
8980 {0, 49135},
8981 },
8982 },
8983 },
8984 {
8985 name: "BTSQconst",
8986 auxType: auxInt8,
8987 argLen: 1,
8988 resultInArg0: true,
8989 clobberFlags: true,
8990 asm: x86.ABTSQ,
8991 reg: regInfo{
8992 inputs: []inputInfo{
8993 {0, 49135},
8994 },
8995 outputs: []outputInfo{
8996 {0, 49135},
8997 },
8998 },
8999 },
9000 {
9001 name: "BTSQconstmodify",
9002 auxType: auxSymValAndOff,
9003 argLen: 2,
9004 clobberFlags: true,
9005 faultOnNilArg0: true,
9006 symEffect: SymRead | SymWrite,
9007 asm: x86.ABTSQ,
9008 reg: regInfo{
9009 inputs: []inputInfo{
9010 {0, 4295032831},
9011 },
9012 },
9013 },
9014 {
9015 name: "BTRQconstmodify",
9016 auxType: auxSymValAndOff,
9017 argLen: 2,
9018 clobberFlags: true,
9019 faultOnNilArg0: true,
9020 symEffect: SymRead | SymWrite,
9021 asm: x86.ABTRQ,
9022 reg: regInfo{
9023 inputs: []inputInfo{
9024 {0, 4295032831},
9025 },
9026 },
9027 },
9028 {
9029 name: "BTCQconstmodify",
9030 auxType: auxSymValAndOff,
9031 argLen: 2,
9032 clobberFlags: true,
9033 faultOnNilArg0: true,
9034 symEffect: SymRead | SymWrite,
9035 asm: x86.ABTCQ,
9036 reg: regInfo{
9037 inputs: []inputInfo{
9038 {0, 4295032831},
9039 },
9040 },
9041 },
9042 {
9043 name: "TESTQ",
9044 argLen: 2,
9045 commutative: true,
9046 asm: x86.ATESTQ,
9047 reg: regInfo{
9048 inputs: []inputInfo{
9049 {0, 49151},
9050 {1, 49151},
9051 },
9052 },
9053 },
9054 {
9055 name: "TESTL",
9056 argLen: 2,
9057 commutative: true,
9058 asm: x86.ATESTL,
9059 reg: regInfo{
9060 inputs: []inputInfo{
9061 {0, 49151},
9062 {1, 49151},
9063 },
9064 },
9065 },
9066 {
9067 name: "TESTW",
9068 argLen: 2,
9069 commutative: true,
9070 asm: x86.ATESTW,
9071 reg: regInfo{
9072 inputs: []inputInfo{
9073 {0, 49151},
9074 {1, 49151},
9075 },
9076 },
9077 },
9078 {
9079 name: "TESTB",
9080 argLen: 2,
9081 commutative: true,
9082 asm: x86.ATESTB,
9083 reg: regInfo{
9084 inputs: []inputInfo{
9085 {0, 49151},
9086 {1, 49151},
9087 },
9088 },
9089 },
9090 {
9091 name: "TESTQconst",
9092 auxType: auxInt32,
9093 argLen: 1,
9094 asm: x86.ATESTQ,
9095 reg: regInfo{
9096 inputs: []inputInfo{
9097 {0, 49151},
9098 },
9099 },
9100 },
9101 {
9102 name: "TESTLconst",
9103 auxType: auxInt32,
9104 argLen: 1,
9105 asm: x86.ATESTL,
9106 reg: regInfo{
9107 inputs: []inputInfo{
9108 {0, 49151},
9109 },
9110 },
9111 },
9112 {
9113 name: "TESTWconst",
9114 auxType: auxInt16,
9115 argLen: 1,
9116 asm: x86.ATESTW,
9117 reg: regInfo{
9118 inputs: []inputInfo{
9119 {0, 49151},
9120 },
9121 },
9122 },
9123 {
9124 name: "TESTBconst",
9125 auxType: auxInt8,
9126 argLen: 1,
9127 asm: x86.ATESTB,
9128 reg: regInfo{
9129 inputs: []inputInfo{
9130 {0, 49151},
9131 },
9132 },
9133 },
9134 {
9135 name: "SHLQ",
9136 argLen: 2,
9137 resultInArg0: true,
9138 clobberFlags: true,
9139 asm: x86.ASHLQ,
9140 reg: regInfo{
9141 inputs: []inputInfo{
9142 {1, 2},
9143 {0, 49135},
9144 },
9145 outputs: []outputInfo{
9146 {0, 49135},
9147 },
9148 },
9149 },
9150 {
9151 name: "SHLL",
9152 argLen: 2,
9153 resultInArg0: true,
9154 clobberFlags: true,
9155 asm: x86.ASHLL,
9156 reg: regInfo{
9157 inputs: []inputInfo{
9158 {1, 2},
9159 {0, 49135},
9160 },
9161 outputs: []outputInfo{
9162 {0, 49135},
9163 },
9164 },
9165 },
9166 {
9167 name: "SHLQconst",
9168 auxType: auxInt8,
9169 argLen: 1,
9170 resultInArg0: true,
9171 clobberFlags: true,
9172 asm: x86.ASHLQ,
9173 reg: regInfo{
9174 inputs: []inputInfo{
9175 {0, 49135},
9176 },
9177 outputs: []outputInfo{
9178 {0, 49135},
9179 },
9180 },
9181 },
9182 {
9183 name: "SHLLconst",
9184 auxType: auxInt8,
9185 argLen: 1,
9186 resultInArg0: true,
9187 clobberFlags: true,
9188 asm: x86.ASHLL,
9189 reg: regInfo{
9190 inputs: []inputInfo{
9191 {0, 49135},
9192 },
9193 outputs: []outputInfo{
9194 {0, 49135},
9195 },
9196 },
9197 },
9198 {
9199 name: "SHRQ",
9200 argLen: 2,
9201 resultInArg0: true,
9202 clobberFlags: true,
9203 asm: x86.ASHRQ,
9204 reg: regInfo{
9205 inputs: []inputInfo{
9206 {1, 2},
9207 {0, 49135},
9208 },
9209 outputs: []outputInfo{
9210 {0, 49135},
9211 },
9212 },
9213 },
9214 {
9215 name: "SHRL",
9216 argLen: 2,
9217 resultInArg0: true,
9218 clobberFlags: true,
9219 asm: x86.ASHRL,
9220 reg: regInfo{
9221 inputs: []inputInfo{
9222 {1, 2},
9223 {0, 49135},
9224 },
9225 outputs: []outputInfo{
9226 {0, 49135},
9227 },
9228 },
9229 },
9230 {
9231 name: "SHRW",
9232 argLen: 2,
9233 resultInArg0: true,
9234 clobberFlags: true,
9235 asm: x86.ASHRW,
9236 reg: regInfo{
9237 inputs: []inputInfo{
9238 {1, 2},
9239 {0, 49135},
9240 },
9241 outputs: []outputInfo{
9242 {0, 49135},
9243 },
9244 },
9245 },
9246 {
9247 name: "SHRB",
9248 argLen: 2,
9249 resultInArg0: true,
9250 clobberFlags: true,
9251 asm: x86.ASHRB,
9252 reg: regInfo{
9253 inputs: []inputInfo{
9254 {1, 2},
9255 {0, 49135},
9256 },
9257 outputs: []outputInfo{
9258 {0, 49135},
9259 },
9260 },
9261 },
9262 {
9263 name: "SHRQconst",
9264 auxType: auxInt8,
9265 argLen: 1,
9266 resultInArg0: true,
9267 clobberFlags: true,
9268 asm: x86.ASHRQ,
9269 reg: regInfo{
9270 inputs: []inputInfo{
9271 {0, 49135},
9272 },
9273 outputs: []outputInfo{
9274 {0, 49135},
9275 },
9276 },
9277 },
9278 {
9279 name: "SHRLconst",
9280 auxType: auxInt8,
9281 argLen: 1,
9282 resultInArg0: true,
9283 clobberFlags: true,
9284 asm: x86.ASHRL,
9285 reg: regInfo{
9286 inputs: []inputInfo{
9287 {0, 49135},
9288 },
9289 outputs: []outputInfo{
9290 {0, 49135},
9291 },
9292 },
9293 },
9294 {
9295 name: "SHRWconst",
9296 auxType: auxInt8,
9297 argLen: 1,
9298 resultInArg0: true,
9299 clobberFlags: true,
9300 asm: x86.ASHRW,
9301 reg: regInfo{
9302 inputs: []inputInfo{
9303 {0, 49135},
9304 },
9305 outputs: []outputInfo{
9306 {0, 49135},
9307 },
9308 },
9309 },
9310 {
9311 name: "SHRBconst",
9312 auxType: auxInt8,
9313 argLen: 1,
9314 resultInArg0: true,
9315 clobberFlags: true,
9316 asm: x86.ASHRB,
9317 reg: regInfo{
9318 inputs: []inputInfo{
9319 {0, 49135},
9320 },
9321 outputs: []outputInfo{
9322 {0, 49135},
9323 },
9324 },
9325 },
9326 {
9327 name: "SARQ",
9328 argLen: 2,
9329 resultInArg0: true,
9330 clobberFlags: true,
9331 asm: x86.ASARQ,
9332 reg: regInfo{
9333 inputs: []inputInfo{
9334 {1, 2},
9335 {0, 49135},
9336 },
9337 outputs: []outputInfo{
9338 {0, 49135},
9339 },
9340 },
9341 },
9342 {
9343 name: "SARL",
9344 argLen: 2,
9345 resultInArg0: true,
9346 clobberFlags: true,
9347 asm: x86.ASARL,
9348 reg: regInfo{
9349 inputs: []inputInfo{
9350 {1, 2},
9351 {0, 49135},
9352 },
9353 outputs: []outputInfo{
9354 {0, 49135},
9355 },
9356 },
9357 },
9358 {
9359 name: "SARW",
9360 argLen: 2,
9361 resultInArg0: true,
9362 clobberFlags: true,
9363 asm: x86.ASARW,
9364 reg: regInfo{
9365 inputs: []inputInfo{
9366 {1, 2},
9367 {0, 49135},
9368 },
9369 outputs: []outputInfo{
9370 {0, 49135},
9371 },
9372 },
9373 },
9374 {
9375 name: "SARB",
9376 argLen: 2,
9377 resultInArg0: true,
9378 clobberFlags: true,
9379 asm: x86.ASARB,
9380 reg: regInfo{
9381 inputs: []inputInfo{
9382 {1, 2},
9383 {0, 49135},
9384 },
9385 outputs: []outputInfo{
9386 {0, 49135},
9387 },
9388 },
9389 },
9390 {
9391 name: "SARQconst",
9392 auxType: auxInt8,
9393 argLen: 1,
9394 resultInArg0: true,
9395 clobberFlags: true,
9396 asm: x86.ASARQ,
9397 reg: regInfo{
9398 inputs: []inputInfo{
9399 {0, 49135},
9400 },
9401 outputs: []outputInfo{
9402 {0, 49135},
9403 },
9404 },
9405 },
9406 {
9407 name: "SARLconst",
9408 auxType: auxInt8,
9409 argLen: 1,
9410 resultInArg0: true,
9411 clobberFlags: true,
9412 asm: x86.ASARL,
9413 reg: regInfo{
9414 inputs: []inputInfo{
9415 {0, 49135},
9416 },
9417 outputs: []outputInfo{
9418 {0, 49135},
9419 },
9420 },
9421 },
9422 {
9423 name: "SARWconst",
9424 auxType: auxInt8,
9425 argLen: 1,
9426 resultInArg0: true,
9427 clobberFlags: true,
9428 asm: x86.ASARW,
9429 reg: regInfo{
9430 inputs: []inputInfo{
9431 {0, 49135},
9432 },
9433 outputs: []outputInfo{
9434 {0, 49135},
9435 },
9436 },
9437 },
9438 {
9439 name: "SARBconst",
9440 auxType: auxInt8,
9441 argLen: 1,
9442 resultInArg0: true,
9443 clobberFlags: true,
9444 asm: x86.ASARB,
9445 reg: regInfo{
9446 inputs: []inputInfo{
9447 {0, 49135},
9448 },
9449 outputs: []outputInfo{
9450 {0, 49135},
9451 },
9452 },
9453 },
9454 {
9455 name: "SHRDQ",
9456 argLen: 3,
9457 resultInArg0: true,
9458 clobberFlags: true,
9459 asm: x86.ASHRQ,
9460 reg: regInfo{
9461 inputs: []inputInfo{
9462 {2, 2},
9463 {0, 49135},
9464 {1, 49135},
9465 },
9466 outputs: []outputInfo{
9467 {0, 49135},
9468 },
9469 },
9470 },
9471 {
9472 name: "SHLDQ",
9473 argLen: 3,
9474 resultInArg0: true,
9475 clobberFlags: true,
9476 asm: x86.ASHLQ,
9477 reg: regInfo{
9478 inputs: []inputInfo{
9479 {2, 2},
9480 {0, 49135},
9481 {1, 49135},
9482 },
9483 outputs: []outputInfo{
9484 {0, 49135},
9485 },
9486 },
9487 },
9488 {
9489 name: "ROLQ",
9490 argLen: 2,
9491 resultInArg0: true,
9492 clobberFlags: true,
9493 asm: x86.AROLQ,
9494 reg: regInfo{
9495 inputs: []inputInfo{
9496 {1, 2},
9497 {0, 49135},
9498 },
9499 outputs: []outputInfo{
9500 {0, 49135},
9501 },
9502 },
9503 },
9504 {
9505 name: "ROLL",
9506 argLen: 2,
9507 resultInArg0: true,
9508 clobberFlags: true,
9509 asm: x86.AROLL,
9510 reg: regInfo{
9511 inputs: []inputInfo{
9512 {1, 2},
9513 {0, 49135},
9514 },
9515 outputs: []outputInfo{
9516 {0, 49135},
9517 },
9518 },
9519 },
9520 {
9521 name: "ROLW",
9522 argLen: 2,
9523 resultInArg0: true,
9524 clobberFlags: true,
9525 asm: x86.AROLW,
9526 reg: regInfo{
9527 inputs: []inputInfo{
9528 {1, 2},
9529 {0, 49135},
9530 },
9531 outputs: []outputInfo{
9532 {0, 49135},
9533 },
9534 },
9535 },
9536 {
9537 name: "ROLB",
9538 argLen: 2,
9539 resultInArg0: true,
9540 clobberFlags: true,
9541 asm: x86.AROLB,
9542 reg: regInfo{
9543 inputs: []inputInfo{
9544 {1, 2},
9545 {0, 49135},
9546 },
9547 outputs: []outputInfo{
9548 {0, 49135},
9549 },
9550 },
9551 },
9552 {
9553 name: "RORQ",
9554 argLen: 2,
9555 resultInArg0: true,
9556 clobberFlags: true,
9557 asm: x86.ARORQ,
9558 reg: regInfo{
9559 inputs: []inputInfo{
9560 {1, 2},
9561 {0, 49135},
9562 },
9563 outputs: []outputInfo{
9564 {0, 49135},
9565 },
9566 },
9567 },
9568 {
9569 name: "RORL",
9570 argLen: 2,
9571 resultInArg0: true,
9572 clobberFlags: true,
9573 asm: x86.ARORL,
9574 reg: regInfo{
9575 inputs: []inputInfo{
9576 {1, 2},
9577 {0, 49135},
9578 },
9579 outputs: []outputInfo{
9580 {0, 49135},
9581 },
9582 },
9583 },
9584 {
9585 name: "RORW",
9586 argLen: 2,
9587 resultInArg0: true,
9588 clobberFlags: true,
9589 asm: x86.ARORW,
9590 reg: regInfo{
9591 inputs: []inputInfo{
9592 {1, 2},
9593 {0, 49135},
9594 },
9595 outputs: []outputInfo{
9596 {0, 49135},
9597 },
9598 },
9599 },
9600 {
9601 name: "RORB",
9602 argLen: 2,
9603 resultInArg0: true,
9604 clobberFlags: true,
9605 asm: x86.ARORB,
9606 reg: regInfo{
9607 inputs: []inputInfo{
9608 {1, 2},
9609 {0, 49135},
9610 },
9611 outputs: []outputInfo{
9612 {0, 49135},
9613 },
9614 },
9615 },
9616 {
9617 name: "ROLQconst",
9618 auxType: auxInt8,
9619 argLen: 1,
9620 resultInArg0: true,
9621 clobberFlags: true,
9622 asm: x86.AROLQ,
9623 reg: regInfo{
9624 inputs: []inputInfo{
9625 {0, 49135},
9626 },
9627 outputs: []outputInfo{
9628 {0, 49135},
9629 },
9630 },
9631 },
9632 {
9633 name: "ROLLconst",
9634 auxType: auxInt8,
9635 argLen: 1,
9636 resultInArg0: true,
9637 clobberFlags: true,
9638 asm: x86.AROLL,
9639 reg: regInfo{
9640 inputs: []inputInfo{
9641 {0, 49135},
9642 },
9643 outputs: []outputInfo{
9644 {0, 49135},
9645 },
9646 },
9647 },
9648 {
9649 name: "ROLWconst",
9650 auxType: auxInt8,
9651 argLen: 1,
9652 resultInArg0: true,
9653 clobberFlags: true,
9654 asm: x86.AROLW,
9655 reg: regInfo{
9656 inputs: []inputInfo{
9657 {0, 49135},
9658 },
9659 outputs: []outputInfo{
9660 {0, 49135},
9661 },
9662 },
9663 },
9664 {
9665 name: "ROLBconst",
9666 auxType: auxInt8,
9667 argLen: 1,
9668 resultInArg0: true,
9669 clobberFlags: true,
9670 asm: x86.AROLB,
9671 reg: regInfo{
9672 inputs: []inputInfo{
9673 {0, 49135},
9674 },
9675 outputs: []outputInfo{
9676 {0, 49135},
9677 },
9678 },
9679 },
9680 {
9681 name: "ADDLload",
9682 auxType: auxSymOff,
9683 argLen: 3,
9684 resultInArg0: true,
9685 clobberFlags: true,
9686 faultOnNilArg1: true,
9687 symEffect: SymRead,
9688 asm: x86.AADDL,
9689 reg: regInfo{
9690 inputs: []inputInfo{
9691 {0, 49135},
9692 {1, 4295032831},
9693 },
9694 outputs: []outputInfo{
9695 {0, 49135},
9696 },
9697 },
9698 },
9699 {
9700 name: "ADDQload",
9701 auxType: auxSymOff,
9702 argLen: 3,
9703 resultInArg0: true,
9704 clobberFlags: true,
9705 faultOnNilArg1: true,
9706 symEffect: SymRead,
9707 asm: x86.AADDQ,
9708 reg: regInfo{
9709 inputs: []inputInfo{
9710 {0, 49135},
9711 {1, 4295032831},
9712 },
9713 outputs: []outputInfo{
9714 {0, 49135},
9715 },
9716 },
9717 },
9718 {
9719 name: "SUBQload",
9720 auxType: auxSymOff,
9721 argLen: 3,
9722 resultInArg0: true,
9723 clobberFlags: true,
9724 faultOnNilArg1: true,
9725 symEffect: SymRead,
9726 asm: x86.ASUBQ,
9727 reg: regInfo{
9728 inputs: []inputInfo{
9729 {0, 49135},
9730 {1, 4295032831},
9731 },
9732 outputs: []outputInfo{
9733 {0, 49135},
9734 },
9735 },
9736 },
9737 {
9738 name: "SUBLload",
9739 auxType: auxSymOff,
9740 argLen: 3,
9741 resultInArg0: true,
9742 clobberFlags: true,
9743 faultOnNilArg1: true,
9744 symEffect: SymRead,
9745 asm: x86.ASUBL,
9746 reg: regInfo{
9747 inputs: []inputInfo{
9748 {0, 49135},
9749 {1, 4295032831},
9750 },
9751 outputs: []outputInfo{
9752 {0, 49135},
9753 },
9754 },
9755 },
9756 {
9757 name: "ANDLload",
9758 auxType: auxSymOff,
9759 argLen: 3,
9760 resultInArg0: true,
9761 clobberFlags: true,
9762 faultOnNilArg1: true,
9763 symEffect: SymRead,
9764 asm: x86.AANDL,
9765 reg: regInfo{
9766 inputs: []inputInfo{
9767 {0, 49135},
9768 {1, 4295032831},
9769 },
9770 outputs: []outputInfo{
9771 {0, 49135},
9772 },
9773 },
9774 },
9775 {
9776 name: "ANDQload",
9777 auxType: auxSymOff,
9778 argLen: 3,
9779 resultInArg0: true,
9780 clobberFlags: true,
9781 faultOnNilArg1: true,
9782 symEffect: SymRead,
9783 asm: x86.AANDQ,
9784 reg: regInfo{
9785 inputs: []inputInfo{
9786 {0, 49135},
9787 {1, 4295032831},
9788 },
9789 outputs: []outputInfo{
9790 {0, 49135},
9791 },
9792 },
9793 },
9794 {
9795 name: "ORQload",
9796 auxType: auxSymOff,
9797 argLen: 3,
9798 resultInArg0: true,
9799 clobberFlags: true,
9800 faultOnNilArg1: true,
9801 symEffect: SymRead,
9802 asm: x86.AORQ,
9803 reg: regInfo{
9804 inputs: []inputInfo{
9805 {0, 49135},
9806 {1, 4295032831},
9807 },
9808 outputs: []outputInfo{
9809 {0, 49135},
9810 },
9811 },
9812 },
9813 {
9814 name: "ORLload",
9815 auxType: auxSymOff,
9816 argLen: 3,
9817 resultInArg0: true,
9818 clobberFlags: true,
9819 faultOnNilArg1: true,
9820 symEffect: SymRead,
9821 asm: x86.AORL,
9822 reg: regInfo{
9823 inputs: []inputInfo{
9824 {0, 49135},
9825 {1, 4295032831},
9826 },
9827 outputs: []outputInfo{
9828 {0, 49135},
9829 },
9830 },
9831 },
9832 {
9833 name: "XORQload",
9834 auxType: auxSymOff,
9835 argLen: 3,
9836 resultInArg0: true,
9837 clobberFlags: true,
9838 faultOnNilArg1: true,
9839 symEffect: SymRead,
9840 asm: x86.AXORQ,
9841 reg: regInfo{
9842 inputs: []inputInfo{
9843 {0, 49135},
9844 {1, 4295032831},
9845 },
9846 outputs: []outputInfo{
9847 {0, 49135},
9848 },
9849 },
9850 },
9851 {
9852 name: "XORLload",
9853 auxType: auxSymOff,
9854 argLen: 3,
9855 resultInArg0: true,
9856 clobberFlags: true,
9857 faultOnNilArg1: true,
9858 symEffect: SymRead,
9859 asm: x86.AXORL,
9860 reg: regInfo{
9861 inputs: []inputInfo{
9862 {0, 49135},
9863 {1, 4295032831},
9864 },
9865 outputs: []outputInfo{
9866 {0, 49135},
9867 },
9868 },
9869 },
9870 {
9871 name: "ADDLloadidx1",
9872 auxType: auxSymOff,
9873 argLen: 4,
9874 resultInArg0: true,
9875 clobberFlags: true,
9876 symEffect: SymRead,
9877 asm: x86.AADDL,
9878 scale: 1,
9879 reg: regInfo{
9880 inputs: []inputInfo{
9881 {0, 49135},
9882 {2, 49151},
9883 {1, 4295032831},
9884 },
9885 outputs: []outputInfo{
9886 {0, 49135},
9887 },
9888 },
9889 },
9890 {
9891 name: "ADDLloadidx4",
9892 auxType: auxSymOff,
9893 argLen: 4,
9894 resultInArg0: true,
9895 clobberFlags: true,
9896 symEffect: SymRead,
9897 asm: x86.AADDL,
9898 scale: 4,
9899 reg: regInfo{
9900 inputs: []inputInfo{
9901 {0, 49135},
9902 {2, 49151},
9903 {1, 4295032831},
9904 },
9905 outputs: []outputInfo{
9906 {0, 49135},
9907 },
9908 },
9909 },
9910 {
9911 name: "ADDLloadidx8",
9912 auxType: auxSymOff,
9913 argLen: 4,
9914 resultInArg0: true,
9915 clobberFlags: true,
9916 symEffect: SymRead,
9917 asm: x86.AADDL,
9918 scale: 8,
9919 reg: regInfo{
9920 inputs: []inputInfo{
9921 {0, 49135},
9922 {2, 49151},
9923 {1, 4295032831},
9924 },
9925 outputs: []outputInfo{
9926 {0, 49135},
9927 },
9928 },
9929 },
9930 {
9931 name: "ADDQloadidx1",
9932 auxType: auxSymOff,
9933 argLen: 4,
9934 resultInArg0: true,
9935 clobberFlags: true,
9936 symEffect: SymRead,
9937 asm: x86.AADDQ,
9938 scale: 1,
9939 reg: regInfo{
9940 inputs: []inputInfo{
9941 {0, 49135},
9942 {2, 49151},
9943 {1, 4295032831},
9944 },
9945 outputs: []outputInfo{
9946 {0, 49135},
9947 },
9948 },
9949 },
9950 {
9951 name: "ADDQloadidx8",
9952 auxType: auxSymOff,
9953 argLen: 4,
9954 resultInArg0: true,
9955 clobberFlags: true,
9956 symEffect: SymRead,
9957 asm: x86.AADDQ,
9958 scale: 8,
9959 reg: regInfo{
9960 inputs: []inputInfo{
9961 {0, 49135},
9962 {2, 49151},
9963 {1, 4295032831},
9964 },
9965 outputs: []outputInfo{
9966 {0, 49135},
9967 },
9968 },
9969 },
9970 {
9971 name: "SUBLloadidx1",
9972 auxType: auxSymOff,
9973 argLen: 4,
9974 resultInArg0: true,
9975 clobberFlags: true,
9976 symEffect: SymRead,
9977 asm: x86.ASUBL,
9978 scale: 1,
9979 reg: regInfo{
9980 inputs: []inputInfo{
9981 {0, 49135},
9982 {2, 49151},
9983 {1, 4295032831},
9984 },
9985 outputs: []outputInfo{
9986 {0, 49135},
9987 },
9988 },
9989 },
9990 {
9991 name: "SUBLloadidx4",
9992 auxType: auxSymOff,
9993 argLen: 4,
9994 resultInArg0: true,
9995 clobberFlags: true,
9996 symEffect: SymRead,
9997 asm: x86.ASUBL,
9998 scale: 4,
9999 reg: regInfo{
10000 inputs: []inputInfo{
10001 {0, 49135},
10002 {2, 49151},
10003 {1, 4295032831},
10004 },
10005 outputs: []outputInfo{
10006 {0, 49135},
10007 },
10008 },
10009 },
10010 {
10011 name: "SUBLloadidx8",
10012 auxType: auxSymOff,
10013 argLen: 4,
10014 resultInArg0: true,
10015 clobberFlags: true,
10016 symEffect: SymRead,
10017 asm: x86.ASUBL,
10018 scale: 8,
10019 reg: regInfo{
10020 inputs: []inputInfo{
10021 {0, 49135},
10022 {2, 49151},
10023 {1, 4295032831},
10024 },
10025 outputs: []outputInfo{
10026 {0, 49135},
10027 },
10028 },
10029 },
10030 {
10031 name: "SUBQloadidx1",
10032 auxType: auxSymOff,
10033 argLen: 4,
10034 resultInArg0: true,
10035 clobberFlags: true,
10036 symEffect: SymRead,
10037 asm: x86.ASUBQ,
10038 scale: 1,
10039 reg: regInfo{
10040 inputs: []inputInfo{
10041 {0, 49135},
10042 {2, 49151},
10043 {1, 4295032831},
10044 },
10045 outputs: []outputInfo{
10046 {0, 49135},
10047 },
10048 },
10049 },
10050 {
10051 name: "SUBQloadidx8",
10052 auxType: auxSymOff,
10053 argLen: 4,
10054 resultInArg0: true,
10055 clobberFlags: true,
10056 symEffect: SymRead,
10057 asm: x86.ASUBQ,
10058 scale: 8,
10059 reg: regInfo{
10060 inputs: []inputInfo{
10061 {0, 49135},
10062 {2, 49151},
10063 {1, 4295032831},
10064 },
10065 outputs: []outputInfo{
10066 {0, 49135},
10067 },
10068 },
10069 },
10070 {
10071 name: "ANDLloadidx1",
10072 auxType: auxSymOff,
10073 argLen: 4,
10074 resultInArg0: true,
10075 clobberFlags: true,
10076 symEffect: SymRead,
10077 asm: x86.AANDL,
10078 scale: 1,
10079 reg: regInfo{
10080 inputs: []inputInfo{
10081 {0, 49135},
10082 {2, 49151},
10083 {1, 4295032831},
10084 },
10085 outputs: []outputInfo{
10086 {0, 49135},
10087 },
10088 },
10089 },
10090 {
10091 name: "ANDLloadidx4",
10092 auxType: auxSymOff,
10093 argLen: 4,
10094 resultInArg0: true,
10095 clobberFlags: true,
10096 symEffect: SymRead,
10097 asm: x86.AANDL,
10098 scale: 4,
10099 reg: regInfo{
10100 inputs: []inputInfo{
10101 {0, 49135},
10102 {2, 49151},
10103 {1, 4295032831},
10104 },
10105 outputs: []outputInfo{
10106 {0, 49135},
10107 },
10108 },
10109 },
10110 {
10111 name: "ANDLloadidx8",
10112 auxType: auxSymOff,
10113 argLen: 4,
10114 resultInArg0: true,
10115 clobberFlags: true,
10116 symEffect: SymRead,
10117 asm: x86.AANDL,
10118 scale: 8,
10119 reg: regInfo{
10120 inputs: []inputInfo{
10121 {0, 49135},
10122 {2, 49151},
10123 {1, 4295032831},
10124 },
10125 outputs: []outputInfo{
10126 {0, 49135},
10127 },
10128 },
10129 },
10130 {
10131 name: "ANDQloadidx1",
10132 auxType: auxSymOff,
10133 argLen: 4,
10134 resultInArg0: true,
10135 clobberFlags: true,
10136 symEffect: SymRead,
10137 asm: x86.AANDQ,
10138 scale: 1,
10139 reg: regInfo{
10140 inputs: []inputInfo{
10141 {0, 49135},
10142 {2, 49151},
10143 {1, 4295032831},
10144 },
10145 outputs: []outputInfo{
10146 {0, 49135},
10147 },
10148 },
10149 },
10150 {
10151 name: "ANDQloadidx8",
10152 auxType: auxSymOff,
10153 argLen: 4,
10154 resultInArg0: true,
10155 clobberFlags: true,
10156 symEffect: SymRead,
10157 asm: x86.AANDQ,
10158 scale: 8,
10159 reg: regInfo{
10160 inputs: []inputInfo{
10161 {0, 49135},
10162 {2, 49151},
10163 {1, 4295032831},
10164 },
10165 outputs: []outputInfo{
10166 {0, 49135},
10167 },
10168 },
10169 },
10170 {
10171 name: "ORLloadidx1",
10172 auxType: auxSymOff,
10173 argLen: 4,
10174 resultInArg0: true,
10175 clobberFlags: true,
10176 symEffect: SymRead,
10177 asm: x86.AORL,
10178 scale: 1,
10179 reg: regInfo{
10180 inputs: []inputInfo{
10181 {0, 49135},
10182 {2, 49151},
10183 {1, 4295032831},
10184 },
10185 outputs: []outputInfo{
10186 {0, 49135},
10187 },
10188 },
10189 },
10190 {
10191 name: "ORLloadidx4",
10192 auxType: auxSymOff,
10193 argLen: 4,
10194 resultInArg0: true,
10195 clobberFlags: true,
10196 symEffect: SymRead,
10197 asm: x86.AORL,
10198 scale: 4,
10199 reg: regInfo{
10200 inputs: []inputInfo{
10201 {0, 49135},
10202 {2, 49151},
10203 {1, 4295032831},
10204 },
10205 outputs: []outputInfo{
10206 {0, 49135},
10207 },
10208 },
10209 },
10210 {
10211 name: "ORLloadidx8",
10212 auxType: auxSymOff,
10213 argLen: 4,
10214 resultInArg0: true,
10215 clobberFlags: true,
10216 symEffect: SymRead,
10217 asm: x86.AORL,
10218 scale: 8,
10219 reg: regInfo{
10220 inputs: []inputInfo{
10221 {0, 49135},
10222 {2, 49151},
10223 {1, 4295032831},
10224 },
10225 outputs: []outputInfo{
10226 {0, 49135},
10227 },
10228 },
10229 },
10230 {
10231 name: "ORQloadidx1",
10232 auxType: auxSymOff,
10233 argLen: 4,
10234 resultInArg0: true,
10235 clobberFlags: true,
10236 symEffect: SymRead,
10237 asm: x86.AORQ,
10238 scale: 1,
10239 reg: regInfo{
10240 inputs: []inputInfo{
10241 {0, 49135},
10242 {2, 49151},
10243 {1, 4295032831},
10244 },
10245 outputs: []outputInfo{
10246 {0, 49135},
10247 },
10248 },
10249 },
10250 {
10251 name: "ORQloadidx8",
10252 auxType: auxSymOff,
10253 argLen: 4,
10254 resultInArg0: true,
10255 clobberFlags: true,
10256 symEffect: SymRead,
10257 asm: x86.AORQ,
10258 scale: 8,
10259 reg: regInfo{
10260 inputs: []inputInfo{
10261 {0, 49135},
10262 {2, 49151},
10263 {1, 4295032831},
10264 },
10265 outputs: []outputInfo{
10266 {0, 49135},
10267 },
10268 },
10269 },
10270 {
10271 name: "XORLloadidx1",
10272 auxType: auxSymOff,
10273 argLen: 4,
10274 resultInArg0: true,
10275 clobberFlags: true,
10276 symEffect: SymRead,
10277 asm: x86.AXORL,
10278 scale: 1,
10279 reg: regInfo{
10280 inputs: []inputInfo{
10281 {0, 49135},
10282 {2, 49151},
10283 {1, 4295032831},
10284 },
10285 outputs: []outputInfo{
10286 {0, 49135},
10287 },
10288 },
10289 },
10290 {
10291 name: "XORLloadidx4",
10292 auxType: auxSymOff,
10293 argLen: 4,
10294 resultInArg0: true,
10295 clobberFlags: true,
10296 symEffect: SymRead,
10297 asm: x86.AXORL,
10298 scale: 4,
10299 reg: regInfo{
10300 inputs: []inputInfo{
10301 {0, 49135},
10302 {2, 49151},
10303 {1, 4295032831},
10304 },
10305 outputs: []outputInfo{
10306 {0, 49135},
10307 },
10308 },
10309 },
10310 {
10311 name: "XORLloadidx8",
10312 auxType: auxSymOff,
10313 argLen: 4,
10314 resultInArg0: true,
10315 clobberFlags: true,
10316 symEffect: SymRead,
10317 asm: x86.AXORL,
10318 scale: 8,
10319 reg: regInfo{
10320 inputs: []inputInfo{
10321 {0, 49135},
10322 {2, 49151},
10323 {1, 4295032831},
10324 },
10325 outputs: []outputInfo{
10326 {0, 49135},
10327 },
10328 },
10329 },
10330 {
10331 name: "XORQloadidx1",
10332 auxType: auxSymOff,
10333 argLen: 4,
10334 resultInArg0: true,
10335 clobberFlags: true,
10336 symEffect: SymRead,
10337 asm: x86.AXORQ,
10338 scale: 1,
10339 reg: regInfo{
10340 inputs: []inputInfo{
10341 {0, 49135},
10342 {2, 49151},
10343 {1, 4295032831},
10344 },
10345 outputs: []outputInfo{
10346 {0, 49135},
10347 },
10348 },
10349 },
10350 {
10351 name: "XORQloadidx8",
10352 auxType: auxSymOff,
10353 argLen: 4,
10354 resultInArg0: true,
10355 clobberFlags: true,
10356 symEffect: SymRead,
10357 asm: x86.AXORQ,
10358 scale: 8,
10359 reg: regInfo{
10360 inputs: []inputInfo{
10361 {0, 49135},
10362 {2, 49151},
10363 {1, 4295032831},
10364 },
10365 outputs: []outputInfo{
10366 {0, 49135},
10367 },
10368 },
10369 },
10370 {
10371 name: "ADDQmodify",
10372 auxType: auxSymOff,
10373 argLen: 3,
10374 clobberFlags: true,
10375 faultOnNilArg0: true,
10376 symEffect: SymRead | SymWrite,
10377 asm: x86.AADDQ,
10378 reg: regInfo{
10379 inputs: []inputInfo{
10380 {1, 49151},
10381 {0, 4295032831},
10382 },
10383 },
10384 },
10385 {
10386 name: "SUBQmodify",
10387 auxType: auxSymOff,
10388 argLen: 3,
10389 clobberFlags: true,
10390 faultOnNilArg0: true,
10391 symEffect: SymRead | SymWrite,
10392 asm: x86.ASUBQ,
10393 reg: regInfo{
10394 inputs: []inputInfo{
10395 {1, 49151},
10396 {0, 4295032831},
10397 },
10398 },
10399 },
10400 {
10401 name: "ANDQmodify",
10402 auxType: auxSymOff,
10403 argLen: 3,
10404 clobberFlags: true,
10405 faultOnNilArg0: true,
10406 symEffect: SymRead | SymWrite,
10407 asm: x86.AANDQ,
10408 reg: regInfo{
10409 inputs: []inputInfo{
10410 {1, 49151},
10411 {0, 4295032831},
10412 },
10413 },
10414 },
10415 {
10416 name: "ORQmodify",
10417 auxType: auxSymOff,
10418 argLen: 3,
10419 clobberFlags: true,
10420 faultOnNilArg0: true,
10421 symEffect: SymRead | SymWrite,
10422 asm: x86.AORQ,
10423 reg: regInfo{
10424 inputs: []inputInfo{
10425 {1, 49151},
10426 {0, 4295032831},
10427 },
10428 },
10429 },
10430 {
10431 name: "XORQmodify",
10432 auxType: auxSymOff,
10433 argLen: 3,
10434 clobberFlags: true,
10435 faultOnNilArg0: true,
10436 symEffect: SymRead | SymWrite,
10437 asm: x86.AXORQ,
10438 reg: regInfo{
10439 inputs: []inputInfo{
10440 {1, 49151},
10441 {0, 4295032831},
10442 },
10443 },
10444 },
10445 {
10446 name: "ADDLmodify",
10447 auxType: auxSymOff,
10448 argLen: 3,
10449 clobberFlags: true,
10450 faultOnNilArg0: true,
10451 symEffect: SymRead | SymWrite,
10452 asm: x86.AADDL,
10453 reg: regInfo{
10454 inputs: []inputInfo{
10455 {1, 49151},
10456 {0, 4295032831},
10457 },
10458 },
10459 },
10460 {
10461 name: "SUBLmodify",
10462 auxType: auxSymOff,
10463 argLen: 3,
10464 clobberFlags: true,
10465 faultOnNilArg0: true,
10466 symEffect: SymRead | SymWrite,
10467 asm: x86.ASUBL,
10468 reg: regInfo{
10469 inputs: []inputInfo{
10470 {1, 49151},
10471 {0, 4295032831},
10472 },
10473 },
10474 },
10475 {
10476 name: "ANDLmodify",
10477 auxType: auxSymOff,
10478 argLen: 3,
10479 clobberFlags: true,
10480 faultOnNilArg0: true,
10481 symEffect: SymRead | SymWrite,
10482 asm: x86.AANDL,
10483 reg: regInfo{
10484 inputs: []inputInfo{
10485 {1, 49151},
10486 {0, 4295032831},
10487 },
10488 },
10489 },
10490 {
10491 name: "ORLmodify",
10492 auxType: auxSymOff,
10493 argLen: 3,
10494 clobberFlags: true,
10495 faultOnNilArg0: true,
10496 symEffect: SymRead | SymWrite,
10497 asm: x86.AORL,
10498 reg: regInfo{
10499 inputs: []inputInfo{
10500 {1, 49151},
10501 {0, 4295032831},
10502 },
10503 },
10504 },
10505 {
10506 name: "XORLmodify",
10507 auxType: auxSymOff,
10508 argLen: 3,
10509 clobberFlags: true,
10510 faultOnNilArg0: true,
10511 symEffect: SymRead | SymWrite,
10512 asm: x86.AXORL,
10513 reg: regInfo{
10514 inputs: []inputInfo{
10515 {1, 49151},
10516 {0, 4295032831},
10517 },
10518 },
10519 },
10520 {
10521 name: "ADDQmodifyidx1",
10522 auxType: auxSymOff,
10523 argLen: 4,
10524 clobberFlags: true,
10525 symEffect: SymRead | SymWrite,
10526 asm: x86.AADDQ,
10527 scale: 1,
10528 reg: regInfo{
10529 inputs: []inputInfo{
10530 {1, 49151},
10531 {2, 49151},
10532 {0, 4295032831},
10533 },
10534 },
10535 },
10536 {
10537 name: "ADDQmodifyidx8",
10538 auxType: auxSymOff,
10539 argLen: 4,
10540 clobberFlags: true,
10541 symEffect: SymRead | SymWrite,
10542 asm: x86.AADDQ,
10543 scale: 8,
10544 reg: regInfo{
10545 inputs: []inputInfo{
10546 {1, 49151},
10547 {2, 49151},
10548 {0, 4295032831},
10549 },
10550 },
10551 },
10552 {
10553 name: "SUBQmodifyidx1",
10554 auxType: auxSymOff,
10555 argLen: 4,
10556 clobberFlags: true,
10557 symEffect: SymRead | SymWrite,
10558 asm: x86.ASUBQ,
10559 scale: 1,
10560 reg: regInfo{
10561 inputs: []inputInfo{
10562 {1, 49151},
10563 {2, 49151},
10564 {0, 4295032831},
10565 },
10566 },
10567 },
10568 {
10569 name: "SUBQmodifyidx8",
10570 auxType: auxSymOff,
10571 argLen: 4,
10572 clobberFlags: true,
10573 symEffect: SymRead | SymWrite,
10574 asm: x86.ASUBQ,
10575 scale: 8,
10576 reg: regInfo{
10577 inputs: []inputInfo{
10578 {1, 49151},
10579 {2, 49151},
10580 {0, 4295032831},
10581 },
10582 },
10583 },
10584 {
10585 name: "ANDQmodifyidx1",
10586 auxType: auxSymOff,
10587 argLen: 4,
10588 clobberFlags: true,
10589 symEffect: SymRead | SymWrite,
10590 asm: x86.AANDQ,
10591 scale: 1,
10592 reg: regInfo{
10593 inputs: []inputInfo{
10594 {1, 49151},
10595 {2, 49151},
10596 {0, 4295032831},
10597 },
10598 },
10599 },
10600 {
10601 name: "ANDQmodifyidx8",
10602 auxType: auxSymOff,
10603 argLen: 4,
10604 clobberFlags: true,
10605 symEffect: SymRead | SymWrite,
10606 asm: x86.AANDQ,
10607 scale: 8,
10608 reg: regInfo{
10609 inputs: []inputInfo{
10610 {1, 49151},
10611 {2, 49151},
10612 {0, 4295032831},
10613 },
10614 },
10615 },
10616 {
10617 name: "ORQmodifyidx1",
10618 auxType: auxSymOff,
10619 argLen: 4,
10620 clobberFlags: true,
10621 symEffect: SymRead | SymWrite,
10622 asm: x86.AORQ,
10623 scale: 1,
10624 reg: regInfo{
10625 inputs: []inputInfo{
10626 {1, 49151},
10627 {2, 49151},
10628 {0, 4295032831},
10629 },
10630 },
10631 },
10632 {
10633 name: "ORQmodifyidx8",
10634 auxType: auxSymOff,
10635 argLen: 4,
10636 clobberFlags: true,
10637 symEffect: SymRead | SymWrite,
10638 asm: x86.AORQ,
10639 scale: 8,
10640 reg: regInfo{
10641 inputs: []inputInfo{
10642 {1, 49151},
10643 {2, 49151},
10644 {0, 4295032831},
10645 },
10646 },
10647 },
10648 {
10649 name: "XORQmodifyidx1",
10650 auxType: auxSymOff,
10651 argLen: 4,
10652 clobberFlags: true,
10653 symEffect: SymRead | SymWrite,
10654 asm: x86.AXORQ,
10655 scale: 1,
10656 reg: regInfo{
10657 inputs: []inputInfo{
10658 {1, 49151},
10659 {2, 49151},
10660 {0, 4295032831},
10661 },
10662 },
10663 },
10664 {
10665 name: "XORQmodifyidx8",
10666 auxType: auxSymOff,
10667 argLen: 4,
10668 clobberFlags: true,
10669 symEffect: SymRead | SymWrite,
10670 asm: x86.AXORQ,
10671 scale: 8,
10672 reg: regInfo{
10673 inputs: []inputInfo{
10674 {1, 49151},
10675 {2, 49151},
10676 {0, 4295032831},
10677 },
10678 },
10679 },
10680 {
10681 name: "ADDLmodifyidx1",
10682 auxType: auxSymOff,
10683 argLen: 4,
10684 clobberFlags: true,
10685 symEffect: SymRead | SymWrite,
10686 asm: x86.AADDL,
10687 scale: 1,
10688 reg: regInfo{
10689 inputs: []inputInfo{
10690 {1, 49151},
10691 {2, 49151},
10692 {0, 4295032831},
10693 },
10694 },
10695 },
10696 {
10697 name: "ADDLmodifyidx4",
10698 auxType: auxSymOff,
10699 argLen: 4,
10700 clobberFlags: true,
10701 symEffect: SymRead | SymWrite,
10702 asm: x86.AADDL,
10703 scale: 4,
10704 reg: regInfo{
10705 inputs: []inputInfo{
10706 {1, 49151},
10707 {2, 49151},
10708 {0, 4295032831},
10709 },
10710 },
10711 },
10712 {
10713 name: "ADDLmodifyidx8",
10714 auxType: auxSymOff,
10715 argLen: 4,
10716 clobberFlags: true,
10717 symEffect: SymRead | SymWrite,
10718 asm: x86.AADDL,
10719 scale: 8,
10720 reg: regInfo{
10721 inputs: []inputInfo{
10722 {1, 49151},
10723 {2, 49151},
10724 {0, 4295032831},
10725 },
10726 },
10727 },
10728 {
10729 name: "SUBLmodifyidx1",
10730 auxType: auxSymOff,
10731 argLen: 4,
10732 clobberFlags: true,
10733 symEffect: SymRead | SymWrite,
10734 asm: x86.ASUBL,
10735 scale: 1,
10736 reg: regInfo{
10737 inputs: []inputInfo{
10738 {1, 49151},
10739 {2, 49151},
10740 {0, 4295032831},
10741 },
10742 },
10743 },
10744 {
10745 name: "SUBLmodifyidx4",
10746 auxType: auxSymOff,
10747 argLen: 4,
10748 clobberFlags: true,
10749 symEffect: SymRead | SymWrite,
10750 asm: x86.ASUBL,
10751 scale: 4,
10752 reg: regInfo{
10753 inputs: []inputInfo{
10754 {1, 49151},
10755 {2, 49151},
10756 {0, 4295032831},
10757 },
10758 },
10759 },
10760 {
10761 name: "SUBLmodifyidx8",
10762 auxType: auxSymOff,
10763 argLen: 4,
10764 clobberFlags: true,
10765 symEffect: SymRead | SymWrite,
10766 asm: x86.ASUBL,
10767 scale: 8,
10768 reg: regInfo{
10769 inputs: []inputInfo{
10770 {1, 49151},
10771 {2, 49151},
10772 {0, 4295032831},
10773 },
10774 },
10775 },
10776 {
10777 name: "ANDLmodifyidx1",
10778 auxType: auxSymOff,
10779 argLen: 4,
10780 clobberFlags: true,
10781 symEffect: SymRead | SymWrite,
10782 asm: x86.AANDL,
10783 scale: 1,
10784 reg: regInfo{
10785 inputs: []inputInfo{
10786 {1, 49151},
10787 {2, 49151},
10788 {0, 4295032831},
10789 },
10790 },
10791 },
10792 {
10793 name: "ANDLmodifyidx4",
10794 auxType: auxSymOff,
10795 argLen: 4,
10796 clobberFlags: true,
10797 symEffect: SymRead | SymWrite,
10798 asm: x86.AANDL,
10799 scale: 4,
10800 reg: regInfo{
10801 inputs: []inputInfo{
10802 {1, 49151},
10803 {2, 49151},
10804 {0, 4295032831},
10805 },
10806 },
10807 },
10808 {
10809 name: "ANDLmodifyidx8",
10810 auxType: auxSymOff,
10811 argLen: 4,
10812 clobberFlags: true,
10813 symEffect: SymRead | SymWrite,
10814 asm: x86.AANDL,
10815 scale: 8,
10816 reg: regInfo{
10817 inputs: []inputInfo{
10818 {1, 49151},
10819 {2, 49151},
10820 {0, 4295032831},
10821 },
10822 },
10823 },
10824 {
10825 name: "ORLmodifyidx1",
10826 auxType: auxSymOff,
10827 argLen: 4,
10828 clobberFlags: true,
10829 symEffect: SymRead | SymWrite,
10830 asm: x86.AORL,
10831 scale: 1,
10832 reg: regInfo{
10833 inputs: []inputInfo{
10834 {1, 49151},
10835 {2, 49151},
10836 {0, 4295032831},
10837 },
10838 },
10839 },
10840 {
10841 name: "ORLmodifyidx4",
10842 auxType: auxSymOff,
10843 argLen: 4,
10844 clobberFlags: true,
10845 symEffect: SymRead | SymWrite,
10846 asm: x86.AORL,
10847 scale: 4,
10848 reg: regInfo{
10849 inputs: []inputInfo{
10850 {1, 49151},
10851 {2, 49151},
10852 {0, 4295032831},
10853 },
10854 },
10855 },
10856 {
10857 name: "ORLmodifyidx8",
10858 auxType: auxSymOff,
10859 argLen: 4,
10860 clobberFlags: true,
10861 symEffect: SymRead | SymWrite,
10862 asm: x86.AORL,
10863 scale: 8,
10864 reg: regInfo{
10865 inputs: []inputInfo{
10866 {1, 49151},
10867 {2, 49151},
10868 {0, 4295032831},
10869 },
10870 },
10871 },
10872 {
10873 name: "XORLmodifyidx1",
10874 auxType: auxSymOff,
10875 argLen: 4,
10876 clobberFlags: true,
10877 symEffect: SymRead | SymWrite,
10878 asm: x86.AXORL,
10879 scale: 1,
10880 reg: regInfo{
10881 inputs: []inputInfo{
10882 {1, 49151},
10883 {2, 49151},
10884 {0, 4295032831},
10885 },
10886 },
10887 },
10888 {
10889 name: "XORLmodifyidx4",
10890 auxType: auxSymOff,
10891 argLen: 4,
10892 clobberFlags: true,
10893 symEffect: SymRead | SymWrite,
10894 asm: x86.AXORL,
10895 scale: 4,
10896 reg: regInfo{
10897 inputs: []inputInfo{
10898 {1, 49151},
10899 {2, 49151},
10900 {0, 4295032831},
10901 },
10902 },
10903 },
10904 {
10905 name: "XORLmodifyidx8",
10906 auxType: auxSymOff,
10907 argLen: 4,
10908 clobberFlags: true,
10909 symEffect: SymRead | SymWrite,
10910 asm: x86.AXORL,
10911 scale: 8,
10912 reg: regInfo{
10913 inputs: []inputInfo{
10914 {1, 49151},
10915 {2, 49151},
10916 {0, 4295032831},
10917 },
10918 },
10919 },
10920 {
10921 name: "ADDQconstmodifyidx1",
10922 auxType: auxSymValAndOff,
10923 argLen: 3,
10924 clobberFlags: true,
10925 symEffect: SymRead | SymWrite,
10926 asm: x86.AADDQ,
10927 scale: 1,
10928 reg: regInfo{
10929 inputs: []inputInfo{
10930 {1, 49151},
10931 {0, 4295032831},
10932 },
10933 },
10934 },
10935 {
10936 name: "ADDQconstmodifyidx8",
10937 auxType: auxSymValAndOff,
10938 argLen: 3,
10939 clobberFlags: true,
10940 symEffect: SymRead | SymWrite,
10941 asm: x86.AADDQ,
10942 scale: 8,
10943 reg: regInfo{
10944 inputs: []inputInfo{
10945 {1, 49151},
10946 {0, 4295032831},
10947 },
10948 },
10949 },
10950 {
10951 name: "ANDQconstmodifyidx1",
10952 auxType: auxSymValAndOff,
10953 argLen: 3,
10954 clobberFlags: true,
10955 symEffect: SymRead | SymWrite,
10956 asm: x86.AANDQ,
10957 scale: 1,
10958 reg: regInfo{
10959 inputs: []inputInfo{
10960 {1, 49151},
10961 {0, 4295032831},
10962 },
10963 },
10964 },
10965 {
10966 name: "ANDQconstmodifyidx8",
10967 auxType: auxSymValAndOff,
10968 argLen: 3,
10969 clobberFlags: true,
10970 symEffect: SymRead | SymWrite,
10971 asm: x86.AANDQ,
10972 scale: 8,
10973 reg: regInfo{
10974 inputs: []inputInfo{
10975 {1, 49151},
10976 {0, 4295032831},
10977 },
10978 },
10979 },
10980 {
10981 name: "ORQconstmodifyidx1",
10982 auxType: auxSymValAndOff,
10983 argLen: 3,
10984 clobberFlags: true,
10985 symEffect: SymRead | SymWrite,
10986 asm: x86.AORQ,
10987 scale: 1,
10988 reg: regInfo{
10989 inputs: []inputInfo{
10990 {1, 49151},
10991 {0, 4295032831},
10992 },
10993 },
10994 },
10995 {
10996 name: "ORQconstmodifyidx8",
10997 auxType: auxSymValAndOff,
10998 argLen: 3,
10999 clobberFlags: true,
11000 symEffect: SymRead | SymWrite,
11001 asm: x86.AORQ,
11002 scale: 8,
11003 reg: regInfo{
11004 inputs: []inputInfo{
11005 {1, 49151},
11006 {0, 4295032831},
11007 },
11008 },
11009 },
11010 {
11011 name: "XORQconstmodifyidx1",
11012 auxType: auxSymValAndOff,
11013 argLen: 3,
11014 clobberFlags: true,
11015 symEffect: SymRead | SymWrite,
11016 asm: x86.AXORQ,
11017 scale: 1,
11018 reg: regInfo{
11019 inputs: []inputInfo{
11020 {1, 49151},
11021 {0, 4295032831},
11022 },
11023 },
11024 },
11025 {
11026 name: "XORQconstmodifyidx8",
11027 auxType: auxSymValAndOff,
11028 argLen: 3,
11029 clobberFlags: true,
11030 symEffect: SymRead | SymWrite,
11031 asm: x86.AXORQ,
11032 scale: 8,
11033 reg: regInfo{
11034 inputs: []inputInfo{
11035 {1, 49151},
11036 {0, 4295032831},
11037 },
11038 },
11039 },
11040 {
11041 name: "ADDLconstmodifyidx1",
11042 auxType: auxSymValAndOff,
11043 argLen: 3,
11044 clobberFlags: true,
11045 symEffect: SymRead | SymWrite,
11046 asm: x86.AADDL,
11047 scale: 1,
11048 reg: regInfo{
11049 inputs: []inputInfo{
11050 {1, 49151},
11051 {0, 4295032831},
11052 },
11053 },
11054 },
11055 {
11056 name: "ADDLconstmodifyidx4",
11057 auxType: auxSymValAndOff,
11058 argLen: 3,
11059 clobberFlags: true,
11060 symEffect: SymRead | SymWrite,
11061 asm: x86.AADDL,
11062 scale: 4,
11063 reg: regInfo{
11064 inputs: []inputInfo{
11065 {1, 49151},
11066 {0, 4295032831},
11067 },
11068 },
11069 },
11070 {
11071 name: "ADDLconstmodifyidx8",
11072 auxType: auxSymValAndOff,
11073 argLen: 3,
11074 clobberFlags: true,
11075 symEffect: SymRead | SymWrite,
11076 asm: x86.AADDL,
11077 scale: 8,
11078 reg: regInfo{
11079 inputs: []inputInfo{
11080 {1, 49151},
11081 {0, 4295032831},
11082 },
11083 },
11084 },
11085 {
11086 name: "ANDLconstmodifyidx1",
11087 auxType: auxSymValAndOff,
11088 argLen: 3,
11089 clobberFlags: true,
11090 symEffect: SymRead | SymWrite,
11091 asm: x86.AANDL,
11092 scale: 1,
11093 reg: regInfo{
11094 inputs: []inputInfo{
11095 {1, 49151},
11096 {0, 4295032831},
11097 },
11098 },
11099 },
11100 {
11101 name: "ANDLconstmodifyidx4",
11102 auxType: auxSymValAndOff,
11103 argLen: 3,
11104 clobberFlags: true,
11105 symEffect: SymRead | SymWrite,
11106 asm: x86.AANDL,
11107 scale: 4,
11108 reg: regInfo{
11109 inputs: []inputInfo{
11110 {1, 49151},
11111 {0, 4295032831},
11112 },
11113 },
11114 },
11115 {
11116 name: "ANDLconstmodifyidx8",
11117 auxType: auxSymValAndOff,
11118 argLen: 3,
11119 clobberFlags: true,
11120 symEffect: SymRead | SymWrite,
11121 asm: x86.AANDL,
11122 scale: 8,
11123 reg: regInfo{
11124 inputs: []inputInfo{
11125 {1, 49151},
11126 {0, 4295032831},
11127 },
11128 },
11129 },
11130 {
11131 name: "ORLconstmodifyidx1",
11132 auxType: auxSymValAndOff,
11133 argLen: 3,
11134 clobberFlags: true,
11135 symEffect: SymRead | SymWrite,
11136 asm: x86.AORL,
11137 scale: 1,
11138 reg: regInfo{
11139 inputs: []inputInfo{
11140 {1, 49151},
11141 {0, 4295032831},
11142 },
11143 },
11144 },
11145 {
11146 name: "ORLconstmodifyidx4",
11147 auxType: auxSymValAndOff,
11148 argLen: 3,
11149 clobberFlags: true,
11150 symEffect: SymRead | SymWrite,
11151 asm: x86.AORL,
11152 scale: 4,
11153 reg: regInfo{
11154 inputs: []inputInfo{
11155 {1, 49151},
11156 {0, 4295032831},
11157 },
11158 },
11159 },
11160 {
11161 name: "ORLconstmodifyidx8",
11162 auxType: auxSymValAndOff,
11163 argLen: 3,
11164 clobberFlags: true,
11165 symEffect: SymRead | SymWrite,
11166 asm: x86.AORL,
11167 scale: 8,
11168 reg: regInfo{
11169 inputs: []inputInfo{
11170 {1, 49151},
11171 {0, 4295032831},
11172 },
11173 },
11174 },
11175 {
11176 name: "XORLconstmodifyidx1",
11177 auxType: auxSymValAndOff,
11178 argLen: 3,
11179 clobberFlags: true,
11180 symEffect: SymRead | SymWrite,
11181 asm: x86.AXORL,
11182 scale: 1,
11183 reg: regInfo{
11184 inputs: []inputInfo{
11185 {1, 49151},
11186 {0, 4295032831},
11187 },
11188 },
11189 },
11190 {
11191 name: "XORLconstmodifyidx4",
11192 auxType: auxSymValAndOff,
11193 argLen: 3,
11194 clobberFlags: true,
11195 symEffect: SymRead | SymWrite,
11196 asm: x86.AXORL,
11197 scale: 4,
11198 reg: regInfo{
11199 inputs: []inputInfo{
11200 {1, 49151},
11201 {0, 4295032831},
11202 },
11203 },
11204 },
11205 {
11206 name: "XORLconstmodifyidx8",
11207 auxType: auxSymValAndOff,
11208 argLen: 3,
11209 clobberFlags: true,
11210 symEffect: SymRead | SymWrite,
11211 asm: x86.AXORL,
11212 scale: 8,
11213 reg: regInfo{
11214 inputs: []inputInfo{
11215 {1, 49151},
11216 {0, 4295032831},
11217 },
11218 },
11219 },
11220 {
11221 name: "NEGQ",
11222 argLen: 1,
11223 resultInArg0: true,
11224 clobberFlags: true,
11225 asm: x86.ANEGQ,
11226 reg: regInfo{
11227 inputs: []inputInfo{
11228 {0, 49135},
11229 },
11230 outputs: []outputInfo{
11231 {0, 49135},
11232 },
11233 },
11234 },
11235 {
11236 name: "NEGL",
11237 argLen: 1,
11238 resultInArg0: true,
11239 clobberFlags: true,
11240 asm: x86.ANEGL,
11241 reg: regInfo{
11242 inputs: []inputInfo{
11243 {0, 49135},
11244 },
11245 outputs: []outputInfo{
11246 {0, 49135},
11247 },
11248 },
11249 },
11250 {
11251 name: "NOTQ",
11252 argLen: 1,
11253 resultInArg0: true,
11254 asm: x86.ANOTQ,
11255 reg: regInfo{
11256 inputs: []inputInfo{
11257 {0, 49135},
11258 },
11259 outputs: []outputInfo{
11260 {0, 49135},
11261 },
11262 },
11263 },
11264 {
11265 name: "NOTL",
11266 argLen: 1,
11267 resultInArg0: true,
11268 asm: x86.ANOTL,
11269 reg: regInfo{
11270 inputs: []inputInfo{
11271 {0, 49135},
11272 },
11273 outputs: []outputInfo{
11274 {0, 49135},
11275 },
11276 },
11277 },
11278 {
11279 name: "BSFQ",
11280 argLen: 1,
11281 asm: x86.ABSFQ,
11282 reg: regInfo{
11283 inputs: []inputInfo{
11284 {0, 49135},
11285 },
11286 outputs: []outputInfo{
11287 {1, 0},
11288 {0, 49135},
11289 },
11290 },
11291 },
11292 {
11293 name: "BSFL",
11294 argLen: 1,
11295 clobberFlags: true,
11296 asm: x86.ABSFL,
11297 reg: regInfo{
11298 inputs: []inputInfo{
11299 {0, 49135},
11300 },
11301 outputs: []outputInfo{
11302 {0, 49135},
11303 },
11304 },
11305 },
11306 {
11307 name: "BSRQ",
11308 argLen: 1,
11309 asm: x86.ABSRQ,
11310 reg: regInfo{
11311 inputs: []inputInfo{
11312 {0, 49135},
11313 },
11314 outputs: []outputInfo{
11315 {1, 0},
11316 {0, 49135},
11317 },
11318 },
11319 },
11320 {
11321 name: "BSRL",
11322 argLen: 1,
11323 clobberFlags: true,
11324 asm: x86.ABSRL,
11325 reg: regInfo{
11326 inputs: []inputInfo{
11327 {0, 49135},
11328 },
11329 outputs: []outputInfo{
11330 {0, 49135},
11331 },
11332 },
11333 },
11334 {
11335 name: "CMOVQEQ",
11336 argLen: 3,
11337 resultInArg0: true,
11338 asm: x86.ACMOVQEQ,
11339 reg: regInfo{
11340 inputs: []inputInfo{
11341 {0, 49135},
11342 {1, 49135},
11343 },
11344 outputs: []outputInfo{
11345 {0, 49135},
11346 },
11347 },
11348 },
11349 {
11350 name: "CMOVQNE",
11351 argLen: 3,
11352 resultInArg0: true,
11353 asm: x86.ACMOVQNE,
11354 reg: regInfo{
11355 inputs: []inputInfo{
11356 {0, 49135},
11357 {1, 49135},
11358 },
11359 outputs: []outputInfo{
11360 {0, 49135},
11361 },
11362 },
11363 },
11364 {
11365 name: "CMOVQLT",
11366 argLen: 3,
11367 resultInArg0: true,
11368 asm: x86.ACMOVQLT,
11369 reg: regInfo{
11370 inputs: []inputInfo{
11371 {0, 49135},
11372 {1, 49135},
11373 },
11374 outputs: []outputInfo{
11375 {0, 49135},
11376 },
11377 },
11378 },
11379 {
11380 name: "CMOVQGT",
11381 argLen: 3,
11382 resultInArg0: true,
11383 asm: x86.ACMOVQGT,
11384 reg: regInfo{
11385 inputs: []inputInfo{
11386 {0, 49135},
11387 {1, 49135},
11388 },
11389 outputs: []outputInfo{
11390 {0, 49135},
11391 },
11392 },
11393 },
11394 {
11395 name: "CMOVQLE",
11396 argLen: 3,
11397 resultInArg0: true,
11398 asm: x86.ACMOVQLE,
11399 reg: regInfo{
11400 inputs: []inputInfo{
11401 {0, 49135},
11402 {1, 49135},
11403 },
11404 outputs: []outputInfo{
11405 {0, 49135},
11406 },
11407 },
11408 },
11409 {
11410 name: "CMOVQGE",
11411 argLen: 3,
11412 resultInArg0: true,
11413 asm: x86.ACMOVQGE,
11414 reg: regInfo{
11415 inputs: []inputInfo{
11416 {0, 49135},
11417 {1, 49135},
11418 },
11419 outputs: []outputInfo{
11420 {0, 49135},
11421 },
11422 },
11423 },
11424 {
11425 name: "CMOVQLS",
11426 argLen: 3,
11427 resultInArg0: true,
11428 asm: x86.ACMOVQLS,
11429 reg: regInfo{
11430 inputs: []inputInfo{
11431 {0, 49135},
11432 {1, 49135},
11433 },
11434 outputs: []outputInfo{
11435 {0, 49135},
11436 },
11437 },
11438 },
11439 {
11440 name: "CMOVQHI",
11441 argLen: 3,
11442 resultInArg0: true,
11443 asm: x86.ACMOVQHI,
11444 reg: regInfo{
11445 inputs: []inputInfo{
11446 {0, 49135},
11447 {1, 49135},
11448 },
11449 outputs: []outputInfo{
11450 {0, 49135},
11451 },
11452 },
11453 },
11454 {
11455 name: "CMOVQCC",
11456 argLen: 3,
11457 resultInArg0: true,
11458 asm: x86.ACMOVQCC,
11459 reg: regInfo{
11460 inputs: []inputInfo{
11461 {0, 49135},
11462 {1, 49135},
11463 },
11464 outputs: []outputInfo{
11465 {0, 49135},
11466 },
11467 },
11468 },
11469 {
11470 name: "CMOVQCS",
11471 argLen: 3,
11472 resultInArg0: true,
11473 asm: x86.ACMOVQCS,
11474 reg: regInfo{
11475 inputs: []inputInfo{
11476 {0, 49135},
11477 {1, 49135},
11478 },
11479 outputs: []outputInfo{
11480 {0, 49135},
11481 },
11482 },
11483 },
11484 {
11485 name: "CMOVLEQ",
11486 argLen: 3,
11487 resultInArg0: true,
11488 asm: x86.ACMOVLEQ,
11489 reg: regInfo{
11490 inputs: []inputInfo{
11491 {0, 49135},
11492 {1, 49135},
11493 },
11494 outputs: []outputInfo{
11495 {0, 49135},
11496 },
11497 },
11498 },
11499 {
11500 name: "CMOVLNE",
11501 argLen: 3,
11502 resultInArg0: true,
11503 asm: x86.ACMOVLNE,
11504 reg: regInfo{
11505 inputs: []inputInfo{
11506 {0, 49135},
11507 {1, 49135},
11508 },
11509 outputs: []outputInfo{
11510 {0, 49135},
11511 },
11512 },
11513 },
11514 {
11515 name: "CMOVLLT",
11516 argLen: 3,
11517 resultInArg0: true,
11518 asm: x86.ACMOVLLT,
11519 reg: regInfo{
11520 inputs: []inputInfo{
11521 {0, 49135},
11522 {1, 49135},
11523 },
11524 outputs: []outputInfo{
11525 {0, 49135},
11526 },
11527 },
11528 },
11529 {
11530 name: "CMOVLGT",
11531 argLen: 3,
11532 resultInArg0: true,
11533 asm: x86.ACMOVLGT,
11534 reg: regInfo{
11535 inputs: []inputInfo{
11536 {0, 49135},
11537 {1, 49135},
11538 },
11539 outputs: []outputInfo{
11540 {0, 49135},
11541 },
11542 },
11543 },
11544 {
11545 name: "CMOVLLE",
11546 argLen: 3,
11547 resultInArg0: true,
11548 asm: x86.ACMOVLLE,
11549 reg: regInfo{
11550 inputs: []inputInfo{
11551 {0, 49135},
11552 {1, 49135},
11553 },
11554 outputs: []outputInfo{
11555 {0, 49135},
11556 },
11557 },
11558 },
11559 {
11560 name: "CMOVLGE",
11561 argLen: 3,
11562 resultInArg0: true,
11563 asm: x86.ACMOVLGE,
11564 reg: regInfo{
11565 inputs: []inputInfo{
11566 {0, 49135},
11567 {1, 49135},
11568 },
11569 outputs: []outputInfo{
11570 {0, 49135},
11571 },
11572 },
11573 },
11574 {
11575 name: "CMOVLLS",
11576 argLen: 3,
11577 resultInArg0: true,
11578 asm: x86.ACMOVLLS,
11579 reg: regInfo{
11580 inputs: []inputInfo{
11581 {0, 49135},
11582 {1, 49135},
11583 },
11584 outputs: []outputInfo{
11585 {0, 49135},
11586 },
11587 },
11588 },
11589 {
11590 name: "CMOVLHI",
11591 argLen: 3,
11592 resultInArg0: true,
11593 asm: x86.ACMOVLHI,
11594 reg: regInfo{
11595 inputs: []inputInfo{
11596 {0, 49135},
11597 {1, 49135},
11598 },
11599 outputs: []outputInfo{
11600 {0, 49135},
11601 },
11602 },
11603 },
11604 {
11605 name: "CMOVLCC",
11606 argLen: 3,
11607 resultInArg0: true,
11608 asm: x86.ACMOVLCC,
11609 reg: regInfo{
11610 inputs: []inputInfo{
11611 {0, 49135},
11612 {1, 49135},
11613 },
11614 outputs: []outputInfo{
11615 {0, 49135},
11616 },
11617 },
11618 },
11619 {
11620 name: "CMOVLCS",
11621 argLen: 3,
11622 resultInArg0: true,
11623 asm: x86.ACMOVLCS,
11624 reg: regInfo{
11625 inputs: []inputInfo{
11626 {0, 49135},
11627 {1, 49135},
11628 },
11629 outputs: []outputInfo{
11630 {0, 49135},
11631 },
11632 },
11633 },
11634 {
11635 name: "CMOVWEQ",
11636 argLen: 3,
11637 resultInArg0: true,
11638 asm: x86.ACMOVWEQ,
11639 reg: regInfo{
11640 inputs: []inputInfo{
11641 {0, 49135},
11642 {1, 49135},
11643 },
11644 outputs: []outputInfo{
11645 {0, 49135},
11646 },
11647 },
11648 },
11649 {
11650 name: "CMOVWNE",
11651 argLen: 3,
11652 resultInArg0: true,
11653 asm: x86.ACMOVWNE,
11654 reg: regInfo{
11655 inputs: []inputInfo{
11656 {0, 49135},
11657 {1, 49135},
11658 },
11659 outputs: []outputInfo{
11660 {0, 49135},
11661 },
11662 },
11663 },
11664 {
11665 name: "CMOVWLT",
11666 argLen: 3,
11667 resultInArg0: true,
11668 asm: x86.ACMOVWLT,
11669 reg: regInfo{
11670 inputs: []inputInfo{
11671 {0, 49135},
11672 {1, 49135},
11673 },
11674 outputs: []outputInfo{
11675 {0, 49135},
11676 },
11677 },
11678 },
11679 {
11680 name: "CMOVWGT",
11681 argLen: 3,
11682 resultInArg0: true,
11683 asm: x86.ACMOVWGT,
11684 reg: regInfo{
11685 inputs: []inputInfo{
11686 {0, 49135},
11687 {1, 49135},
11688 },
11689 outputs: []outputInfo{
11690 {0, 49135},
11691 },
11692 },
11693 },
11694 {
11695 name: "CMOVWLE",
11696 argLen: 3,
11697 resultInArg0: true,
11698 asm: x86.ACMOVWLE,
11699 reg: regInfo{
11700 inputs: []inputInfo{
11701 {0, 49135},
11702 {1, 49135},
11703 },
11704 outputs: []outputInfo{
11705 {0, 49135},
11706 },
11707 },
11708 },
11709 {
11710 name: "CMOVWGE",
11711 argLen: 3,
11712 resultInArg0: true,
11713 asm: x86.ACMOVWGE,
11714 reg: regInfo{
11715 inputs: []inputInfo{
11716 {0, 49135},
11717 {1, 49135},
11718 },
11719 outputs: []outputInfo{
11720 {0, 49135},
11721 },
11722 },
11723 },
11724 {
11725 name: "CMOVWLS",
11726 argLen: 3,
11727 resultInArg0: true,
11728 asm: x86.ACMOVWLS,
11729 reg: regInfo{
11730 inputs: []inputInfo{
11731 {0, 49135},
11732 {1, 49135},
11733 },
11734 outputs: []outputInfo{
11735 {0, 49135},
11736 },
11737 },
11738 },
11739 {
11740 name: "CMOVWHI",
11741 argLen: 3,
11742 resultInArg0: true,
11743 asm: x86.ACMOVWHI,
11744 reg: regInfo{
11745 inputs: []inputInfo{
11746 {0, 49135},
11747 {1, 49135},
11748 },
11749 outputs: []outputInfo{
11750 {0, 49135},
11751 },
11752 },
11753 },
11754 {
11755 name: "CMOVWCC",
11756 argLen: 3,
11757 resultInArg0: true,
11758 asm: x86.ACMOVWCC,
11759 reg: regInfo{
11760 inputs: []inputInfo{
11761 {0, 49135},
11762 {1, 49135},
11763 },
11764 outputs: []outputInfo{
11765 {0, 49135},
11766 },
11767 },
11768 },
11769 {
11770 name: "CMOVWCS",
11771 argLen: 3,
11772 resultInArg0: true,
11773 asm: x86.ACMOVWCS,
11774 reg: regInfo{
11775 inputs: []inputInfo{
11776 {0, 49135},
11777 {1, 49135},
11778 },
11779 outputs: []outputInfo{
11780 {0, 49135},
11781 },
11782 },
11783 },
11784 {
11785 name: "CMOVQEQF",
11786 argLen: 3,
11787 resultInArg0: true,
11788 needIntTemp: true,
11789 asm: x86.ACMOVQNE,
11790 reg: regInfo{
11791 inputs: []inputInfo{
11792 {0, 49135},
11793 {1, 49135},
11794 },
11795 outputs: []outputInfo{
11796 {0, 49135},
11797 },
11798 },
11799 },
11800 {
11801 name: "CMOVQNEF",
11802 argLen: 3,
11803 resultInArg0: true,
11804 asm: x86.ACMOVQNE,
11805 reg: regInfo{
11806 inputs: []inputInfo{
11807 {0, 49135},
11808 {1, 49135},
11809 },
11810 outputs: []outputInfo{
11811 {0, 49135},
11812 },
11813 },
11814 },
11815 {
11816 name: "CMOVQGTF",
11817 argLen: 3,
11818 resultInArg0: true,
11819 asm: x86.ACMOVQHI,
11820 reg: regInfo{
11821 inputs: []inputInfo{
11822 {0, 49135},
11823 {1, 49135},
11824 },
11825 outputs: []outputInfo{
11826 {0, 49135},
11827 },
11828 },
11829 },
11830 {
11831 name: "CMOVQGEF",
11832 argLen: 3,
11833 resultInArg0: true,
11834 asm: x86.ACMOVQCC,
11835 reg: regInfo{
11836 inputs: []inputInfo{
11837 {0, 49135},
11838 {1, 49135},
11839 },
11840 outputs: []outputInfo{
11841 {0, 49135},
11842 },
11843 },
11844 },
11845 {
11846 name: "CMOVLEQF",
11847 argLen: 3,
11848 resultInArg0: true,
11849 needIntTemp: true,
11850 asm: x86.ACMOVLNE,
11851 reg: regInfo{
11852 inputs: []inputInfo{
11853 {0, 49135},
11854 {1, 49135},
11855 },
11856 outputs: []outputInfo{
11857 {0, 49135},
11858 },
11859 },
11860 },
11861 {
11862 name: "CMOVLNEF",
11863 argLen: 3,
11864 resultInArg0: true,
11865 asm: x86.ACMOVLNE,
11866 reg: regInfo{
11867 inputs: []inputInfo{
11868 {0, 49135},
11869 {1, 49135},
11870 },
11871 outputs: []outputInfo{
11872 {0, 49135},
11873 },
11874 },
11875 },
11876 {
11877 name: "CMOVLGTF",
11878 argLen: 3,
11879 resultInArg0: true,
11880 asm: x86.ACMOVLHI,
11881 reg: regInfo{
11882 inputs: []inputInfo{
11883 {0, 49135},
11884 {1, 49135},
11885 },
11886 outputs: []outputInfo{
11887 {0, 49135},
11888 },
11889 },
11890 },
11891 {
11892 name: "CMOVLGEF",
11893 argLen: 3,
11894 resultInArg0: true,
11895 asm: x86.ACMOVLCC,
11896 reg: regInfo{
11897 inputs: []inputInfo{
11898 {0, 49135},
11899 {1, 49135},
11900 },
11901 outputs: []outputInfo{
11902 {0, 49135},
11903 },
11904 },
11905 },
11906 {
11907 name: "CMOVWEQF",
11908 argLen: 3,
11909 resultInArg0: true,
11910 needIntTemp: true,
11911 asm: x86.ACMOVWNE,
11912 reg: regInfo{
11913 inputs: []inputInfo{
11914 {0, 49135},
11915 {1, 49135},
11916 },
11917 outputs: []outputInfo{
11918 {0, 49135},
11919 },
11920 },
11921 },
11922 {
11923 name: "CMOVWNEF",
11924 argLen: 3,
11925 resultInArg0: true,
11926 asm: x86.ACMOVWNE,
11927 reg: regInfo{
11928 inputs: []inputInfo{
11929 {0, 49135},
11930 {1, 49135},
11931 },
11932 outputs: []outputInfo{
11933 {0, 49135},
11934 },
11935 },
11936 },
11937 {
11938 name: "CMOVWGTF",
11939 argLen: 3,
11940 resultInArg0: true,
11941 asm: x86.ACMOVWHI,
11942 reg: regInfo{
11943 inputs: []inputInfo{
11944 {0, 49135},
11945 {1, 49135},
11946 },
11947 outputs: []outputInfo{
11948 {0, 49135},
11949 },
11950 },
11951 },
11952 {
11953 name: "CMOVWGEF",
11954 argLen: 3,
11955 resultInArg0: true,
11956 asm: x86.ACMOVWCC,
11957 reg: regInfo{
11958 inputs: []inputInfo{
11959 {0, 49135},
11960 {1, 49135},
11961 },
11962 outputs: []outputInfo{
11963 {0, 49135},
11964 },
11965 },
11966 },
11967 {
11968 name: "BSWAPQ",
11969 argLen: 1,
11970 resultInArg0: true,
11971 asm: x86.ABSWAPQ,
11972 reg: regInfo{
11973 inputs: []inputInfo{
11974 {0, 49135},
11975 },
11976 outputs: []outputInfo{
11977 {0, 49135},
11978 },
11979 },
11980 },
11981 {
11982 name: "BSWAPL",
11983 argLen: 1,
11984 resultInArg0: true,
11985 asm: x86.ABSWAPL,
11986 reg: regInfo{
11987 inputs: []inputInfo{
11988 {0, 49135},
11989 },
11990 outputs: []outputInfo{
11991 {0, 49135},
11992 },
11993 },
11994 },
11995 {
11996 name: "POPCNTQ",
11997 argLen: 1,
11998 clobberFlags: true,
11999 asm: x86.APOPCNTQ,
12000 reg: regInfo{
12001 inputs: []inputInfo{
12002 {0, 49135},
12003 },
12004 outputs: []outputInfo{
12005 {0, 49135},
12006 },
12007 },
12008 },
12009 {
12010 name: "POPCNTL",
12011 argLen: 1,
12012 clobberFlags: true,
12013 asm: x86.APOPCNTL,
12014 reg: regInfo{
12015 inputs: []inputInfo{
12016 {0, 49135},
12017 },
12018 outputs: []outputInfo{
12019 {0, 49135},
12020 },
12021 },
12022 },
12023 {
12024 name: "SQRTSD",
12025 argLen: 1,
12026 asm: x86.ASQRTSD,
12027 reg: regInfo{
12028 inputs: []inputInfo{
12029 {0, 2147418112},
12030 },
12031 outputs: []outputInfo{
12032 {0, 2147418112},
12033 },
12034 },
12035 },
12036 {
12037 name: "SQRTSS",
12038 argLen: 1,
12039 asm: x86.ASQRTSS,
12040 reg: regInfo{
12041 inputs: []inputInfo{
12042 {0, 2147418112},
12043 },
12044 outputs: []outputInfo{
12045 {0, 2147418112},
12046 },
12047 },
12048 },
12049 {
12050 name: "ROUNDSD",
12051 auxType: auxInt8,
12052 argLen: 1,
12053 asm: x86.AROUNDSD,
12054 reg: regInfo{
12055 inputs: []inputInfo{
12056 {0, 2147418112},
12057 },
12058 outputs: []outputInfo{
12059 {0, 2147418112},
12060 },
12061 },
12062 },
12063 {
12064 name: "VFMADD231SD",
12065 argLen: 3,
12066 resultInArg0: true,
12067 asm: x86.AVFMADD231SD,
12068 reg: regInfo{
12069 inputs: []inputInfo{
12070 {0, 2147418112},
12071 {1, 2147418112},
12072 {2, 2147418112},
12073 },
12074 outputs: []outputInfo{
12075 {0, 2147418112},
12076 },
12077 },
12078 },
12079 {
12080 name: "MINSD",
12081 argLen: 2,
12082 resultInArg0: true,
12083 asm: x86.AMINSD,
12084 reg: regInfo{
12085 inputs: []inputInfo{
12086 {0, 2147418112},
12087 {1, 2147418112},
12088 },
12089 outputs: []outputInfo{
12090 {0, 2147418112},
12091 },
12092 },
12093 },
12094 {
12095 name: "MINSS",
12096 argLen: 2,
12097 resultInArg0: true,
12098 asm: x86.AMINSS,
12099 reg: regInfo{
12100 inputs: []inputInfo{
12101 {0, 2147418112},
12102 {1, 2147418112},
12103 },
12104 outputs: []outputInfo{
12105 {0, 2147418112},
12106 },
12107 },
12108 },
12109 {
12110 name: "SBBQcarrymask",
12111 argLen: 1,
12112 asm: x86.ASBBQ,
12113 reg: regInfo{
12114 outputs: []outputInfo{
12115 {0, 49135},
12116 },
12117 },
12118 },
12119 {
12120 name: "SBBLcarrymask",
12121 argLen: 1,
12122 asm: x86.ASBBL,
12123 reg: regInfo{
12124 outputs: []outputInfo{
12125 {0, 49135},
12126 },
12127 },
12128 },
12129 {
12130 name: "SETEQ",
12131 argLen: 1,
12132 asm: x86.ASETEQ,
12133 reg: regInfo{
12134 outputs: []outputInfo{
12135 {0, 49135},
12136 },
12137 },
12138 },
12139 {
12140 name: "SETNE",
12141 argLen: 1,
12142 asm: x86.ASETNE,
12143 reg: regInfo{
12144 outputs: []outputInfo{
12145 {0, 49135},
12146 },
12147 },
12148 },
12149 {
12150 name: "SETL",
12151 argLen: 1,
12152 asm: x86.ASETLT,
12153 reg: regInfo{
12154 outputs: []outputInfo{
12155 {0, 49135},
12156 },
12157 },
12158 },
12159 {
12160 name: "SETLE",
12161 argLen: 1,
12162 asm: x86.ASETLE,
12163 reg: regInfo{
12164 outputs: []outputInfo{
12165 {0, 49135},
12166 },
12167 },
12168 },
12169 {
12170 name: "SETG",
12171 argLen: 1,
12172 asm: x86.ASETGT,
12173 reg: regInfo{
12174 outputs: []outputInfo{
12175 {0, 49135},
12176 },
12177 },
12178 },
12179 {
12180 name: "SETGE",
12181 argLen: 1,
12182 asm: x86.ASETGE,
12183 reg: regInfo{
12184 outputs: []outputInfo{
12185 {0, 49135},
12186 },
12187 },
12188 },
12189 {
12190 name: "SETB",
12191 argLen: 1,
12192 asm: x86.ASETCS,
12193 reg: regInfo{
12194 outputs: []outputInfo{
12195 {0, 49135},
12196 },
12197 },
12198 },
12199 {
12200 name: "SETBE",
12201 argLen: 1,
12202 asm: x86.ASETLS,
12203 reg: regInfo{
12204 outputs: []outputInfo{
12205 {0, 49135},
12206 },
12207 },
12208 },
12209 {
12210 name: "SETA",
12211 argLen: 1,
12212 asm: x86.ASETHI,
12213 reg: regInfo{
12214 outputs: []outputInfo{
12215 {0, 49135},
12216 },
12217 },
12218 },
12219 {
12220 name: "SETAE",
12221 argLen: 1,
12222 asm: x86.ASETCC,
12223 reg: regInfo{
12224 outputs: []outputInfo{
12225 {0, 49135},
12226 },
12227 },
12228 },
12229 {
12230 name: "SETO",
12231 argLen: 1,
12232 asm: x86.ASETOS,
12233 reg: regInfo{
12234 outputs: []outputInfo{
12235 {0, 49135},
12236 },
12237 },
12238 },
12239 {
12240 name: "SETEQstore",
12241 auxType: auxSymOff,
12242 argLen: 3,
12243 faultOnNilArg0: true,
12244 symEffect: SymWrite,
12245 asm: x86.ASETEQ,
12246 reg: regInfo{
12247 inputs: []inputInfo{
12248 {0, 4295032831},
12249 },
12250 },
12251 },
12252 {
12253 name: "SETNEstore",
12254 auxType: auxSymOff,
12255 argLen: 3,
12256 faultOnNilArg0: true,
12257 symEffect: SymWrite,
12258 asm: x86.ASETNE,
12259 reg: regInfo{
12260 inputs: []inputInfo{
12261 {0, 4295032831},
12262 },
12263 },
12264 },
12265 {
12266 name: "SETLstore",
12267 auxType: auxSymOff,
12268 argLen: 3,
12269 faultOnNilArg0: true,
12270 symEffect: SymWrite,
12271 asm: x86.ASETLT,
12272 reg: regInfo{
12273 inputs: []inputInfo{
12274 {0, 4295032831},
12275 },
12276 },
12277 },
12278 {
12279 name: "SETLEstore",
12280 auxType: auxSymOff,
12281 argLen: 3,
12282 faultOnNilArg0: true,
12283 symEffect: SymWrite,
12284 asm: x86.ASETLE,
12285 reg: regInfo{
12286 inputs: []inputInfo{
12287 {0, 4295032831},
12288 },
12289 },
12290 },
12291 {
12292 name: "SETGstore",
12293 auxType: auxSymOff,
12294 argLen: 3,
12295 faultOnNilArg0: true,
12296 symEffect: SymWrite,
12297 asm: x86.ASETGT,
12298 reg: regInfo{
12299 inputs: []inputInfo{
12300 {0, 4295032831},
12301 },
12302 },
12303 },
12304 {
12305 name: "SETGEstore",
12306 auxType: auxSymOff,
12307 argLen: 3,
12308 faultOnNilArg0: true,
12309 symEffect: SymWrite,
12310 asm: x86.ASETGE,
12311 reg: regInfo{
12312 inputs: []inputInfo{
12313 {0, 4295032831},
12314 },
12315 },
12316 },
12317 {
12318 name: "SETBstore",
12319 auxType: auxSymOff,
12320 argLen: 3,
12321 faultOnNilArg0: true,
12322 symEffect: SymWrite,
12323 asm: x86.ASETCS,
12324 reg: regInfo{
12325 inputs: []inputInfo{
12326 {0, 4295032831},
12327 },
12328 },
12329 },
12330 {
12331 name: "SETBEstore",
12332 auxType: auxSymOff,
12333 argLen: 3,
12334 faultOnNilArg0: true,
12335 symEffect: SymWrite,
12336 asm: x86.ASETLS,
12337 reg: regInfo{
12338 inputs: []inputInfo{
12339 {0, 4295032831},
12340 },
12341 },
12342 },
12343 {
12344 name: "SETAstore",
12345 auxType: auxSymOff,
12346 argLen: 3,
12347 faultOnNilArg0: true,
12348 symEffect: SymWrite,
12349 asm: x86.ASETHI,
12350 reg: regInfo{
12351 inputs: []inputInfo{
12352 {0, 4295032831},
12353 },
12354 },
12355 },
12356 {
12357 name: "SETAEstore",
12358 auxType: auxSymOff,
12359 argLen: 3,
12360 faultOnNilArg0: true,
12361 symEffect: SymWrite,
12362 asm: x86.ASETCC,
12363 reg: regInfo{
12364 inputs: []inputInfo{
12365 {0, 4295032831},
12366 },
12367 },
12368 },
12369 {
12370 name: "SETEQstoreidx1",
12371 auxType: auxSymOff,
12372 argLen: 4,
12373 commutative: true,
12374 symEffect: SymWrite,
12375 asm: x86.ASETEQ,
12376 scale: 1,
12377 reg: regInfo{
12378 inputs: []inputInfo{
12379 {1, 49151},
12380 {0, 4295032831},
12381 },
12382 },
12383 },
12384 {
12385 name: "SETNEstoreidx1",
12386 auxType: auxSymOff,
12387 argLen: 4,
12388 commutative: true,
12389 symEffect: SymWrite,
12390 asm: x86.ASETNE,
12391 scale: 1,
12392 reg: regInfo{
12393 inputs: []inputInfo{
12394 {1, 49151},
12395 {0, 4295032831},
12396 },
12397 },
12398 },
12399 {
12400 name: "SETLstoreidx1",
12401 auxType: auxSymOff,
12402 argLen: 4,
12403 commutative: true,
12404 symEffect: SymWrite,
12405 asm: x86.ASETLT,
12406 scale: 1,
12407 reg: regInfo{
12408 inputs: []inputInfo{
12409 {1, 49151},
12410 {0, 4295032831},
12411 },
12412 },
12413 },
12414 {
12415 name: "SETLEstoreidx1",
12416 auxType: auxSymOff,
12417 argLen: 4,
12418 commutative: true,
12419 symEffect: SymWrite,
12420 asm: x86.ASETLE,
12421 scale: 1,
12422 reg: regInfo{
12423 inputs: []inputInfo{
12424 {1, 49151},
12425 {0, 4295032831},
12426 },
12427 },
12428 },
12429 {
12430 name: "SETGstoreidx1",
12431 auxType: auxSymOff,
12432 argLen: 4,
12433 commutative: true,
12434 symEffect: SymWrite,
12435 asm: x86.ASETGT,
12436 scale: 1,
12437 reg: regInfo{
12438 inputs: []inputInfo{
12439 {1, 49151},
12440 {0, 4295032831},
12441 },
12442 },
12443 },
12444 {
12445 name: "SETGEstoreidx1",
12446 auxType: auxSymOff,
12447 argLen: 4,
12448 commutative: true,
12449 symEffect: SymWrite,
12450 asm: x86.ASETGE,
12451 scale: 1,
12452 reg: regInfo{
12453 inputs: []inputInfo{
12454 {1, 49151},
12455 {0, 4295032831},
12456 },
12457 },
12458 },
12459 {
12460 name: "SETBstoreidx1",
12461 auxType: auxSymOff,
12462 argLen: 4,
12463 commutative: true,
12464 symEffect: SymWrite,
12465 asm: x86.ASETCS,
12466 scale: 1,
12467 reg: regInfo{
12468 inputs: []inputInfo{
12469 {1, 49151},
12470 {0, 4295032831},
12471 },
12472 },
12473 },
12474 {
12475 name: "SETBEstoreidx1",
12476 auxType: auxSymOff,
12477 argLen: 4,
12478 commutative: true,
12479 symEffect: SymWrite,
12480 asm: x86.ASETLS,
12481 scale: 1,
12482 reg: regInfo{
12483 inputs: []inputInfo{
12484 {1, 49151},
12485 {0, 4295032831},
12486 },
12487 },
12488 },
12489 {
12490 name: "SETAstoreidx1",
12491 auxType: auxSymOff,
12492 argLen: 4,
12493 commutative: true,
12494 symEffect: SymWrite,
12495 asm: x86.ASETHI,
12496 scale: 1,
12497 reg: regInfo{
12498 inputs: []inputInfo{
12499 {1, 49151},
12500 {0, 4295032831},
12501 },
12502 },
12503 },
12504 {
12505 name: "SETAEstoreidx1",
12506 auxType: auxSymOff,
12507 argLen: 4,
12508 commutative: true,
12509 symEffect: SymWrite,
12510 asm: x86.ASETCC,
12511 scale: 1,
12512 reg: regInfo{
12513 inputs: []inputInfo{
12514 {1, 49151},
12515 {0, 4295032831},
12516 },
12517 },
12518 },
12519 {
12520 name: "SETEQF",
12521 argLen: 1,
12522 clobberFlags: true,
12523 needIntTemp: true,
12524 asm: x86.ASETEQ,
12525 reg: regInfo{
12526 outputs: []outputInfo{
12527 {0, 49135},
12528 },
12529 },
12530 },
12531 {
12532 name: "SETNEF",
12533 argLen: 1,
12534 clobberFlags: true,
12535 needIntTemp: true,
12536 asm: x86.ASETNE,
12537 reg: regInfo{
12538 outputs: []outputInfo{
12539 {0, 49135},
12540 },
12541 },
12542 },
12543 {
12544 name: "SETORD",
12545 argLen: 1,
12546 asm: x86.ASETPC,
12547 reg: regInfo{
12548 outputs: []outputInfo{
12549 {0, 49135},
12550 },
12551 },
12552 },
12553 {
12554 name: "SETNAN",
12555 argLen: 1,
12556 asm: x86.ASETPS,
12557 reg: regInfo{
12558 outputs: []outputInfo{
12559 {0, 49135},
12560 },
12561 },
12562 },
12563 {
12564 name: "SETGF",
12565 argLen: 1,
12566 asm: x86.ASETHI,
12567 reg: regInfo{
12568 outputs: []outputInfo{
12569 {0, 49135},
12570 },
12571 },
12572 },
12573 {
12574 name: "SETGEF",
12575 argLen: 1,
12576 asm: x86.ASETCC,
12577 reg: regInfo{
12578 outputs: []outputInfo{
12579 {0, 49135},
12580 },
12581 },
12582 },
12583 {
12584 name: "MOVBQSX",
12585 argLen: 1,
12586 asm: x86.AMOVBQSX,
12587 reg: regInfo{
12588 inputs: []inputInfo{
12589 {0, 49135},
12590 },
12591 outputs: []outputInfo{
12592 {0, 49135},
12593 },
12594 },
12595 },
12596 {
12597 name: "MOVBQZX",
12598 argLen: 1,
12599 asm: x86.AMOVBLZX,
12600 reg: regInfo{
12601 inputs: []inputInfo{
12602 {0, 49135},
12603 },
12604 outputs: []outputInfo{
12605 {0, 49135},
12606 },
12607 },
12608 },
12609 {
12610 name: "MOVWQSX",
12611 argLen: 1,
12612 asm: x86.AMOVWQSX,
12613 reg: regInfo{
12614 inputs: []inputInfo{
12615 {0, 49135},
12616 },
12617 outputs: []outputInfo{
12618 {0, 49135},
12619 },
12620 },
12621 },
12622 {
12623 name: "MOVWQZX",
12624 argLen: 1,
12625 asm: x86.AMOVWLZX,
12626 reg: regInfo{
12627 inputs: []inputInfo{
12628 {0, 49135},
12629 },
12630 outputs: []outputInfo{
12631 {0, 49135},
12632 },
12633 },
12634 },
12635 {
12636 name: "MOVLQSX",
12637 argLen: 1,
12638 asm: x86.AMOVLQSX,
12639 reg: regInfo{
12640 inputs: []inputInfo{
12641 {0, 49135},
12642 },
12643 outputs: []outputInfo{
12644 {0, 49135},
12645 },
12646 },
12647 },
12648 {
12649 name: "MOVLQZX",
12650 argLen: 1,
12651 asm: x86.AMOVL,
12652 reg: regInfo{
12653 inputs: []inputInfo{
12654 {0, 49135},
12655 },
12656 outputs: []outputInfo{
12657 {0, 49135},
12658 },
12659 },
12660 },
12661 {
12662 name: "MOVLconst",
12663 auxType: auxInt32,
12664 argLen: 0,
12665 rematerializeable: true,
12666 asm: x86.AMOVL,
12667 reg: regInfo{
12668 outputs: []outputInfo{
12669 {0, 49135},
12670 },
12671 },
12672 },
12673 {
12674 name: "MOVQconst",
12675 auxType: auxInt64,
12676 argLen: 0,
12677 rematerializeable: true,
12678 asm: x86.AMOVQ,
12679 reg: regInfo{
12680 outputs: []outputInfo{
12681 {0, 49135},
12682 },
12683 },
12684 },
12685 {
12686 name: "CVTTSD2SL",
12687 argLen: 1,
12688 asm: x86.ACVTTSD2SL,
12689 reg: regInfo{
12690 inputs: []inputInfo{
12691 {0, 2147418112},
12692 },
12693 outputs: []outputInfo{
12694 {0, 49135},
12695 },
12696 },
12697 },
12698 {
12699 name: "CVTTSD2SQ",
12700 argLen: 1,
12701 asm: x86.ACVTTSD2SQ,
12702 reg: regInfo{
12703 inputs: []inputInfo{
12704 {0, 2147418112},
12705 },
12706 outputs: []outputInfo{
12707 {0, 49135},
12708 },
12709 },
12710 },
12711 {
12712 name: "CVTTSS2SL",
12713 argLen: 1,
12714 asm: x86.ACVTTSS2SL,
12715 reg: regInfo{
12716 inputs: []inputInfo{
12717 {0, 2147418112},
12718 },
12719 outputs: []outputInfo{
12720 {0, 49135},
12721 },
12722 },
12723 },
12724 {
12725 name: "CVTTSS2SQ",
12726 argLen: 1,
12727 asm: x86.ACVTTSS2SQ,
12728 reg: regInfo{
12729 inputs: []inputInfo{
12730 {0, 2147418112},
12731 },
12732 outputs: []outputInfo{
12733 {0, 49135},
12734 },
12735 },
12736 },
12737 {
12738 name: "CVTSL2SS",
12739 argLen: 1,
12740 asm: x86.ACVTSL2SS,
12741 reg: regInfo{
12742 inputs: []inputInfo{
12743 {0, 49135},
12744 },
12745 outputs: []outputInfo{
12746 {0, 2147418112},
12747 },
12748 },
12749 },
12750 {
12751 name: "CVTSL2SD",
12752 argLen: 1,
12753 asm: x86.ACVTSL2SD,
12754 reg: regInfo{
12755 inputs: []inputInfo{
12756 {0, 49135},
12757 },
12758 outputs: []outputInfo{
12759 {0, 2147418112},
12760 },
12761 },
12762 },
12763 {
12764 name: "CVTSQ2SS",
12765 argLen: 1,
12766 asm: x86.ACVTSQ2SS,
12767 reg: regInfo{
12768 inputs: []inputInfo{
12769 {0, 49135},
12770 },
12771 outputs: []outputInfo{
12772 {0, 2147418112},
12773 },
12774 },
12775 },
12776 {
12777 name: "CVTSQ2SD",
12778 argLen: 1,
12779 asm: x86.ACVTSQ2SD,
12780 reg: regInfo{
12781 inputs: []inputInfo{
12782 {0, 49135},
12783 },
12784 outputs: []outputInfo{
12785 {0, 2147418112},
12786 },
12787 },
12788 },
12789 {
12790 name: "CVTSD2SS",
12791 argLen: 1,
12792 asm: x86.ACVTSD2SS,
12793 reg: regInfo{
12794 inputs: []inputInfo{
12795 {0, 2147418112},
12796 },
12797 outputs: []outputInfo{
12798 {0, 2147418112},
12799 },
12800 },
12801 },
12802 {
12803 name: "CVTSS2SD",
12804 argLen: 1,
12805 asm: x86.ACVTSS2SD,
12806 reg: regInfo{
12807 inputs: []inputInfo{
12808 {0, 2147418112},
12809 },
12810 outputs: []outputInfo{
12811 {0, 2147418112},
12812 },
12813 },
12814 },
12815 {
12816 name: "MOVQi2f",
12817 argLen: 1,
12818 reg: regInfo{
12819 inputs: []inputInfo{
12820 {0, 49135},
12821 },
12822 outputs: []outputInfo{
12823 {0, 2147418112},
12824 },
12825 },
12826 },
12827 {
12828 name: "MOVQf2i",
12829 argLen: 1,
12830 reg: regInfo{
12831 inputs: []inputInfo{
12832 {0, 2147418112},
12833 },
12834 outputs: []outputInfo{
12835 {0, 49135},
12836 },
12837 },
12838 },
12839 {
12840 name: "MOVLi2f",
12841 argLen: 1,
12842 reg: regInfo{
12843 inputs: []inputInfo{
12844 {0, 49135},
12845 },
12846 outputs: []outputInfo{
12847 {0, 2147418112},
12848 },
12849 },
12850 },
12851 {
12852 name: "MOVLf2i",
12853 argLen: 1,
12854 reg: regInfo{
12855 inputs: []inputInfo{
12856 {0, 2147418112},
12857 },
12858 outputs: []outputInfo{
12859 {0, 49135},
12860 },
12861 },
12862 },
12863 {
12864 name: "PXOR",
12865 argLen: 2,
12866 commutative: true,
12867 resultInArg0: true,
12868 asm: x86.APXOR,
12869 reg: regInfo{
12870 inputs: []inputInfo{
12871 {0, 2147418112},
12872 {1, 2147418112},
12873 },
12874 outputs: []outputInfo{
12875 {0, 2147418112},
12876 },
12877 },
12878 },
12879 {
12880 name: "POR",
12881 argLen: 2,
12882 commutative: true,
12883 resultInArg0: true,
12884 asm: x86.APOR,
12885 reg: regInfo{
12886 inputs: []inputInfo{
12887 {0, 2147418112},
12888 {1, 2147418112},
12889 },
12890 outputs: []outputInfo{
12891 {0, 2147418112},
12892 },
12893 },
12894 },
12895 {
12896 name: "LEAQ",
12897 auxType: auxSymOff,
12898 argLen: 1,
12899 rematerializeable: true,
12900 symEffect: SymAddr,
12901 asm: x86.ALEAQ,
12902 reg: regInfo{
12903 inputs: []inputInfo{
12904 {0, 4295032831},
12905 },
12906 outputs: []outputInfo{
12907 {0, 49135},
12908 },
12909 },
12910 },
12911 {
12912 name: "LEAL",
12913 auxType: auxSymOff,
12914 argLen: 1,
12915 rematerializeable: true,
12916 symEffect: SymAddr,
12917 asm: x86.ALEAL,
12918 reg: regInfo{
12919 inputs: []inputInfo{
12920 {0, 4295032831},
12921 },
12922 outputs: []outputInfo{
12923 {0, 49135},
12924 },
12925 },
12926 },
12927 {
12928 name: "LEAW",
12929 auxType: auxSymOff,
12930 argLen: 1,
12931 rematerializeable: true,
12932 symEffect: SymAddr,
12933 asm: x86.ALEAW,
12934 reg: regInfo{
12935 inputs: []inputInfo{
12936 {0, 4295032831},
12937 },
12938 outputs: []outputInfo{
12939 {0, 49135},
12940 },
12941 },
12942 },
12943 {
12944 name: "LEAQ1",
12945 auxType: auxSymOff,
12946 argLen: 2,
12947 commutative: true,
12948 symEffect: SymAddr,
12949 asm: x86.ALEAQ,
12950 scale: 1,
12951 reg: regInfo{
12952 inputs: []inputInfo{
12953 {1, 49151},
12954 {0, 4295032831},
12955 },
12956 outputs: []outputInfo{
12957 {0, 49135},
12958 },
12959 },
12960 },
12961 {
12962 name: "LEAL1",
12963 auxType: auxSymOff,
12964 argLen: 2,
12965 commutative: true,
12966 symEffect: SymAddr,
12967 asm: x86.ALEAL,
12968 scale: 1,
12969 reg: regInfo{
12970 inputs: []inputInfo{
12971 {1, 49151},
12972 {0, 4295032831},
12973 },
12974 outputs: []outputInfo{
12975 {0, 49135},
12976 },
12977 },
12978 },
12979 {
12980 name: "LEAW1",
12981 auxType: auxSymOff,
12982 argLen: 2,
12983 commutative: true,
12984 symEffect: SymAddr,
12985 asm: x86.ALEAW,
12986 scale: 1,
12987 reg: regInfo{
12988 inputs: []inputInfo{
12989 {1, 49151},
12990 {0, 4295032831},
12991 },
12992 outputs: []outputInfo{
12993 {0, 49135},
12994 },
12995 },
12996 },
12997 {
12998 name: "LEAQ2",
12999 auxType: auxSymOff,
13000 argLen: 2,
13001 symEffect: SymAddr,
13002 asm: x86.ALEAQ,
13003 scale: 2,
13004 reg: regInfo{
13005 inputs: []inputInfo{
13006 {1, 49151},
13007 {0, 4295032831},
13008 },
13009 outputs: []outputInfo{
13010 {0, 49135},
13011 },
13012 },
13013 },
13014 {
13015 name: "LEAL2",
13016 auxType: auxSymOff,
13017 argLen: 2,
13018 symEffect: SymAddr,
13019 asm: x86.ALEAL,
13020 scale: 2,
13021 reg: regInfo{
13022 inputs: []inputInfo{
13023 {1, 49151},
13024 {0, 4295032831},
13025 },
13026 outputs: []outputInfo{
13027 {0, 49135},
13028 },
13029 },
13030 },
13031 {
13032 name: "LEAW2",
13033 auxType: auxSymOff,
13034 argLen: 2,
13035 symEffect: SymAddr,
13036 asm: x86.ALEAW,
13037 scale: 2,
13038 reg: regInfo{
13039 inputs: []inputInfo{
13040 {1, 49151},
13041 {0, 4295032831},
13042 },
13043 outputs: []outputInfo{
13044 {0, 49135},
13045 },
13046 },
13047 },
13048 {
13049 name: "LEAQ4",
13050 auxType: auxSymOff,
13051 argLen: 2,
13052 symEffect: SymAddr,
13053 asm: x86.ALEAQ,
13054 scale: 4,
13055 reg: regInfo{
13056 inputs: []inputInfo{
13057 {1, 49151},
13058 {0, 4295032831},
13059 },
13060 outputs: []outputInfo{
13061 {0, 49135},
13062 },
13063 },
13064 },
13065 {
13066 name: "LEAL4",
13067 auxType: auxSymOff,
13068 argLen: 2,
13069 symEffect: SymAddr,
13070 asm: x86.ALEAL,
13071 scale: 4,
13072 reg: regInfo{
13073 inputs: []inputInfo{
13074 {1, 49151},
13075 {0, 4295032831},
13076 },
13077 outputs: []outputInfo{
13078 {0, 49135},
13079 },
13080 },
13081 },
13082 {
13083 name: "LEAW4",
13084 auxType: auxSymOff,
13085 argLen: 2,
13086 symEffect: SymAddr,
13087 asm: x86.ALEAW,
13088 scale: 4,
13089 reg: regInfo{
13090 inputs: []inputInfo{
13091 {1, 49151},
13092 {0, 4295032831},
13093 },
13094 outputs: []outputInfo{
13095 {0, 49135},
13096 },
13097 },
13098 },
13099 {
13100 name: "LEAQ8",
13101 auxType: auxSymOff,
13102 argLen: 2,
13103 symEffect: SymAddr,
13104 asm: x86.ALEAQ,
13105 scale: 8,
13106 reg: regInfo{
13107 inputs: []inputInfo{
13108 {1, 49151},
13109 {0, 4295032831},
13110 },
13111 outputs: []outputInfo{
13112 {0, 49135},
13113 },
13114 },
13115 },
13116 {
13117 name: "LEAL8",
13118 auxType: auxSymOff,
13119 argLen: 2,
13120 symEffect: SymAddr,
13121 asm: x86.ALEAL,
13122 scale: 8,
13123 reg: regInfo{
13124 inputs: []inputInfo{
13125 {1, 49151},
13126 {0, 4295032831},
13127 },
13128 outputs: []outputInfo{
13129 {0, 49135},
13130 },
13131 },
13132 },
13133 {
13134 name: "LEAW8",
13135 auxType: auxSymOff,
13136 argLen: 2,
13137 symEffect: SymAddr,
13138 asm: x86.ALEAW,
13139 scale: 8,
13140 reg: regInfo{
13141 inputs: []inputInfo{
13142 {1, 49151},
13143 {0, 4295032831},
13144 },
13145 outputs: []outputInfo{
13146 {0, 49135},
13147 },
13148 },
13149 },
13150 {
13151 name: "MOVBload",
13152 auxType: auxSymOff,
13153 argLen: 2,
13154 faultOnNilArg0: true,
13155 symEffect: SymRead,
13156 asm: x86.AMOVBLZX,
13157 reg: regInfo{
13158 inputs: []inputInfo{
13159 {0, 4295032831},
13160 },
13161 outputs: []outputInfo{
13162 {0, 49135},
13163 },
13164 },
13165 },
13166 {
13167 name: "MOVBQSXload",
13168 auxType: auxSymOff,
13169 argLen: 2,
13170 faultOnNilArg0: true,
13171 symEffect: SymRead,
13172 asm: x86.AMOVBQSX,
13173 reg: regInfo{
13174 inputs: []inputInfo{
13175 {0, 4295032831},
13176 },
13177 outputs: []outputInfo{
13178 {0, 49135},
13179 },
13180 },
13181 },
13182 {
13183 name: "MOVWload",
13184 auxType: auxSymOff,
13185 argLen: 2,
13186 faultOnNilArg0: true,
13187 symEffect: SymRead,
13188 asm: x86.AMOVWLZX,
13189 reg: regInfo{
13190 inputs: []inputInfo{
13191 {0, 4295032831},
13192 },
13193 outputs: []outputInfo{
13194 {0, 49135},
13195 },
13196 },
13197 },
13198 {
13199 name: "MOVWQSXload",
13200 auxType: auxSymOff,
13201 argLen: 2,
13202 faultOnNilArg0: true,
13203 symEffect: SymRead,
13204 asm: x86.AMOVWQSX,
13205 reg: regInfo{
13206 inputs: []inputInfo{
13207 {0, 4295032831},
13208 },
13209 outputs: []outputInfo{
13210 {0, 49135},
13211 },
13212 },
13213 },
13214 {
13215 name: "MOVLload",
13216 auxType: auxSymOff,
13217 argLen: 2,
13218 faultOnNilArg0: true,
13219 symEffect: SymRead,
13220 asm: x86.AMOVL,
13221 reg: regInfo{
13222 inputs: []inputInfo{
13223 {0, 4295032831},
13224 },
13225 outputs: []outputInfo{
13226 {0, 49135},
13227 },
13228 },
13229 },
13230 {
13231 name: "MOVLQSXload",
13232 auxType: auxSymOff,
13233 argLen: 2,
13234 faultOnNilArg0: true,
13235 symEffect: SymRead,
13236 asm: x86.AMOVLQSX,
13237 reg: regInfo{
13238 inputs: []inputInfo{
13239 {0, 4295032831},
13240 },
13241 outputs: []outputInfo{
13242 {0, 49135},
13243 },
13244 },
13245 },
13246 {
13247 name: "MOVQload",
13248 auxType: auxSymOff,
13249 argLen: 2,
13250 faultOnNilArg0: true,
13251 symEffect: SymRead,
13252 asm: x86.AMOVQ,
13253 reg: regInfo{
13254 inputs: []inputInfo{
13255 {0, 4295032831},
13256 },
13257 outputs: []outputInfo{
13258 {0, 49135},
13259 },
13260 },
13261 },
13262 {
13263 name: "MOVBstore",
13264 auxType: auxSymOff,
13265 argLen: 3,
13266 faultOnNilArg0: true,
13267 symEffect: SymWrite,
13268 asm: x86.AMOVB,
13269 reg: regInfo{
13270 inputs: []inputInfo{
13271 {1, 49151},
13272 {0, 4295032831},
13273 },
13274 },
13275 },
13276 {
13277 name: "MOVWstore",
13278 auxType: auxSymOff,
13279 argLen: 3,
13280 faultOnNilArg0: true,
13281 symEffect: SymWrite,
13282 asm: x86.AMOVW,
13283 reg: regInfo{
13284 inputs: []inputInfo{
13285 {1, 49151},
13286 {0, 4295032831},
13287 },
13288 },
13289 },
13290 {
13291 name: "MOVLstore",
13292 auxType: auxSymOff,
13293 argLen: 3,
13294 faultOnNilArg0: true,
13295 symEffect: SymWrite,
13296 asm: x86.AMOVL,
13297 reg: regInfo{
13298 inputs: []inputInfo{
13299 {1, 49151},
13300 {0, 4295032831},
13301 },
13302 },
13303 },
13304 {
13305 name: "MOVQstore",
13306 auxType: auxSymOff,
13307 argLen: 3,
13308 faultOnNilArg0: true,
13309 symEffect: SymWrite,
13310 asm: x86.AMOVQ,
13311 reg: regInfo{
13312 inputs: []inputInfo{
13313 {1, 49151},
13314 {0, 4295032831},
13315 },
13316 },
13317 },
13318 {
13319 name: "MOVOload",
13320 auxType: auxSymOff,
13321 argLen: 2,
13322 faultOnNilArg0: true,
13323 symEffect: SymRead,
13324 asm: x86.AMOVUPS,
13325 reg: regInfo{
13326 inputs: []inputInfo{
13327 {0, 4295016447},
13328 },
13329 outputs: []outputInfo{
13330 {0, 2147418112},
13331 },
13332 },
13333 },
13334 {
13335 name: "MOVOstore",
13336 auxType: auxSymOff,
13337 argLen: 3,
13338 faultOnNilArg0: true,
13339 symEffect: SymWrite,
13340 asm: x86.AMOVUPS,
13341 reg: regInfo{
13342 inputs: []inputInfo{
13343 {1, 2147418112},
13344 {0, 4295016447},
13345 },
13346 },
13347 },
13348 {
13349 name: "MOVBloadidx1",
13350 auxType: auxSymOff,
13351 argLen: 3,
13352 commutative: true,
13353 symEffect: SymRead,
13354 asm: x86.AMOVBLZX,
13355 scale: 1,
13356 reg: regInfo{
13357 inputs: []inputInfo{
13358 {1, 49151},
13359 {0, 4295032831},
13360 },
13361 outputs: []outputInfo{
13362 {0, 49135},
13363 },
13364 },
13365 },
13366 {
13367 name: "MOVWloadidx1",
13368 auxType: auxSymOff,
13369 argLen: 3,
13370 commutative: true,
13371 symEffect: SymRead,
13372 asm: x86.AMOVWLZX,
13373 scale: 1,
13374 reg: regInfo{
13375 inputs: []inputInfo{
13376 {1, 49151},
13377 {0, 4295032831},
13378 },
13379 outputs: []outputInfo{
13380 {0, 49135},
13381 },
13382 },
13383 },
13384 {
13385 name: "MOVWloadidx2",
13386 auxType: auxSymOff,
13387 argLen: 3,
13388 symEffect: SymRead,
13389 asm: x86.AMOVWLZX,
13390 scale: 2,
13391 reg: regInfo{
13392 inputs: []inputInfo{
13393 {1, 49151},
13394 {0, 4295032831},
13395 },
13396 outputs: []outputInfo{
13397 {0, 49135},
13398 },
13399 },
13400 },
13401 {
13402 name: "MOVLloadidx1",
13403 auxType: auxSymOff,
13404 argLen: 3,
13405 commutative: true,
13406 symEffect: SymRead,
13407 asm: x86.AMOVL,
13408 scale: 1,
13409 reg: regInfo{
13410 inputs: []inputInfo{
13411 {1, 49151},
13412 {0, 4295032831},
13413 },
13414 outputs: []outputInfo{
13415 {0, 49135},
13416 },
13417 },
13418 },
13419 {
13420 name: "MOVLloadidx4",
13421 auxType: auxSymOff,
13422 argLen: 3,
13423 symEffect: SymRead,
13424 asm: x86.AMOVL,
13425 scale: 4,
13426 reg: regInfo{
13427 inputs: []inputInfo{
13428 {1, 49151},
13429 {0, 4295032831},
13430 },
13431 outputs: []outputInfo{
13432 {0, 49135},
13433 },
13434 },
13435 },
13436 {
13437 name: "MOVLloadidx8",
13438 auxType: auxSymOff,
13439 argLen: 3,
13440 symEffect: SymRead,
13441 asm: x86.AMOVL,
13442 scale: 8,
13443 reg: regInfo{
13444 inputs: []inputInfo{
13445 {1, 49151},
13446 {0, 4295032831},
13447 },
13448 outputs: []outputInfo{
13449 {0, 49135},
13450 },
13451 },
13452 },
13453 {
13454 name: "MOVQloadidx1",
13455 auxType: auxSymOff,
13456 argLen: 3,
13457 commutative: true,
13458 symEffect: SymRead,
13459 asm: x86.AMOVQ,
13460 scale: 1,
13461 reg: regInfo{
13462 inputs: []inputInfo{
13463 {1, 49151},
13464 {0, 4295032831},
13465 },
13466 outputs: []outputInfo{
13467 {0, 49135},
13468 },
13469 },
13470 },
13471 {
13472 name: "MOVQloadidx8",
13473 auxType: auxSymOff,
13474 argLen: 3,
13475 symEffect: SymRead,
13476 asm: x86.AMOVQ,
13477 scale: 8,
13478 reg: regInfo{
13479 inputs: []inputInfo{
13480 {1, 49151},
13481 {0, 4295032831},
13482 },
13483 outputs: []outputInfo{
13484 {0, 49135},
13485 },
13486 },
13487 },
13488 {
13489 name: "MOVBstoreidx1",
13490 auxType: auxSymOff,
13491 argLen: 4,
13492 commutative: true,
13493 symEffect: SymWrite,
13494 asm: x86.AMOVB,
13495 scale: 1,
13496 reg: regInfo{
13497 inputs: []inputInfo{
13498 {1, 49151},
13499 {2, 49151},
13500 {0, 4295032831},
13501 },
13502 },
13503 },
13504 {
13505 name: "MOVWstoreidx1",
13506 auxType: auxSymOff,
13507 argLen: 4,
13508 commutative: true,
13509 symEffect: SymWrite,
13510 asm: x86.AMOVW,
13511 scale: 1,
13512 reg: regInfo{
13513 inputs: []inputInfo{
13514 {1, 49151},
13515 {2, 49151},
13516 {0, 4295032831},
13517 },
13518 },
13519 },
13520 {
13521 name: "MOVWstoreidx2",
13522 auxType: auxSymOff,
13523 argLen: 4,
13524 symEffect: SymWrite,
13525 asm: x86.AMOVW,
13526 scale: 2,
13527 reg: regInfo{
13528 inputs: []inputInfo{
13529 {1, 49151},
13530 {2, 49151},
13531 {0, 4295032831},
13532 },
13533 },
13534 },
13535 {
13536 name: "MOVLstoreidx1",
13537 auxType: auxSymOff,
13538 argLen: 4,
13539 commutative: true,
13540 symEffect: SymWrite,
13541 asm: x86.AMOVL,
13542 scale: 1,
13543 reg: regInfo{
13544 inputs: []inputInfo{
13545 {1, 49151},
13546 {2, 49151},
13547 {0, 4295032831},
13548 },
13549 },
13550 },
13551 {
13552 name: "MOVLstoreidx4",
13553 auxType: auxSymOff,
13554 argLen: 4,
13555 symEffect: SymWrite,
13556 asm: x86.AMOVL,
13557 scale: 4,
13558 reg: regInfo{
13559 inputs: []inputInfo{
13560 {1, 49151},
13561 {2, 49151},
13562 {0, 4295032831},
13563 },
13564 },
13565 },
13566 {
13567 name: "MOVLstoreidx8",
13568 auxType: auxSymOff,
13569 argLen: 4,
13570 symEffect: SymWrite,
13571 asm: x86.AMOVL,
13572 scale: 8,
13573 reg: regInfo{
13574 inputs: []inputInfo{
13575 {1, 49151},
13576 {2, 49151},
13577 {0, 4295032831},
13578 },
13579 },
13580 },
13581 {
13582 name: "MOVQstoreidx1",
13583 auxType: auxSymOff,
13584 argLen: 4,
13585 commutative: true,
13586 symEffect: SymWrite,
13587 asm: x86.AMOVQ,
13588 scale: 1,
13589 reg: regInfo{
13590 inputs: []inputInfo{
13591 {1, 49151},
13592 {2, 49151},
13593 {0, 4295032831},
13594 },
13595 },
13596 },
13597 {
13598 name: "MOVQstoreidx8",
13599 auxType: auxSymOff,
13600 argLen: 4,
13601 symEffect: SymWrite,
13602 asm: x86.AMOVQ,
13603 scale: 8,
13604 reg: regInfo{
13605 inputs: []inputInfo{
13606 {1, 49151},
13607 {2, 49151},
13608 {0, 4295032831},
13609 },
13610 },
13611 },
13612 {
13613 name: "MOVBstoreconst",
13614 auxType: auxSymValAndOff,
13615 argLen: 2,
13616 faultOnNilArg0: true,
13617 symEffect: SymWrite,
13618 asm: x86.AMOVB,
13619 reg: regInfo{
13620 inputs: []inputInfo{
13621 {0, 4295032831},
13622 },
13623 },
13624 },
13625 {
13626 name: "MOVWstoreconst",
13627 auxType: auxSymValAndOff,
13628 argLen: 2,
13629 faultOnNilArg0: true,
13630 symEffect: SymWrite,
13631 asm: x86.AMOVW,
13632 reg: regInfo{
13633 inputs: []inputInfo{
13634 {0, 4295032831},
13635 },
13636 },
13637 },
13638 {
13639 name: "MOVLstoreconst",
13640 auxType: auxSymValAndOff,
13641 argLen: 2,
13642 faultOnNilArg0: true,
13643 symEffect: SymWrite,
13644 asm: x86.AMOVL,
13645 reg: regInfo{
13646 inputs: []inputInfo{
13647 {0, 4295032831},
13648 },
13649 },
13650 },
13651 {
13652 name: "MOVQstoreconst",
13653 auxType: auxSymValAndOff,
13654 argLen: 2,
13655 faultOnNilArg0: true,
13656 symEffect: SymWrite,
13657 asm: x86.AMOVQ,
13658 reg: regInfo{
13659 inputs: []inputInfo{
13660 {0, 4295032831},
13661 },
13662 },
13663 },
13664 {
13665 name: "MOVOstoreconst",
13666 auxType: auxSymValAndOff,
13667 argLen: 2,
13668 faultOnNilArg0: true,
13669 symEffect: SymWrite,
13670 asm: x86.AMOVUPS,
13671 reg: regInfo{
13672 inputs: []inputInfo{
13673 {0, 4295032831},
13674 },
13675 },
13676 },
13677 {
13678 name: "MOVBstoreconstidx1",
13679 auxType: auxSymValAndOff,
13680 argLen: 3,
13681 commutative: true,
13682 symEffect: SymWrite,
13683 asm: x86.AMOVB,
13684 scale: 1,
13685 reg: regInfo{
13686 inputs: []inputInfo{
13687 {1, 49151},
13688 {0, 4295032831},
13689 },
13690 },
13691 },
13692 {
13693 name: "MOVWstoreconstidx1",
13694 auxType: auxSymValAndOff,
13695 argLen: 3,
13696 commutative: true,
13697 symEffect: SymWrite,
13698 asm: x86.AMOVW,
13699 scale: 1,
13700 reg: regInfo{
13701 inputs: []inputInfo{
13702 {1, 49151},
13703 {0, 4295032831},
13704 },
13705 },
13706 },
13707 {
13708 name: "MOVWstoreconstidx2",
13709 auxType: auxSymValAndOff,
13710 argLen: 3,
13711 symEffect: SymWrite,
13712 asm: x86.AMOVW,
13713 scale: 2,
13714 reg: regInfo{
13715 inputs: []inputInfo{
13716 {1, 49151},
13717 {0, 4295032831},
13718 },
13719 },
13720 },
13721 {
13722 name: "MOVLstoreconstidx1",
13723 auxType: auxSymValAndOff,
13724 argLen: 3,
13725 commutative: true,
13726 symEffect: SymWrite,
13727 asm: x86.AMOVL,
13728 scale: 1,
13729 reg: regInfo{
13730 inputs: []inputInfo{
13731 {1, 49151},
13732 {0, 4295032831},
13733 },
13734 },
13735 },
13736 {
13737 name: "MOVLstoreconstidx4",
13738 auxType: auxSymValAndOff,
13739 argLen: 3,
13740 symEffect: SymWrite,
13741 asm: x86.AMOVL,
13742 scale: 4,
13743 reg: regInfo{
13744 inputs: []inputInfo{
13745 {1, 49151},
13746 {0, 4295032831},
13747 },
13748 },
13749 },
13750 {
13751 name: "MOVQstoreconstidx1",
13752 auxType: auxSymValAndOff,
13753 argLen: 3,
13754 commutative: true,
13755 symEffect: SymWrite,
13756 asm: x86.AMOVQ,
13757 scale: 1,
13758 reg: regInfo{
13759 inputs: []inputInfo{
13760 {1, 49151},
13761 {0, 4295032831},
13762 },
13763 },
13764 },
13765 {
13766 name: "MOVQstoreconstidx8",
13767 auxType: auxSymValAndOff,
13768 argLen: 3,
13769 symEffect: SymWrite,
13770 asm: x86.AMOVQ,
13771 scale: 8,
13772 reg: regInfo{
13773 inputs: []inputInfo{
13774 {1, 49151},
13775 {0, 4295032831},
13776 },
13777 },
13778 },
13779 {
13780 name: "DUFFZERO",
13781 auxType: auxInt64,
13782 argLen: 2,
13783 faultOnNilArg0: true,
13784 unsafePoint: true,
13785 reg: regInfo{
13786 inputs: []inputInfo{
13787 {0, 128},
13788 },
13789 clobbers: 128,
13790 },
13791 },
13792 {
13793 name: "REPSTOSQ",
13794 argLen: 4,
13795 faultOnNilArg0: true,
13796 reg: regInfo{
13797 inputs: []inputInfo{
13798 {0, 128},
13799 {1, 2},
13800 {2, 1},
13801 },
13802 clobbers: 130,
13803 },
13804 },
13805 {
13806 name: "CALLstatic",
13807 auxType: auxCallOff,
13808 argLen: -1,
13809 clobberFlags: true,
13810 call: true,
13811 reg: regInfo{
13812 clobbers: 2147483631,
13813 },
13814 },
13815 {
13816 name: "CALLtail",
13817 auxType: auxCallOff,
13818 argLen: -1,
13819 clobberFlags: true,
13820 call: true,
13821 tailCall: true,
13822 reg: regInfo{
13823 clobbers: 2147483631,
13824 },
13825 },
13826 {
13827 name: "CALLclosure",
13828 auxType: auxCallOff,
13829 argLen: -1,
13830 clobberFlags: true,
13831 call: true,
13832 reg: regInfo{
13833 inputs: []inputInfo{
13834 {1, 4},
13835 {0, 49151},
13836 },
13837 clobbers: 2147483631,
13838 },
13839 },
13840 {
13841 name: "CALLinter",
13842 auxType: auxCallOff,
13843 argLen: -1,
13844 clobberFlags: true,
13845 call: true,
13846 reg: regInfo{
13847 inputs: []inputInfo{
13848 {0, 49135},
13849 },
13850 clobbers: 2147483631,
13851 },
13852 },
13853 {
13854 name: "DUFFCOPY",
13855 auxType: auxInt64,
13856 argLen: 3,
13857 clobberFlags: true,
13858 faultOnNilArg0: true,
13859 faultOnNilArg1: true,
13860 unsafePoint: true,
13861 reg: regInfo{
13862 inputs: []inputInfo{
13863 {0, 128},
13864 {1, 64},
13865 },
13866 clobbers: 65728,
13867 },
13868 },
13869 {
13870 name: "REPMOVSQ",
13871 argLen: 4,
13872 faultOnNilArg0: true,
13873 faultOnNilArg1: true,
13874 reg: regInfo{
13875 inputs: []inputInfo{
13876 {0, 128},
13877 {1, 64},
13878 {2, 2},
13879 },
13880 clobbers: 194,
13881 },
13882 },
13883 {
13884 name: "InvertFlags",
13885 argLen: 1,
13886 reg: regInfo{},
13887 },
13888 {
13889 name: "LoweredGetG",
13890 argLen: 1,
13891 reg: regInfo{
13892 outputs: []outputInfo{
13893 {0, 49135},
13894 },
13895 },
13896 },
13897 {
13898 name: "LoweredGetClosurePtr",
13899 argLen: 0,
13900 zeroWidth: true,
13901 reg: regInfo{
13902 outputs: []outputInfo{
13903 {0, 4},
13904 },
13905 },
13906 },
13907 {
13908 name: "LoweredGetCallerPC",
13909 argLen: 0,
13910 rematerializeable: true,
13911 reg: regInfo{
13912 outputs: []outputInfo{
13913 {0, 49135},
13914 },
13915 },
13916 },
13917 {
13918 name: "LoweredGetCallerSP",
13919 argLen: 1,
13920 rematerializeable: true,
13921 reg: regInfo{
13922 outputs: []outputInfo{
13923 {0, 49135},
13924 },
13925 },
13926 },
13927 {
13928 name: "LoweredNilCheck",
13929 argLen: 2,
13930 clobberFlags: true,
13931 nilCheck: true,
13932 faultOnNilArg0: true,
13933 reg: regInfo{
13934 inputs: []inputInfo{
13935 {0, 49151},
13936 },
13937 },
13938 },
13939 {
13940 name: "LoweredWB",
13941 auxType: auxInt64,
13942 argLen: 1,
13943 clobberFlags: true,
13944 reg: regInfo{
13945 clobbers: 2147418112,
13946 outputs: []outputInfo{
13947 {0, 2048},
13948 },
13949 },
13950 },
13951 {
13952 name: "LoweredHasCPUFeature",
13953 auxType: auxSym,
13954 argLen: 0,
13955 rematerializeable: true,
13956 symEffect: SymNone,
13957 reg: regInfo{
13958 outputs: []outputInfo{
13959 {0, 49135},
13960 },
13961 },
13962 },
13963 {
13964 name: "LoweredPanicBoundsA",
13965 auxType: auxInt64,
13966 argLen: 3,
13967 call: true,
13968 reg: regInfo{
13969 inputs: []inputInfo{
13970 {0, 4},
13971 {1, 8},
13972 },
13973 },
13974 },
13975 {
13976 name: "LoweredPanicBoundsB",
13977 auxType: auxInt64,
13978 argLen: 3,
13979 call: true,
13980 reg: regInfo{
13981 inputs: []inputInfo{
13982 {0, 2},
13983 {1, 4},
13984 },
13985 },
13986 },
13987 {
13988 name: "LoweredPanicBoundsC",
13989 auxType: auxInt64,
13990 argLen: 3,
13991 call: true,
13992 reg: regInfo{
13993 inputs: []inputInfo{
13994 {0, 1},
13995 {1, 2},
13996 },
13997 },
13998 },
13999 {
14000 name: "FlagEQ",
14001 argLen: 0,
14002 reg: regInfo{},
14003 },
14004 {
14005 name: "FlagLT_ULT",
14006 argLen: 0,
14007 reg: regInfo{},
14008 },
14009 {
14010 name: "FlagLT_UGT",
14011 argLen: 0,
14012 reg: regInfo{},
14013 },
14014 {
14015 name: "FlagGT_UGT",
14016 argLen: 0,
14017 reg: regInfo{},
14018 },
14019 {
14020 name: "FlagGT_ULT",
14021 argLen: 0,
14022 reg: regInfo{},
14023 },
14024 {
14025 name: "MOVBatomicload",
14026 auxType: auxSymOff,
14027 argLen: 2,
14028 faultOnNilArg0: true,
14029 symEffect: SymRead,
14030 asm: x86.AMOVB,
14031 reg: regInfo{
14032 inputs: []inputInfo{
14033 {0, 4295032831},
14034 },
14035 outputs: []outputInfo{
14036 {0, 49135},
14037 },
14038 },
14039 },
14040 {
14041 name: "MOVLatomicload",
14042 auxType: auxSymOff,
14043 argLen: 2,
14044 faultOnNilArg0: true,
14045 symEffect: SymRead,
14046 asm: x86.AMOVL,
14047 reg: regInfo{
14048 inputs: []inputInfo{
14049 {0, 4295032831},
14050 },
14051 outputs: []outputInfo{
14052 {0, 49135},
14053 },
14054 },
14055 },
14056 {
14057 name: "MOVQatomicload",
14058 auxType: auxSymOff,
14059 argLen: 2,
14060 faultOnNilArg0: true,
14061 symEffect: SymRead,
14062 asm: x86.AMOVQ,
14063 reg: regInfo{
14064 inputs: []inputInfo{
14065 {0, 4295032831},
14066 },
14067 outputs: []outputInfo{
14068 {0, 49135},
14069 },
14070 },
14071 },
14072 {
14073 name: "XCHGB",
14074 auxType: auxSymOff,
14075 argLen: 3,
14076 resultInArg0: true,
14077 faultOnNilArg1: true,
14078 hasSideEffects: true,
14079 symEffect: SymRdWr,
14080 asm: x86.AXCHGB,
14081 reg: regInfo{
14082 inputs: []inputInfo{
14083 {0, 49135},
14084 {1, 4295032831},
14085 },
14086 outputs: []outputInfo{
14087 {0, 49135},
14088 },
14089 },
14090 },
14091 {
14092 name: "XCHGL",
14093 auxType: auxSymOff,
14094 argLen: 3,
14095 resultInArg0: true,
14096 faultOnNilArg1: true,
14097 hasSideEffects: true,
14098 symEffect: SymRdWr,
14099 asm: x86.AXCHGL,
14100 reg: regInfo{
14101 inputs: []inputInfo{
14102 {0, 49135},
14103 {1, 4295032831},
14104 },
14105 outputs: []outputInfo{
14106 {0, 49135},
14107 },
14108 },
14109 },
14110 {
14111 name: "XCHGQ",
14112 auxType: auxSymOff,
14113 argLen: 3,
14114 resultInArg0: true,
14115 faultOnNilArg1: true,
14116 hasSideEffects: true,
14117 symEffect: SymRdWr,
14118 asm: x86.AXCHGQ,
14119 reg: regInfo{
14120 inputs: []inputInfo{
14121 {0, 49135},
14122 {1, 4295032831},
14123 },
14124 outputs: []outputInfo{
14125 {0, 49135},
14126 },
14127 },
14128 },
14129 {
14130 name: "XADDLlock",
14131 auxType: auxSymOff,
14132 argLen: 3,
14133 resultInArg0: true,
14134 clobberFlags: true,
14135 faultOnNilArg1: true,
14136 hasSideEffects: true,
14137 symEffect: SymRdWr,
14138 asm: x86.AXADDL,
14139 reg: regInfo{
14140 inputs: []inputInfo{
14141 {0, 49135},
14142 {1, 4295032831},
14143 },
14144 outputs: []outputInfo{
14145 {0, 49135},
14146 },
14147 },
14148 },
14149 {
14150 name: "XADDQlock",
14151 auxType: auxSymOff,
14152 argLen: 3,
14153 resultInArg0: true,
14154 clobberFlags: true,
14155 faultOnNilArg1: true,
14156 hasSideEffects: true,
14157 symEffect: SymRdWr,
14158 asm: x86.AXADDQ,
14159 reg: regInfo{
14160 inputs: []inputInfo{
14161 {0, 49135},
14162 {1, 4295032831},
14163 },
14164 outputs: []outputInfo{
14165 {0, 49135},
14166 },
14167 },
14168 },
14169 {
14170 name: "AddTupleFirst32",
14171 argLen: 2,
14172 reg: regInfo{},
14173 },
14174 {
14175 name: "AddTupleFirst64",
14176 argLen: 2,
14177 reg: regInfo{},
14178 },
14179 {
14180 name: "CMPXCHGLlock",
14181 auxType: auxSymOff,
14182 argLen: 4,
14183 clobberFlags: true,
14184 faultOnNilArg0: true,
14185 hasSideEffects: true,
14186 symEffect: SymRdWr,
14187 asm: x86.ACMPXCHGL,
14188 reg: regInfo{
14189 inputs: []inputInfo{
14190 {1, 1},
14191 {0, 49135},
14192 {2, 49135},
14193 },
14194 clobbers: 1,
14195 outputs: []outputInfo{
14196 {1, 0},
14197 {0, 49135},
14198 },
14199 },
14200 },
14201 {
14202 name: "CMPXCHGQlock",
14203 auxType: auxSymOff,
14204 argLen: 4,
14205 clobberFlags: true,
14206 faultOnNilArg0: true,
14207 hasSideEffects: true,
14208 symEffect: SymRdWr,
14209 asm: x86.ACMPXCHGQ,
14210 reg: regInfo{
14211 inputs: []inputInfo{
14212 {1, 1},
14213 {0, 49135},
14214 {2, 49135},
14215 },
14216 clobbers: 1,
14217 outputs: []outputInfo{
14218 {1, 0},
14219 {0, 49135},
14220 },
14221 },
14222 },
14223 {
14224 name: "ANDBlock",
14225 auxType: auxSymOff,
14226 argLen: 3,
14227 clobberFlags: true,
14228 faultOnNilArg0: true,
14229 hasSideEffects: true,
14230 symEffect: SymRdWr,
14231 asm: x86.AANDB,
14232 reg: regInfo{
14233 inputs: []inputInfo{
14234 {1, 49151},
14235 {0, 4295032831},
14236 },
14237 },
14238 },
14239 {
14240 name: "ANDLlock",
14241 auxType: auxSymOff,
14242 argLen: 3,
14243 clobberFlags: true,
14244 faultOnNilArg0: true,
14245 hasSideEffects: true,
14246 symEffect: SymRdWr,
14247 asm: x86.AANDL,
14248 reg: regInfo{
14249 inputs: []inputInfo{
14250 {1, 49151},
14251 {0, 4295032831},
14252 },
14253 },
14254 },
14255 {
14256 name: "ANDQlock",
14257 auxType: auxSymOff,
14258 argLen: 3,
14259 clobberFlags: true,
14260 faultOnNilArg0: true,
14261 hasSideEffects: true,
14262 symEffect: SymRdWr,
14263 asm: x86.AANDQ,
14264 reg: regInfo{
14265 inputs: []inputInfo{
14266 {1, 49151},
14267 {0, 4295032831},
14268 },
14269 },
14270 },
14271 {
14272 name: "ORBlock",
14273 auxType: auxSymOff,
14274 argLen: 3,
14275 clobberFlags: true,
14276 faultOnNilArg0: true,
14277 hasSideEffects: true,
14278 symEffect: SymRdWr,
14279 asm: x86.AORB,
14280 reg: regInfo{
14281 inputs: []inputInfo{
14282 {1, 49151},
14283 {0, 4295032831},
14284 },
14285 },
14286 },
14287 {
14288 name: "ORLlock",
14289 auxType: auxSymOff,
14290 argLen: 3,
14291 clobberFlags: true,
14292 faultOnNilArg0: true,
14293 hasSideEffects: true,
14294 symEffect: SymRdWr,
14295 asm: x86.AORL,
14296 reg: regInfo{
14297 inputs: []inputInfo{
14298 {1, 49151},
14299 {0, 4295032831},
14300 },
14301 },
14302 },
14303 {
14304 name: "ORQlock",
14305 auxType: auxSymOff,
14306 argLen: 3,
14307 clobberFlags: true,
14308 faultOnNilArg0: true,
14309 hasSideEffects: true,
14310 symEffect: SymRdWr,
14311 asm: x86.AORQ,
14312 reg: regInfo{
14313 inputs: []inputInfo{
14314 {1, 49151},
14315 {0, 4295032831},
14316 },
14317 },
14318 },
14319 {
14320 name: "LoweredAtomicAnd64",
14321 auxType: auxSymOff,
14322 argLen: 3,
14323 resultNotInArgs: true,
14324 clobberFlags: true,
14325 needIntTemp: true,
14326 faultOnNilArg0: true,
14327 hasSideEffects: true,
14328 unsafePoint: true,
14329 symEffect: SymRdWr,
14330 asm: x86.AANDQ,
14331 reg: regInfo{
14332 inputs: []inputInfo{
14333 {0, 49134},
14334 {1, 49134},
14335 },
14336 outputs: []outputInfo{
14337 {1, 0},
14338 {0, 1},
14339 },
14340 },
14341 },
14342 {
14343 name: "LoweredAtomicAnd32",
14344 auxType: auxSymOff,
14345 argLen: 3,
14346 resultNotInArgs: true,
14347 clobberFlags: true,
14348 needIntTemp: true,
14349 faultOnNilArg0: true,
14350 hasSideEffects: true,
14351 unsafePoint: true,
14352 symEffect: SymRdWr,
14353 asm: x86.AANDL,
14354 reg: regInfo{
14355 inputs: []inputInfo{
14356 {0, 49134},
14357 {1, 49134},
14358 },
14359 outputs: []outputInfo{
14360 {1, 0},
14361 {0, 1},
14362 },
14363 },
14364 },
14365 {
14366 name: "LoweredAtomicOr64",
14367 auxType: auxSymOff,
14368 argLen: 3,
14369 resultNotInArgs: true,
14370 clobberFlags: true,
14371 needIntTemp: true,
14372 faultOnNilArg0: true,
14373 hasSideEffects: true,
14374 unsafePoint: true,
14375 symEffect: SymRdWr,
14376 asm: x86.AORQ,
14377 reg: regInfo{
14378 inputs: []inputInfo{
14379 {0, 49134},
14380 {1, 49134},
14381 },
14382 outputs: []outputInfo{
14383 {1, 0},
14384 {0, 1},
14385 },
14386 },
14387 },
14388 {
14389 name: "LoweredAtomicOr32",
14390 auxType: auxSymOff,
14391 argLen: 3,
14392 resultNotInArgs: true,
14393 clobberFlags: true,
14394 needIntTemp: true,
14395 faultOnNilArg0: true,
14396 hasSideEffects: true,
14397 unsafePoint: true,
14398 symEffect: SymRdWr,
14399 asm: x86.AORL,
14400 reg: regInfo{
14401 inputs: []inputInfo{
14402 {0, 49134},
14403 {1, 49134},
14404 },
14405 outputs: []outputInfo{
14406 {1, 0},
14407 {0, 1},
14408 },
14409 },
14410 },
14411 {
14412 name: "PrefetchT0",
14413 argLen: 2,
14414 hasSideEffects: true,
14415 asm: x86.APREFETCHT0,
14416 reg: regInfo{
14417 inputs: []inputInfo{
14418 {0, 4295032831},
14419 },
14420 },
14421 },
14422 {
14423 name: "PrefetchNTA",
14424 argLen: 2,
14425 hasSideEffects: true,
14426 asm: x86.APREFETCHNTA,
14427 reg: regInfo{
14428 inputs: []inputInfo{
14429 {0, 4295032831},
14430 },
14431 },
14432 },
14433 {
14434 name: "ANDNQ",
14435 argLen: 2,
14436 clobberFlags: true,
14437 asm: x86.AANDNQ,
14438 reg: regInfo{
14439 inputs: []inputInfo{
14440 {0, 49135},
14441 {1, 49135},
14442 },
14443 outputs: []outputInfo{
14444 {0, 49135},
14445 },
14446 },
14447 },
14448 {
14449 name: "ANDNL",
14450 argLen: 2,
14451 clobberFlags: true,
14452 asm: x86.AANDNL,
14453 reg: regInfo{
14454 inputs: []inputInfo{
14455 {0, 49135},
14456 {1, 49135},
14457 },
14458 outputs: []outputInfo{
14459 {0, 49135},
14460 },
14461 },
14462 },
14463 {
14464 name: "BLSIQ",
14465 argLen: 1,
14466 clobberFlags: true,
14467 asm: x86.ABLSIQ,
14468 reg: regInfo{
14469 inputs: []inputInfo{
14470 {0, 49135},
14471 },
14472 outputs: []outputInfo{
14473 {0, 49135},
14474 },
14475 },
14476 },
14477 {
14478 name: "BLSIL",
14479 argLen: 1,
14480 clobberFlags: true,
14481 asm: x86.ABLSIL,
14482 reg: regInfo{
14483 inputs: []inputInfo{
14484 {0, 49135},
14485 },
14486 outputs: []outputInfo{
14487 {0, 49135},
14488 },
14489 },
14490 },
14491 {
14492 name: "BLSMSKQ",
14493 argLen: 1,
14494 clobberFlags: true,
14495 asm: x86.ABLSMSKQ,
14496 reg: regInfo{
14497 inputs: []inputInfo{
14498 {0, 49135},
14499 },
14500 outputs: []outputInfo{
14501 {0, 49135},
14502 },
14503 },
14504 },
14505 {
14506 name: "BLSMSKL",
14507 argLen: 1,
14508 clobberFlags: true,
14509 asm: x86.ABLSMSKL,
14510 reg: regInfo{
14511 inputs: []inputInfo{
14512 {0, 49135},
14513 },
14514 outputs: []outputInfo{
14515 {0, 49135},
14516 },
14517 },
14518 },
14519 {
14520 name: "BLSRQ",
14521 argLen: 1,
14522 asm: x86.ABLSRQ,
14523 reg: regInfo{
14524 inputs: []inputInfo{
14525 {0, 49135},
14526 },
14527 outputs: []outputInfo{
14528 {1, 0},
14529 {0, 49135},
14530 },
14531 },
14532 },
14533 {
14534 name: "BLSRL",
14535 argLen: 1,
14536 asm: x86.ABLSRL,
14537 reg: regInfo{
14538 inputs: []inputInfo{
14539 {0, 49135},
14540 },
14541 outputs: []outputInfo{
14542 {1, 0},
14543 {0, 49135},
14544 },
14545 },
14546 },
14547 {
14548 name: "TZCNTQ",
14549 argLen: 1,
14550 clobberFlags: true,
14551 asm: x86.ATZCNTQ,
14552 reg: regInfo{
14553 inputs: []inputInfo{
14554 {0, 49135},
14555 },
14556 outputs: []outputInfo{
14557 {0, 49135},
14558 },
14559 },
14560 },
14561 {
14562 name: "TZCNTL",
14563 argLen: 1,
14564 clobberFlags: true,
14565 asm: x86.ATZCNTL,
14566 reg: regInfo{
14567 inputs: []inputInfo{
14568 {0, 49135},
14569 },
14570 outputs: []outputInfo{
14571 {0, 49135},
14572 },
14573 },
14574 },
14575 {
14576 name: "LZCNTQ",
14577 argLen: 1,
14578 clobberFlags: true,
14579 asm: x86.ALZCNTQ,
14580 reg: regInfo{
14581 inputs: []inputInfo{
14582 {0, 49135},
14583 },
14584 outputs: []outputInfo{
14585 {0, 49135},
14586 },
14587 },
14588 },
14589 {
14590 name: "LZCNTL",
14591 argLen: 1,
14592 clobberFlags: true,
14593 asm: x86.ALZCNTL,
14594 reg: regInfo{
14595 inputs: []inputInfo{
14596 {0, 49135},
14597 },
14598 outputs: []outputInfo{
14599 {0, 49135},
14600 },
14601 },
14602 },
14603 {
14604 name: "MOVBEWstore",
14605 auxType: auxSymOff,
14606 argLen: 3,
14607 faultOnNilArg0: true,
14608 symEffect: SymWrite,
14609 asm: x86.AMOVBEW,
14610 reg: regInfo{
14611 inputs: []inputInfo{
14612 {1, 49151},
14613 {0, 4295032831},
14614 },
14615 },
14616 },
14617 {
14618 name: "MOVBELload",
14619 auxType: auxSymOff,
14620 argLen: 2,
14621 faultOnNilArg0: true,
14622 symEffect: SymRead,
14623 asm: x86.AMOVBEL,
14624 reg: regInfo{
14625 inputs: []inputInfo{
14626 {0, 4295032831},
14627 },
14628 outputs: []outputInfo{
14629 {0, 49135},
14630 },
14631 },
14632 },
14633 {
14634 name: "MOVBELstore",
14635 auxType: auxSymOff,
14636 argLen: 3,
14637 faultOnNilArg0: true,
14638 symEffect: SymWrite,
14639 asm: x86.AMOVBEL,
14640 reg: regInfo{
14641 inputs: []inputInfo{
14642 {1, 49151},
14643 {0, 4295032831},
14644 },
14645 },
14646 },
14647 {
14648 name: "MOVBEQload",
14649 auxType: auxSymOff,
14650 argLen: 2,
14651 faultOnNilArg0: true,
14652 symEffect: SymRead,
14653 asm: x86.AMOVBEQ,
14654 reg: regInfo{
14655 inputs: []inputInfo{
14656 {0, 4295032831},
14657 },
14658 outputs: []outputInfo{
14659 {0, 49135},
14660 },
14661 },
14662 },
14663 {
14664 name: "MOVBEQstore",
14665 auxType: auxSymOff,
14666 argLen: 3,
14667 faultOnNilArg0: true,
14668 symEffect: SymWrite,
14669 asm: x86.AMOVBEQ,
14670 reg: regInfo{
14671 inputs: []inputInfo{
14672 {1, 49151},
14673 {0, 4295032831},
14674 },
14675 },
14676 },
14677 {
14678 name: "MOVBELloadidx1",
14679 auxType: auxSymOff,
14680 argLen: 3,
14681 commutative: true,
14682 symEffect: SymRead,
14683 asm: x86.AMOVBEL,
14684 scale: 1,
14685 reg: regInfo{
14686 inputs: []inputInfo{
14687 {1, 49151},
14688 {0, 4295032831},
14689 },
14690 outputs: []outputInfo{
14691 {0, 49135},
14692 },
14693 },
14694 },
14695 {
14696 name: "MOVBELloadidx4",
14697 auxType: auxSymOff,
14698 argLen: 3,
14699 symEffect: SymRead,
14700 asm: x86.AMOVBEL,
14701 scale: 4,
14702 reg: regInfo{
14703 inputs: []inputInfo{
14704 {1, 49151},
14705 {0, 4295032831},
14706 },
14707 outputs: []outputInfo{
14708 {0, 49135},
14709 },
14710 },
14711 },
14712 {
14713 name: "MOVBELloadidx8",
14714 auxType: auxSymOff,
14715 argLen: 3,
14716 symEffect: SymRead,
14717 asm: x86.AMOVBEL,
14718 scale: 8,
14719 reg: regInfo{
14720 inputs: []inputInfo{
14721 {1, 49151},
14722 {0, 4295032831},
14723 },
14724 outputs: []outputInfo{
14725 {0, 49135},
14726 },
14727 },
14728 },
14729 {
14730 name: "MOVBEQloadidx1",
14731 auxType: auxSymOff,
14732 argLen: 3,
14733 commutative: true,
14734 symEffect: SymRead,
14735 asm: x86.AMOVBEQ,
14736 scale: 1,
14737 reg: regInfo{
14738 inputs: []inputInfo{
14739 {1, 49151},
14740 {0, 4295032831},
14741 },
14742 outputs: []outputInfo{
14743 {0, 49135},
14744 },
14745 },
14746 },
14747 {
14748 name: "MOVBEQloadidx8",
14749 auxType: auxSymOff,
14750 argLen: 3,
14751 symEffect: SymRead,
14752 asm: x86.AMOVBEQ,
14753 scale: 8,
14754 reg: regInfo{
14755 inputs: []inputInfo{
14756 {1, 49151},
14757 {0, 4295032831},
14758 },
14759 outputs: []outputInfo{
14760 {0, 49135},
14761 },
14762 },
14763 },
14764 {
14765 name: "MOVBEWstoreidx1",
14766 auxType: auxSymOff,
14767 argLen: 4,
14768 commutative: true,
14769 symEffect: SymWrite,
14770 asm: x86.AMOVBEW,
14771 scale: 1,
14772 reg: regInfo{
14773 inputs: []inputInfo{
14774 {1, 49151},
14775 {2, 49151},
14776 {0, 4295032831},
14777 },
14778 },
14779 },
14780 {
14781 name: "MOVBEWstoreidx2",
14782 auxType: auxSymOff,
14783 argLen: 4,
14784 symEffect: SymWrite,
14785 asm: x86.AMOVBEW,
14786 scale: 2,
14787 reg: regInfo{
14788 inputs: []inputInfo{
14789 {1, 49151},
14790 {2, 49151},
14791 {0, 4295032831},
14792 },
14793 },
14794 },
14795 {
14796 name: "MOVBELstoreidx1",
14797 auxType: auxSymOff,
14798 argLen: 4,
14799 commutative: true,
14800 symEffect: SymWrite,
14801 asm: x86.AMOVBEL,
14802 scale: 1,
14803 reg: regInfo{
14804 inputs: []inputInfo{
14805 {1, 49151},
14806 {2, 49151},
14807 {0, 4295032831},
14808 },
14809 },
14810 },
14811 {
14812 name: "MOVBELstoreidx4",
14813 auxType: auxSymOff,
14814 argLen: 4,
14815 symEffect: SymWrite,
14816 asm: x86.AMOVBEL,
14817 scale: 4,
14818 reg: regInfo{
14819 inputs: []inputInfo{
14820 {1, 49151},
14821 {2, 49151},
14822 {0, 4295032831},
14823 },
14824 },
14825 },
14826 {
14827 name: "MOVBELstoreidx8",
14828 auxType: auxSymOff,
14829 argLen: 4,
14830 symEffect: SymWrite,
14831 asm: x86.AMOVBEL,
14832 scale: 8,
14833 reg: regInfo{
14834 inputs: []inputInfo{
14835 {1, 49151},
14836 {2, 49151},
14837 {0, 4295032831},
14838 },
14839 },
14840 },
14841 {
14842 name: "MOVBEQstoreidx1",
14843 auxType: auxSymOff,
14844 argLen: 4,
14845 commutative: true,
14846 symEffect: SymWrite,
14847 asm: x86.AMOVBEQ,
14848 scale: 1,
14849 reg: regInfo{
14850 inputs: []inputInfo{
14851 {1, 49151},
14852 {2, 49151},
14853 {0, 4295032831},
14854 },
14855 },
14856 },
14857 {
14858 name: "MOVBEQstoreidx8",
14859 auxType: auxSymOff,
14860 argLen: 4,
14861 symEffect: SymWrite,
14862 asm: x86.AMOVBEQ,
14863 scale: 8,
14864 reg: regInfo{
14865 inputs: []inputInfo{
14866 {1, 49151},
14867 {2, 49151},
14868 {0, 4295032831},
14869 },
14870 },
14871 },
14872 {
14873 name: "SARXQ",
14874 argLen: 2,
14875 asm: x86.ASARXQ,
14876 reg: regInfo{
14877 inputs: []inputInfo{
14878 {0, 49135},
14879 {1, 49135},
14880 },
14881 outputs: []outputInfo{
14882 {0, 49135},
14883 },
14884 },
14885 },
14886 {
14887 name: "SARXL",
14888 argLen: 2,
14889 asm: x86.ASARXL,
14890 reg: regInfo{
14891 inputs: []inputInfo{
14892 {0, 49135},
14893 {1, 49135},
14894 },
14895 outputs: []outputInfo{
14896 {0, 49135},
14897 },
14898 },
14899 },
14900 {
14901 name: "SHLXQ",
14902 argLen: 2,
14903 asm: x86.ASHLXQ,
14904 reg: regInfo{
14905 inputs: []inputInfo{
14906 {0, 49135},
14907 {1, 49135},
14908 },
14909 outputs: []outputInfo{
14910 {0, 49135},
14911 },
14912 },
14913 },
14914 {
14915 name: "SHLXL",
14916 argLen: 2,
14917 asm: x86.ASHLXL,
14918 reg: regInfo{
14919 inputs: []inputInfo{
14920 {0, 49135},
14921 {1, 49135},
14922 },
14923 outputs: []outputInfo{
14924 {0, 49135},
14925 },
14926 },
14927 },
14928 {
14929 name: "SHRXQ",
14930 argLen: 2,
14931 asm: x86.ASHRXQ,
14932 reg: regInfo{
14933 inputs: []inputInfo{
14934 {0, 49135},
14935 {1, 49135},
14936 },
14937 outputs: []outputInfo{
14938 {0, 49135},
14939 },
14940 },
14941 },
14942 {
14943 name: "SHRXL",
14944 argLen: 2,
14945 asm: x86.ASHRXL,
14946 reg: regInfo{
14947 inputs: []inputInfo{
14948 {0, 49135},
14949 {1, 49135},
14950 },
14951 outputs: []outputInfo{
14952 {0, 49135},
14953 },
14954 },
14955 },
14956 {
14957 name: "SARXLload",
14958 auxType: auxSymOff,
14959 argLen: 3,
14960 faultOnNilArg0: true,
14961 symEffect: SymRead,
14962 asm: x86.ASARXL,
14963 reg: regInfo{
14964 inputs: []inputInfo{
14965 {1, 49135},
14966 {0, 4295032831},
14967 },
14968 outputs: []outputInfo{
14969 {0, 49135},
14970 },
14971 },
14972 },
14973 {
14974 name: "SARXQload",
14975 auxType: auxSymOff,
14976 argLen: 3,
14977 faultOnNilArg0: true,
14978 symEffect: SymRead,
14979 asm: x86.ASARXQ,
14980 reg: regInfo{
14981 inputs: []inputInfo{
14982 {1, 49135},
14983 {0, 4295032831},
14984 },
14985 outputs: []outputInfo{
14986 {0, 49135},
14987 },
14988 },
14989 },
14990 {
14991 name: "SHLXLload",
14992 auxType: auxSymOff,
14993 argLen: 3,
14994 faultOnNilArg0: true,
14995 symEffect: SymRead,
14996 asm: x86.ASHLXL,
14997 reg: regInfo{
14998 inputs: []inputInfo{
14999 {1, 49135},
15000 {0, 4295032831},
15001 },
15002 outputs: []outputInfo{
15003 {0, 49135},
15004 },
15005 },
15006 },
15007 {
15008 name: "SHLXQload",
15009 auxType: auxSymOff,
15010 argLen: 3,
15011 faultOnNilArg0: true,
15012 symEffect: SymRead,
15013 asm: x86.ASHLXQ,
15014 reg: regInfo{
15015 inputs: []inputInfo{
15016 {1, 49135},
15017 {0, 4295032831},
15018 },
15019 outputs: []outputInfo{
15020 {0, 49135},
15021 },
15022 },
15023 },
15024 {
15025 name: "SHRXLload",
15026 auxType: auxSymOff,
15027 argLen: 3,
15028 faultOnNilArg0: true,
15029 symEffect: SymRead,
15030 asm: x86.ASHRXL,
15031 reg: regInfo{
15032 inputs: []inputInfo{
15033 {1, 49135},
15034 {0, 4295032831},
15035 },
15036 outputs: []outputInfo{
15037 {0, 49135},
15038 },
15039 },
15040 },
15041 {
15042 name: "SHRXQload",
15043 auxType: auxSymOff,
15044 argLen: 3,
15045 faultOnNilArg0: true,
15046 symEffect: SymRead,
15047 asm: x86.ASHRXQ,
15048 reg: regInfo{
15049 inputs: []inputInfo{
15050 {1, 49135},
15051 {0, 4295032831},
15052 },
15053 outputs: []outputInfo{
15054 {0, 49135},
15055 },
15056 },
15057 },
15058 {
15059 name: "SARXLloadidx1",
15060 auxType: auxSymOff,
15061 argLen: 4,
15062 faultOnNilArg0: true,
15063 symEffect: SymRead,
15064 asm: x86.ASARXL,
15065 scale: 1,
15066 reg: regInfo{
15067 inputs: []inputInfo{
15068 {2, 49135},
15069 {1, 49151},
15070 {0, 4295032831},
15071 },
15072 outputs: []outputInfo{
15073 {0, 49135},
15074 },
15075 },
15076 },
15077 {
15078 name: "SARXLloadidx4",
15079 auxType: auxSymOff,
15080 argLen: 4,
15081 faultOnNilArg0: true,
15082 symEffect: SymRead,
15083 asm: x86.ASARXL,
15084 scale: 4,
15085 reg: regInfo{
15086 inputs: []inputInfo{
15087 {2, 49135},
15088 {1, 49151},
15089 {0, 4295032831},
15090 },
15091 outputs: []outputInfo{
15092 {0, 49135},
15093 },
15094 },
15095 },
15096 {
15097 name: "SARXLloadidx8",
15098 auxType: auxSymOff,
15099 argLen: 4,
15100 faultOnNilArg0: true,
15101 symEffect: SymRead,
15102 asm: x86.ASARXL,
15103 scale: 8,
15104 reg: regInfo{
15105 inputs: []inputInfo{
15106 {2, 49135},
15107 {1, 49151},
15108 {0, 4295032831},
15109 },
15110 outputs: []outputInfo{
15111 {0, 49135},
15112 },
15113 },
15114 },
15115 {
15116 name: "SARXQloadidx1",
15117 auxType: auxSymOff,
15118 argLen: 4,
15119 faultOnNilArg0: true,
15120 symEffect: SymRead,
15121 asm: x86.ASARXQ,
15122 scale: 1,
15123 reg: regInfo{
15124 inputs: []inputInfo{
15125 {2, 49135},
15126 {1, 49151},
15127 {0, 4295032831},
15128 },
15129 outputs: []outputInfo{
15130 {0, 49135},
15131 },
15132 },
15133 },
15134 {
15135 name: "SARXQloadidx8",
15136 auxType: auxSymOff,
15137 argLen: 4,
15138 faultOnNilArg0: true,
15139 symEffect: SymRead,
15140 asm: x86.ASARXQ,
15141 scale: 8,
15142 reg: regInfo{
15143 inputs: []inputInfo{
15144 {2, 49135},
15145 {1, 49151},
15146 {0, 4295032831},
15147 },
15148 outputs: []outputInfo{
15149 {0, 49135},
15150 },
15151 },
15152 },
15153 {
15154 name: "SHLXLloadidx1",
15155 auxType: auxSymOff,
15156 argLen: 4,
15157 faultOnNilArg0: true,
15158 symEffect: SymRead,
15159 asm: x86.ASHLXL,
15160 scale: 1,
15161 reg: regInfo{
15162 inputs: []inputInfo{
15163 {2, 49135},
15164 {1, 49151},
15165 {0, 4295032831},
15166 },
15167 outputs: []outputInfo{
15168 {0, 49135},
15169 },
15170 },
15171 },
15172 {
15173 name: "SHLXLloadidx4",
15174 auxType: auxSymOff,
15175 argLen: 4,
15176 faultOnNilArg0: true,
15177 symEffect: SymRead,
15178 asm: x86.ASHLXL,
15179 scale: 4,
15180 reg: regInfo{
15181 inputs: []inputInfo{
15182 {2, 49135},
15183 {1, 49151},
15184 {0, 4295032831},
15185 },
15186 outputs: []outputInfo{
15187 {0, 49135},
15188 },
15189 },
15190 },
15191 {
15192 name: "SHLXLloadidx8",
15193 auxType: auxSymOff,
15194 argLen: 4,
15195 faultOnNilArg0: true,
15196 symEffect: SymRead,
15197 asm: x86.ASHLXL,
15198 scale: 8,
15199 reg: regInfo{
15200 inputs: []inputInfo{
15201 {2, 49135},
15202 {1, 49151},
15203 {0, 4295032831},
15204 },
15205 outputs: []outputInfo{
15206 {0, 49135},
15207 },
15208 },
15209 },
15210 {
15211 name: "SHLXQloadidx1",
15212 auxType: auxSymOff,
15213 argLen: 4,
15214 faultOnNilArg0: true,
15215 symEffect: SymRead,
15216 asm: x86.ASHLXQ,
15217 scale: 1,
15218 reg: regInfo{
15219 inputs: []inputInfo{
15220 {2, 49135},
15221 {1, 49151},
15222 {0, 4295032831},
15223 },
15224 outputs: []outputInfo{
15225 {0, 49135},
15226 },
15227 },
15228 },
15229 {
15230 name: "SHLXQloadidx8",
15231 auxType: auxSymOff,
15232 argLen: 4,
15233 faultOnNilArg0: true,
15234 symEffect: SymRead,
15235 asm: x86.ASHLXQ,
15236 scale: 8,
15237 reg: regInfo{
15238 inputs: []inputInfo{
15239 {2, 49135},
15240 {1, 49151},
15241 {0, 4295032831},
15242 },
15243 outputs: []outputInfo{
15244 {0, 49135},
15245 },
15246 },
15247 },
15248 {
15249 name: "SHRXLloadidx1",
15250 auxType: auxSymOff,
15251 argLen: 4,
15252 faultOnNilArg0: true,
15253 symEffect: SymRead,
15254 asm: x86.ASHRXL,
15255 scale: 1,
15256 reg: regInfo{
15257 inputs: []inputInfo{
15258 {2, 49135},
15259 {1, 49151},
15260 {0, 4295032831},
15261 },
15262 outputs: []outputInfo{
15263 {0, 49135},
15264 },
15265 },
15266 },
15267 {
15268 name: "SHRXLloadidx4",
15269 auxType: auxSymOff,
15270 argLen: 4,
15271 faultOnNilArg0: true,
15272 symEffect: SymRead,
15273 asm: x86.ASHRXL,
15274 scale: 4,
15275 reg: regInfo{
15276 inputs: []inputInfo{
15277 {2, 49135},
15278 {1, 49151},
15279 {0, 4295032831},
15280 },
15281 outputs: []outputInfo{
15282 {0, 49135},
15283 },
15284 },
15285 },
15286 {
15287 name: "SHRXLloadidx8",
15288 auxType: auxSymOff,
15289 argLen: 4,
15290 faultOnNilArg0: true,
15291 symEffect: SymRead,
15292 asm: x86.ASHRXL,
15293 scale: 8,
15294 reg: regInfo{
15295 inputs: []inputInfo{
15296 {2, 49135},
15297 {1, 49151},
15298 {0, 4295032831},
15299 },
15300 outputs: []outputInfo{
15301 {0, 49135},
15302 },
15303 },
15304 },
15305 {
15306 name: "SHRXQloadidx1",
15307 auxType: auxSymOff,
15308 argLen: 4,
15309 faultOnNilArg0: true,
15310 symEffect: SymRead,
15311 asm: x86.ASHRXQ,
15312 scale: 1,
15313 reg: regInfo{
15314 inputs: []inputInfo{
15315 {2, 49135},
15316 {1, 49151},
15317 {0, 4295032831},
15318 },
15319 outputs: []outputInfo{
15320 {0, 49135},
15321 },
15322 },
15323 },
15324 {
15325 name: "SHRXQloadidx8",
15326 auxType: auxSymOff,
15327 argLen: 4,
15328 faultOnNilArg0: true,
15329 symEffect: SymRead,
15330 asm: x86.ASHRXQ,
15331 scale: 8,
15332 reg: regInfo{
15333 inputs: []inputInfo{
15334 {2, 49135},
15335 {1, 49151},
15336 {0, 4295032831},
15337 },
15338 outputs: []outputInfo{
15339 {0, 49135},
15340 },
15341 },
15342 },
15343 {
15344 name: "PUNPCKLBW",
15345 argLen: 2,
15346 resultInArg0: true,
15347 asm: x86.APUNPCKLBW,
15348 reg: regInfo{
15349 inputs: []inputInfo{
15350 {0, 2147418112},
15351 {1, 2147418112},
15352 },
15353 outputs: []outputInfo{
15354 {0, 2147418112},
15355 },
15356 },
15357 },
15358 {
15359 name: "PSHUFLW",
15360 auxType: auxInt8,
15361 argLen: 1,
15362 asm: x86.APSHUFLW,
15363 reg: regInfo{
15364 inputs: []inputInfo{
15365 {0, 2147418112},
15366 },
15367 outputs: []outputInfo{
15368 {0, 2147418112},
15369 },
15370 },
15371 },
15372 {
15373 name: "PSHUFBbroadcast",
15374 argLen: 1,
15375 resultInArg0: true,
15376 asm: x86.APSHUFB,
15377 reg: regInfo{
15378 inputs: []inputInfo{
15379 {0, 2147418112},
15380 },
15381 outputs: []outputInfo{
15382 {0, 2147418112},
15383 },
15384 },
15385 },
15386 {
15387 name: "VPBROADCASTB",
15388 argLen: 1,
15389 asm: x86.AVPBROADCASTB,
15390 reg: regInfo{
15391 inputs: []inputInfo{
15392 {0, 49135},
15393 },
15394 outputs: []outputInfo{
15395 {0, 2147418112},
15396 },
15397 },
15398 },
15399 {
15400 name: "PSIGNB",
15401 argLen: 2,
15402 resultInArg0: true,
15403 asm: x86.APSIGNB,
15404 reg: regInfo{
15405 inputs: []inputInfo{
15406 {0, 2147418112},
15407 {1, 2147418112},
15408 },
15409 outputs: []outputInfo{
15410 {0, 2147418112},
15411 },
15412 },
15413 },
15414 {
15415 name: "PCMPEQB",
15416 argLen: 2,
15417 resultInArg0: true,
15418 asm: x86.APCMPEQB,
15419 reg: regInfo{
15420 inputs: []inputInfo{
15421 {0, 2147418112},
15422 {1, 2147418112},
15423 },
15424 outputs: []outputInfo{
15425 {0, 2147418112},
15426 },
15427 },
15428 },
15429 {
15430 name: "PMOVMSKB",
15431 argLen: 1,
15432 asm: x86.APMOVMSKB,
15433 reg: regInfo{
15434 inputs: []inputInfo{
15435 {0, 2147418112},
15436 },
15437 outputs: []outputInfo{
15438 {0, 49135},
15439 },
15440 },
15441 },
15442
15443 {
15444 name: "ADD",
15445 argLen: 2,
15446 commutative: true,
15447 asm: arm.AADD,
15448 reg: regInfo{
15449 inputs: []inputInfo{
15450 {0, 22527},
15451 {1, 22527},
15452 },
15453 outputs: []outputInfo{
15454 {0, 21503},
15455 },
15456 },
15457 },
15458 {
15459 name: "ADDconst",
15460 auxType: auxInt32,
15461 argLen: 1,
15462 asm: arm.AADD,
15463 reg: regInfo{
15464 inputs: []inputInfo{
15465 {0, 30719},
15466 },
15467 outputs: []outputInfo{
15468 {0, 21503},
15469 },
15470 },
15471 },
15472 {
15473 name: "SUB",
15474 argLen: 2,
15475 asm: arm.ASUB,
15476 reg: regInfo{
15477 inputs: []inputInfo{
15478 {0, 22527},
15479 {1, 22527},
15480 },
15481 outputs: []outputInfo{
15482 {0, 21503},
15483 },
15484 },
15485 },
15486 {
15487 name: "SUBconst",
15488 auxType: auxInt32,
15489 argLen: 1,
15490 asm: arm.ASUB,
15491 reg: regInfo{
15492 inputs: []inputInfo{
15493 {0, 22527},
15494 },
15495 outputs: []outputInfo{
15496 {0, 21503},
15497 },
15498 },
15499 },
15500 {
15501 name: "RSB",
15502 argLen: 2,
15503 asm: arm.ARSB,
15504 reg: regInfo{
15505 inputs: []inputInfo{
15506 {0, 22527},
15507 {1, 22527},
15508 },
15509 outputs: []outputInfo{
15510 {0, 21503},
15511 },
15512 },
15513 },
15514 {
15515 name: "RSBconst",
15516 auxType: auxInt32,
15517 argLen: 1,
15518 asm: arm.ARSB,
15519 reg: regInfo{
15520 inputs: []inputInfo{
15521 {0, 22527},
15522 },
15523 outputs: []outputInfo{
15524 {0, 21503},
15525 },
15526 },
15527 },
15528 {
15529 name: "MUL",
15530 argLen: 2,
15531 commutative: true,
15532 asm: arm.AMUL,
15533 reg: regInfo{
15534 inputs: []inputInfo{
15535 {0, 22527},
15536 {1, 22527},
15537 },
15538 outputs: []outputInfo{
15539 {0, 21503},
15540 },
15541 },
15542 },
15543 {
15544 name: "HMUL",
15545 argLen: 2,
15546 commutative: true,
15547 asm: arm.AMULL,
15548 reg: regInfo{
15549 inputs: []inputInfo{
15550 {0, 22527},
15551 {1, 22527},
15552 },
15553 outputs: []outputInfo{
15554 {0, 21503},
15555 },
15556 },
15557 },
15558 {
15559 name: "HMULU",
15560 argLen: 2,
15561 commutative: true,
15562 asm: arm.AMULLU,
15563 reg: regInfo{
15564 inputs: []inputInfo{
15565 {0, 22527},
15566 {1, 22527},
15567 },
15568 outputs: []outputInfo{
15569 {0, 21503},
15570 },
15571 },
15572 },
15573 {
15574 name: "CALLudiv",
15575 argLen: 2,
15576 clobberFlags: true,
15577 reg: regInfo{
15578 inputs: []inputInfo{
15579 {0, 2},
15580 {1, 1},
15581 },
15582 clobbers: 20492,
15583 outputs: []outputInfo{
15584 {0, 1},
15585 {1, 2},
15586 },
15587 },
15588 },
15589 {
15590 name: "ADDS",
15591 argLen: 2,
15592 commutative: true,
15593 asm: arm.AADD,
15594 reg: regInfo{
15595 inputs: []inputInfo{
15596 {0, 22527},
15597 {1, 22527},
15598 },
15599 outputs: []outputInfo{
15600 {1, 0},
15601 {0, 21503},
15602 },
15603 },
15604 },
15605 {
15606 name: "ADDSconst",
15607 auxType: auxInt32,
15608 argLen: 1,
15609 asm: arm.AADD,
15610 reg: regInfo{
15611 inputs: []inputInfo{
15612 {0, 22527},
15613 },
15614 outputs: []outputInfo{
15615 {1, 0},
15616 {0, 21503},
15617 },
15618 },
15619 },
15620 {
15621 name: "ADC",
15622 argLen: 3,
15623 commutative: true,
15624 asm: arm.AADC,
15625 reg: regInfo{
15626 inputs: []inputInfo{
15627 {0, 21503},
15628 {1, 21503},
15629 },
15630 outputs: []outputInfo{
15631 {0, 21503},
15632 },
15633 },
15634 },
15635 {
15636 name: "ADCconst",
15637 auxType: auxInt32,
15638 argLen: 2,
15639 asm: arm.AADC,
15640 reg: regInfo{
15641 inputs: []inputInfo{
15642 {0, 21503},
15643 },
15644 outputs: []outputInfo{
15645 {0, 21503},
15646 },
15647 },
15648 },
15649 {
15650 name: "SUBS",
15651 argLen: 2,
15652 asm: arm.ASUB,
15653 reg: regInfo{
15654 inputs: []inputInfo{
15655 {0, 22527},
15656 {1, 22527},
15657 },
15658 outputs: []outputInfo{
15659 {1, 0},
15660 {0, 21503},
15661 },
15662 },
15663 },
15664 {
15665 name: "SUBSconst",
15666 auxType: auxInt32,
15667 argLen: 1,
15668 asm: arm.ASUB,
15669 reg: regInfo{
15670 inputs: []inputInfo{
15671 {0, 22527},
15672 },
15673 outputs: []outputInfo{
15674 {1, 0},
15675 {0, 21503},
15676 },
15677 },
15678 },
15679 {
15680 name: "RSBSconst",
15681 auxType: auxInt32,
15682 argLen: 1,
15683 asm: arm.ARSB,
15684 reg: regInfo{
15685 inputs: []inputInfo{
15686 {0, 22527},
15687 },
15688 outputs: []outputInfo{
15689 {1, 0},
15690 {0, 21503},
15691 },
15692 },
15693 },
15694 {
15695 name: "SBC",
15696 argLen: 3,
15697 asm: arm.ASBC,
15698 reg: regInfo{
15699 inputs: []inputInfo{
15700 {0, 21503},
15701 {1, 21503},
15702 },
15703 outputs: []outputInfo{
15704 {0, 21503},
15705 },
15706 },
15707 },
15708 {
15709 name: "SBCconst",
15710 auxType: auxInt32,
15711 argLen: 2,
15712 asm: arm.ASBC,
15713 reg: regInfo{
15714 inputs: []inputInfo{
15715 {0, 21503},
15716 },
15717 outputs: []outputInfo{
15718 {0, 21503},
15719 },
15720 },
15721 },
15722 {
15723 name: "RSCconst",
15724 auxType: auxInt32,
15725 argLen: 2,
15726 asm: arm.ARSC,
15727 reg: regInfo{
15728 inputs: []inputInfo{
15729 {0, 21503},
15730 },
15731 outputs: []outputInfo{
15732 {0, 21503},
15733 },
15734 },
15735 },
15736 {
15737 name: "MULLU",
15738 argLen: 2,
15739 commutative: true,
15740 asm: arm.AMULLU,
15741 reg: regInfo{
15742 inputs: []inputInfo{
15743 {0, 22527},
15744 {1, 22527},
15745 },
15746 outputs: []outputInfo{
15747 {0, 21503},
15748 {1, 21503},
15749 },
15750 },
15751 },
15752 {
15753 name: "MULA",
15754 argLen: 3,
15755 asm: arm.AMULA,
15756 reg: regInfo{
15757 inputs: []inputInfo{
15758 {0, 21503},
15759 {1, 21503},
15760 {2, 21503},
15761 },
15762 outputs: []outputInfo{
15763 {0, 21503},
15764 },
15765 },
15766 },
15767 {
15768 name: "MULS",
15769 argLen: 3,
15770 asm: arm.AMULS,
15771 reg: regInfo{
15772 inputs: []inputInfo{
15773 {0, 21503},
15774 {1, 21503},
15775 {2, 21503},
15776 },
15777 outputs: []outputInfo{
15778 {0, 21503},
15779 },
15780 },
15781 },
15782 {
15783 name: "ADDF",
15784 argLen: 2,
15785 commutative: true,
15786 asm: arm.AADDF,
15787 reg: regInfo{
15788 inputs: []inputInfo{
15789 {0, 4294901760},
15790 {1, 4294901760},
15791 },
15792 outputs: []outputInfo{
15793 {0, 4294901760},
15794 },
15795 },
15796 },
15797 {
15798 name: "ADDD",
15799 argLen: 2,
15800 commutative: true,
15801 asm: arm.AADDD,
15802 reg: regInfo{
15803 inputs: []inputInfo{
15804 {0, 4294901760},
15805 {1, 4294901760},
15806 },
15807 outputs: []outputInfo{
15808 {0, 4294901760},
15809 },
15810 },
15811 },
15812 {
15813 name: "SUBF",
15814 argLen: 2,
15815 asm: arm.ASUBF,
15816 reg: regInfo{
15817 inputs: []inputInfo{
15818 {0, 4294901760},
15819 {1, 4294901760},
15820 },
15821 outputs: []outputInfo{
15822 {0, 4294901760},
15823 },
15824 },
15825 },
15826 {
15827 name: "SUBD",
15828 argLen: 2,
15829 asm: arm.ASUBD,
15830 reg: regInfo{
15831 inputs: []inputInfo{
15832 {0, 4294901760},
15833 {1, 4294901760},
15834 },
15835 outputs: []outputInfo{
15836 {0, 4294901760},
15837 },
15838 },
15839 },
15840 {
15841 name: "MULF",
15842 argLen: 2,
15843 commutative: true,
15844 asm: arm.AMULF,
15845 reg: regInfo{
15846 inputs: []inputInfo{
15847 {0, 4294901760},
15848 {1, 4294901760},
15849 },
15850 outputs: []outputInfo{
15851 {0, 4294901760},
15852 },
15853 },
15854 },
15855 {
15856 name: "MULD",
15857 argLen: 2,
15858 commutative: true,
15859 asm: arm.AMULD,
15860 reg: regInfo{
15861 inputs: []inputInfo{
15862 {0, 4294901760},
15863 {1, 4294901760},
15864 },
15865 outputs: []outputInfo{
15866 {0, 4294901760},
15867 },
15868 },
15869 },
15870 {
15871 name: "NMULF",
15872 argLen: 2,
15873 commutative: true,
15874 asm: arm.ANMULF,
15875 reg: regInfo{
15876 inputs: []inputInfo{
15877 {0, 4294901760},
15878 {1, 4294901760},
15879 },
15880 outputs: []outputInfo{
15881 {0, 4294901760},
15882 },
15883 },
15884 },
15885 {
15886 name: "NMULD",
15887 argLen: 2,
15888 commutative: true,
15889 asm: arm.ANMULD,
15890 reg: regInfo{
15891 inputs: []inputInfo{
15892 {0, 4294901760},
15893 {1, 4294901760},
15894 },
15895 outputs: []outputInfo{
15896 {0, 4294901760},
15897 },
15898 },
15899 },
15900 {
15901 name: "DIVF",
15902 argLen: 2,
15903 asm: arm.ADIVF,
15904 reg: regInfo{
15905 inputs: []inputInfo{
15906 {0, 4294901760},
15907 {1, 4294901760},
15908 },
15909 outputs: []outputInfo{
15910 {0, 4294901760},
15911 },
15912 },
15913 },
15914 {
15915 name: "DIVD",
15916 argLen: 2,
15917 asm: arm.ADIVD,
15918 reg: regInfo{
15919 inputs: []inputInfo{
15920 {0, 4294901760},
15921 {1, 4294901760},
15922 },
15923 outputs: []outputInfo{
15924 {0, 4294901760},
15925 },
15926 },
15927 },
15928 {
15929 name: "MULAF",
15930 argLen: 3,
15931 resultInArg0: true,
15932 asm: arm.AMULAF,
15933 reg: regInfo{
15934 inputs: []inputInfo{
15935 {0, 4294901760},
15936 {1, 4294901760},
15937 {2, 4294901760},
15938 },
15939 outputs: []outputInfo{
15940 {0, 4294901760},
15941 },
15942 },
15943 },
15944 {
15945 name: "MULAD",
15946 argLen: 3,
15947 resultInArg0: true,
15948 asm: arm.AMULAD,
15949 reg: regInfo{
15950 inputs: []inputInfo{
15951 {0, 4294901760},
15952 {1, 4294901760},
15953 {2, 4294901760},
15954 },
15955 outputs: []outputInfo{
15956 {0, 4294901760},
15957 },
15958 },
15959 },
15960 {
15961 name: "MULSF",
15962 argLen: 3,
15963 resultInArg0: true,
15964 asm: arm.AMULSF,
15965 reg: regInfo{
15966 inputs: []inputInfo{
15967 {0, 4294901760},
15968 {1, 4294901760},
15969 {2, 4294901760},
15970 },
15971 outputs: []outputInfo{
15972 {0, 4294901760},
15973 },
15974 },
15975 },
15976 {
15977 name: "MULSD",
15978 argLen: 3,
15979 resultInArg0: true,
15980 asm: arm.AMULSD,
15981 reg: regInfo{
15982 inputs: []inputInfo{
15983 {0, 4294901760},
15984 {1, 4294901760},
15985 {2, 4294901760},
15986 },
15987 outputs: []outputInfo{
15988 {0, 4294901760},
15989 },
15990 },
15991 },
15992 {
15993 name: "FMULAD",
15994 argLen: 3,
15995 resultInArg0: true,
15996 asm: arm.AFMULAD,
15997 reg: regInfo{
15998 inputs: []inputInfo{
15999 {0, 4294901760},
16000 {1, 4294901760},
16001 {2, 4294901760},
16002 },
16003 outputs: []outputInfo{
16004 {0, 4294901760},
16005 },
16006 },
16007 },
16008 {
16009 name: "AND",
16010 argLen: 2,
16011 commutative: true,
16012 asm: arm.AAND,
16013 reg: regInfo{
16014 inputs: []inputInfo{
16015 {0, 22527},
16016 {1, 22527},
16017 },
16018 outputs: []outputInfo{
16019 {0, 21503},
16020 },
16021 },
16022 },
16023 {
16024 name: "ANDconst",
16025 auxType: auxInt32,
16026 argLen: 1,
16027 asm: arm.AAND,
16028 reg: regInfo{
16029 inputs: []inputInfo{
16030 {0, 22527},
16031 },
16032 outputs: []outputInfo{
16033 {0, 21503},
16034 },
16035 },
16036 },
16037 {
16038 name: "OR",
16039 argLen: 2,
16040 commutative: true,
16041 asm: arm.AORR,
16042 reg: regInfo{
16043 inputs: []inputInfo{
16044 {0, 22527},
16045 {1, 22527},
16046 },
16047 outputs: []outputInfo{
16048 {0, 21503},
16049 },
16050 },
16051 },
16052 {
16053 name: "ORconst",
16054 auxType: auxInt32,
16055 argLen: 1,
16056 asm: arm.AORR,
16057 reg: regInfo{
16058 inputs: []inputInfo{
16059 {0, 22527},
16060 },
16061 outputs: []outputInfo{
16062 {0, 21503},
16063 },
16064 },
16065 },
16066 {
16067 name: "XOR",
16068 argLen: 2,
16069 commutative: true,
16070 asm: arm.AEOR,
16071 reg: regInfo{
16072 inputs: []inputInfo{
16073 {0, 22527},
16074 {1, 22527},
16075 },
16076 outputs: []outputInfo{
16077 {0, 21503},
16078 },
16079 },
16080 },
16081 {
16082 name: "XORconst",
16083 auxType: auxInt32,
16084 argLen: 1,
16085 asm: arm.AEOR,
16086 reg: regInfo{
16087 inputs: []inputInfo{
16088 {0, 22527},
16089 },
16090 outputs: []outputInfo{
16091 {0, 21503},
16092 },
16093 },
16094 },
16095 {
16096 name: "BIC",
16097 argLen: 2,
16098 asm: arm.ABIC,
16099 reg: regInfo{
16100 inputs: []inputInfo{
16101 {0, 22527},
16102 {1, 22527},
16103 },
16104 outputs: []outputInfo{
16105 {0, 21503},
16106 },
16107 },
16108 },
16109 {
16110 name: "BICconst",
16111 auxType: auxInt32,
16112 argLen: 1,
16113 asm: arm.ABIC,
16114 reg: regInfo{
16115 inputs: []inputInfo{
16116 {0, 22527},
16117 },
16118 outputs: []outputInfo{
16119 {0, 21503},
16120 },
16121 },
16122 },
16123 {
16124 name: "BFX",
16125 auxType: auxInt32,
16126 argLen: 1,
16127 asm: arm.ABFX,
16128 reg: regInfo{
16129 inputs: []inputInfo{
16130 {0, 22527},
16131 },
16132 outputs: []outputInfo{
16133 {0, 21503},
16134 },
16135 },
16136 },
16137 {
16138 name: "BFXU",
16139 auxType: auxInt32,
16140 argLen: 1,
16141 asm: arm.ABFXU,
16142 reg: regInfo{
16143 inputs: []inputInfo{
16144 {0, 22527},
16145 },
16146 outputs: []outputInfo{
16147 {0, 21503},
16148 },
16149 },
16150 },
16151 {
16152 name: "MVN",
16153 argLen: 1,
16154 asm: arm.AMVN,
16155 reg: regInfo{
16156 inputs: []inputInfo{
16157 {0, 22527},
16158 },
16159 outputs: []outputInfo{
16160 {0, 21503},
16161 },
16162 },
16163 },
16164 {
16165 name: "NEGF",
16166 argLen: 1,
16167 asm: arm.ANEGF,
16168 reg: regInfo{
16169 inputs: []inputInfo{
16170 {0, 4294901760},
16171 },
16172 outputs: []outputInfo{
16173 {0, 4294901760},
16174 },
16175 },
16176 },
16177 {
16178 name: "NEGD",
16179 argLen: 1,
16180 asm: arm.ANEGD,
16181 reg: regInfo{
16182 inputs: []inputInfo{
16183 {0, 4294901760},
16184 },
16185 outputs: []outputInfo{
16186 {0, 4294901760},
16187 },
16188 },
16189 },
16190 {
16191 name: "SQRTD",
16192 argLen: 1,
16193 asm: arm.ASQRTD,
16194 reg: regInfo{
16195 inputs: []inputInfo{
16196 {0, 4294901760},
16197 },
16198 outputs: []outputInfo{
16199 {0, 4294901760},
16200 },
16201 },
16202 },
16203 {
16204 name: "SQRTF",
16205 argLen: 1,
16206 asm: arm.ASQRTF,
16207 reg: regInfo{
16208 inputs: []inputInfo{
16209 {0, 4294901760},
16210 },
16211 outputs: []outputInfo{
16212 {0, 4294901760},
16213 },
16214 },
16215 },
16216 {
16217 name: "ABSD",
16218 argLen: 1,
16219 asm: arm.AABSD,
16220 reg: regInfo{
16221 inputs: []inputInfo{
16222 {0, 4294901760},
16223 },
16224 outputs: []outputInfo{
16225 {0, 4294901760},
16226 },
16227 },
16228 },
16229 {
16230 name: "CLZ",
16231 argLen: 1,
16232 asm: arm.ACLZ,
16233 reg: regInfo{
16234 inputs: []inputInfo{
16235 {0, 22527},
16236 },
16237 outputs: []outputInfo{
16238 {0, 21503},
16239 },
16240 },
16241 },
16242 {
16243 name: "REV",
16244 argLen: 1,
16245 asm: arm.AREV,
16246 reg: regInfo{
16247 inputs: []inputInfo{
16248 {0, 22527},
16249 },
16250 outputs: []outputInfo{
16251 {0, 21503},
16252 },
16253 },
16254 },
16255 {
16256 name: "REV16",
16257 argLen: 1,
16258 asm: arm.AREV16,
16259 reg: regInfo{
16260 inputs: []inputInfo{
16261 {0, 22527},
16262 },
16263 outputs: []outputInfo{
16264 {0, 21503},
16265 },
16266 },
16267 },
16268 {
16269 name: "RBIT",
16270 argLen: 1,
16271 asm: arm.ARBIT,
16272 reg: regInfo{
16273 inputs: []inputInfo{
16274 {0, 22527},
16275 },
16276 outputs: []outputInfo{
16277 {0, 21503},
16278 },
16279 },
16280 },
16281 {
16282 name: "SLL",
16283 argLen: 2,
16284 asm: arm.ASLL,
16285 reg: regInfo{
16286 inputs: []inputInfo{
16287 {0, 22527},
16288 {1, 22527},
16289 },
16290 outputs: []outputInfo{
16291 {0, 21503},
16292 },
16293 },
16294 },
16295 {
16296 name: "SLLconst",
16297 auxType: auxInt32,
16298 argLen: 1,
16299 asm: arm.ASLL,
16300 reg: regInfo{
16301 inputs: []inputInfo{
16302 {0, 22527},
16303 },
16304 outputs: []outputInfo{
16305 {0, 21503},
16306 },
16307 },
16308 },
16309 {
16310 name: "SRL",
16311 argLen: 2,
16312 asm: arm.ASRL,
16313 reg: regInfo{
16314 inputs: []inputInfo{
16315 {0, 22527},
16316 {1, 22527},
16317 },
16318 outputs: []outputInfo{
16319 {0, 21503},
16320 },
16321 },
16322 },
16323 {
16324 name: "SRLconst",
16325 auxType: auxInt32,
16326 argLen: 1,
16327 asm: arm.ASRL,
16328 reg: regInfo{
16329 inputs: []inputInfo{
16330 {0, 22527},
16331 },
16332 outputs: []outputInfo{
16333 {0, 21503},
16334 },
16335 },
16336 },
16337 {
16338 name: "SRA",
16339 argLen: 2,
16340 asm: arm.ASRA,
16341 reg: regInfo{
16342 inputs: []inputInfo{
16343 {0, 22527},
16344 {1, 22527},
16345 },
16346 outputs: []outputInfo{
16347 {0, 21503},
16348 },
16349 },
16350 },
16351 {
16352 name: "SRAconst",
16353 auxType: auxInt32,
16354 argLen: 1,
16355 asm: arm.ASRA,
16356 reg: regInfo{
16357 inputs: []inputInfo{
16358 {0, 22527},
16359 },
16360 outputs: []outputInfo{
16361 {0, 21503},
16362 },
16363 },
16364 },
16365 {
16366 name: "SRR",
16367 argLen: 2,
16368 reg: regInfo{
16369 inputs: []inputInfo{
16370 {0, 22527},
16371 {1, 22527},
16372 },
16373 outputs: []outputInfo{
16374 {0, 21503},
16375 },
16376 },
16377 },
16378 {
16379 name: "SRRconst",
16380 auxType: auxInt32,
16381 argLen: 1,
16382 reg: regInfo{
16383 inputs: []inputInfo{
16384 {0, 22527},
16385 },
16386 outputs: []outputInfo{
16387 {0, 21503},
16388 },
16389 },
16390 },
16391 {
16392 name: "ADDshiftLL",
16393 auxType: auxInt32,
16394 argLen: 2,
16395 asm: arm.AADD,
16396 reg: regInfo{
16397 inputs: []inputInfo{
16398 {0, 22527},
16399 {1, 22527},
16400 },
16401 outputs: []outputInfo{
16402 {0, 21503},
16403 },
16404 },
16405 },
16406 {
16407 name: "ADDshiftRL",
16408 auxType: auxInt32,
16409 argLen: 2,
16410 asm: arm.AADD,
16411 reg: regInfo{
16412 inputs: []inputInfo{
16413 {0, 22527},
16414 {1, 22527},
16415 },
16416 outputs: []outputInfo{
16417 {0, 21503},
16418 },
16419 },
16420 },
16421 {
16422 name: "ADDshiftRA",
16423 auxType: auxInt32,
16424 argLen: 2,
16425 asm: arm.AADD,
16426 reg: regInfo{
16427 inputs: []inputInfo{
16428 {0, 22527},
16429 {1, 22527},
16430 },
16431 outputs: []outputInfo{
16432 {0, 21503},
16433 },
16434 },
16435 },
16436 {
16437 name: "SUBshiftLL",
16438 auxType: auxInt32,
16439 argLen: 2,
16440 asm: arm.ASUB,
16441 reg: regInfo{
16442 inputs: []inputInfo{
16443 {0, 22527},
16444 {1, 22527},
16445 },
16446 outputs: []outputInfo{
16447 {0, 21503},
16448 },
16449 },
16450 },
16451 {
16452 name: "SUBshiftRL",
16453 auxType: auxInt32,
16454 argLen: 2,
16455 asm: arm.ASUB,
16456 reg: regInfo{
16457 inputs: []inputInfo{
16458 {0, 22527},
16459 {1, 22527},
16460 },
16461 outputs: []outputInfo{
16462 {0, 21503},
16463 },
16464 },
16465 },
16466 {
16467 name: "SUBshiftRA",
16468 auxType: auxInt32,
16469 argLen: 2,
16470 asm: arm.ASUB,
16471 reg: regInfo{
16472 inputs: []inputInfo{
16473 {0, 22527},
16474 {1, 22527},
16475 },
16476 outputs: []outputInfo{
16477 {0, 21503},
16478 },
16479 },
16480 },
16481 {
16482 name: "RSBshiftLL",
16483 auxType: auxInt32,
16484 argLen: 2,
16485 asm: arm.ARSB,
16486 reg: regInfo{
16487 inputs: []inputInfo{
16488 {0, 22527},
16489 {1, 22527},
16490 },
16491 outputs: []outputInfo{
16492 {0, 21503},
16493 },
16494 },
16495 },
16496 {
16497 name: "RSBshiftRL",
16498 auxType: auxInt32,
16499 argLen: 2,
16500 asm: arm.ARSB,
16501 reg: regInfo{
16502 inputs: []inputInfo{
16503 {0, 22527},
16504 {1, 22527},
16505 },
16506 outputs: []outputInfo{
16507 {0, 21503},
16508 },
16509 },
16510 },
16511 {
16512 name: "RSBshiftRA",
16513 auxType: auxInt32,
16514 argLen: 2,
16515 asm: arm.ARSB,
16516 reg: regInfo{
16517 inputs: []inputInfo{
16518 {0, 22527},
16519 {1, 22527},
16520 },
16521 outputs: []outputInfo{
16522 {0, 21503},
16523 },
16524 },
16525 },
16526 {
16527 name: "ANDshiftLL",
16528 auxType: auxInt32,
16529 argLen: 2,
16530 asm: arm.AAND,
16531 reg: regInfo{
16532 inputs: []inputInfo{
16533 {0, 22527},
16534 {1, 22527},
16535 },
16536 outputs: []outputInfo{
16537 {0, 21503},
16538 },
16539 },
16540 },
16541 {
16542 name: "ANDshiftRL",
16543 auxType: auxInt32,
16544 argLen: 2,
16545 asm: arm.AAND,
16546 reg: regInfo{
16547 inputs: []inputInfo{
16548 {0, 22527},
16549 {1, 22527},
16550 },
16551 outputs: []outputInfo{
16552 {0, 21503},
16553 },
16554 },
16555 },
16556 {
16557 name: "ANDshiftRA",
16558 auxType: auxInt32,
16559 argLen: 2,
16560 asm: arm.AAND,
16561 reg: regInfo{
16562 inputs: []inputInfo{
16563 {0, 22527},
16564 {1, 22527},
16565 },
16566 outputs: []outputInfo{
16567 {0, 21503},
16568 },
16569 },
16570 },
16571 {
16572 name: "ORshiftLL",
16573 auxType: auxInt32,
16574 argLen: 2,
16575 asm: arm.AORR,
16576 reg: regInfo{
16577 inputs: []inputInfo{
16578 {0, 22527},
16579 {1, 22527},
16580 },
16581 outputs: []outputInfo{
16582 {0, 21503},
16583 },
16584 },
16585 },
16586 {
16587 name: "ORshiftRL",
16588 auxType: auxInt32,
16589 argLen: 2,
16590 asm: arm.AORR,
16591 reg: regInfo{
16592 inputs: []inputInfo{
16593 {0, 22527},
16594 {1, 22527},
16595 },
16596 outputs: []outputInfo{
16597 {0, 21503},
16598 },
16599 },
16600 },
16601 {
16602 name: "ORshiftRA",
16603 auxType: auxInt32,
16604 argLen: 2,
16605 asm: arm.AORR,
16606 reg: regInfo{
16607 inputs: []inputInfo{
16608 {0, 22527},
16609 {1, 22527},
16610 },
16611 outputs: []outputInfo{
16612 {0, 21503},
16613 },
16614 },
16615 },
16616 {
16617 name: "XORshiftLL",
16618 auxType: auxInt32,
16619 argLen: 2,
16620 asm: arm.AEOR,
16621 reg: regInfo{
16622 inputs: []inputInfo{
16623 {0, 22527},
16624 {1, 22527},
16625 },
16626 outputs: []outputInfo{
16627 {0, 21503},
16628 },
16629 },
16630 },
16631 {
16632 name: "XORshiftRL",
16633 auxType: auxInt32,
16634 argLen: 2,
16635 asm: arm.AEOR,
16636 reg: regInfo{
16637 inputs: []inputInfo{
16638 {0, 22527},
16639 {1, 22527},
16640 },
16641 outputs: []outputInfo{
16642 {0, 21503},
16643 },
16644 },
16645 },
16646 {
16647 name: "XORshiftRA",
16648 auxType: auxInt32,
16649 argLen: 2,
16650 asm: arm.AEOR,
16651 reg: regInfo{
16652 inputs: []inputInfo{
16653 {0, 22527},
16654 {1, 22527},
16655 },
16656 outputs: []outputInfo{
16657 {0, 21503},
16658 },
16659 },
16660 },
16661 {
16662 name: "XORshiftRR",
16663 auxType: auxInt32,
16664 argLen: 2,
16665 asm: arm.AEOR,
16666 reg: regInfo{
16667 inputs: []inputInfo{
16668 {0, 22527},
16669 {1, 22527},
16670 },
16671 outputs: []outputInfo{
16672 {0, 21503},
16673 },
16674 },
16675 },
16676 {
16677 name: "BICshiftLL",
16678 auxType: auxInt32,
16679 argLen: 2,
16680 asm: arm.ABIC,
16681 reg: regInfo{
16682 inputs: []inputInfo{
16683 {0, 22527},
16684 {1, 22527},
16685 },
16686 outputs: []outputInfo{
16687 {0, 21503},
16688 },
16689 },
16690 },
16691 {
16692 name: "BICshiftRL",
16693 auxType: auxInt32,
16694 argLen: 2,
16695 asm: arm.ABIC,
16696 reg: regInfo{
16697 inputs: []inputInfo{
16698 {0, 22527},
16699 {1, 22527},
16700 },
16701 outputs: []outputInfo{
16702 {0, 21503},
16703 },
16704 },
16705 },
16706 {
16707 name: "BICshiftRA",
16708 auxType: auxInt32,
16709 argLen: 2,
16710 asm: arm.ABIC,
16711 reg: regInfo{
16712 inputs: []inputInfo{
16713 {0, 22527},
16714 {1, 22527},
16715 },
16716 outputs: []outputInfo{
16717 {0, 21503},
16718 },
16719 },
16720 },
16721 {
16722 name: "MVNshiftLL",
16723 auxType: auxInt32,
16724 argLen: 1,
16725 asm: arm.AMVN,
16726 reg: regInfo{
16727 inputs: []inputInfo{
16728 {0, 22527},
16729 },
16730 outputs: []outputInfo{
16731 {0, 21503},
16732 },
16733 },
16734 },
16735 {
16736 name: "MVNshiftRL",
16737 auxType: auxInt32,
16738 argLen: 1,
16739 asm: arm.AMVN,
16740 reg: regInfo{
16741 inputs: []inputInfo{
16742 {0, 22527},
16743 },
16744 outputs: []outputInfo{
16745 {0, 21503},
16746 },
16747 },
16748 },
16749 {
16750 name: "MVNshiftRA",
16751 auxType: auxInt32,
16752 argLen: 1,
16753 asm: arm.AMVN,
16754 reg: regInfo{
16755 inputs: []inputInfo{
16756 {0, 22527},
16757 },
16758 outputs: []outputInfo{
16759 {0, 21503},
16760 },
16761 },
16762 },
16763 {
16764 name: "ADCshiftLL",
16765 auxType: auxInt32,
16766 argLen: 3,
16767 asm: arm.AADC,
16768 reg: regInfo{
16769 inputs: []inputInfo{
16770 {0, 21503},
16771 {1, 21503},
16772 },
16773 outputs: []outputInfo{
16774 {0, 21503},
16775 },
16776 },
16777 },
16778 {
16779 name: "ADCshiftRL",
16780 auxType: auxInt32,
16781 argLen: 3,
16782 asm: arm.AADC,
16783 reg: regInfo{
16784 inputs: []inputInfo{
16785 {0, 21503},
16786 {1, 21503},
16787 },
16788 outputs: []outputInfo{
16789 {0, 21503},
16790 },
16791 },
16792 },
16793 {
16794 name: "ADCshiftRA",
16795 auxType: auxInt32,
16796 argLen: 3,
16797 asm: arm.AADC,
16798 reg: regInfo{
16799 inputs: []inputInfo{
16800 {0, 21503},
16801 {1, 21503},
16802 },
16803 outputs: []outputInfo{
16804 {0, 21503},
16805 },
16806 },
16807 },
16808 {
16809 name: "SBCshiftLL",
16810 auxType: auxInt32,
16811 argLen: 3,
16812 asm: arm.ASBC,
16813 reg: regInfo{
16814 inputs: []inputInfo{
16815 {0, 21503},
16816 {1, 21503},
16817 },
16818 outputs: []outputInfo{
16819 {0, 21503},
16820 },
16821 },
16822 },
16823 {
16824 name: "SBCshiftRL",
16825 auxType: auxInt32,
16826 argLen: 3,
16827 asm: arm.ASBC,
16828 reg: regInfo{
16829 inputs: []inputInfo{
16830 {0, 21503},
16831 {1, 21503},
16832 },
16833 outputs: []outputInfo{
16834 {0, 21503},
16835 },
16836 },
16837 },
16838 {
16839 name: "SBCshiftRA",
16840 auxType: auxInt32,
16841 argLen: 3,
16842 asm: arm.ASBC,
16843 reg: regInfo{
16844 inputs: []inputInfo{
16845 {0, 21503},
16846 {1, 21503},
16847 },
16848 outputs: []outputInfo{
16849 {0, 21503},
16850 },
16851 },
16852 },
16853 {
16854 name: "RSCshiftLL",
16855 auxType: auxInt32,
16856 argLen: 3,
16857 asm: arm.ARSC,
16858 reg: regInfo{
16859 inputs: []inputInfo{
16860 {0, 21503},
16861 {1, 21503},
16862 },
16863 outputs: []outputInfo{
16864 {0, 21503},
16865 },
16866 },
16867 },
16868 {
16869 name: "RSCshiftRL",
16870 auxType: auxInt32,
16871 argLen: 3,
16872 asm: arm.ARSC,
16873 reg: regInfo{
16874 inputs: []inputInfo{
16875 {0, 21503},
16876 {1, 21503},
16877 },
16878 outputs: []outputInfo{
16879 {0, 21503},
16880 },
16881 },
16882 },
16883 {
16884 name: "RSCshiftRA",
16885 auxType: auxInt32,
16886 argLen: 3,
16887 asm: arm.ARSC,
16888 reg: regInfo{
16889 inputs: []inputInfo{
16890 {0, 21503},
16891 {1, 21503},
16892 },
16893 outputs: []outputInfo{
16894 {0, 21503},
16895 },
16896 },
16897 },
16898 {
16899 name: "ADDSshiftLL",
16900 auxType: auxInt32,
16901 argLen: 2,
16902 asm: arm.AADD,
16903 reg: regInfo{
16904 inputs: []inputInfo{
16905 {0, 22527},
16906 {1, 22527},
16907 },
16908 outputs: []outputInfo{
16909 {1, 0},
16910 {0, 21503},
16911 },
16912 },
16913 },
16914 {
16915 name: "ADDSshiftRL",
16916 auxType: auxInt32,
16917 argLen: 2,
16918 asm: arm.AADD,
16919 reg: regInfo{
16920 inputs: []inputInfo{
16921 {0, 22527},
16922 {1, 22527},
16923 },
16924 outputs: []outputInfo{
16925 {1, 0},
16926 {0, 21503},
16927 },
16928 },
16929 },
16930 {
16931 name: "ADDSshiftRA",
16932 auxType: auxInt32,
16933 argLen: 2,
16934 asm: arm.AADD,
16935 reg: regInfo{
16936 inputs: []inputInfo{
16937 {0, 22527},
16938 {1, 22527},
16939 },
16940 outputs: []outputInfo{
16941 {1, 0},
16942 {0, 21503},
16943 },
16944 },
16945 },
16946 {
16947 name: "SUBSshiftLL",
16948 auxType: auxInt32,
16949 argLen: 2,
16950 asm: arm.ASUB,
16951 reg: regInfo{
16952 inputs: []inputInfo{
16953 {0, 22527},
16954 {1, 22527},
16955 },
16956 outputs: []outputInfo{
16957 {1, 0},
16958 {0, 21503},
16959 },
16960 },
16961 },
16962 {
16963 name: "SUBSshiftRL",
16964 auxType: auxInt32,
16965 argLen: 2,
16966 asm: arm.ASUB,
16967 reg: regInfo{
16968 inputs: []inputInfo{
16969 {0, 22527},
16970 {1, 22527},
16971 },
16972 outputs: []outputInfo{
16973 {1, 0},
16974 {0, 21503},
16975 },
16976 },
16977 },
16978 {
16979 name: "SUBSshiftRA",
16980 auxType: auxInt32,
16981 argLen: 2,
16982 asm: arm.ASUB,
16983 reg: regInfo{
16984 inputs: []inputInfo{
16985 {0, 22527},
16986 {1, 22527},
16987 },
16988 outputs: []outputInfo{
16989 {1, 0},
16990 {0, 21503},
16991 },
16992 },
16993 },
16994 {
16995 name: "RSBSshiftLL",
16996 auxType: auxInt32,
16997 argLen: 2,
16998 asm: arm.ARSB,
16999 reg: regInfo{
17000 inputs: []inputInfo{
17001 {0, 22527},
17002 {1, 22527},
17003 },
17004 outputs: []outputInfo{
17005 {1, 0},
17006 {0, 21503},
17007 },
17008 },
17009 },
17010 {
17011 name: "RSBSshiftRL",
17012 auxType: auxInt32,
17013 argLen: 2,
17014 asm: arm.ARSB,
17015 reg: regInfo{
17016 inputs: []inputInfo{
17017 {0, 22527},
17018 {1, 22527},
17019 },
17020 outputs: []outputInfo{
17021 {1, 0},
17022 {0, 21503},
17023 },
17024 },
17025 },
17026 {
17027 name: "RSBSshiftRA",
17028 auxType: auxInt32,
17029 argLen: 2,
17030 asm: arm.ARSB,
17031 reg: regInfo{
17032 inputs: []inputInfo{
17033 {0, 22527},
17034 {1, 22527},
17035 },
17036 outputs: []outputInfo{
17037 {1, 0},
17038 {0, 21503},
17039 },
17040 },
17041 },
17042 {
17043 name: "ADDshiftLLreg",
17044 argLen: 3,
17045 asm: arm.AADD,
17046 reg: regInfo{
17047 inputs: []inputInfo{
17048 {0, 21503},
17049 {1, 21503},
17050 {2, 21503},
17051 },
17052 outputs: []outputInfo{
17053 {0, 21503},
17054 },
17055 },
17056 },
17057 {
17058 name: "ADDshiftRLreg",
17059 argLen: 3,
17060 asm: arm.AADD,
17061 reg: regInfo{
17062 inputs: []inputInfo{
17063 {0, 21503},
17064 {1, 21503},
17065 {2, 21503},
17066 },
17067 outputs: []outputInfo{
17068 {0, 21503},
17069 },
17070 },
17071 },
17072 {
17073 name: "ADDshiftRAreg",
17074 argLen: 3,
17075 asm: arm.AADD,
17076 reg: regInfo{
17077 inputs: []inputInfo{
17078 {0, 21503},
17079 {1, 21503},
17080 {2, 21503},
17081 },
17082 outputs: []outputInfo{
17083 {0, 21503},
17084 },
17085 },
17086 },
17087 {
17088 name: "SUBshiftLLreg",
17089 argLen: 3,
17090 asm: arm.ASUB,
17091 reg: regInfo{
17092 inputs: []inputInfo{
17093 {0, 21503},
17094 {1, 21503},
17095 {2, 21503},
17096 },
17097 outputs: []outputInfo{
17098 {0, 21503},
17099 },
17100 },
17101 },
17102 {
17103 name: "SUBshiftRLreg",
17104 argLen: 3,
17105 asm: arm.ASUB,
17106 reg: regInfo{
17107 inputs: []inputInfo{
17108 {0, 21503},
17109 {1, 21503},
17110 {2, 21503},
17111 },
17112 outputs: []outputInfo{
17113 {0, 21503},
17114 },
17115 },
17116 },
17117 {
17118 name: "SUBshiftRAreg",
17119 argLen: 3,
17120 asm: arm.ASUB,
17121 reg: regInfo{
17122 inputs: []inputInfo{
17123 {0, 21503},
17124 {1, 21503},
17125 {2, 21503},
17126 },
17127 outputs: []outputInfo{
17128 {0, 21503},
17129 },
17130 },
17131 },
17132 {
17133 name: "RSBshiftLLreg",
17134 argLen: 3,
17135 asm: arm.ARSB,
17136 reg: regInfo{
17137 inputs: []inputInfo{
17138 {0, 21503},
17139 {1, 21503},
17140 {2, 21503},
17141 },
17142 outputs: []outputInfo{
17143 {0, 21503},
17144 },
17145 },
17146 },
17147 {
17148 name: "RSBshiftRLreg",
17149 argLen: 3,
17150 asm: arm.ARSB,
17151 reg: regInfo{
17152 inputs: []inputInfo{
17153 {0, 21503},
17154 {1, 21503},
17155 {2, 21503},
17156 },
17157 outputs: []outputInfo{
17158 {0, 21503},
17159 },
17160 },
17161 },
17162 {
17163 name: "RSBshiftRAreg",
17164 argLen: 3,
17165 asm: arm.ARSB,
17166 reg: regInfo{
17167 inputs: []inputInfo{
17168 {0, 21503},
17169 {1, 21503},
17170 {2, 21503},
17171 },
17172 outputs: []outputInfo{
17173 {0, 21503},
17174 },
17175 },
17176 },
17177 {
17178 name: "ANDshiftLLreg",
17179 argLen: 3,
17180 asm: arm.AAND,
17181 reg: regInfo{
17182 inputs: []inputInfo{
17183 {0, 21503},
17184 {1, 21503},
17185 {2, 21503},
17186 },
17187 outputs: []outputInfo{
17188 {0, 21503},
17189 },
17190 },
17191 },
17192 {
17193 name: "ANDshiftRLreg",
17194 argLen: 3,
17195 asm: arm.AAND,
17196 reg: regInfo{
17197 inputs: []inputInfo{
17198 {0, 21503},
17199 {1, 21503},
17200 {2, 21503},
17201 },
17202 outputs: []outputInfo{
17203 {0, 21503},
17204 },
17205 },
17206 },
17207 {
17208 name: "ANDshiftRAreg",
17209 argLen: 3,
17210 asm: arm.AAND,
17211 reg: regInfo{
17212 inputs: []inputInfo{
17213 {0, 21503},
17214 {1, 21503},
17215 {2, 21503},
17216 },
17217 outputs: []outputInfo{
17218 {0, 21503},
17219 },
17220 },
17221 },
17222 {
17223 name: "ORshiftLLreg",
17224 argLen: 3,
17225 asm: arm.AORR,
17226 reg: regInfo{
17227 inputs: []inputInfo{
17228 {0, 21503},
17229 {1, 21503},
17230 {2, 21503},
17231 },
17232 outputs: []outputInfo{
17233 {0, 21503},
17234 },
17235 },
17236 },
17237 {
17238 name: "ORshiftRLreg",
17239 argLen: 3,
17240 asm: arm.AORR,
17241 reg: regInfo{
17242 inputs: []inputInfo{
17243 {0, 21503},
17244 {1, 21503},
17245 {2, 21503},
17246 },
17247 outputs: []outputInfo{
17248 {0, 21503},
17249 },
17250 },
17251 },
17252 {
17253 name: "ORshiftRAreg",
17254 argLen: 3,
17255 asm: arm.AORR,
17256 reg: regInfo{
17257 inputs: []inputInfo{
17258 {0, 21503},
17259 {1, 21503},
17260 {2, 21503},
17261 },
17262 outputs: []outputInfo{
17263 {0, 21503},
17264 },
17265 },
17266 },
17267 {
17268 name: "XORshiftLLreg",
17269 argLen: 3,
17270 asm: arm.AEOR,
17271 reg: regInfo{
17272 inputs: []inputInfo{
17273 {0, 21503},
17274 {1, 21503},
17275 {2, 21503},
17276 },
17277 outputs: []outputInfo{
17278 {0, 21503},
17279 },
17280 },
17281 },
17282 {
17283 name: "XORshiftRLreg",
17284 argLen: 3,
17285 asm: arm.AEOR,
17286 reg: regInfo{
17287 inputs: []inputInfo{
17288 {0, 21503},
17289 {1, 21503},
17290 {2, 21503},
17291 },
17292 outputs: []outputInfo{
17293 {0, 21503},
17294 },
17295 },
17296 },
17297 {
17298 name: "XORshiftRAreg",
17299 argLen: 3,
17300 asm: arm.AEOR,
17301 reg: regInfo{
17302 inputs: []inputInfo{
17303 {0, 21503},
17304 {1, 21503},
17305 {2, 21503},
17306 },
17307 outputs: []outputInfo{
17308 {0, 21503},
17309 },
17310 },
17311 },
17312 {
17313 name: "BICshiftLLreg",
17314 argLen: 3,
17315 asm: arm.ABIC,
17316 reg: regInfo{
17317 inputs: []inputInfo{
17318 {0, 21503},
17319 {1, 21503},
17320 {2, 21503},
17321 },
17322 outputs: []outputInfo{
17323 {0, 21503},
17324 },
17325 },
17326 },
17327 {
17328 name: "BICshiftRLreg",
17329 argLen: 3,
17330 asm: arm.ABIC,
17331 reg: regInfo{
17332 inputs: []inputInfo{
17333 {0, 21503},
17334 {1, 21503},
17335 {2, 21503},
17336 },
17337 outputs: []outputInfo{
17338 {0, 21503},
17339 },
17340 },
17341 },
17342 {
17343 name: "BICshiftRAreg",
17344 argLen: 3,
17345 asm: arm.ABIC,
17346 reg: regInfo{
17347 inputs: []inputInfo{
17348 {0, 21503},
17349 {1, 21503},
17350 {2, 21503},
17351 },
17352 outputs: []outputInfo{
17353 {0, 21503},
17354 },
17355 },
17356 },
17357 {
17358 name: "MVNshiftLLreg",
17359 argLen: 2,
17360 asm: arm.AMVN,
17361 reg: regInfo{
17362 inputs: []inputInfo{
17363 {0, 22527},
17364 {1, 22527},
17365 },
17366 outputs: []outputInfo{
17367 {0, 21503},
17368 },
17369 },
17370 },
17371 {
17372 name: "MVNshiftRLreg",
17373 argLen: 2,
17374 asm: arm.AMVN,
17375 reg: regInfo{
17376 inputs: []inputInfo{
17377 {0, 22527},
17378 {1, 22527},
17379 },
17380 outputs: []outputInfo{
17381 {0, 21503},
17382 },
17383 },
17384 },
17385 {
17386 name: "MVNshiftRAreg",
17387 argLen: 2,
17388 asm: arm.AMVN,
17389 reg: regInfo{
17390 inputs: []inputInfo{
17391 {0, 22527},
17392 {1, 22527},
17393 },
17394 outputs: []outputInfo{
17395 {0, 21503},
17396 },
17397 },
17398 },
17399 {
17400 name: "ADCshiftLLreg",
17401 argLen: 4,
17402 asm: arm.AADC,
17403 reg: regInfo{
17404 inputs: []inputInfo{
17405 {0, 21503},
17406 {1, 21503},
17407 {2, 21503},
17408 },
17409 outputs: []outputInfo{
17410 {0, 21503},
17411 },
17412 },
17413 },
17414 {
17415 name: "ADCshiftRLreg",
17416 argLen: 4,
17417 asm: arm.AADC,
17418 reg: regInfo{
17419 inputs: []inputInfo{
17420 {0, 21503},
17421 {1, 21503},
17422 {2, 21503},
17423 },
17424 outputs: []outputInfo{
17425 {0, 21503},
17426 },
17427 },
17428 },
17429 {
17430 name: "ADCshiftRAreg",
17431 argLen: 4,
17432 asm: arm.AADC,
17433 reg: regInfo{
17434 inputs: []inputInfo{
17435 {0, 21503},
17436 {1, 21503},
17437 {2, 21503},
17438 },
17439 outputs: []outputInfo{
17440 {0, 21503},
17441 },
17442 },
17443 },
17444 {
17445 name: "SBCshiftLLreg",
17446 argLen: 4,
17447 asm: arm.ASBC,
17448 reg: regInfo{
17449 inputs: []inputInfo{
17450 {0, 21503},
17451 {1, 21503},
17452 {2, 21503},
17453 },
17454 outputs: []outputInfo{
17455 {0, 21503},
17456 },
17457 },
17458 },
17459 {
17460 name: "SBCshiftRLreg",
17461 argLen: 4,
17462 asm: arm.ASBC,
17463 reg: regInfo{
17464 inputs: []inputInfo{
17465 {0, 21503},
17466 {1, 21503},
17467 {2, 21503},
17468 },
17469 outputs: []outputInfo{
17470 {0, 21503},
17471 },
17472 },
17473 },
17474 {
17475 name: "SBCshiftRAreg",
17476 argLen: 4,
17477 asm: arm.ASBC,
17478 reg: regInfo{
17479 inputs: []inputInfo{
17480 {0, 21503},
17481 {1, 21503},
17482 {2, 21503},
17483 },
17484 outputs: []outputInfo{
17485 {0, 21503},
17486 },
17487 },
17488 },
17489 {
17490 name: "RSCshiftLLreg",
17491 argLen: 4,
17492 asm: arm.ARSC,
17493 reg: regInfo{
17494 inputs: []inputInfo{
17495 {0, 21503},
17496 {1, 21503},
17497 {2, 21503},
17498 },
17499 outputs: []outputInfo{
17500 {0, 21503},
17501 },
17502 },
17503 },
17504 {
17505 name: "RSCshiftRLreg",
17506 argLen: 4,
17507 asm: arm.ARSC,
17508 reg: regInfo{
17509 inputs: []inputInfo{
17510 {0, 21503},
17511 {1, 21503},
17512 {2, 21503},
17513 },
17514 outputs: []outputInfo{
17515 {0, 21503},
17516 },
17517 },
17518 },
17519 {
17520 name: "RSCshiftRAreg",
17521 argLen: 4,
17522 asm: arm.ARSC,
17523 reg: regInfo{
17524 inputs: []inputInfo{
17525 {0, 21503},
17526 {1, 21503},
17527 {2, 21503},
17528 },
17529 outputs: []outputInfo{
17530 {0, 21503},
17531 },
17532 },
17533 },
17534 {
17535 name: "ADDSshiftLLreg",
17536 argLen: 3,
17537 asm: arm.AADD,
17538 reg: regInfo{
17539 inputs: []inputInfo{
17540 {0, 21503},
17541 {1, 21503},
17542 {2, 21503},
17543 },
17544 outputs: []outputInfo{
17545 {1, 0},
17546 {0, 21503},
17547 },
17548 },
17549 },
17550 {
17551 name: "ADDSshiftRLreg",
17552 argLen: 3,
17553 asm: arm.AADD,
17554 reg: regInfo{
17555 inputs: []inputInfo{
17556 {0, 21503},
17557 {1, 21503},
17558 {2, 21503},
17559 },
17560 outputs: []outputInfo{
17561 {1, 0},
17562 {0, 21503},
17563 },
17564 },
17565 },
17566 {
17567 name: "ADDSshiftRAreg",
17568 argLen: 3,
17569 asm: arm.AADD,
17570 reg: regInfo{
17571 inputs: []inputInfo{
17572 {0, 21503},
17573 {1, 21503},
17574 {2, 21503},
17575 },
17576 outputs: []outputInfo{
17577 {1, 0},
17578 {0, 21503},
17579 },
17580 },
17581 },
17582 {
17583 name: "SUBSshiftLLreg",
17584 argLen: 3,
17585 asm: arm.ASUB,
17586 reg: regInfo{
17587 inputs: []inputInfo{
17588 {0, 21503},
17589 {1, 21503},
17590 {2, 21503},
17591 },
17592 outputs: []outputInfo{
17593 {1, 0},
17594 {0, 21503},
17595 },
17596 },
17597 },
17598 {
17599 name: "SUBSshiftRLreg",
17600 argLen: 3,
17601 asm: arm.ASUB,
17602 reg: regInfo{
17603 inputs: []inputInfo{
17604 {0, 21503},
17605 {1, 21503},
17606 {2, 21503},
17607 },
17608 outputs: []outputInfo{
17609 {1, 0},
17610 {0, 21503},
17611 },
17612 },
17613 },
17614 {
17615 name: "SUBSshiftRAreg",
17616 argLen: 3,
17617 asm: arm.ASUB,
17618 reg: regInfo{
17619 inputs: []inputInfo{
17620 {0, 21503},
17621 {1, 21503},
17622 {2, 21503},
17623 },
17624 outputs: []outputInfo{
17625 {1, 0},
17626 {0, 21503},
17627 },
17628 },
17629 },
17630 {
17631 name: "RSBSshiftLLreg",
17632 argLen: 3,
17633 asm: arm.ARSB,
17634 reg: regInfo{
17635 inputs: []inputInfo{
17636 {0, 21503},
17637 {1, 21503},
17638 {2, 21503},
17639 },
17640 outputs: []outputInfo{
17641 {1, 0},
17642 {0, 21503},
17643 },
17644 },
17645 },
17646 {
17647 name: "RSBSshiftRLreg",
17648 argLen: 3,
17649 asm: arm.ARSB,
17650 reg: regInfo{
17651 inputs: []inputInfo{
17652 {0, 21503},
17653 {1, 21503},
17654 {2, 21503},
17655 },
17656 outputs: []outputInfo{
17657 {1, 0},
17658 {0, 21503},
17659 },
17660 },
17661 },
17662 {
17663 name: "RSBSshiftRAreg",
17664 argLen: 3,
17665 asm: arm.ARSB,
17666 reg: regInfo{
17667 inputs: []inputInfo{
17668 {0, 21503},
17669 {1, 21503},
17670 {2, 21503},
17671 },
17672 outputs: []outputInfo{
17673 {1, 0},
17674 {0, 21503},
17675 },
17676 },
17677 },
17678 {
17679 name: "CMP",
17680 argLen: 2,
17681 asm: arm.ACMP,
17682 reg: regInfo{
17683 inputs: []inputInfo{
17684 {0, 22527},
17685 {1, 22527},
17686 },
17687 },
17688 },
17689 {
17690 name: "CMPconst",
17691 auxType: auxInt32,
17692 argLen: 1,
17693 asm: arm.ACMP,
17694 reg: regInfo{
17695 inputs: []inputInfo{
17696 {0, 22527},
17697 },
17698 },
17699 },
17700 {
17701 name: "CMN",
17702 argLen: 2,
17703 commutative: true,
17704 asm: arm.ACMN,
17705 reg: regInfo{
17706 inputs: []inputInfo{
17707 {0, 22527},
17708 {1, 22527},
17709 },
17710 },
17711 },
17712 {
17713 name: "CMNconst",
17714 auxType: auxInt32,
17715 argLen: 1,
17716 asm: arm.ACMN,
17717 reg: regInfo{
17718 inputs: []inputInfo{
17719 {0, 22527},
17720 },
17721 },
17722 },
17723 {
17724 name: "TST",
17725 argLen: 2,
17726 commutative: true,
17727 asm: arm.ATST,
17728 reg: regInfo{
17729 inputs: []inputInfo{
17730 {0, 22527},
17731 {1, 22527},
17732 },
17733 },
17734 },
17735 {
17736 name: "TSTconst",
17737 auxType: auxInt32,
17738 argLen: 1,
17739 asm: arm.ATST,
17740 reg: regInfo{
17741 inputs: []inputInfo{
17742 {0, 22527},
17743 },
17744 },
17745 },
17746 {
17747 name: "TEQ",
17748 argLen: 2,
17749 commutative: true,
17750 asm: arm.ATEQ,
17751 reg: regInfo{
17752 inputs: []inputInfo{
17753 {0, 22527},
17754 {1, 22527},
17755 },
17756 },
17757 },
17758 {
17759 name: "TEQconst",
17760 auxType: auxInt32,
17761 argLen: 1,
17762 asm: arm.ATEQ,
17763 reg: regInfo{
17764 inputs: []inputInfo{
17765 {0, 22527},
17766 },
17767 },
17768 },
17769 {
17770 name: "CMPF",
17771 argLen: 2,
17772 asm: arm.ACMPF,
17773 reg: regInfo{
17774 inputs: []inputInfo{
17775 {0, 4294901760},
17776 {1, 4294901760},
17777 },
17778 },
17779 },
17780 {
17781 name: "CMPD",
17782 argLen: 2,
17783 asm: arm.ACMPD,
17784 reg: regInfo{
17785 inputs: []inputInfo{
17786 {0, 4294901760},
17787 {1, 4294901760},
17788 },
17789 },
17790 },
17791 {
17792 name: "CMPshiftLL",
17793 auxType: auxInt32,
17794 argLen: 2,
17795 asm: arm.ACMP,
17796 reg: regInfo{
17797 inputs: []inputInfo{
17798 {0, 22527},
17799 {1, 22527},
17800 },
17801 },
17802 },
17803 {
17804 name: "CMPshiftRL",
17805 auxType: auxInt32,
17806 argLen: 2,
17807 asm: arm.ACMP,
17808 reg: regInfo{
17809 inputs: []inputInfo{
17810 {0, 22527},
17811 {1, 22527},
17812 },
17813 },
17814 },
17815 {
17816 name: "CMPshiftRA",
17817 auxType: auxInt32,
17818 argLen: 2,
17819 asm: arm.ACMP,
17820 reg: regInfo{
17821 inputs: []inputInfo{
17822 {0, 22527},
17823 {1, 22527},
17824 },
17825 },
17826 },
17827 {
17828 name: "CMNshiftLL",
17829 auxType: auxInt32,
17830 argLen: 2,
17831 asm: arm.ACMN,
17832 reg: regInfo{
17833 inputs: []inputInfo{
17834 {0, 22527},
17835 {1, 22527},
17836 },
17837 },
17838 },
17839 {
17840 name: "CMNshiftRL",
17841 auxType: auxInt32,
17842 argLen: 2,
17843 asm: arm.ACMN,
17844 reg: regInfo{
17845 inputs: []inputInfo{
17846 {0, 22527},
17847 {1, 22527},
17848 },
17849 },
17850 },
17851 {
17852 name: "CMNshiftRA",
17853 auxType: auxInt32,
17854 argLen: 2,
17855 asm: arm.ACMN,
17856 reg: regInfo{
17857 inputs: []inputInfo{
17858 {0, 22527},
17859 {1, 22527},
17860 },
17861 },
17862 },
17863 {
17864 name: "TSTshiftLL",
17865 auxType: auxInt32,
17866 argLen: 2,
17867 asm: arm.ATST,
17868 reg: regInfo{
17869 inputs: []inputInfo{
17870 {0, 22527},
17871 {1, 22527},
17872 },
17873 },
17874 },
17875 {
17876 name: "TSTshiftRL",
17877 auxType: auxInt32,
17878 argLen: 2,
17879 asm: arm.ATST,
17880 reg: regInfo{
17881 inputs: []inputInfo{
17882 {0, 22527},
17883 {1, 22527},
17884 },
17885 },
17886 },
17887 {
17888 name: "TSTshiftRA",
17889 auxType: auxInt32,
17890 argLen: 2,
17891 asm: arm.ATST,
17892 reg: regInfo{
17893 inputs: []inputInfo{
17894 {0, 22527},
17895 {1, 22527},
17896 },
17897 },
17898 },
17899 {
17900 name: "TEQshiftLL",
17901 auxType: auxInt32,
17902 argLen: 2,
17903 asm: arm.ATEQ,
17904 reg: regInfo{
17905 inputs: []inputInfo{
17906 {0, 22527},
17907 {1, 22527},
17908 },
17909 },
17910 },
17911 {
17912 name: "TEQshiftRL",
17913 auxType: auxInt32,
17914 argLen: 2,
17915 asm: arm.ATEQ,
17916 reg: regInfo{
17917 inputs: []inputInfo{
17918 {0, 22527},
17919 {1, 22527},
17920 },
17921 },
17922 },
17923 {
17924 name: "TEQshiftRA",
17925 auxType: auxInt32,
17926 argLen: 2,
17927 asm: arm.ATEQ,
17928 reg: regInfo{
17929 inputs: []inputInfo{
17930 {0, 22527},
17931 {1, 22527},
17932 },
17933 },
17934 },
17935 {
17936 name: "CMPshiftLLreg",
17937 argLen: 3,
17938 asm: arm.ACMP,
17939 reg: regInfo{
17940 inputs: []inputInfo{
17941 {0, 21503},
17942 {1, 21503},
17943 {2, 21503},
17944 },
17945 },
17946 },
17947 {
17948 name: "CMPshiftRLreg",
17949 argLen: 3,
17950 asm: arm.ACMP,
17951 reg: regInfo{
17952 inputs: []inputInfo{
17953 {0, 21503},
17954 {1, 21503},
17955 {2, 21503},
17956 },
17957 },
17958 },
17959 {
17960 name: "CMPshiftRAreg",
17961 argLen: 3,
17962 asm: arm.ACMP,
17963 reg: regInfo{
17964 inputs: []inputInfo{
17965 {0, 21503},
17966 {1, 21503},
17967 {2, 21503},
17968 },
17969 },
17970 },
17971 {
17972 name: "CMNshiftLLreg",
17973 argLen: 3,
17974 asm: arm.ACMN,
17975 reg: regInfo{
17976 inputs: []inputInfo{
17977 {0, 21503},
17978 {1, 21503},
17979 {2, 21503},
17980 },
17981 },
17982 },
17983 {
17984 name: "CMNshiftRLreg",
17985 argLen: 3,
17986 asm: arm.ACMN,
17987 reg: regInfo{
17988 inputs: []inputInfo{
17989 {0, 21503},
17990 {1, 21503},
17991 {2, 21503},
17992 },
17993 },
17994 },
17995 {
17996 name: "CMNshiftRAreg",
17997 argLen: 3,
17998 asm: arm.ACMN,
17999 reg: regInfo{
18000 inputs: []inputInfo{
18001 {0, 21503},
18002 {1, 21503},
18003 {2, 21503},
18004 },
18005 },
18006 },
18007 {
18008 name: "TSTshiftLLreg",
18009 argLen: 3,
18010 asm: arm.ATST,
18011 reg: regInfo{
18012 inputs: []inputInfo{
18013 {0, 21503},
18014 {1, 21503},
18015 {2, 21503},
18016 },
18017 },
18018 },
18019 {
18020 name: "TSTshiftRLreg",
18021 argLen: 3,
18022 asm: arm.ATST,
18023 reg: regInfo{
18024 inputs: []inputInfo{
18025 {0, 21503},
18026 {1, 21503},
18027 {2, 21503},
18028 },
18029 },
18030 },
18031 {
18032 name: "TSTshiftRAreg",
18033 argLen: 3,
18034 asm: arm.ATST,
18035 reg: regInfo{
18036 inputs: []inputInfo{
18037 {0, 21503},
18038 {1, 21503},
18039 {2, 21503},
18040 },
18041 },
18042 },
18043 {
18044 name: "TEQshiftLLreg",
18045 argLen: 3,
18046 asm: arm.ATEQ,
18047 reg: regInfo{
18048 inputs: []inputInfo{
18049 {0, 21503},
18050 {1, 21503},
18051 {2, 21503},
18052 },
18053 },
18054 },
18055 {
18056 name: "TEQshiftRLreg",
18057 argLen: 3,
18058 asm: arm.ATEQ,
18059 reg: regInfo{
18060 inputs: []inputInfo{
18061 {0, 21503},
18062 {1, 21503},
18063 {2, 21503},
18064 },
18065 },
18066 },
18067 {
18068 name: "TEQshiftRAreg",
18069 argLen: 3,
18070 asm: arm.ATEQ,
18071 reg: regInfo{
18072 inputs: []inputInfo{
18073 {0, 21503},
18074 {1, 21503},
18075 {2, 21503},
18076 },
18077 },
18078 },
18079 {
18080 name: "CMPF0",
18081 argLen: 1,
18082 asm: arm.ACMPF,
18083 reg: regInfo{
18084 inputs: []inputInfo{
18085 {0, 4294901760},
18086 },
18087 },
18088 },
18089 {
18090 name: "CMPD0",
18091 argLen: 1,
18092 asm: arm.ACMPD,
18093 reg: regInfo{
18094 inputs: []inputInfo{
18095 {0, 4294901760},
18096 },
18097 },
18098 },
18099 {
18100 name: "MOVWconst",
18101 auxType: auxInt32,
18102 argLen: 0,
18103 rematerializeable: true,
18104 asm: arm.AMOVW,
18105 reg: regInfo{
18106 outputs: []outputInfo{
18107 {0, 21503},
18108 },
18109 },
18110 },
18111 {
18112 name: "MOVFconst",
18113 auxType: auxFloat64,
18114 argLen: 0,
18115 rematerializeable: true,
18116 asm: arm.AMOVF,
18117 reg: regInfo{
18118 outputs: []outputInfo{
18119 {0, 4294901760},
18120 },
18121 },
18122 },
18123 {
18124 name: "MOVDconst",
18125 auxType: auxFloat64,
18126 argLen: 0,
18127 rematerializeable: true,
18128 asm: arm.AMOVD,
18129 reg: regInfo{
18130 outputs: []outputInfo{
18131 {0, 4294901760},
18132 },
18133 },
18134 },
18135 {
18136 name: "MOVWaddr",
18137 auxType: auxSymOff,
18138 argLen: 1,
18139 rematerializeable: true,
18140 symEffect: SymAddr,
18141 asm: arm.AMOVW,
18142 reg: regInfo{
18143 inputs: []inputInfo{
18144 {0, 4294975488},
18145 },
18146 outputs: []outputInfo{
18147 {0, 21503},
18148 },
18149 },
18150 },
18151 {
18152 name: "MOVBload",
18153 auxType: auxSymOff,
18154 argLen: 2,
18155 faultOnNilArg0: true,
18156 symEffect: SymRead,
18157 asm: arm.AMOVB,
18158 reg: regInfo{
18159 inputs: []inputInfo{
18160 {0, 4294998015},
18161 },
18162 outputs: []outputInfo{
18163 {0, 21503},
18164 },
18165 },
18166 },
18167 {
18168 name: "MOVBUload",
18169 auxType: auxSymOff,
18170 argLen: 2,
18171 faultOnNilArg0: true,
18172 symEffect: SymRead,
18173 asm: arm.AMOVBU,
18174 reg: regInfo{
18175 inputs: []inputInfo{
18176 {0, 4294998015},
18177 },
18178 outputs: []outputInfo{
18179 {0, 21503},
18180 },
18181 },
18182 },
18183 {
18184 name: "MOVHload",
18185 auxType: auxSymOff,
18186 argLen: 2,
18187 faultOnNilArg0: true,
18188 symEffect: SymRead,
18189 asm: arm.AMOVH,
18190 reg: regInfo{
18191 inputs: []inputInfo{
18192 {0, 4294998015},
18193 },
18194 outputs: []outputInfo{
18195 {0, 21503},
18196 },
18197 },
18198 },
18199 {
18200 name: "MOVHUload",
18201 auxType: auxSymOff,
18202 argLen: 2,
18203 faultOnNilArg0: true,
18204 symEffect: SymRead,
18205 asm: arm.AMOVHU,
18206 reg: regInfo{
18207 inputs: []inputInfo{
18208 {0, 4294998015},
18209 },
18210 outputs: []outputInfo{
18211 {0, 21503},
18212 },
18213 },
18214 },
18215 {
18216 name: "MOVWload",
18217 auxType: auxSymOff,
18218 argLen: 2,
18219 faultOnNilArg0: true,
18220 symEffect: SymRead,
18221 asm: arm.AMOVW,
18222 reg: regInfo{
18223 inputs: []inputInfo{
18224 {0, 4294998015},
18225 },
18226 outputs: []outputInfo{
18227 {0, 21503},
18228 },
18229 },
18230 },
18231 {
18232 name: "MOVFload",
18233 auxType: auxSymOff,
18234 argLen: 2,
18235 faultOnNilArg0: true,
18236 symEffect: SymRead,
18237 asm: arm.AMOVF,
18238 reg: regInfo{
18239 inputs: []inputInfo{
18240 {0, 4294998015},
18241 },
18242 outputs: []outputInfo{
18243 {0, 4294901760},
18244 },
18245 },
18246 },
18247 {
18248 name: "MOVDload",
18249 auxType: auxSymOff,
18250 argLen: 2,
18251 faultOnNilArg0: true,
18252 symEffect: SymRead,
18253 asm: arm.AMOVD,
18254 reg: regInfo{
18255 inputs: []inputInfo{
18256 {0, 4294998015},
18257 },
18258 outputs: []outputInfo{
18259 {0, 4294901760},
18260 },
18261 },
18262 },
18263 {
18264 name: "MOVBstore",
18265 auxType: auxSymOff,
18266 argLen: 3,
18267 faultOnNilArg0: true,
18268 symEffect: SymWrite,
18269 asm: arm.AMOVB,
18270 reg: regInfo{
18271 inputs: []inputInfo{
18272 {1, 22527},
18273 {0, 4294998015},
18274 },
18275 },
18276 },
18277 {
18278 name: "MOVHstore",
18279 auxType: auxSymOff,
18280 argLen: 3,
18281 faultOnNilArg0: true,
18282 symEffect: SymWrite,
18283 asm: arm.AMOVH,
18284 reg: regInfo{
18285 inputs: []inputInfo{
18286 {1, 22527},
18287 {0, 4294998015},
18288 },
18289 },
18290 },
18291 {
18292 name: "MOVWstore",
18293 auxType: auxSymOff,
18294 argLen: 3,
18295 faultOnNilArg0: true,
18296 symEffect: SymWrite,
18297 asm: arm.AMOVW,
18298 reg: regInfo{
18299 inputs: []inputInfo{
18300 {1, 22527},
18301 {0, 4294998015},
18302 },
18303 },
18304 },
18305 {
18306 name: "MOVFstore",
18307 auxType: auxSymOff,
18308 argLen: 3,
18309 faultOnNilArg0: true,
18310 symEffect: SymWrite,
18311 asm: arm.AMOVF,
18312 reg: regInfo{
18313 inputs: []inputInfo{
18314 {0, 4294998015},
18315 {1, 4294901760},
18316 },
18317 },
18318 },
18319 {
18320 name: "MOVDstore",
18321 auxType: auxSymOff,
18322 argLen: 3,
18323 faultOnNilArg0: true,
18324 symEffect: SymWrite,
18325 asm: arm.AMOVD,
18326 reg: regInfo{
18327 inputs: []inputInfo{
18328 {0, 4294998015},
18329 {1, 4294901760},
18330 },
18331 },
18332 },
18333 {
18334 name: "MOVWloadidx",
18335 argLen: 3,
18336 asm: arm.AMOVW,
18337 reg: regInfo{
18338 inputs: []inputInfo{
18339 {1, 22527},
18340 {0, 4294998015},
18341 },
18342 outputs: []outputInfo{
18343 {0, 21503},
18344 },
18345 },
18346 },
18347 {
18348 name: "MOVWloadshiftLL",
18349 auxType: auxInt32,
18350 argLen: 3,
18351 asm: arm.AMOVW,
18352 reg: regInfo{
18353 inputs: []inputInfo{
18354 {1, 22527},
18355 {0, 4294998015},
18356 },
18357 outputs: []outputInfo{
18358 {0, 21503},
18359 },
18360 },
18361 },
18362 {
18363 name: "MOVWloadshiftRL",
18364 auxType: auxInt32,
18365 argLen: 3,
18366 asm: arm.AMOVW,
18367 reg: regInfo{
18368 inputs: []inputInfo{
18369 {1, 22527},
18370 {0, 4294998015},
18371 },
18372 outputs: []outputInfo{
18373 {0, 21503},
18374 },
18375 },
18376 },
18377 {
18378 name: "MOVWloadshiftRA",
18379 auxType: auxInt32,
18380 argLen: 3,
18381 asm: arm.AMOVW,
18382 reg: regInfo{
18383 inputs: []inputInfo{
18384 {1, 22527},
18385 {0, 4294998015},
18386 },
18387 outputs: []outputInfo{
18388 {0, 21503},
18389 },
18390 },
18391 },
18392 {
18393 name: "MOVBUloadidx",
18394 argLen: 3,
18395 asm: arm.AMOVBU,
18396 reg: regInfo{
18397 inputs: []inputInfo{
18398 {1, 22527},
18399 {0, 4294998015},
18400 },
18401 outputs: []outputInfo{
18402 {0, 21503},
18403 },
18404 },
18405 },
18406 {
18407 name: "MOVBloadidx",
18408 argLen: 3,
18409 asm: arm.AMOVB,
18410 reg: regInfo{
18411 inputs: []inputInfo{
18412 {1, 22527},
18413 {0, 4294998015},
18414 },
18415 outputs: []outputInfo{
18416 {0, 21503},
18417 },
18418 },
18419 },
18420 {
18421 name: "MOVHUloadidx",
18422 argLen: 3,
18423 asm: arm.AMOVHU,
18424 reg: regInfo{
18425 inputs: []inputInfo{
18426 {1, 22527},
18427 {0, 4294998015},
18428 },
18429 outputs: []outputInfo{
18430 {0, 21503},
18431 },
18432 },
18433 },
18434 {
18435 name: "MOVHloadidx",
18436 argLen: 3,
18437 asm: arm.AMOVH,
18438 reg: regInfo{
18439 inputs: []inputInfo{
18440 {1, 22527},
18441 {0, 4294998015},
18442 },
18443 outputs: []outputInfo{
18444 {0, 21503},
18445 },
18446 },
18447 },
18448 {
18449 name: "MOVWstoreidx",
18450 argLen: 4,
18451 asm: arm.AMOVW,
18452 reg: regInfo{
18453 inputs: []inputInfo{
18454 {1, 22527},
18455 {2, 22527},
18456 {0, 4294998015},
18457 },
18458 },
18459 },
18460 {
18461 name: "MOVWstoreshiftLL",
18462 auxType: auxInt32,
18463 argLen: 4,
18464 asm: arm.AMOVW,
18465 reg: regInfo{
18466 inputs: []inputInfo{
18467 {1, 22527},
18468 {2, 22527},
18469 {0, 4294998015},
18470 },
18471 },
18472 },
18473 {
18474 name: "MOVWstoreshiftRL",
18475 auxType: auxInt32,
18476 argLen: 4,
18477 asm: arm.AMOVW,
18478 reg: regInfo{
18479 inputs: []inputInfo{
18480 {1, 22527},
18481 {2, 22527},
18482 {0, 4294998015},
18483 },
18484 },
18485 },
18486 {
18487 name: "MOVWstoreshiftRA",
18488 auxType: auxInt32,
18489 argLen: 4,
18490 asm: arm.AMOVW,
18491 reg: regInfo{
18492 inputs: []inputInfo{
18493 {1, 22527},
18494 {2, 22527},
18495 {0, 4294998015},
18496 },
18497 },
18498 },
18499 {
18500 name: "MOVBstoreidx",
18501 argLen: 4,
18502 asm: arm.AMOVB,
18503 reg: regInfo{
18504 inputs: []inputInfo{
18505 {1, 22527},
18506 {2, 22527},
18507 {0, 4294998015},
18508 },
18509 },
18510 },
18511 {
18512 name: "MOVHstoreidx",
18513 argLen: 4,
18514 asm: arm.AMOVH,
18515 reg: regInfo{
18516 inputs: []inputInfo{
18517 {1, 22527},
18518 {2, 22527},
18519 {0, 4294998015},
18520 },
18521 },
18522 },
18523 {
18524 name: "MOVBreg",
18525 argLen: 1,
18526 asm: arm.AMOVBS,
18527 reg: regInfo{
18528 inputs: []inputInfo{
18529 {0, 22527},
18530 },
18531 outputs: []outputInfo{
18532 {0, 21503},
18533 },
18534 },
18535 },
18536 {
18537 name: "MOVBUreg",
18538 argLen: 1,
18539 asm: arm.AMOVBU,
18540 reg: regInfo{
18541 inputs: []inputInfo{
18542 {0, 22527},
18543 },
18544 outputs: []outputInfo{
18545 {0, 21503},
18546 },
18547 },
18548 },
18549 {
18550 name: "MOVHreg",
18551 argLen: 1,
18552 asm: arm.AMOVHS,
18553 reg: regInfo{
18554 inputs: []inputInfo{
18555 {0, 22527},
18556 },
18557 outputs: []outputInfo{
18558 {0, 21503},
18559 },
18560 },
18561 },
18562 {
18563 name: "MOVHUreg",
18564 argLen: 1,
18565 asm: arm.AMOVHU,
18566 reg: regInfo{
18567 inputs: []inputInfo{
18568 {0, 22527},
18569 },
18570 outputs: []outputInfo{
18571 {0, 21503},
18572 },
18573 },
18574 },
18575 {
18576 name: "MOVWreg",
18577 argLen: 1,
18578 asm: arm.AMOVW,
18579 reg: regInfo{
18580 inputs: []inputInfo{
18581 {0, 22527},
18582 },
18583 outputs: []outputInfo{
18584 {0, 21503},
18585 },
18586 },
18587 },
18588 {
18589 name: "MOVWnop",
18590 argLen: 1,
18591 resultInArg0: true,
18592 reg: regInfo{
18593 inputs: []inputInfo{
18594 {0, 21503},
18595 },
18596 outputs: []outputInfo{
18597 {0, 21503},
18598 },
18599 },
18600 },
18601 {
18602 name: "MOVWF",
18603 argLen: 1,
18604 asm: arm.AMOVWF,
18605 reg: regInfo{
18606 inputs: []inputInfo{
18607 {0, 21503},
18608 },
18609 clobbers: 2147483648,
18610 outputs: []outputInfo{
18611 {0, 4294901760},
18612 },
18613 },
18614 },
18615 {
18616 name: "MOVWD",
18617 argLen: 1,
18618 asm: arm.AMOVWD,
18619 reg: regInfo{
18620 inputs: []inputInfo{
18621 {0, 21503},
18622 },
18623 clobbers: 2147483648,
18624 outputs: []outputInfo{
18625 {0, 4294901760},
18626 },
18627 },
18628 },
18629 {
18630 name: "MOVWUF",
18631 argLen: 1,
18632 asm: arm.AMOVWF,
18633 reg: regInfo{
18634 inputs: []inputInfo{
18635 {0, 21503},
18636 },
18637 clobbers: 2147483648,
18638 outputs: []outputInfo{
18639 {0, 4294901760},
18640 },
18641 },
18642 },
18643 {
18644 name: "MOVWUD",
18645 argLen: 1,
18646 asm: arm.AMOVWD,
18647 reg: regInfo{
18648 inputs: []inputInfo{
18649 {0, 21503},
18650 },
18651 clobbers: 2147483648,
18652 outputs: []outputInfo{
18653 {0, 4294901760},
18654 },
18655 },
18656 },
18657 {
18658 name: "MOVFW",
18659 argLen: 1,
18660 asm: arm.AMOVFW,
18661 reg: regInfo{
18662 inputs: []inputInfo{
18663 {0, 4294901760},
18664 },
18665 clobbers: 2147483648,
18666 outputs: []outputInfo{
18667 {0, 21503},
18668 },
18669 },
18670 },
18671 {
18672 name: "MOVDW",
18673 argLen: 1,
18674 asm: arm.AMOVDW,
18675 reg: regInfo{
18676 inputs: []inputInfo{
18677 {0, 4294901760},
18678 },
18679 clobbers: 2147483648,
18680 outputs: []outputInfo{
18681 {0, 21503},
18682 },
18683 },
18684 },
18685 {
18686 name: "MOVFWU",
18687 argLen: 1,
18688 asm: arm.AMOVFW,
18689 reg: regInfo{
18690 inputs: []inputInfo{
18691 {0, 4294901760},
18692 },
18693 clobbers: 2147483648,
18694 outputs: []outputInfo{
18695 {0, 21503},
18696 },
18697 },
18698 },
18699 {
18700 name: "MOVDWU",
18701 argLen: 1,
18702 asm: arm.AMOVDW,
18703 reg: regInfo{
18704 inputs: []inputInfo{
18705 {0, 4294901760},
18706 },
18707 clobbers: 2147483648,
18708 outputs: []outputInfo{
18709 {0, 21503},
18710 },
18711 },
18712 },
18713 {
18714 name: "MOVFD",
18715 argLen: 1,
18716 asm: arm.AMOVFD,
18717 reg: regInfo{
18718 inputs: []inputInfo{
18719 {0, 4294901760},
18720 },
18721 outputs: []outputInfo{
18722 {0, 4294901760},
18723 },
18724 },
18725 },
18726 {
18727 name: "MOVDF",
18728 argLen: 1,
18729 asm: arm.AMOVDF,
18730 reg: regInfo{
18731 inputs: []inputInfo{
18732 {0, 4294901760},
18733 },
18734 outputs: []outputInfo{
18735 {0, 4294901760},
18736 },
18737 },
18738 },
18739 {
18740 name: "CMOVWHSconst",
18741 auxType: auxInt32,
18742 argLen: 2,
18743 resultInArg0: true,
18744 asm: arm.AMOVW,
18745 reg: regInfo{
18746 inputs: []inputInfo{
18747 {0, 21503},
18748 },
18749 outputs: []outputInfo{
18750 {0, 21503},
18751 },
18752 },
18753 },
18754 {
18755 name: "CMOVWLSconst",
18756 auxType: auxInt32,
18757 argLen: 2,
18758 resultInArg0: true,
18759 asm: arm.AMOVW,
18760 reg: regInfo{
18761 inputs: []inputInfo{
18762 {0, 21503},
18763 },
18764 outputs: []outputInfo{
18765 {0, 21503},
18766 },
18767 },
18768 },
18769 {
18770 name: "SRAcond",
18771 argLen: 3,
18772 asm: arm.ASRA,
18773 reg: regInfo{
18774 inputs: []inputInfo{
18775 {0, 21503},
18776 {1, 21503},
18777 },
18778 outputs: []outputInfo{
18779 {0, 21503},
18780 },
18781 },
18782 },
18783 {
18784 name: "CALLstatic",
18785 auxType: auxCallOff,
18786 argLen: 1,
18787 clobberFlags: true,
18788 call: true,
18789 reg: regInfo{
18790 clobbers: 4294924287,
18791 },
18792 },
18793 {
18794 name: "CALLtail",
18795 auxType: auxCallOff,
18796 argLen: 1,
18797 clobberFlags: true,
18798 call: true,
18799 tailCall: true,
18800 reg: regInfo{
18801 clobbers: 4294924287,
18802 },
18803 },
18804 {
18805 name: "CALLclosure",
18806 auxType: auxCallOff,
18807 argLen: 3,
18808 clobberFlags: true,
18809 call: true,
18810 reg: regInfo{
18811 inputs: []inputInfo{
18812 {1, 128},
18813 {0, 29695},
18814 },
18815 clobbers: 4294924287,
18816 },
18817 },
18818 {
18819 name: "CALLinter",
18820 auxType: auxCallOff,
18821 argLen: 2,
18822 clobberFlags: true,
18823 call: true,
18824 reg: regInfo{
18825 inputs: []inputInfo{
18826 {0, 21503},
18827 },
18828 clobbers: 4294924287,
18829 },
18830 },
18831 {
18832 name: "LoweredNilCheck",
18833 argLen: 2,
18834 nilCheck: true,
18835 faultOnNilArg0: true,
18836 reg: regInfo{
18837 inputs: []inputInfo{
18838 {0, 22527},
18839 },
18840 },
18841 },
18842 {
18843 name: "Equal",
18844 argLen: 1,
18845 reg: regInfo{
18846 outputs: []outputInfo{
18847 {0, 21503},
18848 },
18849 },
18850 },
18851 {
18852 name: "NotEqual",
18853 argLen: 1,
18854 reg: regInfo{
18855 outputs: []outputInfo{
18856 {0, 21503},
18857 },
18858 },
18859 },
18860 {
18861 name: "LessThan",
18862 argLen: 1,
18863 reg: regInfo{
18864 outputs: []outputInfo{
18865 {0, 21503},
18866 },
18867 },
18868 },
18869 {
18870 name: "LessEqual",
18871 argLen: 1,
18872 reg: regInfo{
18873 outputs: []outputInfo{
18874 {0, 21503},
18875 },
18876 },
18877 },
18878 {
18879 name: "GreaterThan",
18880 argLen: 1,
18881 reg: regInfo{
18882 outputs: []outputInfo{
18883 {0, 21503},
18884 },
18885 },
18886 },
18887 {
18888 name: "GreaterEqual",
18889 argLen: 1,
18890 reg: regInfo{
18891 outputs: []outputInfo{
18892 {0, 21503},
18893 },
18894 },
18895 },
18896 {
18897 name: "LessThanU",
18898 argLen: 1,
18899 reg: regInfo{
18900 outputs: []outputInfo{
18901 {0, 21503},
18902 },
18903 },
18904 },
18905 {
18906 name: "LessEqualU",
18907 argLen: 1,
18908 reg: regInfo{
18909 outputs: []outputInfo{
18910 {0, 21503},
18911 },
18912 },
18913 },
18914 {
18915 name: "GreaterThanU",
18916 argLen: 1,
18917 reg: regInfo{
18918 outputs: []outputInfo{
18919 {0, 21503},
18920 },
18921 },
18922 },
18923 {
18924 name: "GreaterEqualU",
18925 argLen: 1,
18926 reg: regInfo{
18927 outputs: []outputInfo{
18928 {0, 21503},
18929 },
18930 },
18931 },
18932 {
18933 name: "DUFFZERO",
18934 auxType: auxInt64,
18935 argLen: 3,
18936 faultOnNilArg0: true,
18937 reg: regInfo{
18938 inputs: []inputInfo{
18939 {0, 2},
18940 {1, 1},
18941 },
18942 clobbers: 20482,
18943 },
18944 },
18945 {
18946 name: "DUFFCOPY",
18947 auxType: auxInt64,
18948 argLen: 3,
18949 faultOnNilArg0: true,
18950 faultOnNilArg1: true,
18951 reg: regInfo{
18952 inputs: []inputInfo{
18953 {0, 4},
18954 {1, 2},
18955 },
18956 clobbers: 20487,
18957 },
18958 },
18959 {
18960 name: "LoweredZero",
18961 auxType: auxInt64,
18962 argLen: 4,
18963 clobberFlags: true,
18964 faultOnNilArg0: true,
18965 reg: regInfo{
18966 inputs: []inputInfo{
18967 {0, 2},
18968 {1, 21503},
18969 {2, 21503},
18970 },
18971 clobbers: 2,
18972 },
18973 },
18974 {
18975 name: "LoweredMove",
18976 auxType: auxInt64,
18977 argLen: 4,
18978 clobberFlags: true,
18979 faultOnNilArg0: true,
18980 faultOnNilArg1: true,
18981 reg: regInfo{
18982 inputs: []inputInfo{
18983 {0, 4},
18984 {1, 2},
18985 {2, 21503},
18986 },
18987 clobbers: 6,
18988 },
18989 },
18990 {
18991 name: "LoweredGetClosurePtr",
18992 argLen: 0,
18993 zeroWidth: true,
18994 reg: regInfo{
18995 outputs: []outputInfo{
18996 {0, 128},
18997 },
18998 },
18999 },
19000 {
19001 name: "LoweredGetCallerSP",
19002 argLen: 1,
19003 rematerializeable: true,
19004 reg: regInfo{
19005 outputs: []outputInfo{
19006 {0, 21503},
19007 },
19008 },
19009 },
19010 {
19011 name: "LoweredGetCallerPC",
19012 argLen: 0,
19013 rematerializeable: true,
19014 reg: regInfo{
19015 outputs: []outputInfo{
19016 {0, 21503},
19017 },
19018 },
19019 },
19020 {
19021 name: "LoweredPanicBoundsA",
19022 auxType: auxInt64,
19023 argLen: 3,
19024 call: true,
19025 reg: regInfo{
19026 inputs: []inputInfo{
19027 {0, 4},
19028 {1, 8},
19029 },
19030 },
19031 },
19032 {
19033 name: "LoweredPanicBoundsB",
19034 auxType: auxInt64,
19035 argLen: 3,
19036 call: true,
19037 reg: regInfo{
19038 inputs: []inputInfo{
19039 {0, 2},
19040 {1, 4},
19041 },
19042 },
19043 },
19044 {
19045 name: "LoweredPanicBoundsC",
19046 auxType: auxInt64,
19047 argLen: 3,
19048 call: true,
19049 reg: regInfo{
19050 inputs: []inputInfo{
19051 {0, 1},
19052 {1, 2},
19053 },
19054 },
19055 },
19056 {
19057 name: "LoweredPanicExtendA",
19058 auxType: auxInt64,
19059 argLen: 4,
19060 call: true,
19061 reg: regInfo{
19062 inputs: []inputInfo{
19063 {0, 16},
19064 {1, 4},
19065 {2, 8},
19066 },
19067 },
19068 },
19069 {
19070 name: "LoweredPanicExtendB",
19071 auxType: auxInt64,
19072 argLen: 4,
19073 call: true,
19074 reg: regInfo{
19075 inputs: []inputInfo{
19076 {0, 16},
19077 {1, 2},
19078 {2, 4},
19079 },
19080 },
19081 },
19082 {
19083 name: "LoweredPanicExtendC",
19084 auxType: auxInt64,
19085 argLen: 4,
19086 call: true,
19087 reg: regInfo{
19088 inputs: []inputInfo{
19089 {0, 16},
19090 {1, 1},
19091 {2, 2},
19092 },
19093 },
19094 },
19095 {
19096 name: "FlagConstant",
19097 auxType: auxFlagConstant,
19098 argLen: 0,
19099 reg: regInfo{},
19100 },
19101 {
19102 name: "InvertFlags",
19103 argLen: 1,
19104 reg: regInfo{},
19105 },
19106 {
19107 name: "LoweredWB",
19108 auxType: auxInt64,
19109 argLen: 1,
19110 clobberFlags: true,
19111 reg: regInfo{
19112 clobbers: 4294922240,
19113 outputs: []outputInfo{
19114 {0, 256},
19115 },
19116 },
19117 },
19118
19119 {
19120 name: "ADCSflags",
19121 argLen: 3,
19122 commutative: true,
19123 asm: arm64.AADCS,
19124 reg: regInfo{
19125 inputs: []inputInfo{
19126 {0, 670826495},
19127 {1, 670826495},
19128 },
19129 outputs: []outputInfo{
19130 {1, 0},
19131 {0, 670826495},
19132 },
19133 },
19134 },
19135 {
19136 name: "ADCzerocarry",
19137 argLen: 1,
19138 asm: arm64.AADC,
19139 reg: regInfo{
19140 outputs: []outputInfo{
19141 {0, 670826495},
19142 },
19143 },
19144 },
19145 {
19146 name: "ADD",
19147 argLen: 2,
19148 commutative: true,
19149 asm: arm64.AADD,
19150 reg: regInfo{
19151 inputs: []inputInfo{
19152 {0, 805044223},
19153 {1, 805044223},
19154 },
19155 outputs: []outputInfo{
19156 {0, 670826495},
19157 },
19158 },
19159 },
19160 {
19161 name: "ADDconst",
19162 auxType: auxInt64,
19163 argLen: 1,
19164 asm: arm64.AADD,
19165 reg: regInfo{
19166 inputs: []inputInfo{
19167 {0, 1878786047},
19168 },
19169 outputs: []outputInfo{
19170 {0, 670826495},
19171 },
19172 },
19173 },
19174 {
19175 name: "ADDSconstflags",
19176 auxType: auxInt64,
19177 argLen: 1,
19178 asm: arm64.AADDS,
19179 reg: regInfo{
19180 inputs: []inputInfo{
19181 {0, 805044223},
19182 },
19183 outputs: []outputInfo{
19184 {1, 0},
19185 {0, 670826495},
19186 },
19187 },
19188 },
19189 {
19190 name: "ADDSflags",
19191 argLen: 2,
19192 commutative: true,
19193 asm: arm64.AADDS,
19194 reg: regInfo{
19195 inputs: []inputInfo{
19196 {0, 670826495},
19197 {1, 670826495},
19198 },
19199 outputs: []outputInfo{
19200 {1, 0},
19201 {0, 670826495},
19202 },
19203 },
19204 },
19205 {
19206 name: "SUB",
19207 argLen: 2,
19208 asm: arm64.ASUB,
19209 reg: regInfo{
19210 inputs: []inputInfo{
19211 {0, 805044223},
19212 {1, 805044223},
19213 },
19214 outputs: []outputInfo{
19215 {0, 670826495},
19216 },
19217 },
19218 },
19219 {
19220 name: "SUBconst",
19221 auxType: auxInt64,
19222 argLen: 1,
19223 asm: arm64.ASUB,
19224 reg: regInfo{
19225 inputs: []inputInfo{
19226 {0, 805044223},
19227 },
19228 outputs: []outputInfo{
19229 {0, 670826495},
19230 },
19231 },
19232 },
19233 {
19234 name: "SBCSflags",
19235 argLen: 3,
19236 asm: arm64.ASBCS,
19237 reg: regInfo{
19238 inputs: []inputInfo{
19239 {0, 670826495},
19240 {1, 670826495},
19241 },
19242 outputs: []outputInfo{
19243 {1, 0},
19244 {0, 670826495},
19245 },
19246 },
19247 },
19248 {
19249 name: "SUBSflags",
19250 argLen: 2,
19251 asm: arm64.ASUBS,
19252 reg: regInfo{
19253 inputs: []inputInfo{
19254 {0, 670826495},
19255 {1, 670826495},
19256 },
19257 outputs: []outputInfo{
19258 {1, 0},
19259 {0, 670826495},
19260 },
19261 },
19262 },
19263 {
19264 name: "MUL",
19265 argLen: 2,
19266 commutative: true,
19267 asm: arm64.AMUL,
19268 reg: regInfo{
19269 inputs: []inputInfo{
19270 {0, 805044223},
19271 {1, 805044223},
19272 },
19273 outputs: []outputInfo{
19274 {0, 670826495},
19275 },
19276 },
19277 },
19278 {
19279 name: "MULW",
19280 argLen: 2,
19281 commutative: true,
19282 asm: arm64.AMULW,
19283 reg: regInfo{
19284 inputs: []inputInfo{
19285 {0, 805044223},
19286 {1, 805044223},
19287 },
19288 outputs: []outputInfo{
19289 {0, 670826495},
19290 },
19291 },
19292 },
19293 {
19294 name: "MNEG",
19295 argLen: 2,
19296 commutative: true,
19297 asm: arm64.AMNEG,
19298 reg: regInfo{
19299 inputs: []inputInfo{
19300 {0, 805044223},
19301 {1, 805044223},
19302 },
19303 outputs: []outputInfo{
19304 {0, 670826495},
19305 },
19306 },
19307 },
19308 {
19309 name: "MNEGW",
19310 argLen: 2,
19311 commutative: true,
19312 asm: arm64.AMNEGW,
19313 reg: regInfo{
19314 inputs: []inputInfo{
19315 {0, 805044223},
19316 {1, 805044223},
19317 },
19318 outputs: []outputInfo{
19319 {0, 670826495},
19320 },
19321 },
19322 },
19323 {
19324 name: "MULH",
19325 argLen: 2,
19326 commutative: true,
19327 asm: arm64.ASMULH,
19328 reg: regInfo{
19329 inputs: []inputInfo{
19330 {0, 805044223},
19331 {1, 805044223},
19332 },
19333 outputs: []outputInfo{
19334 {0, 670826495},
19335 },
19336 },
19337 },
19338 {
19339 name: "UMULH",
19340 argLen: 2,
19341 commutative: true,
19342 asm: arm64.AUMULH,
19343 reg: regInfo{
19344 inputs: []inputInfo{
19345 {0, 805044223},
19346 {1, 805044223},
19347 },
19348 outputs: []outputInfo{
19349 {0, 670826495},
19350 },
19351 },
19352 },
19353 {
19354 name: "MULL",
19355 argLen: 2,
19356 commutative: true,
19357 asm: arm64.ASMULL,
19358 reg: regInfo{
19359 inputs: []inputInfo{
19360 {0, 805044223},
19361 {1, 805044223},
19362 },
19363 outputs: []outputInfo{
19364 {0, 670826495},
19365 },
19366 },
19367 },
19368 {
19369 name: "UMULL",
19370 argLen: 2,
19371 commutative: true,
19372 asm: arm64.AUMULL,
19373 reg: regInfo{
19374 inputs: []inputInfo{
19375 {0, 805044223},
19376 {1, 805044223},
19377 },
19378 outputs: []outputInfo{
19379 {0, 670826495},
19380 },
19381 },
19382 },
19383 {
19384 name: "DIV",
19385 argLen: 2,
19386 asm: arm64.ASDIV,
19387 reg: regInfo{
19388 inputs: []inputInfo{
19389 {0, 805044223},
19390 {1, 805044223},
19391 },
19392 outputs: []outputInfo{
19393 {0, 670826495},
19394 },
19395 },
19396 },
19397 {
19398 name: "UDIV",
19399 argLen: 2,
19400 asm: arm64.AUDIV,
19401 reg: regInfo{
19402 inputs: []inputInfo{
19403 {0, 805044223},
19404 {1, 805044223},
19405 },
19406 outputs: []outputInfo{
19407 {0, 670826495},
19408 },
19409 },
19410 },
19411 {
19412 name: "DIVW",
19413 argLen: 2,
19414 asm: arm64.ASDIVW,
19415 reg: regInfo{
19416 inputs: []inputInfo{
19417 {0, 805044223},
19418 {1, 805044223},
19419 },
19420 outputs: []outputInfo{
19421 {0, 670826495},
19422 },
19423 },
19424 },
19425 {
19426 name: "UDIVW",
19427 argLen: 2,
19428 asm: arm64.AUDIVW,
19429 reg: regInfo{
19430 inputs: []inputInfo{
19431 {0, 805044223},
19432 {1, 805044223},
19433 },
19434 outputs: []outputInfo{
19435 {0, 670826495},
19436 },
19437 },
19438 },
19439 {
19440 name: "MOD",
19441 argLen: 2,
19442 asm: arm64.AREM,
19443 reg: regInfo{
19444 inputs: []inputInfo{
19445 {0, 805044223},
19446 {1, 805044223},
19447 },
19448 outputs: []outputInfo{
19449 {0, 670826495},
19450 },
19451 },
19452 },
19453 {
19454 name: "UMOD",
19455 argLen: 2,
19456 asm: arm64.AUREM,
19457 reg: regInfo{
19458 inputs: []inputInfo{
19459 {0, 805044223},
19460 {1, 805044223},
19461 },
19462 outputs: []outputInfo{
19463 {0, 670826495},
19464 },
19465 },
19466 },
19467 {
19468 name: "MODW",
19469 argLen: 2,
19470 asm: arm64.AREMW,
19471 reg: regInfo{
19472 inputs: []inputInfo{
19473 {0, 805044223},
19474 {1, 805044223},
19475 },
19476 outputs: []outputInfo{
19477 {0, 670826495},
19478 },
19479 },
19480 },
19481 {
19482 name: "UMODW",
19483 argLen: 2,
19484 asm: arm64.AUREMW,
19485 reg: regInfo{
19486 inputs: []inputInfo{
19487 {0, 805044223},
19488 {1, 805044223},
19489 },
19490 outputs: []outputInfo{
19491 {0, 670826495},
19492 },
19493 },
19494 },
19495 {
19496 name: "FADDS",
19497 argLen: 2,
19498 commutative: true,
19499 asm: arm64.AFADDS,
19500 reg: regInfo{
19501 inputs: []inputInfo{
19502 {0, 9223372034707292160},
19503 {1, 9223372034707292160},
19504 },
19505 outputs: []outputInfo{
19506 {0, 9223372034707292160},
19507 },
19508 },
19509 },
19510 {
19511 name: "FADDD",
19512 argLen: 2,
19513 commutative: true,
19514 asm: arm64.AFADDD,
19515 reg: regInfo{
19516 inputs: []inputInfo{
19517 {0, 9223372034707292160},
19518 {1, 9223372034707292160},
19519 },
19520 outputs: []outputInfo{
19521 {0, 9223372034707292160},
19522 },
19523 },
19524 },
19525 {
19526 name: "FSUBS",
19527 argLen: 2,
19528 asm: arm64.AFSUBS,
19529 reg: regInfo{
19530 inputs: []inputInfo{
19531 {0, 9223372034707292160},
19532 {1, 9223372034707292160},
19533 },
19534 outputs: []outputInfo{
19535 {0, 9223372034707292160},
19536 },
19537 },
19538 },
19539 {
19540 name: "FSUBD",
19541 argLen: 2,
19542 asm: arm64.AFSUBD,
19543 reg: regInfo{
19544 inputs: []inputInfo{
19545 {0, 9223372034707292160},
19546 {1, 9223372034707292160},
19547 },
19548 outputs: []outputInfo{
19549 {0, 9223372034707292160},
19550 },
19551 },
19552 },
19553 {
19554 name: "FMULS",
19555 argLen: 2,
19556 commutative: true,
19557 asm: arm64.AFMULS,
19558 reg: regInfo{
19559 inputs: []inputInfo{
19560 {0, 9223372034707292160},
19561 {1, 9223372034707292160},
19562 },
19563 outputs: []outputInfo{
19564 {0, 9223372034707292160},
19565 },
19566 },
19567 },
19568 {
19569 name: "FMULD",
19570 argLen: 2,
19571 commutative: true,
19572 asm: arm64.AFMULD,
19573 reg: regInfo{
19574 inputs: []inputInfo{
19575 {0, 9223372034707292160},
19576 {1, 9223372034707292160},
19577 },
19578 outputs: []outputInfo{
19579 {0, 9223372034707292160},
19580 },
19581 },
19582 },
19583 {
19584 name: "FNMULS",
19585 argLen: 2,
19586 commutative: true,
19587 asm: arm64.AFNMULS,
19588 reg: regInfo{
19589 inputs: []inputInfo{
19590 {0, 9223372034707292160},
19591 {1, 9223372034707292160},
19592 },
19593 outputs: []outputInfo{
19594 {0, 9223372034707292160},
19595 },
19596 },
19597 },
19598 {
19599 name: "FNMULD",
19600 argLen: 2,
19601 commutative: true,
19602 asm: arm64.AFNMULD,
19603 reg: regInfo{
19604 inputs: []inputInfo{
19605 {0, 9223372034707292160},
19606 {1, 9223372034707292160},
19607 },
19608 outputs: []outputInfo{
19609 {0, 9223372034707292160},
19610 },
19611 },
19612 },
19613 {
19614 name: "FDIVS",
19615 argLen: 2,
19616 asm: arm64.AFDIVS,
19617 reg: regInfo{
19618 inputs: []inputInfo{
19619 {0, 9223372034707292160},
19620 {1, 9223372034707292160},
19621 },
19622 outputs: []outputInfo{
19623 {0, 9223372034707292160},
19624 },
19625 },
19626 },
19627 {
19628 name: "FDIVD",
19629 argLen: 2,
19630 asm: arm64.AFDIVD,
19631 reg: regInfo{
19632 inputs: []inputInfo{
19633 {0, 9223372034707292160},
19634 {1, 9223372034707292160},
19635 },
19636 outputs: []outputInfo{
19637 {0, 9223372034707292160},
19638 },
19639 },
19640 },
19641 {
19642 name: "AND",
19643 argLen: 2,
19644 commutative: true,
19645 asm: arm64.AAND,
19646 reg: regInfo{
19647 inputs: []inputInfo{
19648 {0, 805044223},
19649 {1, 805044223},
19650 },
19651 outputs: []outputInfo{
19652 {0, 670826495},
19653 },
19654 },
19655 },
19656 {
19657 name: "ANDconst",
19658 auxType: auxInt64,
19659 argLen: 1,
19660 asm: arm64.AAND,
19661 reg: regInfo{
19662 inputs: []inputInfo{
19663 {0, 805044223},
19664 },
19665 outputs: []outputInfo{
19666 {0, 670826495},
19667 },
19668 },
19669 },
19670 {
19671 name: "OR",
19672 argLen: 2,
19673 commutative: true,
19674 asm: arm64.AORR,
19675 reg: regInfo{
19676 inputs: []inputInfo{
19677 {0, 805044223},
19678 {1, 805044223},
19679 },
19680 outputs: []outputInfo{
19681 {0, 670826495},
19682 },
19683 },
19684 },
19685 {
19686 name: "ORconst",
19687 auxType: auxInt64,
19688 argLen: 1,
19689 asm: arm64.AORR,
19690 reg: regInfo{
19691 inputs: []inputInfo{
19692 {0, 805044223},
19693 },
19694 outputs: []outputInfo{
19695 {0, 670826495},
19696 },
19697 },
19698 },
19699 {
19700 name: "XOR",
19701 argLen: 2,
19702 commutative: true,
19703 asm: arm64.AEOR,
19704 reg: regInfo{
19705 inputs: []inputInfo{
19706 {0, 805044223},
19707 {1, 805044223},
19708 },
19709 outputs: []outputInfo{
19710 {0, 670826495},
19711 },
19712 },
19713 },
19714 {
19715 name: "XORconst",
19716 auxType: auxInt64,
19717 argLen: 1,
19718 asm: arm64.AEOR,
19719 reg: regInfo{
19720 inputs: []inputInfo{
19721 {0, 805044223},
19722 },
19723 outputs: []outputInfo{
19724 {0, 670826495},
19725 },
19726 },
19727 },
19728 {
19729 name: "BIC",
19730 argLen: 2,
19731 asm: arm64.ABIC,
19732 reg: regInfo{
19733 inputs: []inputInfo{
19734 {0, 805044223},
19735 {1, 805044223},
19736 },
19737 outputs: []outputInfo{
19738 {0, 670826495},
19739 },
19740 },
19741 },
19742 {
19743 name: "EON",
19744 argLen: 2,
19745 asm: arm64.AEON,
19746 reg: regInfo{
19747 inputs: []inputInfo{
19748 {0, 805044223},
19749 {1, 805044223},
19750 },
19751 outputs: []outputInfo{
19752 {0, 670826495},
19753 },
19754 },
19755 },
19756 {
19757 name: "ORN",
19758 argLen: 2,
19759 asm: arm64.AORN,
19760 reg: regInfo{
19761 inputs: []inputInfo{
19762 {0, 805044223},
19763 {1, 805044223},
19764 },
19765 outputs: []outputInfo{
19766 {0, 670826495},
19767 },
19768 },
19769 },
19770 {
19771 name: "MVN",
19772 argLen: 1,
19773 asm: arm64.AMVN,
19774 reg: regInfo{
19775 inputs: []inputInfo{
19776 {0, 805044223},
19777 },
19778 outputs: []outputInfo{
19779 {0, 670826495},
19780 },
19781 },
19782 },
19783 {
19784 name: "NEG",
19785 argLen: 1,
19786 asm: arm64.ANEG,
19787 reg: regInfo{
19788 inputs: []inputInfo{
19789 {0, 805044223},
19790 },
19791 outputs: []outputInfo{
19792 {0, 670826495},
19793 },
19794 },
19795 },
19796 {
19797 name: "NEGSflags",
19798 argLen: 1,
19799 asm: arm64.ANEGS,
19800 reg: regInfo{
19801 inputs: []inputInfo{
19802 {0, 805044223},
19803 },
19804 outputs: []outputInfo{
19805 {1, 0},
19806 {0, 670826495},
19807 },
19808 },
19809 },
19810 {
19811 name: "NGCzerocarry",
19812 argLen: 1,
19813 asm: arm64.ANGC,
19814 reg: regInfo{
19815 outputs: []outputInfo{
19816 {0, 670826495},
19817 },
19818 },
19819 },
19820 {
19821 name: "FABSD",
19822 argLen: 1,
19823 asm: arm64.AFABSD,
19824 reg: regInfo{
19825 inputs: []inputInfo{
19826 {0, 9223372034707292160},
19827 },
19828 outputs: []outputInfo{
19829 {0, 9223372034707292160},
19830 },
19831 },
19832 },
19833 {
19834 name: "FNEGS",
19835 argLen: 1,
19836 asm: arm64.AFNEGS,
19837 reg: regInfo{
19838 inputs: []inputInfo{
19839 {0, 9223372034707292160},
19840 },
19841 outputs: []outputInfo{
19842 {0, 9223372034707292160},
19843 },
19844 },
19845 },
19846 {
19847 name: "FNEGD",
19848 argLen: 1,
19849 asm: arm64.AFNEGD,
19850 reg: regInfo{
19851 inputs: []inputInfo{
19852 {0, 9223372034707292160},
19853 },
19854 outputs: []outputInfo{
19855 {0, 9223372034707292160},
19856 },
19857 },
19858 },
19859 {
19860 name: "FSQRTD",
19861 argLen: 1,
19862 asm: arm64.AFSQRTD,
19863 reg: regInfo{
19864 inputs: []inputInfo{
19865 {0, 9223372034707292160},
19866 },
19867 outputs: []outputInfo{
19868 {0, 9223372034707292160},
19869 },
19870 },
19871 },
19872 {
19873 name: "FSQRTS",
19874 argLen: 1,
19875 asm: arm64.AFSQRTS,
19876 reg: regInfo{
19877 inputs: []inputInfo{
19878 {0, 9223372034707292160},
19879 },
19880 outputs: []outputInfo{
19881 {0, 9223372034707292160},
19882 },
19883 },
19884 },
19885 {
19886 name: "FMIND",
19887 argLen: 2,
19888 asm: arm64.AFMIND,
19889 reg: regInfo{
19890 inputs: []inputInfo{
19891 {0, 9223372034707292160},
19892 {1, 9223372034707292160},
19893 },
19894 outputs: []outputInfo{
19895 {0, 9223372034707292160},
19896 },
19897 },
19898 },
19899 {
19900 name: "FMINS",
19901 argLen: 2,
19902 asm: arm64.AFMINS,
19903 reg: regInfo{
19904 inputs: []inputInfo{
19905 {0, 9223372034707292160},
19906 {1, 9223372034707292160},
19907 },
19908 outputs: []outputInfo{
19909 {0, 9223372034707292160},
19910 },
19911 },
19912 },
19913 {
19914 name: "FMAXD",
19915 argLen: 2,
19916 asm: arm64.AFMAXD,
19917 reg: regInfo{
19918 inputs: []inputInfo{
19919 {0, 9223372034707292160},
19920 {1, 9223372034707292160},
19921 },
19922 outputs: []outputInfo{
19923 {0, 9223372034707292160},
19924 },
19925 },
19926 },
19927 {
19928 name: "FMAXS",
19929 argLen: 2,
19930 asm: arm64.AFMAXS,
19931 reg: regInfo{
19932 inputs: []inputInfo{
19933 {0, 9223372034707292160},
19934 {1, 9223372034707292160},
19935 },
19936 outputs: []outputInfo{
19937 {0, 9223372034707292160},
19938 },
19939 },
19940 },
19941 {
19942 name: "REV",
19943 argLen: 1,
19944 asm: arm64.AREV,
19945 reg: regInfo{
19946 inputs: []inputInfo{
19947 {0, 805044223},
19948 },
19949 outputs: []outputInfo{
19950 {0, 670826495},
19951 },
19952 },
19953 },
19954 {
19955 name: "REVW",
19956 argLen: 1,
19957 asm: arm64.AREVW,
19958 reg: regInfo{
19959 inputs: []inputInfo{
19960 {0, 805044223},
19961 },
19962 outputs: []outputInfo{
19963 {0, 670826495},
19964 },
19965 },
19966 },
19967 {
19968 name: "REV16",
19969 argLen: 1,
19970 asm: arm64.AREV16,
19971 reg: regInfo{
19972 inputs: []inputInfo{
19973 {0, 805044223},
19974 },
19975 outputs: []outputInfo{
19976 {0, 670826495},
19977 },
19978 },
19979 },
19980 {
19981 name: "REV16W",
19982 argLen: 1,
19983 asm: arm64.AREV16W,
19984 reg: regInfo{
19985 inputs: []inputInfo{
19986 {0, 805044223},
19987 },
19988 outputs: []outputInfo{
19989 {0, 670826495},
19990 },
19991 },
19992 },
19993 {
19994 name: "RBIT",
19995 argLen: 1,
19996 asm: arm64.ARBIT,
19997 reg: regInfo{
19998 inputs: []inputInfo{
19999 {0, 805044223},
20000 },
20001 outputs: []outputInfo{
20002 {0, 670826495},
20003 },
20004 },
20005 },
20006 {
20007 name: "RBITW",
20008 argLen: 1,
20009 asm: arm64.ARBITW,
20010 reg: regInfo{
20011 inputs: []inputInfo{
20012 {0, 805044223},
20013 },
20014 outputs: []outputInfo{
20015 {0, 670826495},
20016 },
20017 },
20018 },
20019 {
20020 name: "CLZ",
20021 argLen: 1,
20022 asm: arm64.ACLZ,
20023 reg: regInfo{
20024 inputs: []inputInfo{
20025 {0, 805044223},
20026 },
20027 outputs: []outputInfo{
20028 {0, 670826495},
20029 },
20030 },
20031 },
20032 {
20033 name: "CLZW",
20034 argLen: 1,
20035 asm: arm64.ACLZW,
20036 reg: regInfo{
20037 inputs: []inputInfo{
20038 {0, 805044223},
20039 },
20040 outputs: []outputInfo{
20041 {0, 670826495},
20042 },
20043 },
20044 },
20045 {
20046 name: "VCNT",
20047 argLen: 1,
20048 asm: arm64.AVCNT,
20049 reg: regInfo{
20050 inputs: []inputInfo{
20051 {0, 9223372034707292160},
20052 },
20053 outputs: []outputInfo{
20054 {0, 9223372034707292160},
20055 },
20056 },
20057 },
20058 {
20059 name: "VUADDLV",
20060 argLen: 1,
20061 asm: arm64.AVUADDLV,
20062 reg: regInfo{
20063 inputs: []inputInfo{
20064 {0, 9223372034707292160},
20065 },
20066 outputs: []outputInfo{
20067 {0, 9223372034707292160},
20068 },
20069 },
20070 },
20071 {
20072 name: "LoweredRound32F",
20073 argLen: 1,
20074 resultInArg0: true,
20075 zeroWidth: true,
20076 reg: regInfo{
20077 inputs: []inputInfo{
20078 {0, 9223372034707292160},
20079 },
20080 outputs: []outputInfo{
20081 {0, 9223372034707292160},
20082 },
20083 },
20084 },
20085 {
20086 name: "LoweredRound64F",
20087 argLen: 1,
20088 resultInArg0: true,
20089 zeroWidth: true,
20090 reg: regInfo{
20091 inputs: []inputInfo{
20092 {0, 9223372034707292160},
20093 },
20094 outputs: []outputInfo{
20095 {0, 9223372034707292160},
20096 },
20097 },
20098 },
20099 {
20100 name: "FMADDS",
20101 argLen: 3,
20102 asm: arm64.AFMADDS,
20103 reg: regInfo{
20104 inputs: []inputInfo{
20105 {0, 9223372034707292160},
20106 {1, 9223372034707292160},
20107 {2, 9223372034707292160},
20108 },
20109 outputs: []outputInfo{
20110 {0, 9223372034707292160},
20111 },
20112 },
20113 },
20114 {
20115 name: "FMADDD",
20116 argLen: 3,
20117 asm: arm64.AFMADDD,
20118 reg: regInfo{
20119 inputs: []inputInfo{
20120 {0, 9223372034707292160},
20121 {1, 9223372034707292160},
20122 {2, 9223372034707292160},
20123 },
20124 outputs: []outputInfo{
20125 {0, 9223372034707292160},
20126 },
20127 },
20128 },
20129 {
20130 name: "FNMADDS",
20131 argLen: 3,
20132 asm: arm64.AFNMADDS,
20133 reg: regInfo{
20134 inputs: []inputInfo{
20135 {0, 9223372034707292160},
20136 {1, 9223372034707292160},
20137 {2, 9223372034707292160},
20138 },
20139 outputs: []outputInfo{
20140 {0, 9223372034707292160},
20141 },
20142 },
20143 },
20144 {
20145 name: "FNMADDD",
20146 argLen: 3,
20147 asm: arm64.AFNMADDD,
20148 reg: regInfo{
20149 inputs: []inputInfo{
20150 {0, 9223372034707292160},
20151 {1, 9223372034707292160},
20152 {2, 9223372034707292160},
20153 },
20154 outputs: []outputInfo{
20155 {0, 9223372034707292160},
20156 },
20157 },
20158 },
20159 {
20160 name: "FMSUBS",
20161 argLen: 3,
20162 asm: arm64.AFMSUBS,
20163 reg: regInfo{
20164 inputs: []inputInfo{
20165 {0, 9223372034707292160},
20166 {1, 9223372034707292160},
20167 {2, 9223372034707292160},
20168 },
20169 outputs: []outputInfo{
20170 {0, 9223372034707292160},
20171 },
20172 },
20173 },
20174 {
20175 name: "FMSUBD",
20176 argLen: 3,
20177 asm: arm64.AFMSUBD,
20178 reg: regInfo{
20179 inputs: []inputInfo{
20180 {0, 9223372034707292160},
20181 {1, 9223372034707292160},
20182 {2, 9223372034707292160},
20183 },
20184 outputs: []outputInfo{
20185 {0, 9223372034707292160},
20186 },
20187 },
20188 },
20189 {
20190 name: "FNMSUBS",
20191 argLen: 3,
20192 asm: arm64.AFNMSUBS,
20193 reg: regInfo{
20194 inputs: []inputInfo{
20195 {0, 9223372034707292160},
20196 {1, 9223372034707292160},
20197 {2, 9223372034707292160},
20198 },
20199 outputs: []outputInfo{
20200 {0, 9223372034707292160},
20201 },
20202 },
20203 },
20204 {
20205 name: "FNMSUBD",
20206 argLen: 3,
20207 asm: arm64.AFNMSUBD,
20208 reg: regInfo{
20209 inputs: []inputInfo{
20210 {0, 9223372034707292160},
20211 {1, 9223372034707292160},
20212 {2, 9223372034707292160},
20213 },
20214 outputs: []outputInfo{
20215 {0, 9223372034707292160},
20216 },
20217 },
20218 },
20219 {
20220 name: "MADD",
20221 argLen: 3,
20222 asm: arm64.AMADD,
20223 reg: regInfo{
20224 inputs: []inputInfo{
20225 {0, 805044223},
20226 {1, 805044223},
20227 {2, 805044223},
20228 },
20229 outputs: []outputInfo{
20230 {0, 670826495},
20231 },
20232 },
20233 },
20234 {
20235 name: "MADDW",
20236 argLen: 3,
20237 asm: arm64.AMADDW,
20238 reg: regInfo{
20239 inputs: []inputInfo{
20240 {0, 805044223},
20241 {1, 805044223},
20242 {2, 805044223},
20243 },
20244 outputs: []outputInfo{
20245 {0, 670826495},
20246 },
20247 },
20248 },
20249 {
20250 name: "MSUB",
20251 argLen: 3,
20252 asm: arm64.AMSUB,
20253 reg: regInfo{
20254 inputs: []inputInfo{
20255 {0, 805044223},
20256 {1, 805044223},
20257 {2, 805044223},
20258 },
20259 outputs: []outputInfo{
20260 {0, 670826495},
20261 },
20262 },
20263 },
20264 {
20265 name: "MSUBW",
20266 argLen: 3,
20267 asm: arm64.AMSUBW,
20268 reg: regInfo{
20269 inputs: []inputInfo{
20270 {0, 805044223},
20271 {1, 805044223},
20272 {2, 805044223},
20273 },
20274 outputs: []outputInfo{
20275 {0, 670826495},
20276 },
20277 },
20278 },
20279 {
20280 name: "SLL",
20281 argLen: 2,
20282 asm: arm64.ALSL,
20283 reg: regInfo{
20284 inputs: []inputInfo{
20285 {0, 805044223},
20286 {1, 805044223},
20287 },
20288 outputs: []outputInfo{
20289 {0, 670826495},
20290 },
20291 },
20292 },
20293 {
20294 name: "SLLconst",
20295 auxType: auxInt64,
20296 argLen: 1,
20297 asm: arm64.ALSL,
20298 reg: regInfo{
20299 inputs: []inputInfo{
20300 {0, 805044223},
20301 },
20302 outputs: []outputInfo{
20303 {0, 670826495},
20304 },
20305 },
20306 },
20307 {
20308 name: "SRL",
20309 argLen: 2,
20310 asm: arm64.ALSR,
20311 reg: regInfo{
20312 inputs: []inputInfo{
20313 {0, 805044223},
20314 {1, 805044223},
20315 },
20316 outputs: []outputInfo{
20317 {0, 670826495},
20318 },
20319 },
20320 },
20321 {
20322 name: "SRLconst",
20323 auxType: auxInt64,
20324 argLen: 1,
20325 asm: arm64.ALSR,
20326 reg: regInfo{
20327 inputs: []inputInfo{
20328 {0, 805044223},
20329 },
20330 outputs: []outputInfo{
20331 {0, 670826495},
20332 },
20333 },
20334 },
20335 {
20336 name: "SRA",
20337 argLen: 2,
20338 asm: arm64.AASR,
20339 reg: regInfo{
20340 inputs: []inputInfo{
20341 {0, 805044223},
20342 {1, 805044223},
20343 },
20344 outputs: []outputInfo{
20345 {0, 670826495},
20346 },
20347 },
20348 },
20349 {
20350 name: "SRAconst",
20351 auxType: auxInt64,
20352 argLen: 1,
20353 asm: arm64.AASR,
20354 reg: regInfo{
20355 inputs: []inputInfo{
20356 {0, 805044223},
20357 },
20358 outputs: []outputInfo{
20359 {0, 670826495},
20360 },
20361 },
20362 },
20363 {
20364 name: "ROR",
20365 argLen: 2,
20366 asm: arm64.AROR,
20367 reg: regInfo{
20368 inputs: []inputInfo{
20369 {0, 805044223},
20370 {1, 805044223},
20371 },
20372 outputs: []outputInfo{
20373 {0, 670826495},
20374 },
20375 },
20376 },
20377 {
20378 name: "RORW",
20379 argLen: 2,
20380 asm: arm64.ARORW,
20381 reg: regInfo{
20382 inputs: []inputInfo{
20383 {0, 805044223},
20384 {1, 805044223},
20385 },
20386 outputs: []outputInfo{
20387 {0, 670826495},
20388 },
20389 },
20390 },
20391 {
20392 name: "RORconst",
20393 auxType: auxInt64,
20394 argLen: 1,
20395 asm: arm64.AROR,
20396 reg: regInfo{
20397 inputs: []inputInfo{
20398 {0, 805044223},
20399 },
20400 outputs: []outputInfo{
20401 {0, 670826495},
20402 },
20403 },
20404 },
20405 {
20406 name: "RORWconst",
20407 auxType: auxInt64,
20408 argLen: 1,
20409 asm: arm64.ARORW,
20410 reg: regInfo{
20411 inputs: []inputInfo{
20412 {0, 805044223},
20413 },
20414 outputs: []outputInfo{
20415 {0, 670826495},
20416 },
20417 },
20418 },
20419 {
20420 name: "EXTRconst",
20421 auxType: auxInt64,
20422 argLen: 2,
20423 asm: arm64.AEXTR,
20424 reg: regInfo{
20425 inputs: []inputInfo{
20426 {0, 805044223},
20427 {1, 805044223},
20428 },
20429 outputs: []outputInfo{
20430 {0, 670826495},
20431 },
20432 },
20433 },
20434 {
20435 name: "EXTRWconst",
20436 auxType: auxInt64,
20437 argLen: 2,
20438 asm: arm64.AEXTRW,
20439 reg: regInfo{
20440 inputs: []inputInfo{
20441 {0, 805044223},
20442 {1, 805044223},
20443 },
20444 outputs: []outputInfo{
20445 {0, 670826495},
20446 },
20447 },
20448 },
20449 {
20450 name: "CMP",
20451 argLen: 2,
20452 asm: arm64.ACMP,
20453 reg: regInfo{
20454 inputs: []inputInfo{
20455 {0, 805044223},
20456 {1, 805044223},
20457 },
20458 },
20459 },
20460 {
20461 name: "CMPconst",
20462 auxType: auxInt64,
20463 argLen: 1,
20464 asm: arm64.ACMP,
20465 reg: regInfo{
20466 inputs: []inputInfo{
20467 {0, 805044223},
20468 },
20469 },
20470 },
20471 {
20472 name: "CMPW",
20473 argLen: 2,
20474 asm: arm64.ACMPW,
20475 reg: regInfo{
20476 inputs: []inputInfo{
20477 {0, 805044223},
20478 {1, 805044223},
20479 },
20480 },
20481 },
20482 {
20483 name: "CMPWconst",
20484 auxType: auxInt32,
20485 argLen: 1,
20486 asm: arm64.ACMPW,
20487 reg: regInfo{
20488 inputs: []inputInfo{
20489 {0, 805044223},
20490 },
20491 },
20492 },
20493 {
20494 name: "CMN",
20495 argLen: 2,
20496 commutative: true,
20497 asm: arm64.ACMN,
20498 reg: regInfo{
20499 inputs: []inputInfo{
20500 {0, 805044223},
20501 {1, 805044223},
20502 },
20503 },
20504 },
20505 {
20506 name: "CMNconst",
20507 auxType: auxInt64,
20508 argLen: 1,
20509 asm: arm64.ACMN,
20510 reg: regInfo{
20511 inputs: []inputInfo{
20512 {0, 805044223},
20513 },
20514 },
20515 },
20516 {
20517 name: "CMNW",
20518 argLen: 2,
20519 commutative: true,
20520 asm: arm64.ACMNW,
20521 reg: regInfo{
20522 inputs: []inputInfo{
20523 {0, 805044223},
20524 {1, 805044223},
20525 },
20526 },
20527 },
20528 {
20529 name: "CMNWconst",
20530 auxType: auxInt32,
20531 argLen: 1,
20532 asm: arm64.ACMNW,
20533 reg: regInfo{
20534 inputs: []inputInfo{
20535 {0, 805044223},
20536 },
20537 },
20538 },
20539 {
20540 name: "TST",
20541 argLen: 2,
20542 commutative: true,
20543 asm: arm64.ATST,
20544 reg: regInfo{
20545 inputs: []inputInfo{
20546 {0, 805044223},
20547 {1, 805044223},
20548 },
20549 },
20550 },
20551 {
20552 name: "TSTconst",
20553 auxType: auxInt64,
20554 argLen: 1,
20555 asm: arm64.ATST,
20556 reg: regInfo{
20557 inputs: []inputInfo{
20558 {0, 805044223},
20559 },
20560 },
20561 },
20562 {
20563 name: "TSTW",
20564 argLen: 2,
20565 commutative: true,
20566 asm: arm64.ATSTW,
20567 reg: regInfo{
20568 inputs: []inputInfo{
20569 {0, 805044223},
20570 {1, 805044223},
20571 },
20572 },
20573 },
20574 {
20575 name: "TSTWconst",
20576 auxType: auxInt32,
20577 argLen: 1,
20578 asm: arm64.ATSTW,
20579 reg: regInfo{
20580 inputs: []inputInfo{
20581 {0, 805044223},
20582 },
20583 },
20584 },
20585 {
20586 name: "FCMPS",
20587 argLen: 2,
20588 asm: arm64.AFCMPS,
20589 reg: regInfo{
20590 inputs: []inputInfo{
20591 {0, 9223372034707292160},
20592 {1, 9223372034707292160},
20593 },
20594 },
20595 },
20596 {
20597 name: "FCMPD",
20598 argLen: 2,
20599 asm: arm64.AFCMPD,
20600 reg: regInfo{
20601 inputs: []inputInfo{
20602 {0, 9223372034707292160},
20603 {1, 9223372034707292160},
20604 },
20605 },
20606 },
20607 {
20608 name: "FCMPS0",
20609 argLen: 1,
20610 asm: arm64.AFCMPS,
20611 reg: regInfo{
20612 inputs: []inputInfo{
20613 {0, 9223372034707292160},
20614 },
20615 },
20616 },
20617 {
20618 name: "FCMPD0",
20619 argLen: 1,
20620 asm: arm64.AFCMPD,
20621 reg: regInfo{
20622 inputs: []inputInfo{
20623 {0, 9223372034707292160},
20624 },
20625 },
20626 },
20627 {
20628 name: "MVNshiftLL",
20629 auxType: auxInt64,
20630 argLen: 1,
20631 asm: arm64.AMVN,
20632 reg: regInfo{
20633 inputs: []inputInfo{
20634 {0, 805044223},
20635 },
20636 outputs: []outputInfo{
20637 {0, 670826495},
20638 },
20639 },
20640 },
20641 {
20642 name: "MVNshiftRL",
20643 auxType: auxInt64,
20644 argLen: 1,
20645 asm: arm64.AMVN,
20646 reg: regInfo{
20647 inputs: []inputInfo{
20648 {0, 805044223},
20649 },
20650 outputs: []outputInfo{
20651 {0, 670826495},
20652 },
20653 },
20654 },
20655 {
20656 name: "MVNshiftRA",
20657 auxType: auxInt64,
20658 argLen: 1,
20659 asm: arm64.AMVN,
20660 reg: regInfo{
20661 inputs: []inputInfo{
20662 {0, 805044223},
20663 },
20664 outputs: []outputInfo{
20665 {0, 670826495},
20666 },
20667 },
20668 },
20669 {
20670 name: "MVNshiftRO",
20671 auxType: auxInt64,
20672 argLen: 1,
20673 asm: arm64.AMVN,
20674 reg: regInfo{
20675 inputs: []inputInfo{
20676 {0, 805044223},
20677 },
20678 outputs: []outputInfo{
20679 {0, 670826495},
20680 },
20681 },
20682 },
20683 {
20684 name: "NEGshiftLL",
20685 auxType: auxInt64,
20686 argLen: 1,
20687 asm: arm64.ANEG,
20688 reg: regInfo{
20689 inputs: []inputInfo{
20690 {0, 805044223},
20691 },
20692 outputs: []outputInfo{
20693 {0, 670826495},
20694 },
20695 },
20696 },
20697 {
20698 name: "NEGshiftRL",
20699 auxType: auxInt64,
20700 argLen: 1,
20701 asm: arm64.ANEG,
20702 reg: regInfo{
20703 inputs: []inputInfo{
20704 {0, 805044223},
20705 },
20706 outputs: []outputInfo{
20707 {0, 670826495},
20708 },
20709 },
20710 },
20711 {
20712 name: "NEGshiftRA",
20713 auxType: auxInt64,
20714 argLen: 1,
20715 asm: arm64.ANEG,
20716 reg: regInfo{
20717 inputs: []inputInfo{
20718 {0, 805044223},
20719 },
20720 outputs: []outputInfo{
20721 {0, 670826495},
20722 },
20723 },
20724 },
20725 {
20726 name: "ADDshiftLL",
20727 auxType: auxInt64,
20728 argLen: 2,
20729 asm: arm64.AADD,
20730 reg: regInfo{
20731 inputs: []inputInfo{
20732 {0, 805044223},
20733 {1, 805044223},
20734 },
20735 outputs: []outputInfo{
20736 {0, 670826495},
20737 },
20738 },
20739 },
20740 {
20741 name: "ADDshiftRL",
20742 auxType: auxInt64,
20743 argLen: 2,
20744 asm: arm64.AADD,
20745 reg: regInfo{
20746 inputs: []inputInfo{
20747 {0, 805044223},
20748 {1, 805044223},
20749 },
20750 outputs: []outputInfo{
20751 {0, 670826495},
20752 },
20753 },
20754 },
20755 {
20756 name: "ADDshiftRA",
20757 auxType: auxInt64,
20758 argLen: 2,
20759 asm: arm64.AADD,
20760 reg: regInfo{
20761 inputs: []inputInfo{
20762 {0, 805044223},
20763 {1, 805044223},
20764 },
20765 outputs: []outputInfo{
20766 {0, 670826495},
20767 },
20768 },
20769 },
20770 {
20771 name: "SUBshiftLL",
20772 auxType: auxInt64,
20773 argLen: 2,
20774 asm: arm64.ASUB,
20775 reg: regInfo{
20776 inputs: []inputInfo{
20777 {0, 805044223},
20778 {1, 805044223},
20779 },
20780 outputs: []outputInfo{
20781 {0, 670826495},
20782 },
20783 },
20784 },
20785 {
20786 name: "SUBshiftRL",
20787 auxType: auxInt64,
20788 argLen: 2,
20789 asm: arm64.ASUB,
20790 reg: regInfo{
20791 inputs: []inputInfo{
20792 {0, 805044223},
20793 {1, 805044223},
20794 },
20795 outputs: []outputInfo{
20796 {0, 670826495},
20797 },
20798 },
20799 },
20800 {
20801 name: "SUBshiftRA",
20802 auxType: auxInt64,
20803 argLen: 2,
20804 asm: arm64.ASUB,
20805 reg: regInfo{
20806 inputs: []inputInfo{
20807 {0, 805044223},
20808 {1, 805044223},
20809 },
20810 outputs: []outputInfo{
20811 {0, 670826495},
20812 },
20813 },
20814 },
20815 {
20816 name: "ANDshiftLL",
20817 auxType: auxInt64,
20818 argLen: 2,
20819 asm: arm64.AAND,
20820 reg: regInfo{
20821 inputs: []inputInfo{
20822 {0, 805044223},
20823 {1, 805044223},
20824 },
20825 outputs: []outputInfo{
20826 {0, 670826495},
20827 },
20828 },
20829 },
20830 {
20831 name: "ANDshiftRL",
20832 auxType: auxInt64,
20833 argLen: 2,
20834 asm: arm64.AAND,
20835 reg: regInfo{
20836 inputs: []inputInfo{
20837 {0, 805044223},
20838 {1, 805044223},
20839 },
20840 outputs: []outputInfo{
20841 {0, 670826495},
20842 },
20843 },
20844 },
20845 {
20846 name: "ANDshiftRA",
20847 auxType: auxInt64,
20848 argLen: 2,
20849 asm: arm64.AAND,
20850 reg: regInfo{
20851 inputs: []inputInfo{
20852 {0, 805044223},
20853 {1, 805044223},
20854 },
20855 outputs: []outputInfo{
20856 {0, 670826495},
20857 },
20858 },
20859 },
20860 {
20861 name: "ANDshiftRO",
20862 auxType: auxInt64,
20863 argLen: 2,
20864 asm: arm64.AAND,
20865 reg: regInfo{
20866 inputs: []inputInfo{
20867 {0, 805044223},
20868 {1, 805044223},
20869 },
20870 outputs: []outputInfo{
20871 {0, 670826495},
20872 },
20873 },
20874 },
20875 {
20876 name: "ORshiftLL",
20877 auxType: auxInt64,
20878 argLen: 2,
20879 asm: arm64.AORR,
20880 reg: regInfo{
20881 inputs: []inputInfo{
20882 {0, 805044223},
20883 {1, 805044223},
20884 },
20885 outputs: []outputInfo{
20886 {0, 670826495},
20887 },
20888 },
20889 },
20890 {
20891 name: "ORshiftRL",
20892 auxType: auxInt64,
20893 argLen: 2,
20894 asm: arm64.AORR,
20895 reg: regInfo{
20896 inputs: []inputInfo{
20897 {0, 805044223},
20898 {1, 805044223},
20899 },
20900 outputs: []outputInfo{
20901 {0, 670826495},
20902 },
20903 },
20904 },
20905 {
20906 name: "ORshiftRA",
20907 auxType: auxInt64,
20908 argLen: 2,
20909 asm: arm64.AORR,
20910 reg: regInfo{
20911 inputs: []inputInfo{
20912 {0, 805044223},
20913 {1, 805044223},
20914 },
20915 outputs: []outputInfo{
20916 {0, 670826495},
20917 },
20918 },
20919 },
20920 {
20921 name: "ORshiftRO",
20922 auxType: auxInt64,
20923 argLen: 2,
20924 asm: arm64.AORR,
20925 reg: regInfo{
20926 inputs: []inputInfo{
20927 {0, 805044223},
20928 {1, 805044223},
20929 },
20930 outputs: []outputInfo{
20931 {0, 670826495},
20932 },
20933 },
20934 },
20935 {
20936 name: "XORshiftLL",
20937 auxType: auxInt64,
20938 argLen: 2,
20939 asm: arm64.AEOR,
20940 reg: regInfo{
20941 inputs: []inputInfo{
20942 {0, 805044223},
20943 {1, 805044223},
20944 },
20945 outputs: []outputInfo{
20946 {0, 670826495},
20947 },
20948 },
20949 },
20950 {
20951 name: "XORshiftRL",
20952 auxType: auxInt64,
20953 argLen: 2,
20954 asm: arm64.AEOR,
20955 reg: regInfo{
20956 inputs: []inputInfo{
20957 {0, 805044223},
20958 {1, 805044223},
20959 },
20960 outputs: []outputInfo{
20961 {0, 670826495},
20962 },
20963 },
20964 },
20965 {
20966 name: "XORshiftRA",
20967 auxType: auxInt64,
20968 argLen: 2,
20969 asm: arm64.AEOR,
20970 reg: regInfo{
20971 inputs: []inputInfo{
20972 {0, 805044223},
20973 {1, 805044223},
20974 },
20975 outputs: []outputInfo{
20976 {0, 670826495},
20977 },
20978 },
20979 },
20980 {
20981 name: "XORshiftRO",
20982 auxType: auxInt64,
20983 argLen: 2,
20984 asm: arm64.AEOR,
20985 reg: regInfo{
20986 inputs: []inputInfo{
20987 {0, 805044223},
20988 {1, 805044223},
20989 },
20990 outputs: []outputInfo{
20991 {0, 670826495},
20992 },
20993 },
20994 },
20995 {
20996 name: "BICshiftLL",
20997 auxType: auxInt64,
20998 argLen: 2,
20999 asm: arm64.ABIC,
21000 reg: regInfo{
21001 inputs: []inputInfo{
21002 {0, 805044223},
21003 {1, 805044223},
21004 },
21005 outputs: []outputInfo{
21006 {0, 670826495},
21007 },
21008 },
21009 },
21010 {
21011 name: "BICshiftRL",
21012 auxType: auxInt64,
21013 argLen: 2,
21014 asm: arm64.ABIC,
21015 reg: regInfo{
21016 inputs: []inputInfo{
21017 {0, 805044223},
21018 {1, 805044223},
21019 },
21020 outputs: []outputInfo{
21021 {0, 670826495},
21022 },
21023 },
21024 },
21025 {
21026 name: "BICshiftRA",
21027 auxType: auxInt64,
21028 argLen: 2,
21029 asm: arm64.ABIC,
21030 reg: regInfo{
21031 inputs: []inputInfo{
21032 {0, 805044223},
21033 {1, 805044223},
21034 },
21035 outputs: []outputInfo{
21036 {0, 670826495},
21037 },
21038 },
21039 },
21040 {
21041 name: "BICshiftRO",
21042 auxType: auxInt64,
21043 argLen: 2,
21044 asm: arm64.ABIC,
21045 reg: regInfo{
21046 inputs: []inputInfo{
21047 {0, 805044223},
21048 {1, 805044223},
21049 },
21050 outputs: []outputInfo{
21051 {0, 670826495},
21052 },
21053 },
21054 },
21055 {
21056 name: "EONshiftLL",
21057 auxType: auxInt64,
21058 argLen: 2,
21059 asm: arm64.AEON,
21060 reg: regInfo{
21061 inputs: []inputInfo{
21062 {0, 805044223},
21063 {1, 805044223},
21064 },
21065 outputs: []outputInfo{
21066 {0, 670826495},
21067 },
21068 },
21069 },
21070 {
21071 name: "EONshiftRL",
21072 auxType: auxInt64,
21073 argLen: 2,
21074 asm: arm64.AEON,
21075 reg: regInfo{
21076 inputs: []inputInfo{
21077 {0, 805044223},
21078 {1, 805044223},
21079 },
21080 outputs: []outputInfo{
21081 {0, 670826495},
21082 },
21083 },
21084 },
21085 {
21086 name: "EONshiftRA",
21087 auxType: auxInt64,
21088 argLen: 2,
21089 asm: arm64.AEON,
21090 reg: regInfo{
21091 inputs: []inputInfo{
21092 {0, 805044223},
21093 {1, 805044223},
21094 },
21095 outputs: []outputInfo{
21096 {0, 670826495},
21097 },
21098 },
21099 },
21100 {
21101 name: "EONshiftRO",
21102 auxType: auxInt64,
21103 argLen: 2,
21104 asm: arm64.AEON,
21105 reg: regInfo{
21106 inputs: []inputInfo{
21107 {0, 805044223},
21108 {1, 805044223},
21109 },
21110 outputs: []outputInfo{
21111 {0, 670826495},
21112 },
21113 },
21114 },
21115 {
21116 name: "ORNshiftLL",
21117 auxType: auxInt64,
21118 argLen: 2,
21119 asm: arm64.AORN,
21120 reg: regInfo{
21121 inputs: []inputInfo{
21122 {0, 805044223},
21123 {1, 805044223},
21124 },
21125 outputs: []outputInfo{
21126 {0, 670826495},
21127 },
21128 },
21129 },
21130 {
21131 name: "ORNshiftRL",
21132 auxType: auxInt64,
21133 argLen: 2,
21134 asm: arm64.AORN,
21135 reg: regInfo{
21136 inputs: []inputInfo{
21137 {0, 805044223},
21138 {1, 805044223},
21139 },
21140 outputs: []outputInfo{
21141 {0, 670826495},
21142 },
21143 },
21144 },
21145 {
21146 name: "ORNshiftRA",
21147 auxType: auxInt64,
21148 argLen: 2,
21149 asm: arm64.AORN,
21150 reg: regInfo{
21151 inputs: []inputInfo{
21152 {0, 805044223},
21153 {1, 805044223},
21154 },
21155 outputs: []outputInfo{
21156 {0, 670826495},
21157 },
21158 },
21159 },
21160 {
21161 name: "ORNshiftRO",
21162 auxType: auxInt64,
21163 argLen: 2,
21164 asm: arm64.AORN,
21165 reg: regInfo{
21166 inputs: []inputInfo{
21167 {0, 805044223},
21168 {1, 805044223},
21169 },
21170 outputs: []outputInfo{
21171 {0, 670826495},
21172 },
21173 },
21174 },
21175 {
21176 name: "CMPshiftLL",
21177 auxType: auxInt64,
21178 argLen: 2,
21179 asm: arm64.ACMP,
21180 reg: regInfo{
21181 inputs: []inputInfo{
21182 {0, 805044223},
21183 {1, 805044223},
21184 },
21185 },
21186 },
21187 {
21188 name: "CMPshiftRL",
21189 auxType: auxInt64,
21190 argLen: 2,
21191 asm: arm64.ACMP,
21192 reg: regInfo{
21193 inputs: []inputInfo{
21194 {0, 805044223},
21195 {1, 805044223},
21196 },
21197 },
21198 },
21199 {
21200 name: "CMPshiftRA",
21201 auxType: auxInt64,
21202 argLen: 2,
21203 asm: arm64.ACMP,
21204 reg: regInfo{
21205 inputs: []inputInfo{
21206 {0, 805044223},
21207 {1, 805044223},
21208 },
21209 },
21210 },
21211 {
21212 name: "CMNshiftLL",
21213 auxType: auxInt64,
21214 argLen: 2,
21215 asm: arm64.ACMN,
21216 reg: regInfo{
21217 inputs: []inputInfo{
21218 {0, 805044223},
21219 {1, 805044223},
21220 },
21221 },
21222 },
21223 {
21224 name: "CMNshiftRL",
21225 auxType: auxInt64,
21226 argLen: 2,
21227 asm: arm64.ACMN,
21228 reg: regInfo{
21229 inputs: []inputInfo{
21230 {0, 805044223},
21231 {1, 805044223},
21232 },
21233 },
21234 },
21235 {
21236 name: "CMNshiftRA",
21237 auxType: auxInt64,
21238 argLen: 2,
21239 asm: arm64.ACMN,
21240 reg: regInfo{
21241 inputs: []inputInfo{
21242 {0, 805044223},
21243 {1, 805044223},
21244 },
21245 },
21246 },
21247 {
21248 name: "TSTshiftLL",
21249 auxType: auxInt64,
21250 argLen: 2,
21251 asm: arm64.ATST,
21252 reg: regInfo{
21253 inputs: []inputInfo{
21254 {0, 805044223},
21255 {1, 805044223},
21256 },
21257 },
21258 },
21259 {
21260 name: "TSTshiftRL",
21261 auxType: auxInt64,
21262 argLen: 2,
21263 asm: arm64.ATST,
21264 reg: regInfo{
21265 inputs: []inputInfo{
21266 {0, 805044223},
21267 {1, 805044223},
21268 },
21269 },
21270 },
21271 {
21272 name: "TSTshiftRA",
21273 auxType: auxInt64,
21274 argLen: 2,
21275 asm: arm64.ATST,
21276 reg: regInfo{
21277 inputs: []inputInfo{
21278 {0, 805044223},
21279 {1, 805044223},
21280 },
21281 },
21282 },
21283 {
21284 name: "TSTshiftRO",
21285 auxType: auxInt64,
21286 argLen: 2,
21287 asm: arm64.ATST,
21288 reg: regInfo{
21289 inputs: []inputInfo{
21290 {0, 805044223},
21291 {1, 805044223},
21292 },
21293 },
21294 },
21295 {
21296 name: "BFI",
21297 auxType: auxARM64BitField,
21298 argLen: 2,
21299 resultInArg0: true,
21300 asm: arm64.ABFI,
21301 reg: regInfo{
21302 inputs: []inputInfo{
21303 {0, 670826495},
21304 {1, 670826495},
21305 },
21306 outputs: []outputInfo{
21307 {0, 670826495},
21308 },
21309 },
21310 },
21311 {
21312 name: "BFXIL",
21313 auxType: auxARM64BitField,
21314 argLen: 2,
21315 resultInArg0: true,
21316 asm: arm64.ABFXIL,
21317 reg: regInfo{
21318 inputs: []inputInfo{
21319 {0, 670826495},
21320 {1, 670826495},
21321 },
21322 outputs: []outputInfo{
21323 {0, 670826495},
21324 },
21325 },
21326 },
21327 {
21328 name: "SBFIZ",
21329 auxType: auxARM64BitField,
21330 argLen: 1,
21331 asm: arm64.ASBFIZ,
21332 reg: regInfo{
21333 inputs: []inputInfo{
21334 {0, 805044223},
21335 },
21336 outputs: []outputInfo{
21337 {0, 670826495},
21338 },
21339 },
21340 },
21341 {
21342 name: "SBFX",
21343 auxType: auxARM64BitField,
21344 argLen: 1,
21345 asm: arm64.ASBFX,
21346 reg: regInfo{
21347 inputs: []inputInfo{
21348 {0, 805044223},
21349 },
21350 outputs: []outputInfo{
21351 {0, 670826495},
21352 },
21353 },
21354 },
21355 {
21356 name: "UBFIZ",
21357 auxType: auxARM64BitField,
21358 argLen: 1,
21359 asm: arm64.AUBFIZ,
21360 reg: regInfo{
21361 inputs: []inputInfo{
21362 {0, 805044223},
21363 },
21364 outputs: []outputInfo{
21365 {0, 670826495},
21366 },
21367 },
21368 },
21369 {
21370 name: "UBFX",
21371 auxType: auxARM64BitField,
21372 argLen: 1,
21373 asm: arm64.AUBFX,
21374 reg: regInfo{
21375 inputs: []inputInfo{
21376 {0, 805044223},
21377 },
21378 outputs: []outputInfo{
21379 {0, 670826495},
21380 },
21381 },
21382 },
21383 {
21384 name: "MOVDconst",
21385 auxType: auxInt64,
21386 argLen: 0,
21387 rematerializeable: true,
21388 asm: arm64.AMOVD,
21389 reg: regInfo{
21390 outputs: []outputInfo{
21391 {0, 670826495},
21392 },
21393 },
21394 },
21395 {
21396 name: "FMOVSconst",
21397 auxType: auxFloat64,
21398 argLen: 0,
21399 rematerializeable: true,
21400 asm: arm64.AFMOVS,
21401 reg: regInfo{
21402 outputs: []outputInfo{
21403 {0, 9223372034707292160},
21404 },
21405 },
21406 },
21407 {
21408 name: "FMOVDconst",
21409 auxType: auxFloat64,
21410 argLen: 0,
21411 rematerializeable: true,
21412 asm: arm64.AFMOVD,
21413 reg: regInfo{
21414 outputs: []outputInfo{
21415 {0, 9223372034707292160},
21416 },
21417 },
21418 },
21419 {
21420 name: "MOVDaddr",
21421 auxType: auxSymOff,
21422 argLen: 1,
21423 rematerializeable: true,
21424 symEffect: SymAddr,
21425 asm: arm64.AMOVD,
21426 reg: regInfo{
21427 inputs: []inputInfo{
21428 {0, 9223372037928517632},
21429 },
21430 outputs: []outputInfo{
21431 {0, 670826495},
21432 },
21433 },
21434 },
21435 {
21436 name: "MOVBload",
21437 auxType: auxSymOff,
21438 argLen: 2,
21439 faultOnNilArg0: true,
21440 symEffect: SymRead,
21441 asm: arm64.AMOVB,
21442 reg: regInfo{
21443 inputs: []inputInfo{
21444 {0, 9223372038733561855},
21445 },
21446 outputs: []outputInfo{
21447 {0, 670826495},
21448 },
21449 },
21450 },
21451 {
21452 name: "MOVBUload",
21453 auxType: auxSymOff,
21454 argLen: 2,
21455 faultOnNilArg0: true,
21456 symEffect: SymRead,
21457 asm: arm64.AMOVBU,
21458 reg: regInfo{
21459 inputs: []inputInfo{
21460 {0, 9223372038733561855},
21461 },
21462 outputs: []outputInfo{
21463 {0, 670826495},
21464 },
21465 },
21466 },
21467 {
21468 name: "MOVHload",
21469 auxType: auxSymOff,
21470 argLen: 2,
21471 faultOnNilArg0: true,
21472 symEffect: SymRead,
21473 asm: arm64.AMOVH,
21474 reg: regInfo{
21475 inputs: []inputInfo{
21476 {0, 9223372038733561855},
21477 },
21478 outputs: []outputInfo{
21479 {0, 670826495},
21480 },
21481 },
21482 },
21483 {
21484 name: "MOVHUload",
21485 auxType: auxSymOff,
21486 argLen: 2,
21487 faultOnNilArg0: true,
21488 symEffect: SymRead,
21489 asm: arm64.AMOVHU,
21490 reg: regInfo{
21491 inputs: []inputInfo{
21492 {0, 9223372038733561855},
21493 },
21494 outputs: []outputInfo{
21495 {0, 670826495},
21496 },
21497 },
21498 },
21499 {
21500 name: "MOVWload",
21501 auxType: auxSymOff,
21502 argLen: 2,
21503 faultOnNilArg0: true,
21504 symEffect: SymRead,
21505 asm: arm64.AMOVW,
21506 reg: regInfo{
21507 inputs: []inputInfo{
21508 {0, 9223372038733561855},
21509 },
21510 outputs: []outputInfo{
21511 {0, 670826495},
21512 },
21513 },
21514 },
21515 {
21516 name: "MOVWUload",
21517 auxType: auxSymOff,
21518 argLen: 2,
21519 faultOnNilArg0: true,
21520 symEffect: SymRead,
21521 asm: arm64.AMOVWU,
21522 reg: regInfo{
21523 inputs: []inputInfo{
21524 {0, 9223372038733561855},
21525 },
21526 outputs: []outputInfo{
21527 {0, 670826495},
21528 },
21529 },
21530 },
21531 {
21532 name: "MOVDload",
21533 auxType: auxSymOff,
21534 argLen: 2,
21535 faultOnNilArg0: true,
21536 symEffect: SymRead,
21537 asm: arm64.AMOVD,
21538 reg: regInfo{
21539 inputs: []inputInfo{
21540 {0, 9223372038733561855},
21541 },
21542 outputs: []outputInfo{
21543 {0, 670826495},
21544 },
21545 },
21546 },
21547 {
21548 name: "LDP",
21549 auxType: auxSymOff,
21550 argLen: 2,
21551 faultOnNilArg0: true,
21552 symEffect: SymRead,
21553 asm: arm64.ALDP,
21554 reg: regInfo{
21555 inputs: []inputInfo{
21556 {0, 9223372038733561855},
21557 },
21558 outputs: []outputInfo{
21559 {0, 805044223},
21560 {1, 805044223},
21561 },
21562 },
21563 },
21564 {
21565 name: "FMOVSload",
21566 auxType: auxSymOff,
21567 argLen: 2,
21568 faultOnNilArg0: true,
21569 symEffect: SymRead,
21570 asm: arm64.AFMOVS,
21571 reg: regInfo{
21572 inputs: []inputInfo{
21573 {0, 9223372038733561855},
21574 },
21575 outputs: []outputInfo{
21576 {0, 9223372034707292160},
21577 },
21578 },
21579 },
21580 {
21581 name: "FMOVDload",
21582 auxType: auxSymOff,
21583 argLen: 2,
21584 faultOnNilArg0: true,
21585 symEffect: SymRead,
21586 asm: arm64.AFMOVD,
21587 reg: regInfo{
21588 inputs: []inputInfo{
21589 {0, 9223372038733561855},
21590 },
21591 outputs: []outputInfo{
21592 {0, 9223372034707292160},
21593 },
21594 },
21595 },
21596 {
21597 name: "MOVDloadidx",
21598 argLen: 3,
21599 asm: arm64.AMOVD,
21600 reg: regInfo{
21601 inputs: []inputInfo{
21602 {1, 805044223},
21603 {0, 9223372038733561855},
21604 },
21605 outputs: []outputInfo{
21606 {0, 670826495},
21607 },
21608 },
21609 },
21610 {
21611 name: "MOVWloadidx",
21612 argLen: 3,
21613 asm: arm64.AMOVW,
21614 reg: regInfo{
21615 inputs: []inputInfo{
21616 {1, 805044223},
21617 {0, 9223372038733561855},
21618 },
21619 outputs: []outputInfo{
21620 {0, 670826495},
21621 },
21622 },
21623 },
21624 {
21625 name: "MOVWUloadidx",
21626 argLen: 3,
21627 asm: arm64.AMOVWU,
21628 reg: regInfo{
21629 inputs: []inputInfo{
21630 {1, 805044223},
21631 {0, 9223372038733561855},
21632 },
21633 outputs: []outputInfo{
21634 {0, 670826495},
21635 },
21636 },
21637 },
21638 {
21639 name: "MOVHloadidx",
21640 argLen: 3,
21641 asm: arm64.AMOVH,
21642 reg: regInfo{
21643 inputs: []inputInfo{
21644 {1, 805044223},
21645 {0, 9223372038733561855},
21646 },
21647 outputs: []outputInfo{
21648 {0, 670826495},
21649 },
21650 },
21651 },
21652 {
21653 name: "MOVHUloadidx",
21654 argLen: 3,
21655 asm: arm64.AMOVHU,
21656 reg: regInfo{
21657 inputs: []inputInfo{
21658 {1, 805044223},
21659 {0, 9223372038733561855},
21660 },
21661 outputs: []outputInfo{
21662 {0, 670826495},
21663 },
21664 },
21665 },
21666 {
21667 name: "MOVBloadidx",
21668 argLen: 3,
21669 asm: arm64.AMOVB,
21670 reg: regInfo{
21671 inputs: []inputInfo{
21672 {1, 805044223},
21673 {0, 9223372038733561855},
21674 },
21675 outputs: []outputInfo{
21676 {0, 670826495},
21677 },
21678 },
21679 },
21680 {
21681 name: "MOVBUloadidx",
21682 argLen: 3,
21683 asm: arm64.AMOVBU,
21684 reg: regInfo{
21685 inputs: []inputInfo{
21686 {1, 805044223},
21687 {0, 9223372038733561855},
21688 },
21689 outputs: []outputInfo{
21690 {0, 670826495},
21691 },
21692 },
21693 },
21694 {
21695 name: "FMOVSloadidx",
21696 argLen: 3,
21697 asm: arm64.AFMOVS,
21698 reg: regInfo{
21699 inputs: []inputInfo{
21700 {1, 805044223},
21701 {0, 9223372038733561855},
21702 },
21703 outputs: []outputInfo{
21704 {0, 9223372034707292160},
21705 },
21706 },
21707 },
21708 {
21709 name: "FMOVDloadidx",
21710 argLen: 3,
21711 asm: arm64.AFMOVD,
21712 reg: regInfo{
21713 inputs: []inputInfo{
21714 {1, 805044223},
21715 {0, 9223372038733561855},
21716 },
21717 outputs: []outputInfo{
21718 {0, 9223372034707292160},
21719 },
21720 },
21721 },
21722 {
21723 name: "MOVHloadidx2",
21724 argLen: 3,
21725 asm: arm64.AMOVH,
21726 reg: regInfo{
21727 inputs: []inputInfo{
21728 {1, 805044223},
21729 {0, 9223372038733561855},
21730 },
21731 outputs: []outputInfo{
21732 {0, 670826495},
21733 },
21734 },
21735 },
21736 {
21737 name: "MOVHUloadidx2",
21738 argLen: 3,
21739 asm: arm64.AMOVHU,
21740 reg: regInfo{
21741 inputs: []inputInfo{
21742 {1, 805044223},
21743 {0, 9223372038733561855},
21744 },
21745 outputs: []outputInfo{
21746 {0, 670826495},
21747 },
21748 },
21749 },
21750 {
21751 name: "MOVWloadidx4",
21752 argLen: 3,
21753 asm: arm64.AMOVW,
21754 reg: regInfo{
21755 inputs: []inputInfo{
21756 {1, 805044223},
21757 {0, 9223372038733561855},
21758 },
21759 outputs: []outputInfo{
21760 {0, 670826495},
21761 },
21762 },
21763 },
21764 {
21765 name: "MOVWUloadidx4",
21766 argLen: 3,
21767 asm: arm64.AMOVWU,
21768 reg: regInfo{
21769 inputs: []inputInfo{
21770 {1, 805044223},
21771 {0, 9223372038733561855},
21772 },
21773 outputs: []outputInfo{
21774 {0, 670826495},
21775 },
21776 },
21777 },
21778 {
21779 name: "MOVDloadidx8",
21780 argLen: 3,
21781 asm: arm64.AMOVD,
21782 reg: regInfo{
21783 inputs: []inputInfo{
21784 {1, 805044223},
21785 {0, 9223372038733561855},
21786 },
21787 outputs: []outputInfo{
21788 {0, 670826495},
21789 },
21790 },
21791 },
21792 {
21793 name: "FMOVSloadidx4",
21794 argLen: 3,
21795 asm: arm64.AFMOVS,
21796 reg: regInfo{
21797 inputs: []inputInfo{
21798 {1, 805044223},
21799 {0, 9223372038733561855},
21800 },
21801 outputs: []outputInfo{
21802 {0, 9223372034707292160},
21803 },
21804 },
21805 },
21806 {
21807 name: "FMOVDloadidx8",
21808 argLen: 3,
21809 asm: arm64.AFMOVD,
21810 reg: regInfo{
21811 inputs: []inputInfo{
21812 {1, 805044223},
21813 {0, 9223372038733561855},
21814 },
21815 outputs: []outputInfo{
21816 {0, 9223372034707292160},
21817 },
21818 },
21819 },
21820 {
21821 name: "MOVBstore",
21822 auxType: auxSymOff,
21823 argLen: 3,
21824 faultOnNilArg0: true,
21825 symEffect: SymWrite,
21826 asm: arm64.AMOVB,
21827 reg: regInfo{
21828 inputs: []inputInfo{
21829 {1, 805044223},
21830 {0, 9223372038733561855},
21831 },
21832 },
21833 },
21834 {
21835 name: "MOVHstore",
21836 auxType: auxSymOff,
21837 argLen: 3,
21838 faultOnNilArg0: true,
21839 symEffect: SymWrite,
21840 asm: arm64.AMOVH,
21841 reg: regInfo{
21842 inputs: []inputInfo{
21843 {1, 805044223},
21844 {0, 9223372038733561855},
21845 },
21846 },
21847 },
21848 {
21849 name: "MOVWstore",
21850 auxType: auxSymOff,
21851 argLen: 3,
21852 faultOnNilArg0: true,
21853 symEffect: SymWrite,
21854 asm: arm64.AMOVW,
21855 reg: regInfo{
21856 inputs: []inputInfo{
21857 {1, 805044223},
21858 {0, 9223372038733561855},
21859 },
21860 },
21861 },
21862 {
21863 name: "MOVDstore",
21864 auxType: auxSymOff,
21865 argLen: 3,
21866 faultOnNilArg0: true,
21867 symEffect: SymWrite,
21868 asm: arm64.AMOVD,
21869 reg: regInfo{
21870 inputs: []inputInfo{
21871 {1, 805044223},
21872 {0, 9223372038733561855},
21873 },
21874 },
21875 },
21876 {
21877 name: "STP",
21878 auxType: auxSymOff,
21879 argLen: 4,
21880 faultOnNilArg0: true,
21881 symEffect: SymWrite,
21882 asm: arm64.ASTP,
21883 reg: regInfo{
21884 inputs: []inputInfo{
21885 {1, 805044223},
21886 {2, 805044223},
21887 {0, 9223372038733561855},
21888 },
21889 },
21890 },
21891 {
21892 name: "FMOVSstore",
21893 auxType: auxSymOff,
21894 argLen: 3,
21895 faultOnNilArg0: true,
21896 symEffect: SymWrite,
21897 asm: arm64.AFMOVS,
21898 reg: regInfo{
21899 inputs: []inputInfo{
21900 {0, 9223372038733561855},
21901 {1, 9223372034707292160},
21902 },
21903 },
21904 },
21905 {
21906 name: "FMOVDstore",
21907 auxType: auxSymOff,
21908 argLen: 3,
21909 faultOnNilArg0: true,
21910 symEffect: SymWrite,
21911 asm: arm64.AFMOVD,
21912 reg: regInfo{
21913 inputs: []inputInfo{
21914 {0, 9223372038733561855},
21915 {1, 9223372034707292160},
21916 },
21917 },
21918 },
21919 {
21920 name: "MOVBstoreidx",
21921 argLen: 4,
21922 asm: arm64.AMOVB,
21923 reg: regInfo{
21924 inputs: []inputInfo{
21925 {1, 805044223},
21926 {2, 805044223},
21927 {0, 9223372038733561855},
21928 },
21929 },
21930 },
21931 {
21932 name: "MOVHstoreidx",
21933 argLen: 4,
21934 asm: arm64.AMOVH,
21935 reg: regInfo{
21936 inputs: []inputInfo{
21937 {1, 805044223},
21938 {2, 805044223},
21939 {0, 9223372038733561855},
21940 },
21941 },
21942 },
21943 {
21944 name: "MOVWstoreidx",
21945 argLen: 4,
21946 asm: arm64.AMOVW,
21947 reg: regInfo{
21948 inputs: []inputInfo{
21949 {1, 805044223},
21950 {2, 805044223},
21951 {0, 9223372038733561855},
21952 },
21953 },
21954 },
21955 {
21956 name: "MOVDstoreidx",
21957 argLen: 4,
21958 asm: arm64.AMOVD,
21959 reg: regInfo{
21960 inputs: []inputInfo{
21961 {1, 805044223},
21962 {2, 805044223},
21963 {0, 9223372038733561855},
21964 },
21965 },
21966 },
21967 {
21968 name: "FMOVSstoreidx",
21969 argLen: 4,
21970 asm: arm64.AFMOVS,
21971 reg: regInfo{
21972 inputs: []inputInfo{
21973 {1, 805044223},
21974 {0, 9223372038733561855},
21975 {2, 9223372034707292160},
21976 },
21977 },
21978 },
21979 {
21980 name: "FMOVDstoreidx",
21981 argLen: 4,
21982 asm: arm64.AFMOVD,
21983 reg: regInfo{
21984 inputs: []inputInfo{
21985 {1, 805044223},
21986 {0, 9223372038733561855},
21987 {2, 9223372034707292160},
21988 },
21989 },
21990 },
21991 {
21992 name: "MOVHstoreidx2",
21993 argLen: 4,
21994 asm: arm64.AMOVH,
21995 reg: regInfo{
21996 inputs: []inputInfo{
21997 {1, 805044223},
21998 {2, 805044223},
21999 {0, 9223372038733561855},
22000 },
22001 },
22002 },
22003 {
22004 name: "MOVWstoreidx4",
22005 argLen: 4,
22006 asm: arm64.AMOVW,
22007 reg: regInfo{
22008 inputs: []inputInfo{
22009 {1, 805044223},
22010 {2, 805044223},
22011 {0, 9223372038733561855},
22012 },
22013 },
22014 },
22015 {
22016 name: "MOVDstoreidx8",
22017 argLen: 4,
22018 asm: arm64.AMOVD,
22019 reg: regInfo{
22020 inputs: []inputInfo{
22021 {1, 805044223},
22022 {2, 805044223},
22023 {0, 9223372038733561855},
22024 },
22025 },
22026 },
22027 {
22028 name: "FMOVSstoreidx4",
22029 argLen: 4,
22030 asm: arm64.AFMOVS,
22031 reg: regInfo{
22032 inputs: []inputInfo{
22033 {1, 805044223},
22034 {0, 9223372038733561855},
22035 {2, 9223372034707292160},
22036 },
22037 },
22038 },
22039 {
22040 name: "FMOVDstoreidx8",
22041 argLen: 4,
22042 asm: arm64.AFMOVD,
22043 reg: regInfo{
22044 inputs: []inputInfo{
22045 {1, 805044223},
22046 {0, 9223372038733561855},
22047 {2, 9223372034707292160},
22048 },
22049 },
22050 },
22051 {
22052 name: "MOVBstorezero",
22053 auxType: auxSymOff,
22054 argLen: 2,
22055 faultOnNilArg0: true,
22056 symEffect: SymWrite,
22057 asm: arm64.AMOVB,
22058 reg: regInfo{
22059 inputs: []inputInfo{
22060 {0, 9223372038733561855},
22061 },
22062 },
22063 },
22064 {
22065 name: "MOVHstorezero",
22066 auxType: auxSymOff,
22067 argLen: 2,
22068 faultOnNilArg0: true,
22069 symEffect: SymWrite,
22070 asm: arm64.AMOVH,
22071 reg: regInfo{
22072 inputs: []inputInfo{
22073 {0, 9223372038733561855},
22074 },
22075 },
22076 },
22077 {
22078 name: "MOVWstorezero",
22079 auxType: auxSymOff,
22080 argLen: 2,
22081 faultOnNilArg0: true,
22082 symEffect: SymWrite,
22083 asm: arm64.AMOVW,
22084 reg: regInfo{
22085 inputs: []inputInfo{
22086 {0, 9223372038733561855},
22087 },
22088 },
22089 },
22090 {
22091 name: "MOVDstorezero",
22092 auxType: auxSymOff,
22093 argLen: 2,
22094 faultOnNilArg0: true,
22095 symEffect: SymWrite,
22096 asm: arm64.AMOVD,
22097 reg: regInfo{
22098 inputs: []inputInfo{
22099 {0, 9223372038733561855},
22100 },
22101 },
22102 },
22103 {
22104 name: "MOVQstorezero",
22105 auxType: auxSymOff,
22106 argLen: 2,
22107 faultOnNilArg0: true,
22108 symEffect: SymWrite,
22109 asm: arm64.ASTP,
22110 reg: regInfo{
22111 inputs: []inputInfo{
22112 {0, 9223372038733561855},
22113 },
22114 },
22115 },
22116 {
22117 name: "MOVBstorezeroidx",
22118 argLen: 3,
22119 asm: arm64.AMOVB,
22120 reg: regInfo{
22121 inputs: []inputInfo{
22122 {1, 805044223},
22123 {0, 9223372038733561855},
22124 },
22125 },
22126 },
22127 {
22128 name: "MOVHstorezeroidx",
22129 argLen: 3,
22130 asm: arm64.AMOVH,
22131 reg: regInfo{
22132 inputs: []inputInfo{
22133 {1, 805044223},
22134 {0, 9223372038733561855},
22135 },
22136 },
22137 },
22138 {
22139 name: "MOVWstorezeroidx",
22140 argLen: 3,
22141 asm: arm64.AMOVW,
22142 reg: regInfo{
22143 inputs: []inputInfo{
22144 {1, 805044223},
22145 {0, 9223372038733561855},
22146 },
22147 },
22148 },
22149 {
22150 name: "MOVDstorezeroidx",
22151 argLen: 3,
22152 asm: arm64.AMOVD,
22153 reg: regInfo{
22154 inputs: []inputInfo{
22155 {1, 805044223},
22156 {0, 9223372038733561855},
22157 },
22158 },
22159 },
22160 {
22161 name: "MOVHstorezeroidx2",
22162 argLen: 3,
22163 asm: arm64.AMOVH,
22164 reg: regInfo{
22165 inputs: []inputInfo{
22166 {1, 805044223},
22167 {0, 9223372038733561855},
22168 },
22169 },
22170 },
22171 {
22172 name: "MOVWstorezeroidx4",
22173 argLen: 3,
22174 asm: arm64.AMOVW,
22175 reg: regInfo{
22176 inputs: []inputInfo{
22177 {1, 805044223},
22178 {0, 9223372038733561855},
22179 },
22180 },
22181 },
22182 {
22183 name: "MOVDstorezeroidx8",
22184 argLen: 3,
22185 asm: arm64.AMOVD,
22186 reg: regInfo{
22187 inputs: []inputInfo{
22188 {1, 805044223},
22189 {0, 9223372038733561855},
22190 },
22191 },
22192 },
22193 {
22194 name: "FMOVDgpfp",
22195 argLen: 1,
22196 asm: arm64.AFMOVD,
22197 reg: regInfo{
22198 inputs: []inputInfo{
22199 {0, 670826495},
22200 },
22201 outputs: []outputInfo{
22202 {0, 9223372034707292160},
22203 },
22204 },
22205 },
22206 {
22207 name: "FMOVDfpgp",
22208 argLen: 1,
22209 asm: arm64.AFMOVD,
22210 reg: regInfo{
22211 inputs: []inputInfo{
22212 {0, 9223372034707292160},
22213 },
22214 outputs: []outputInfo{
22215 {0, 670826495},
22216 },
22217 },
22218 },
22219 {
22220 name: "FMOVSgpfp",
22221 argLen: 1,
22222 asm: arm64.AFMOVS,
22223 reg: regInfo{
22224 inputs: []inputInfo{
22225 {0, 670826495},
22226 },
22227 outputs: []outputInfo{
22228 {0, 9223372034707292160},
22229 },
22230 },
22231 },
22232 {
22233 name: "FMOVSfpgp",
22234 argLen: 1,
22235 asm: arm64.AFMOVS,
22236 reg: regInfo{
22237 inputs: []inputInfo{
22238 {0, 9223372034707292160},
22239 },
22240 outputs: []outputInfo{
22241 {0, 670826495},
22242 },
22243 },
22244 },
22245 {
22246 name: "MOVBreg",
22247 argLen: 1,
22248 asm: arm64.AMOVB,
22249 reg: regInfo{
22250 inputs: []inputInfo{
22251 {0, 805044223},
22252 },
22253 outputs: []outputInfo{
22254 {0, 670826495},
22255 },
22256 },
22257 },
22258 {
22259 name: "MOVBUreg",
22260 argLen: 1,
22261 asm: arm64.AMOVBU,
22262 reg: regInfo{
22263 inputs: []inputInfo{
22264 {0, 805044223},
22265 },
22266 outputs: []outputInfo{
22267 {0, 670826495},
22268 },
22269 },
22270 },
22271 {
22272 name: "MOVHreg",
22273 argLen: 1,
22274 asm: arm64.AMOVH,
22275 reg: regInfo{
22276 inputs: []inputInfo{
22277 {0, 805044223},
22278 },
22279 outputs: []outputInfo{
22280 {0, 670826495},
22281 },
22282 },
22283 },
22284 {
22285 name: "MOVHUreg",
22286 argLen: 1,
22287 asm: arm64.AMOVHU,
22288 reg: regInfo{
22289 inputs: []inputInfo{
22290 {0, 805044223},
22291 },
22292 outputs: []outputInfo{
22293 {0, 670826495},
22294 },
22295 },
22296 },
22297 {
22298 name: "MOVWreg",
22299 argLen: 1,
22300 asm: arm64.AMOVW,
22301 reg: regInfo{
22302 inputs: []inputInfo{
22303 {0, 805044223},
22304 },
22305 outputs: []outputInfo{
22306 {0, 670826495},
22307 },
22308 },
22309 },
22310 {
22311 name: "MOVWUreg",
22312 argLen: 1,
22313 asm: arm64.AMOVWU,
22314 reg: regInfo{
22315 inputs: []inputInfo{
22316 {0, 805044223},
22317 },
22318 outputs: []outputInfo{
22319 {0, 670826495},
22320 },
22321 },
22322 },
22323 {
22324 name: "MOVDreg",
22325 argLen: 1,
22326 asm: arm64.AMOVD,
22327 reg: regInfo{
22328 inputs: []inputInfo{
22329 {0, 805044223},
22330 },
22331 outputs: []outputInfo{
22332 {0, 670826495},
22333 },
22334 },
22335 },
22336 {
22337 name: "MOVDnop",
22338 argLen: 1,
22339 resultInArg0: true,
22340 reg: regInfo{
22341 inputs: []inputInfo{
22342 {0, 670826495},
22343 },
22344 outputs: []outputInfo{
22345 {0, 670826495},
22346 },
22347 },
22348 },
22349 {
22350 name: "SCVTFWS",
22351 argLen: 1,
22352 asm: arm64.ASCVTFWS,
22353 reg: regInfo{
22354 inputs: []inputInfo{
22355 {0, 670826495},
22356 },
22357 outputs: []outputInfo{
22358 {0, 9223372034707292160},
22359 },
22360 },
22361 },
22362 {
22363 name: "SCVTFWD",
22364 argLen: 1,
22365 asm: arm64.ASCVTFWD,
22366 reg: regInfo{
22367 inputs: []inputInfo{
22368 {0, 670826495},
22369 },
22370 outputs: []outputInfo{
22371 {0, 9223372034707292160},
22372 },
22373 },
22374 },
22375 {
22376 name: "UCVTFWS",
22377 argLen: 1,
22378 asm: arm64.AUCVTFWS,
22379 reg: regInfo{
22380 inputs: []inputInfo{
22381 {0, 670826495},
22382 },
22383 outputs: []outputInfo{
22384 {0, 9223372034707292160},
22385 },
22386 },
22387 },
22388 {
22389 name: "UCVTFWD",
22390 argLen: 1,
22391 asm: arm64.AUCVTFWD,
22392 reg: regInfo{
22393 inputs: []inputInfo{
22394 {0, 670826495},
22395 },
22396 outputs: []outputInfo{
22397 {0, 9223372034707292160},
22398 },
22399 },
22400 },
22401 {
22402 name: "SCVTFS",
22403 argLen: 1,
22404 asm: arm64.ASCVTFS,
22405 reg: regInfo{
22406 inputs: []inputInfo{
22407 {0, 670826495},
22408 },
22409 outputs: []outputInfo{
22410 {0, 9223372034707292160},
22411 },
22412 },
22413 },
22414 {
22415 name: "SCVTFD",
22416 argLen: 1,
22417 asm: arm64.ASCVTFD,
22418 reg: regInfo{
22419 inputs: []inputInfo{
22420 {0, 670826495},
22421 },
22422 outputs: []outputInfo{
22423 {0, 9223372034707292160},
22424 },
22425 },
22426 },
22427 {
22428 name: "UCVTFS",
22429 argLen: 1,
22430 asm: arm64.AUCVTFS,
22431 reg: regInfo{
22432 inputs: []inputInfo{
22433 {0, 670826495},
22434 },
22435 outputs: []outputInfo{
22436 {0, 9223372034707292160},
22437 },
22438 },
22439 },
22440 {
22441 name: "UCVTFD",
22442 argLen: 1,
22443 asm: arm64.AUCVTFD,
22444 reg: regInfo{
22445 inputs: []inputInfo{
22446 {0, 670826495},
22447 },
22448 outputs: []outputInfo{
22449 {0, 9223372034707292160},
22450 },
22451 },
22452 },
22453 {
22454 name: "FCVTZSSW",
22455 argLen: 1,
22456 asm: arm64.AFCVTZSSW,
22457 reg: regInfo{
22458 inputs: []inputInfo{
22459 {0, 9223372034707292160},
22460 },
22461 outputs: []outputInfo{
22462 {0, 670826495},
22463 },
22464 },
22465 },
22466 {
22467 name: "FCVTZSDW",
22468 argLen: 1,
22469 asm: arm64.AFCVTZSDW,
22470 reg: regInfo{
22471 inputs: []inputInfo{
22472 {0, 9223372034707292160},
22473 },
22474 outputs: []outputInfo{
22475 {0, 670826495},
22476 },
22477 },
22478 },
22479 {
22480 name: "FCVTZUSW",
22481 argLen: 1,
22482 asm: arm64.AFCVTZUSW,
22483 reg: regInfo{
22484 inputs: []inputInfo{
22485 {0, 9223372034707292160},
22486 },
22487 outputs: []outputInfo{
22488 {0, 670826495},
22489 },
22490 },
22491 },
22492 {
22493 name: "FCVTZUDW",
22494 argLen: 1,
22495 asm: arm64.AFCVTZUDW,
22496 reg: regInfo{
22497 inputs: []inputInfo{
22498 {0, 9223372034707292160},
22499 },
22500 outputs: []outputInfo{
22501 {0, 670826495},
22502 },
22503 },
22504 },
22505 {
22506 name: "FCVTZSS",
22507 argLen: 1,
22508 asm: arm64.AFCVTZSS,
22509 reg: regInfo{
22510 inputs: []inputInfo{
22511 {0, 9223372034707292160},
22512 },
22513 outputs: []outputInfo{
22514 {0, 670826495},
22515 },
22516 },
22517 },
22518 {
22519 name: "FCVTZSD",
22520 argLen: 1,
22521 asm: arm64.AFCVTZSD,
22522 reg: regInfo{
22523 inputs: []inputInfo{
22524 {0, 9223372034707292160},
22525 },
22526 outputs: []outputInfo{
22527 {0, 670826495},
22528 },
22529 },
22530 },
22531 {
22532 name: "FCVTZUS",
22533 argLen: 1,
22534 asm: arm64.AFCVTZUS,
22535 reg: regInfo{
22536 inputs: []inputInfo{
22537 {0, 9223372034707292160},
22538 },
22539 outputs: []outputInfo{
22540 {0, 670826495},
22541 },
22542 },
22543 },
22544 {
22545 name: "FCVTZUD",
22546 argLen: 1,
22547 asm: arm64.AFCVTZUD,
22548 reg: regInfo{
22549 inputs: []inputInfo{
22550 {0, 9223372034707292160},
22551 },
22552 outputs: []outputInfo{
22553 {0, 670826495},
22554 },
22555 },
22556 },
22557 {
22558 name: "FCVTSD",
22559 argLen: 1,
22560 asm: arm64.AFCVTSD,
22561 reg: regInfo{
22562 inputs: []inputInfo{
22563 {0, 9223372034707292160},
22564 },
22565 outputs: []outputInfo{
22566 {0, 9223372034707292160},
22567 },
22568 },
22569 },
22570 {
22571 name: "FCVTDS",
22572 argLen: 1,
22573 asm: arm64.AFCVTDS,
22574 reg: regInfo{
22575 inputs: []inputInfo{
22576 {0, 9223372034707292160},
22577 },
22578 outputs: []outputInfo{
22579 {0, 9223372034707292160},
22580 },
22581 },
22582 },
22583 {
22584 name: "FRINTAD",
22585 argLen: 1,
22586 asm: arm64.AFRINTAD,
22587 reg: regInfo{
22588 inputs: []inputInfo{
22589 {0, 9223372034707292160},
22590 },
22591 outputs: []outputInfo{
22592 {0, 9223372034707292160},
22593 },
22594 },
22595 },
22596 {
22597 name: "FRINTMD",
22598 argLen: 1,
22599 asm: arm64.AFRINTMD,
22600 reg: regInfo{
22601 inputs: []inputInfo{
22602 {0, 9223372034707292160},
22603 },
22604 outputs: []outputInfo{
22605 {0, 9223372034707292160},
22606 },
22607 },
22608 },
22609 {
22610 name: "FRINTND",
22611 argLen: 1,
22612 asm: arm64.AFRINTND,
22613 reg: regInfo{
22614 inputs: []inputInfo{
22615 {0, 9223372034707292160},
22616 },
22617 outputs: []outputInfo{
22618 {0, 9223372034707292160},
22619 },
22620 },
22621 },
22622 {
22623 name: "FRINTPD",
22624 argLen: 1,
22625 asm: arm64.AFRINTPD,
22626 reg: regInfo{
22627 inputs: []inputInfo{
22628 {0, 9223372034707292160},
22629 },
22630 outputs: []outputInfo{
22631 {0, 9223372034707292160},
22632 },
22633 },
22634 },
22635 {
22636 name: "FRINTZD",
22637 argLen: 1,
22638 asm: arm64.AFRINTZD,
22639 reg: regInfo{
22640 inputs: []inputInfo{
22641 {0, 9223372034707292160},
22642 },
22643 outputs: []outputInfo{
22644 {0, 9223372034707292160},
22645 },
22646 },
22647 },
22648 {
22649 name: "CSEL",
22650 auxType: auxCCop,
22651 argLen: 3,
22652 asm: arm64.ACSEL,
22653 reg: regInfo{
22654 inputs: []inputInfo{
22655 {0, 670826495},
22656 {1, 670826495},
22657 },
22658 outputs: []outputInfo{
22659 {0, 670826495},
22660 },
22661 },
22662 },
22663 {
22664 name: "CSEL0",
22665 auxType: auxCCop,
22666 argLen: 2,
22667 asm: arm64.ACSEL,
22668 reg: regInfo{
22669 inputs: []inputInfo{
22670 {0, 805044223},
22671 },
22672 outputs: []outputInfo{
22673 {0, 670826495},
22674 },
22675 },
22676 },
22677 {
22678 name: "CSINC",
22679 auxType: auxCCop,
22680 argLen: 3,
22681 asm: arm64.ACSINC,
22682 reg: regInfo{
22683 inputs: []inputInfo{
22684 {0, 670826495},
22685 {1, 670826495},
22686 },
22687 outputs: []outputInfo{
22688 {0, 670826495},
22689 },
22690 },
22691 },
22692 {
22693 name: "CSINV",
22694 auxType: auxCCop,
22695 argLen: 3,
22696 asm: arm64.ACSINV,
22697 reg: regInfo{
22698 inputs: []inputInfo{
22699 {0, 670826495},
22700 {1, 670826495},
22701 },
22702 outputs: []outputInfo{
22703 {0, 670826495},
22704 },
22705 },
22706 },
22707 {
22708 name: "CSNEG",
22709 auxType: auxCCop,
22710 argLen: 3,
22711 asm: arm64.ACSNEG,
22712 reg: regInfo{
22713 inputs: []inputInfo{
22714 {0, 670826495},
22715 {1, 670826495},
22716 },
22717 outputs: []outputInfo{
22718 {0, 670826495},
22719 },
22720 },
22721 },
22722 {
22723 name: "CSETM",
22724 auxType: auxCCop,
22725 argLen: 1,
22726 asm: arm64.ACSETM,
22727 reg: regInfo{
22728 outputs: []outputInfo{
22729 {0, 670826495},
22730 },
22731 },
22732 },
22733 {
22734 name: "CALLstatic",
22735 auxType: auxCallOff,
22736 argLen: -1,
22737 clobberFlags: true,
22738 call: true,
22739 reg: regInfo{
22740 clobbers: 9223372035512336383,
22741 },
22742 },
22743 {
22744 name: "CALLtail",
22745 auxType: auxCallOff,
22746 argLen: -1,
22747 clobberFlags: true,
22748 call: true,
22749 tailCall: true,
22750 reg: regInfo{
22751 clobbers: 9223372035512336383,
22752 },
22753 },
22754 {
22755 name: "CALLclosure",
22756 auxType: auxCallOff,
22757 argLen: -1,
22758 clobberFlags: true,
22759 call: true,
22760 reg: regInfo{
22761 inputs: []inputInfo{
22762 {1, 67108864},
22763 {0, 1744568319},
22764 },
22765 clobbers: 9223372035512336383,
22766 },
22767 },
22768 {
22769 name: "CALLinter",
22770 auxType: auxCallOff,
22771 argLen: -1,
22772 clobberFlags: true,
22773 call: true,
22774 reg: regInfo{
22775 inputs: []inputInfo{
22776 {0, 670826495},
22777 },
22778 clobbers: 9223372035512336383,
22779 },
22780 },
22781 {
22782 name: "LoweredNilCheck",
22783 argLen: 2,
22784 nilCheck: true,
22785 faultOnNilArg0: true,
22786 reg: regInfo{
22787 inputs: []inputInfo{
22788 {0, 805044223},
22789 },
22790 },
22791 },
22792 {
22793 name: "Equal",
22794 argLen: 1,
22795 reg: regInfo{
22796 outputs: []outputInfo{
22797 {0, 670826495},
22798 },
22799 },
22800 },
22801 {
22802 name: "NotEqual",
22803 argLen: 1,
22804 reg: regInfo{
22805 outputs: []outputInfo{
22806 {0, 670826495},
22807 },
22808 },
22809 },
22810 {
22811 name: "LessThan",
22812 argLen: 1,
22813 reg: regInfo{
22814 outputs: []outputInfo{
22815 {0, 670826495},
22816 },
22817 },
22818 },
22819 {
22820 name: "LessEqual",
22821 argLen: 1,
22822 reg: regInfo{
22823 outputs: []outputInfo{
22824 {0, 670826495},
22825 },
22826 },
22827 },
22828 {
22829 name: "GreaterThan",
22830 argLen: 1,
22831 reg: regInfo{
22832 outputs: []outputInfo{
22833 {0, 670826495},
22834 },
22835 },
22836 },
22837 {
22838 name: "GreaterEqual",
22839 argLen: 1,
22840 reg: regInfo{
22841 outputs: []outputInfo{
22842 {0, 670826495},
22843 },
22844 },
22845 },
22846 {
22847 name: "LessThanU",
22848 argLen: 1,
22849 reg: regInfo{
22850 outputs: []outputInfo{
22851 {0, 670826495},
22852 },
22853 },
22854 },
22855 {
22856 name: "LessEqualU",
22857 argLen: 1,
22858 reg: regInfo{
22859 outputs: []outputInfo{
22860 {0, 670826495},
22861 },
22862 },
22863 },
22864 {
22865 name: "GreaterThanU",
22866 argLen: 1,
22867 reg: regInfo{
22868 outputs: []outputInfo{
22869 {0, 670826495},
22870 },
22871 },
22872 },
22873 {
22874 name: "GreaterEqualU",
22875 argLen: 1,
22876 reg: regInfo{
22877 outputs: []outputInfo{
22878 {0, 670826495},
22879 },
22880 },
22881 },
22882 {
22883 name: "LessThanF",
22884 argLen: 1,
22885 reg: regInfo{
22886 outputs: []outputInfo{
22887 {0, 670826495},
22888 },
22889 },
22890 },
22891 {
22892 name: "LessEqualF",
22893 argLen: 1,
22894 reg: regInfo{
22895 outputs: []outputInfo{
22896 {0, 670826495},
22897 },
22898 },
22899 },
22900 {
22901 name: "GreaterThanF",
22902 argLen: 1,
22903 reg: regInfo{
22904 outputs: []outputInfo{
22905 {0, 670826495},
22906 },
22907 },
22908 },
22909 {
22910 name: "GreaterEqualF",
22911 argLen: 1,
22912 reg: regInfo{
22913 outputs: []outputInfo{
22914 {0, 670826495},
22915 },
22916 },
22917 },
22918 {
22919 name: "NotLessThanF",
22920 argLen: 1,
22921 reg: regInfo{
22922 outputs: []outputInfo{
22923 {0, 670826495},
22924 },
22925 },
22926 },
22927 {
22928 name: "NotLessEqualF",
22929 argLen: 1,
22930 reg: regInfo{
22931 outputs: []outputInfo{
22932 {0, 670826495},
22933 },
22934 },
22935 },
22936 {
22937 name: "NotGreaterThanF",
22938 argLen: 1,
22939 reg: regInfo{
22940 outputs: []outputInfo{
22941 {0, 670826495},
22942 },
22943 },
22944 },
22945 {
22946 name: "NotGreaterEqualF",
22947 argLen: 1,
22948 reg: regInfo{
22949 outputs: []outputInfo{
22950 {0, 670826495},
22951 },
22952 },
22953 },
22954 {
22955 name: "LessThanNoov",
22956 argLen: 1,
22957 reg: regInfo{
22958 outputs: []outputInfo{
22959 {0, 670826495},
22960 },
22961 },
22962 },
22963 {
22964 name: "GreaterEqualNoov",
22965 argLen: 1,
22966 reg: regInfo{
22967 outputs: []outputInfo{
22968 {0, 670826495},
22969 },
22970 },
22971 },
22972 {
22973 name: "DUFFZERO",
22974 auxType: auxInt64,
22975 argLen: 2,
22976 faultOnNilArg0: true,
22977 unsafePoint: true,
22978 reg: regInfo{
22979 inputs: []inputInfo{
22980 {0, 1048576},
22981 },
22982 clobbers: 538116096,
22983 },
22984 },
22985 {
22986 name: "LoweredZero",
22987 argLen: 3,
22988 clobberFlags: true,
22989 faultOnNilArg0: true,
22990 reg: regInfo{
22991 inputs: []inputInfo{
22992 {0, 65536},
22993 {1, 670826495},
22994 },
22995 clobbers: 65536,
22996 },
22997 },
22998 {
22999 name: "DUFFCOPY",
23000 auxType: auxInt64,
23001 argLen: 3,
23002 faultOnNilArg0: true,
23003 faultOnNilArg1: true,
23004 unsafePoint: true,
23005 reg: regInfo{
23006 inputs: []inputInfo{
23007 {0, 2097152},
23008 {1, 1048576},
23009 },
23010 clobbers: 607322112,
23011 },
23012 },
23013 {
23014 name: "LoweredMove",
23015 argLen: 4,
23016 clobberFlags: true,
23017 faultOnNilArg0: true,
23018 faultOnNilArg1: true,
23019 reg: regInfo{
23020 inputs: []inputInfo{
23021 {0, 131072},
23022 {1, 65536},
23023 {2, 637272063},
23024 },
23025 clobbers: 33751040,
23026 },
23027 },
23028 {
23029 name: "LoweredGetClosurePtr",
23030 argLen: 0,
23031 zeroWidth: true,
23032 reg: regInfo{
23033 outputs: []outputInfo{
23034 {0, 67108864},
23035 },
23036 },
23037 },
23038 {
23039 name: "LoweredGetCallerSP",
23040 argLen: 1,
23041 rematerializeable: true,
23042 reg: regInfo{
23043 outputs: []outputInfo{
23044 {0, 670826495},
23045 },
23046 },
23047 },
23048 {
23049 name: "LoweredGetCallerPC",
23050 argLen: 0,
23051 rematerializeable: true,
23052 reg: regInfo{
23053 outputs: []outputInfo{
23054 {0, 670826495},
23055 },
23056 },
23057 },
23058 {
23059 name: "FlagConstant",
23060 auxType: auxFlagConstant,
23061 argLen: 0,
23062 reg: regInfo{},
23063 },
23064 {
23065 name: "InvertFlags",
23066 argLen: 1,
23067 reg: regInfo{},
23068 },
23069 {
23070 name: "LDAR",
23071 argLen: 2,
23072 faultOnNilArg0: true,
23073 asm: arm64.ALDAR,
23074 reg: regInfo{
23075 inputs: []inputInfo{
23076 {0, 9223372038733561855},
23077 },
23078 outputs: []outputInfo{
23079 {0, 670826495},
23080 },
23081 },
23082 },
23083 {
23084 name: "LDARB",
23085 argLen: 2,
23086 faultOnNilArg0: true,
23087 asm: arm64.ALDARB,
23088 reg: regInfo{
23089 inputs: []inputInfo{
23090 {0, 9223372038733561855},
23091 },
23092 outputs: []outputInfo{
23093 {0, 670826495},
23094 },
23095 },
23096 },
23097 {
23098 name: "LDARW",
23099 argLen: 2,
23100 faultOnNilArg0: true,
23101 asm: arm64.ALDARW,
23102 reg: regInfo{
23103 inputs: []inputInfo{
23104 {0, 9223372038733561855},
23105 },
23106 outputs: []outputInfo{
23107 {0, 670826495},
23108 },
23109 },
23110 },
23111 {
23112 name: "STLRB",
23113 argLen: 3,
23114 faultOnNilArg0: true,
23115 hasSideEffects: true,
23116 asm: arm64.ASTLRB,
23117 reg: regInfo{
23118 inputs: []inputInfo{
23119 {1, 805044223},
23120 {0, 9223372038733561855},
23121 },
23122 },
23123 },
23124 {
23125 name: "STLR",
23126 argLen: 3,
23127 faultOnNilArg0: true,
23128 hasSideEffects: true,
23129 asm: arm64.ASTLR,
23130 reg: regInfo{
23131 inputs: []inputInfo{
23132 {1, 805044223},
23133 {0, 9223372038733561855},
23134 },
23135 },
23136 },
23137 {
23138 name: "STLRW",
23139 argLen: 3,
23140 faultOnNilArg0: true,
23141 hasSideEffects: true,
23142 asm: arm64.ASTLRW,
23143 reg: regInfo{
23144 inputs: []inputInfo{
23145 {1, 805044223},
23146 {0, 9223372038733561855},
23147 },
23148 },
23149 },
23150 {
23151 name: "LoweredAtomicExchange64",
23152 argLen: 3,
23153 resultNotInArgs: true,
23154 faultOnNilArg0: true,
23155 hasSideEffects: true,
23156 unsafePoint: true,
23157 reg: regInfo{
23158 inputs: []inputInfo{
23159 {1, 805044223},
23160 {0, 9223372038733561855},
23161 },
23162 outputs: []outputInfo{
23163 {0, 670826495},
23164 },
23165 },
23166 },
23167 {
23168 name: "LoweredAtomicExchange32",
23169 argLen: 3,
23170 resultNotInArgs: true,
23171 faultOnNilArg0: true,
23172 hasSideEffects: true,
23173 unsafePoint: true,
23174 reg: regInfo{
23175 inputs: []inputInfo{
23176 {1, 805044223},
23177 {0, 9223372038733561855},
23178 },
23179 outputs: []outputInfo{
23180 {0, 670826495},
23181 },
23182 },
23183 },
23184 {
23185 name: "LoweredAtomicExchange8",
23186 argLen: 3,
23187 resultNotInArgs: true,
23188 faultOnNilArg0: true,
23189 hasSideEffects: true,
23190 unsafePoint: true,
23191 reg: regInfo{
23192 inputs: []inputInfo{
23193 {1, 805044223},
23194 {0, 9223372038733561855},
23195 },
23196 outputs: []outputInfo{
23197 {0, 670826495},
23198 },
23199 },
23200 },
23201 {
23202 name: "LoweredAtomicExchange64Variant",
23203 argLen: 3,
23204 resultNotInArgs: true,
23205 faultOnNilArg0: true,
23206 hasSideEffects: true,
23207 reg: regInfo{
23208 inputs: []inputInfo{
23209 {1, 805044223},
23210 {0, 9223372038733561855},
23211 },
23212 outputs: []outputInfo{
23213 {0, 670826495},
23214 },
23215 },
23216 },
23217 {
23218 name: "LoweredAtomicExchange32Variant",
23219 argLen: 3,
23220 resultNotInArgs: true,
23221 faultOnNilArg0: true,
23222 hasSideEffects: true,
23223 reg: regInfo{
23224 inputs: []inputInfo{
23225 {1, 805044223},
23226 {0, 9223372038733561855},
23227 },
23228 outputs: []outputInfo{
23229 {0, 670826495},
23230 },
23231 },
23232 },
23233 {
23234 name: "LoweredAtomicExchange8Variant",
23235 argLen: 3,
23236 resultNotInArgs: true,
23237 faultOnNilArg0: true,
23238 hasSideEffects: true,
23239 unsafePoint: true,
23240 reg: regInfo{
23241 inputs: []inputInfo{
23242 {1, 805044223},
23243 {0, 9223372038733561855},
23244 },
23245 outputs: []outputInfo{
23246 {0, 670826495},
23247 },
23248 },
23249 },
23250 {
23251 name: "LoweredAtomicAdd64",
23252 argLen: 3,
23253 resultNotInArgs: true,
23254 faultOnNilArg0: true,
23255 hasSideEffects: true,
23256 unsafePoint: true,
23257 reg: regInfo{
23258 inputs: []inputInfo{
23259 {1, 805044223},
23260 {0, 9223372038733561855},
23261 },
23262 outputs: []outputInfo{
23263 {0, 670826495},
23264 },
23265 },
23266 },
23267 {
23268 name: "LoweredAtomicAdd32",
23269 argLen: 3,
23270 resultNotInArgs: true,
23271 faultOnNilArg0: true,
23272 hasSideEffects: true,
23273 unsafePoint: true,
23274 reg: regInfo{
23275 inputs: []inputInfo{
23276 {1, 805044223},
23277 {0, 9223372038733561855},
23278 },
23279 outputs: []outputInfo{
23280 {0, 670826495},
23281 },
23282 },
23283 },
23284 {
23285 name: "LoweredAtomicAdd64Variant",
23286 argLen: 3,
23287 resultNotInArgs: true,
23288 faultOnNilArg0: true,
23289 hasSideEffects: true,
23290 reg: regInfo{
23291 inputs: []inputInfo{
23292 {1, 805044223},
23293 {0, 9223372038733561855},
23294 },
23295 outputs: []outputInfo{
23296 {0, 670826495},
23297 },
23298 },
23299 },
23300 {
23301 name: "LoweredAtomicAdd32Variant",
23302 argLen: 3,
23303 resultNotInArgs: true,
23304 faultOnNilArg0: true,
23305 hasSideEffects: true,
23306 reg: regInfo{
23307 inputs: []inputInfo{
23308 {1, 805044223},
23309 {0, 9223372038733561855},
23310 },
23311 outputs: []outputInfo{
23312 {0, 670826495},
23313 },
23314 },
23315 },
23316 {
23317 name: "LoweredAtomicCas64",
23318 argLen: 4,
23319 resultNotInArgs: true,
23320 clobberFlags: true,
23321 faultOnNilArg0: true,
23322 hasSideEffects: true,
23323 unsafePoint: true,
23324 reg: regInfo{
23325 inputs: []inputInfo{
23326 {1, 805044223},
23327 {2, 805044223},
23328 {0, 9223372038733561855},
23329 },
23330 outputs: []outputInfo{
23331 {0, 670826495},
23332 },
23333 },
23334 },
23335 {
23336 name: "LoweredAtomicCas32",
23337 argLen: 4,
23338 resultNotInArgs: true,
23339 clobberFlags: true,
23340 faultOnNilArg0: true,
23341 hasSideEffects: true,
23342 unsafePoint: true,
23343 reg: regInfo{
23344 inputs: []inputInfo{
23345 {1, 805044223},
23346 {2, 805044223},
23347 {0, 9223372038733561855},
23348 },
23349 outputs: []outputInfo{
23350 {0, 670826495},
23351 },
23352 },
23353 },
23354 {
23355 name: "LoweredAtomicCas64Variant",
23356 argLen: 4,
23357 resultNotInArgs: true,
23358 clobberFlags: true,
23359 faultOnNilArg0: true,
23360 hasSideEffects: true,
23361 unsafePoint: true,
23362 reg: regInfo{
23363 inputs: []inputInfo{
23364 {1, 805044223},
23365 {2, 805044223},
23366 {0, 9223372038733561855},
23367 },
23368 outputs: []outputInfo{
23369 {0, 670826495},
23370 },
23371 },
23372 },
23373 {
23374 name: "LoweredAtomicCas32Variant",
23375 argLen: 4,
23376 resultNotInArgs: true,
23377 clobberFlags: true,
23378 faultOnNilArg0: true,
23379 hasSideEffects: true,
23380 unsafePoint: true,
23381 reg: regInfo{
23382 inputs: []inputInfo{
23383 {1, 805044223},
23384 {2, 805044223},
23385 {0, 9223372038733561855},
23386 },
23387 outputs: []outputInfo{
23388 {0, 670826495},
23389 },
23390 },
23391 },
23392 {
23393 name: "LoweredAtomicAnd8",
23394 argLen: 3,
23395 resultNotInArgs: true,
23396 needIntTemp: true,
23397 faultOnNilArg0: true,
23398 hasSideEffects: true,
23399 unsafePoint: true,
23400 asm: arm64.AAND,
23401 reg: regInfo{
23402 inputs: []inputInfo{
23403 {1, 805044223},
23404 {0, 9223372038733561855},
23405 },
23406 outputs: []outputInfo{
23407 {0, 670826495},
23408 },
23409 },
23410 },
23411 {
23412 name: "LoweredAtomicOr8",
23413 argLen: 3,
23414 resultNotInArgs: true,
23415 needIntTemp: true,
23416 faultOnNilArg0: true,
23417 hasSideEffects: true,
23418 unsafePoint: true,
23419 asm: arm64.AORR,
23420 reg: regInfo{
23421 inputs: []inputInfo{
23422 {1, 805044223},
23423 {0, 9223372038733561855},
23424 },
23425 outputs: []outputInfo{
23426 {0, 670826495},
23427 },
23428 },
23429 },
23430 {
23431 name: "LoweredAtomicAnd64",
23432 argLen: 3,
23433 resultNotInArgs: true,
23434 needIntTemp: true,
23435 faultOnNilArg0: true,
23436 hasSideEffects: true,
23437 unsafePoint: true,
23438 asm: arm64.AAND,
23439 reg: regInfo{
23440 inputs: []inputInfo{
23441 {1, 805044223},
23442 {0, 9223372038733561855},
23443 },
23444 outputs: []outputInfo{
23445 {0, 670826495},
23446 },
23447 },
23448 },
23449 {
23450 name: "LoweredAtomicOr64",
23451 argLen: 3,
23452 resultNotInArgs: true,
23453 needIntTemp: true,
23454 faultOnNilArg0: true,
23455 hasSideEffects: true,
23456 unsafePoint: true,
23457 asm: arm64.AORR,
23458 reg: regInfo{
23459 inputs: []inputInfo{
23460 {1, 805044223},
23461 {0, 9223372038733561855},
23462 },
23463 outputs: []outputInfo{
23464 {0, 670826495},
23465 },
23466 },
23467 },
23468 {
23469 name: "LoweredAtomicAnd32",
23470 argLen: 3,
23471 resultNotInArgs: true,
23472 needIntTemp: true,
23473 faultOnNilArg0: true,
23474 hasSideEffects: true,
23475 unsafePoint: true,
23476 asm: arm64.AAND,
23477 reg: regInfo{
23478 inputs: []inputInfo{
23479 {1, 805044223},
23480 {0, 9223372038733561855},
23481 },
23482 outputs: []outputInfo{
23483 {0, 670826495},
23484 },
23485 },
23486 },
23487 {
23488 name: "LoweredAtomicOr32",
23489 argLen: 3,
23490 resultNotInArgs: true,
23491 needIntTemp: true,
23492 faultOnNilArg0: true,
23493 hasSideEffects: true,
23494 unsafePoint: true,
23495 asm: arm64.AORR,
23496 reg: regInfo{
23497 inputs: []inputInfo{
23498 {1, 805044223},
23499 {0, 9223372038733561855},
23500 },
23501 outputs: []outputInfo{
23502 {0, 670826495},
23503 },
23504 },
23505 },
23506 {
23507 name: "LoweredAtomicAnd8Variant",
23508 argLen: 3,
23509 resultNotInArgs: true,
23510 faultOnNilArg0: true,
23511 hasSideEffects: true,
23512 unsafePoint: true,
23513 reg: regInfo{
23514 inputs: []inputInfo{
23515 {1, 805044223},
23516 {0, 9223372038733561855},
23517 },
23518 outputs: []outputInfo{
23519 {0, 670826495},
23520 },
23521 },
23522 },
23523 {
23524 name: "LoweredAtomicOr8Variant",
23525 argLen: 3,
23526 resultNotInArgs: true,
23527 faultOnNilArg0: true,
23528 hasSideEffects: true,
23529 reg: regInfo{
23530 inputs: []inputInfo{
23531 {1, 805044223},
23532 {0, 9223372038733561855},
23533 },
23534 outputs: []outputInfo{
23535 {0, 670826495},
23536 },
23537 },
23538 },
23539 {
23540 name: "LoweredAtomicAnd64Variant",
23541 argLen: 3,
23542 resultNotInArgs: true,
23543 faultOnNilArg0: true,
23544 hasSideEffects: true,
23545 unsafePoint: true,
23546 reg: regInfo{
23547 inputs: []inputInfo{
23548 {1, 805044223},
23549 {0, 9223372038733561855},
23550 },
23551 outputs: []outputInfo{
23552 {0, 670826495},
23553 },
23554 },
23555 },
23556 {
23557 name: "LoweredAtomicOr64Variant",
23558 argLen: 3,
23559 resultNotInArgs: true,
23560 faultOnNilArg0: true,
23561 hasSideEffects: true,
23562 reg: regInfo{
23563 inputs: []inputInfo{
23564 {1, 805044223},
23565 {0, 9223372038733561855},
23566 },
23567 outputs: []outputInfo{
23568 {0, 670826495},
23569 },
23570 },
23571 },
23572 {
23573 name: "LoweredAtomicAnd32Variant",
23574 argLen: 3,
23575 resultNotInArgs: true,
23576 faultOnNilArg0: true,
23577 hasSideEffects: true,
23578 unsafePoint: true,
23579 reg: regInfo{
23580 inputs: []inputInfo{
23581 {1, 805044223},
23582 {0, 9223372038733561855},
23583 },
23584 outputs: []outputInfo{
23585 {0, 670826495},
23586 },
23587 },
23588 },
23589 {
23590 name: "LoweredAtomicOr32Variant",
23591 argLen: 3,
23592 resultNotInArgs: true,
23593 faultOnNilArg0: true,
23594 hasSideEffects: true,
23595 reg: regInfo{
23596 inputs: []inputInfo{
23597 {1, 805044223},
23598 {0, 9223372038733561855},
23599 },
23600 outputs: []outputInfo{
23601 {0, 670826495},
23602 },
23603 },
23604 },
23605 {
23606 name: "LoweredWB",
23607 auxType: auxInt64,
23608 argLen: 1,
23609 clobberFlags: true,
23610 reg: regInfo{
23611 clobbers: 9223372035244359680,
23612 outputs: []outputInfo{
23613 {0, 33554432},
23614 },
23615 },
23616 },
23617 {
23618 name: "LoweredPanicBoundsA",
23619 auxType: auxInt64,
23620 argLen: 3,
23621 call: true,
23622 reg: regInfo{
23623 inputs: []inputInfo{
23624 {0, 4},
23625 {1, 8},
23626 },
23627 },
23628 },
23629 {
23630 name: "LoweredPanicBoundsB",
23631 auxType: auxInt64,
23632 argLen: 3,
23633 call: true,
23634 reg: regInfo{
23635 inputs: []inputInfo{
23636 {0, 2},
23637 {1, 4},
23638 },
23639 },
23640 },
23641 {
23642 name: "LoweredPanicBoundsC",
23643 auxType: auxInt64,
23644 argLen: 3,
23645 call: true,
23646 reg: regInfo{
23647 inputs: []inputInfo{
23648 {0, 1},
23649 {1, 2},
23650 },
23651 },
23652 },
23653 {
23654 name: "PRFM",
23655 auxType: auxInt64,
23656 argLen: 2,
23657 hasSideEffects: true,
23658 asm: arm64.APRFM,
23659 reg: regInfo{
23660 inputs: []inputInfo{
23661 {0, 9223372038733561855},
23662 },
23663 },
23664 },
23665 {
23666 name: "DMB",
23667 auxType: auxInt64,
23668 argLen: 1,
23669 hasSideEffects: true,
23670 asm: arm64.ADMB,
23671 reg: regInfo{},
23672 },
23673
23674 {
23675 name: "NEGV",
23676 argLen: 1,
23677 reg: regInfo{
23678 inputs: []inputInfo{
23679 {0, 1073741816},
23680 },
23681 outputs: []outputInfo{
23682 {0, 1071644664},
23683 },
23684 },
23685 },
23686 {
23687 name: "NEGF",
23688 argLen: 1,
23689 asm: loong64.ANEGF,
23690 reg: regInfo{
23691 inputs: []inputInfo{
23692 {0, 4611686017353646080},
23693 },
23694 outputs: []outputInfo{
23695 {0, 4611686017353646080},
23696 },
23697 },
23698 },
23699 {
23700 name: "NEGD",
23701 argLen: 1,
23702 asm: loong64.ANEGD,
23703 reg: regInfo{
23704 inputs: []inputInfo{
23705 {0, 4611686017353646080},
23706 },
23707 outputs: []outputInfo{
23708 {0, 4611686017353646080},
23709 },
23710 },
23711 },
23712 {
23713 name: "SQRTD",
23714 argLen: 1,
23715 asm: loong64.ASQRTD,
23716 reg: regInfo{
23717 inputs: []inputInfo{
23718 {0, 4611686017353646080},
23719 },
23720 outputs: []outputInfo{
23721 {0, 4611686017353646080},
23722 },
23723 },
23724 },
23725 {
23726 name: "SQRTF",
23727 argLen: 1,
23728 asm: loong64.ASQRTF,
23729 reg: regInfo{
23730 inputs: []inputInfo{
23731 {0, 4611686017353646080},
23732 },
23733 outputs: []outputInfo{
23734 {0, 4611686017353646080},
23735 },
23736 },
23737 },
23738 {
23739 name: "ABSD",
23740 argLen: 1,
23741 asm: loong64.AABSD,
23742 reg: regInfo{
23743 inputs: []inputInfo{
23744 {0, 4611686017353646080},
23745 },
23746 outputs: []outputInfo{
23747 {0, 4611686017353646080},
23748 },
23749 },
23750 },
23751 {
23752 name: "CLZW",
23753 argLen: 1,
23754 asm: loong64.ACLZW,
23755 reg: regInfo{
23756 inputs: []inputInfo{
23757 {0, 1073741816},
23758 },
23759 outputs: []outputInfo{
23760 {0, 1071644664},
23761 },
23762 },
23763 },
23764 {
23765 name: "CLZV",
23766 argLen: 1,
23767 asm: loong64.ACLZV,
23768 reg: regInfo{
23769 inputs: []inputInfo{
23770 {0, 1073741816},
23771 },
23772 outputs: []outputInfo{
23773 {0, 1071644664},
23774 },
23775 },
23776 },
23777 {
23778 name: "CTZW",
23779 argLen: 1,
23780 asm: loong64.ACTZW,
23781 reg: regInfo{
23782 inputs: []inputInfo{
23783 {0, 1073741816},
23784 },
23785 outputs: []outputInfo{
23786 {0, 1071644664},
23787 },
23788 },
23789 },
23790 {
23791 name: "CTZV",
23792 argLen: 1,
23793 asm: loong64.ACTZV,
23794 reg: regInfo{
23795 inputs: []inputInfo{
23796 {0, 1073741816},
23797 },
23798 outputs: []outputInfo{
23799 {0, 1071644664},
23800 },
23801 },
23802 },
23803 {
23804 name: "REVB2H",
23805 argLen: 1,
23806 asm: loong64.AREVB2H,
23807 reg: regInfo{
23808 inputs: []inputInfo{
23809 {0, 1073741816},
23810 },
23811 outputs: []outputInfo{
23812 {0, 1071644664},
23813 },
23814 },
23815 },
23816 {
23817 name: "REVB2W",
23818 argLen: 1,
23819 asm: loong64.AREVB2W,
23820 reg: regInfo{
23821 inputs: []inputInfo{
23822 {0, 1073741816},
23823 },
23824 outputs: []outputInfo{
23825 {0, 1071644664},
23826 },
23827 },
23828 },
23829 {
23830 name: "REVBV",
23831 argLen: 1,
23832 asm: loong64.AREVBV,
23833 reg: regInfo{
23834 inputs: []inputInfo{
23835 {0, 1073741816},
23836 },
23837 outputs: []outputInfo{
23838 {0, 1071644664},
23839 },
23840 },
23841 },
23842 {
23843 name: "BITREV4B",
23844 argLen: 1,
23845 asm: loong64.ABITREV4B,
23846 reg: regInfo{
23847 inputs: []inputInfo{
23848 {0, 1073741816},
23849 },
23850 outputs: []outputInfo{
23851 {0, 1071644664},
23852 },
23853 },
23854 },
23855 {
23856 name: "BITREVW",
23857 argLen: 1,
23858 asm: loong64.ABITREVW,
23859 reg: regInfo{
23860 inputs: []inputInfo{
23861 {0, 1073741816},
23862 },
23863 outputs: []outputInfo{
23864 {0, 1071644664},
23865 },
23866 },
23867 },
23868 {
23869 name: "BITREVV",
23870 argLen: 1,
23871 asm: loong64.ABITREVV,
23872 reg: regInfo{
23873 inputs: []inputInfo{
23874 {0, 1073741816},
23875 },
23876 outputs: []outputInfo{
23877 {0, 1071644664},
23878 },
23879 },
23880 },
23881 {
23882 name: "VPCNT64",
23883 argLen: 1,
23884 asm: loong64.AVPCNTV,
23885 reg: regInfo{
23886 inputs: []inputInfo{
23887 {0, 4611686017353646080},
23888 },
23889 outputs: []outputInfo{
23890 {0, 4611686017353646080},
23891 },
23892 },
23893 },
23894 {
23895 name: "VPCNT32",
23896 argLen: 1,
23897 asm: loong64.AVPCNTW,
23898 reg: regInfo{
23899 inputs: []inputInfo{
23900 {0, 4611686017353646080},
23901 },
23902 outputs: []outputInfo{
23903 {0, 4611686017353646080},
23904 },
23905 },
23906 },
23907 {
23908 name: "VPCNT16",
23909 argLen: 1,
23910 asm: loong64.AVPCNTH,
23911 reg: regInfo{
23912 inputs: []inputInfo{
23913 {0, 4611686017353646080},
23914 },
23915 outputs: []outputInfo{
23916 {0, 4611686017353646080},
23917 },
23918 },
23919 },
23920 {
23921 name: "ADDV",
23922 argLen: 2,
23923 commutative: true,
23924 asm: loong64.AADDVU,
23925 reg: regInfo{
23926 inputs: []inputInfo{
23927 {0, 1073741816},
23928 {1, 1073741816},
23929 },
23930 outputs: []outputInfo{
23931 {0, 1071644664},
23932 },
23933 },
23934 },
23935 {
23936 name: "ADDVconst",
23937 auxType: auxInt64,
23938 argLen: 1,
23939 asm: loong64.AADDVU,
23940 reg: regInfo{
23941 inputs: []inputInfo{
23942 {0, 1073741820},
23943 },
23944 outputs: []outputInfo{
23945 {0, 1071644664},
23946 },
23947 },
23948 },
23949 {
23950 name: "SUBV",
23951 argLen: 2,
23952 asm: loong64.ASUBVU,
23953 reg: regInfo{
23954 inputs: []inputInfo{
23955 {0, 1073741816},
23956 {1, 1073741816},
23957 },
23958 outputs: []outputInfo{
23959 {0, 1071644664},
23960 },
23961 },
23962 },
23963 {
23964 name: "SUBVconst",
23965 auxType: auxInt64,
23966 argLen: 1,
23967 asm: loong64.ASUBVU,
23968 reg: regInfo{
23969 inputs: []inputInfo{
23970 {0, 1073741816},
23971 },
23972 outputs: []outputInfo{
23973 {0, 1071644664},
23974 },
23975 },
23976 },
23977 {
23978 name: "MULV",
23979 argLen: 2,
23980 commutative: true,
23981 asm: loong64.AMULV,
23982 reg: regInfo{
23983 inputs: []inputInfo{
23984 {0, 1073741816},
23985 {1, 1073741816},
23986 },
23987 outputs: []outputInfo{
23988 {0, 1071644664},
23989 },
23990 },
23991 },
23992 {
23993 name: "MULHV",
23994 argLen: 2,
23995 commutative: true,
23996 asm: loong64.AMULHV,
23997 reg: regInfo{
23998 inputs: []inputInfo{
23999 {0, 1073741816},
24000 {1, 1073741816},
24001 },
24002 outputs: []outputInfo{
24003 {0, 1071644664},
24004 },
24005 },
24006 },
24007 {
24008 name: "MULHVU",
24009 argLen: 2,
24010 commutative: true,
24011 asm: loong64.AMULHVU,
24012 reg: regInfo{
24013 inputs: []inputInfo{
24014 {0, 1073741816},
24015 {1, 1073741816},
24016 },
24017 outputs: []outputInfo{
24018 {0, 1071644664},
24019 },
24020 },
24021 },
24022 {
24023 name: "DIVV",
24024 argLen: 2,
24025 asm: loong64.ADIVV,
24026 reg: regInfo{
24027 inputs: []inputInfo{
24028 {0, 1073741816},
24029 {1, 1073741816},
24030 },
24031 outputs: []outputInfo{
24032 {0, 1071644664},
24033 },
24034 },
24035 },
24036 {
24037 name: "DIVVU",
24038 argLen: 2,
24039 asm: loong64.ADIVVU,
24040 reg: regInfo{
24041 inputs: []inputInfo{
24042 {0, 1073741816},
24043 {1, 1073741816},
24044 },
24045 outputs: []outputInfo{
24046 {0, 1071644664},
24047 },
24048 },
24049 },
24050 {
24051 name: "REMV",
24052 argLen: 2,
24053 asm: loong64.AREMV,
24054 reg: regInfo{
24055 inputs: []inputInfo{
24056 {0, 1073741816},
24057 {1, 1073741816},
24058 },
24059 outputs: []outputInfo{
24060 {0, 1071644664},
24061 },
24062 },
24063 },
24064 {
24065 name: "REMVU",
24066 argLen: 2,
24067 asm: loong64.AREMVU,
24068 reg: regInfo{
24069 inputs: []inputInfo{
24070 {0, 1073741816},
24071 {1, 1073741816},
24072 },
24073 outputs: []outputInfo{
24074 {0, 1071644664},
24075 },
24076 },
24077 },
24078 {
24079 name: "ADDF",
24080 argLen: 2,
24081 commutative: true,
24082 asm: loong64.AADDF,
24083 reg: regInfo{
24084 inputs: []inputInfo{
24085 {0, 4611686017353646080},
24086 {1, 4611686017353646080},
24087 },
24088 outputs: []outputInfo{
24089 {0, 4611686017353646080},
24090 },
24091 },
24092 },
24093 {
24094 name: "ADDD",
24095 argLen: 2,
24096 commutative: true,
24097 asm: loong64.AADDD,
24098 reg: regInfo{
24099 inputs: []inputInfo{
24100 {0, 4611686017353646080},
24101 {1, 4611686017353646080},
24102 },
24103 outputs: []outputInfo{
24104 {0, 4611686017353646080},
24105 },
24106 },
24107 },
24108 {
24109 name: "SUBF",
24110 argLen: 2,
24111 asm: loong64.ASUBF,
24112 reg: regInfo{
24113 inputs: []inputInfo{
24114 {0, 4611686017353646080},
24115 {1, 4611686017353646080},
24116 },
24117 outputs: []outputInfo{
24118 {0, 4611686017353646080},
24119 },
24120 },
24121 },
24122 {
24123 name: "SUBD",
24124 argLen: 2,
24125 asm: loong64.ASUBD,
24126 reg: regInfo{
24127 inputs: []inputInfo{
24128 {0, 4611686017353646080},
24129 {1, 4611686017353646080},
24130 },
24131 outputs: []outputInfo{
24132 {0, 4611686017353646080},
24133 },
24134 },
24135 },
24136 {
24137 name: "MULF",
24138 argLen: 2,
24139 commutative: true,
24140 asm: loong64.AMULF,
24141 reg: regInfo{
24142 inputs: []inputInfo{
24143 {0, 4611686017353646080},
24144 {1, 4611686017353646080},
24145 },
24146 outputs: []outputInfo{
24147 {0, 4611686017353646080},
24148 },
24149 },
24150 },
24151 {
24152 name: "MULD",
24153 argLen: 2,
24154 commutative: true,
24155 asm: loong64.AMULD,
24156 reg: regInfo{
24157 inputs: []inputInfo{
24158 {0, 4611686017353646080},
24159 {1, 4611686017353646080},
24160 },
24161 outputs: []outputInfo{
24162 {0, 4611686017353646080},
24163 },
24164 },
24165 },
24166 {
24167 name: "DIVF",
24168 argLen: 2,
24169 asm: loong64.ADIVF,
24170 reg: regInfo{
24171 inputs: []inputInfo{
24172 {0, 4611686017353646080},
24173 {1, 4611686017353646080},
24174 },
24175 outputs: []outputInfo{
24176 {0, 4611686017353646080},
24177 },
24178 },
24179 },
24180 {
24181 name: "DIVD",
24182 argLen: 2,
24183 asm: loong64.ADIVD,
24184 reg: regInfo{
24185 inputs: []inputInfo{
24186 {0, 4611686017353646080},
24187 {1, 4611686017353646080},
24188 },
24189 outputs: []outputInfo{
24190 {0, 4611686017353646080},
24191 },
24192 },
24193 },
24194 {
24195 name: "AND",
24196 argLen: 2,
24197 commutative: true,
24198 asm: loong64.AAND,
24199 reg: regInfo{
24200 inputs: []inputInfo{
24201 {0, 1073741816},
24202 {1, 1073741816},
24203 },
24204 outputs: []outputInfo{
24205 {0, 1071644664},
24206 },
24207 },
24208 },
24209 {
24210 name: "ANDconst",
24211 auxType: auxInt64,
24212 argLen: 1,
24213 asm: loong64.AAND,
24214 reg: regInfo{
24215 inputs: []inputInfo{
24216 {0, 1073741816},
24217 },
24218 outputs: []outputInfo{
24219 {0, 1071644664},
24220 },
24221 },
24222 },
24223 {
24224 name: "OR",
24225 argLen: 2,
24226 commutative: true,
24227 asm: loong64.AOR,
24228 reg: regInfo{
24229 inputs: []inputInfo{
24230 {0, 1073741816},
24231 {1, 1073741816},
24232 },
24233 outputs: []outputInfo{
24234 {0, 1071644664},
24235 },
24236 },
24237 },
24238 {
24239 name: "ORconst",
24240 auxType: auxInt64,
24241 argLen: 1,
24242 asm: loong64.AOR,
24243 reg: regInfo{
24244 inputs: []inputInfo{
24245 {0, 1073741816},
24246 },
24247 outputs: []outputInfo{
24248 {0, 1071644664},
24249 },
24250 },
24251 },
24252 {
24253 name: "XOR",
24254 argLen: 2,
24255 commutative: true,
24256 asm: loong64.AXOR,
24257 reg: regInfo{
24258 inputs: []inputInfo{
24259 {0, 1073741816},
24260 {1, 1073741816},
24261 },
24262 outputs: []outputInfo{
24263 {0, 1071644664},
24264 },
24265 },
24266 },
24267 {
24268 name: "XORconst",
24269 auxType: auxInt64,
24270 argLen: 1,
24271 asm: loong64.AXOR,
24272 reg: regInfo{
24273 inputs: []inputInfo{
24274 {0, 1073741816},
24275 },
24276 outputs: []outputInfo{
24277 {0, 1071644664},
24278 },
24279 },
24280 },
24281 {
24282 name: "NOR",
24283 argLen: 2,
24284 commutative: true,
24285 asm: loong64.ANOR,
24286 reg: regInfo{
24287 inputs: []inputInfo{
24288 {0, 1073741816},
24289 {1, 1073741816},
24290 },
24291 outputs: []outputInfo{
24292 {0, 1071644664},
24293 },
24294 },
24295 },
24296 {
24297 name: "NORconst",
24298 auxType: auxInt64,
24299 argLen: 1,
24300 asm: loong64.ANOR,
24301 reg: regInfo{
24302 inputs: []inputInfo{
24303 {0, 1073741816},
24304 },
24305 outputs: []outputInfo{
24306 {0, 1071644664},
24307 },
24308 },
24309 },
24310 {
24311 name: "FMADDF",
24312 argLen: 3,
24313 commutative: true,
24314 asm: loong64.AFMADDF,
24315 reg: regInfo{
24316 inputs: []inputInfo{
24317 {0, 4611686017353646080},
24318 {1, 4611686017353646080},
24319 {2, 4611686017353646080},
24320 },
24321 outputs: []outputInfo{
24322 {0, 4611686017353646080},
24323 },
24324 },
24325 },
24326 {
24327 name: "FMADDD",
24328 argLen: 3,
24329 commutative: true,
24330 asm: loong64.AFMADDD,
24331 reg: regInfo{
24332 inputs: []inputInfo{
24333 {0, 4611686017353646080},
24334 {1, 4611686017353646080},
24335 {2, 4611686017353646080},
24336 },
24337 outputs: []outputInfo{
24338 {0, 4611686017353646080},
24339 },
24340 },
24341 },
24342 {
24343 name: "FMSUBF",
24344 argLen: 3,
24345 commutative: true,
24346 asm: loong64.AFMSUBF,
24347 reg: regInfo{
24348 inputs: []inputInfo{
24349 {0, 4611686017353646080},
24350 {1, 4611686017353646080},
24351 {2, 4611686017353646080},
24352 },
24353 outputs: []outputInfo{
24354 {0, 4611686017353646080},
24355 },
24356 },
24357 },
24358 {
24359 name: "FMSUBD",
24360 argLen: 3,
24361 commutative: true,
24362 asm: loong64.AFMSUBD,
24363 reg: regInfo{
24364 inputs: []inputInfo{
24365 {0, 4611686017353646080},
24366 {1, 4611686017353646080},
24367 {2, 4611686017353646080},
24368 },
24369 outputs: []outputInfo{
24370 {0, 4611686017353646080},
24371 },
24372 },
24373 },
24374 {
24375 name: "FNMADDF",
24376 argLen: 3,
24377 commutative: true,
24378 asm: loong64.AFNMADDF,
24379 reg: regInfo{
24380 inputs: []inputInfo{
24381 {0, 4611686017353646080},
24382 {1, 4611686017353646080},
24383 {2, 4611686017353646080},
24384 },
24385 outputs: []outputInfo{
24386 {0, 4611686017353646080},
24387 },
24388 },
24389 },
24390 {
24391 name: "FNMADDD",
24392 argLen: 3,
24393 commutative: true,
24394 asm: loong64.AFNMADDD,
24395 reg: regInfo{
24396 inputs: []inputInfo{
24397 {0, 4611686017353646080},
24398 {1, 4611686017353646080},
24399 {2, 4611686017353646080},
24400 },
24401 outputs: []outputInfo{
24402 {0, 4611686017353646080},
24403 },
24404 },
24405 },
24406 {
24407 name: "FNMSUBF",
24408 argLen: 3,
24409 commutative: true,
24410 asm: loong64.AFNMSUBF,
24411 reg: regInfo{
24412 inputs: []inputInfo{
24413 {0, 4611686017353646080},
24414 {1, 4611686017353646080},
24415 {2, 4611686017353646080},
24416 },
24417 outputs: []outputInfo{
24418 {0, 4611686017353646080},
24419 },
24420 },
24421 },
24422 {
24423 name: "FNMSUBD",
24424 argLen: 3,
24425 commutative: true,
24426 asm: loong64.AFNMSUBD,
24427 reg: regInfo{
24428 inputs: []inputInfo{
24429 {0, 4611686017353646080},
24430 {1, 4611686017353646080},
24431 {2, 4611686017353646080},
24432 },
24433 outputs: []outputInfo{
24434 {0, 4611686017353646080},
24435 },
24436 },
24437 },
24438 {
24439 name: "FMINF",
24440 argLen: 2,
24441 commutative: true,
24442 resultNotInArgs: true,
24443 asm: loong64.AFMINF,
24444 reg: regInfo{
24445 inputs: []inputInfo{
24446 {0, 4611686017353646080},
24447 {1, 4611686017353646080},
24448 },
24449 outputs: []outputInfo{
24450 {0, 4611686017353646080},
24451 },
24452 },
24453 },
24454 {
24455 name: "FMIND",
24456 argLen: 2,
24457 commutative: true,
24458 resultNotInArgs: true,
24459 asm: loong64.AFMIND,
24460 reg: regInfo{
24461 inputs: []inputInfo{
24462 {0, 4611686017353646080},
24463 {1, 4611686017353646080},
24464 },
24465 outputs: []outputInfo{
24466 {0, 4611686017353646080},
24467 },
24468 },
24469 },
24470 {
24471 name: "FMAXF",
24472 argLen: 2,
24473 commutative: true,
24474 resultNotInArgs: true,
24475 asm: loong64.AFMAXF,
24476 reg: regInfo{
24477 inputs: []inputInfo{
24478 {0, 4611686017353646080},
24479 {1, 4611686017353646080},
24480 },
24481 outputs: []outputInfo{
24482 {0, 4611686017353646080},
24483 },
24484 },
24485 },
24486 {
24487 name: "FMAXD",
24488 argLen: 2,
24489 commutative: true,
24490 resultNotInArgs: true,
24491 asm: loong64.AFMAXD,
24492 reg: regInfo{
24493 inputs: []inputInfo{
24494 {0, 4611686017353646080},
24495 {1, 4611686017353646080},
24496 },
24497 outputs: []outputInfo{
24498 {0, 4611686017353646080},
24499 },
24500 },
24501 },
24502 {
24503 name: "MASKEQZ",
24504 argLen: 2,
24505 asm: loong64.AMASKEQZ,
24506 reg: regInfo{
24507 inputs: []inputInfo{
24508 {0, 1073741816},
24509 {1, 1073741816},
24510 },
24511 outputs: []outputInfo{
24512 {0, 1071644664},
24513 },
24514 },
24515 },
24516 {
24517 name: "MASKNEZ",
24518 argLen: 2,
24519 asm: loong64.AMASKNEZ,
24520 reg: regInfo{
24521 inputs: []inputInfo{
24522 {0, 1073741816},
24523 {1, 1073741816},
24524 },
24525 outputs: []outputInfo{
24526 {0, 1071644664},
24527 },
24528 },
24529 },
24530 {
24531 name: "FCOPYSGD",
24532 argLen: 2,
24533 asm: loong64.AFCOPYSGD,
24534 reg: regInfo{
24535 inputs: []inputInfo{
24536 {0, 4611686017353646080},
24537 {1, 4611686017353646080},
24538 },
24539 outputs: []outputInfo{
24540 {0, 4611686017353646080},
24541 },
24542 },
24543 },
24544 {
24545 name: "SLLV",
24546 argLen: 2,
24547 asm: loong64.ASLLV,
24548 reg: regInfo{
24549 inputs: []inputInfo{
24550 {0, 1073741816},
24551 {1, 1073741816},
24552 },
24553 outputs: []outputInfo{
24554 {0, 1071644664},
24555 },
24556 },
24557 },
24558 {
24559 name: "SLLVconst",
24560 auxType: auxInt64,
24561 argLen: 1,
24562 asm: loong64.ASLLV,
24563 reg: regInfo{
24564 inputs: []inputInfo{
24565 {0, 1073741816},
24566 },
24567 outputs: []outputInfo{
24568 {0, 1071644664},
24569 },
24570 },
24571 },
24572 {
24573 name: "SRLV",
24574 argLen: 2,
24575 asm: loong64.ASRLV,
24576 reg: regInfo{
24577 inputs: []inputInfo{
24578 {0, 1073741816},
24579 {1, 1073741816},
24580 },
24581 outputs: []outputInfo{
24582 {0, 1071644664},
24583 },
24584 },
24585 },
24586 {
24587 name: "SRLVconst",
24588 auxType: auxInt64,
24589 argLen: 1,
24590 asm: loong64.ASRLV,
24591 reg: regInfo{
24592 inputs: []inputInfo{
24593 {0, 1073741816},
24594 },
24595 outputs: []outputInfo{
24596 {0, 1071644664},
24597 },
24598 },
24599 },
24600 {
24601 name: "SRAV",
24602 argLen: 2,
24603 asm: loong64.ASRAV,
24604 reg: regInfo{
24605 inputs: []inputInfo{
24606 {0, 1073741816},
24607 {1, 1073741816},
24608 },
24609 outputs: []outputInfo{
24610 {0, 1071644664},
24611 },
24612 },
24613 },
24614 {
24615 name: "SRAVconst",
24616 auxType: auxInt64,
24617 argLen: 1,
24618 asm: loong64.ASRAV,
24619 reg: regInfo{
24620 inputs: []inputInfo{
24621 {0, 1073741816},
24622 },
24623 outputs: []outputInfo{
24624 {0, 1071644664},
24625 },
24626 },
24627 },
24628 {
24629 name: "ROTR",
24630 argLen: 2,
24631 asm: loong64.AROTR,
24632 reg: regInfo{
24633 inputs: []inputInfo{
24634 {0, 1073741816},
24635 {1, 1073741816},
24636 },
24637 outputs: []outputInfo{
24638 {0, 1071644664},
24639 },
24640 },
24641 },
24642 {
24643 name: "ROTRV",
24644 argLen: 2,
24645 asm: loong64.AROTRV,
24646 reg: regInfo{
24647 inputs: []inputInfo{
24648 {0, 1073741816},
24649 {1, 1073741816},
24650 },
24651 outputs: []outputInfo{
24652 {0, 1071644664},
24653 },
24654 },
24655 },
24656 {
24657 name: "ROTRconst",
24658 auxType: auxInt64,
24659 argLen: 1,
24660 asm: loong64.AROTR,
24661 reg: regInfo{
24662 inputs: []inputInfo{
24663 {0, 1073741816},
24664 },
24665 outputs: []outputInfo{
24666 {0, 1071644664},
24667 },
24668 },
24669 },
24670 {
24671 name: "ROTRVconst",
24672 auxType: auxInt64,
24673 argLen: 1,
24674 asm: loong64.AROTRV,
24675 reg: regInfo{
24676 inputs: []inputInfo{
24677 {0, 1073741816},
24678 },
24679 outputs: []outputInfo{
24680 {0, 1071644664},
24681 },
24682 },
24683 },
24684 {
24685 name: "SGT",
24686 argLen: 2,
24687 asm: loong64.ASGT,
24688 reg: regInfo{
24689 inputs: []inputInfo{
24690 {0, 1073741816},
24691 {1, 1073741816},
24692 },
24693 outputs: []outputInfo{
24694 {0, 1071644664},
24695 },
24696 },
24697 },
24698 {
24699 name: "SGTconst",
24700 auxType: auxInt64,
24701 argLen: 1,
24702 asm: loong64.ASGT,
24703 reg: regInfo{
24704 inputs: []inputInfo{
24705 {0, 1073741816},
24706 },
24707 outputs: []outputInfo{
24708 {0, 1071644664},
24709 },
24710 },
24711 },
24712 {
24713 name: "SGTU",
24714 argLen: 2,
24715 asm: loong64.ASGTU,
24716 reg: regInfo{
24717 inputs: []inputInfo{
24718 {0, 1073741816},
24719 {1, 1073741816},
24720 },
24721 outputs: []outputInfo{
24722 {0, 1071644664},
24723 },
24724 },
24725 },
24726 {
24727 name: "SGTUconst",
24728 auxType: auxInt64,
24729 argLen: 1,
24730 asm: loong64.ASGTU,
24731 reg: regInfo{
24732 inputs: []inputInfo{
24733 {0, 1073741816},
24734 },
24735 outputs: []outputInfo{
24736 {0, 1071644664},
24737 },
24738 },
24739 },
24740 {
24741 name: "CMPEQF",
24742 argLen: 2,
24743 asm: loong64.ACMPEQF,
24744 reg: regInfo{
24745 inputs: []inputInfo{
24746 {0, 4611686017353646080},
24747 {1, 4611686017353646080},
24748 },
24749 },
24750 },
24751 {
24752 name: "CMPEQD",
24753 argLen: 2,
24754 asm: loong64.ACMPEQD,
24755 reg: regInfo{
24756 inputs: []inputInfo{
24757 {0, 4611686017353646080},
24758 {1, 4611686017353646080},
24759 },
24760 },
24761 },
24762 {
24763 name: "CMPGEF",
24764 argLen: 2,
24765 asm: loong64.ACMPGEF,
24766 reg: regInfo{
24767 inputs: []inputInfo{
24768 {0, 4611686017353646080},
24769 {1, 4611686017353646080},
24770 },
24771 },
24772 },
24773 {
24774 name: "CMPGED",
24775 argLen: 2,
24776 asm: loong64.ACMPGED,
24777 reg: regInfo{
24778 inputs: []inputInfo{
24779 {0, 4611686017353646080},
24780 {1, 4611686017353646080},
24781 },
24782 },
24783 },
24784 {
24785 name: "CMPGTF",
24786 argLen: 2,
24787 asm: loong64.ACMPGTF,
24788 reg: regInfo{
24789 inputs: []inputInfo{
24790 {0, 4611686017353646080},
24791 {1, 4611686017353646080},
24792 },
24793 },
24794 },
24795 {
24796 name: "CMPGTD",
24797 argLen: 2,
24798 asm: loong64.ACMPGTD,
24799 reg: regInfo{
24800 inputs: []inputInfo{
24801 {0, 4611686017353646080},
24802 {1, 4611686017353646080},
24803 },
24804 },
24805 },
24806 {
24807 name: "BSTRPICKW",
24808 auxType: auxInt64,
24809 argLen: 1,
24810 asm: loong64.ABSTRPICKW,
24811 reg: regInfo{
24812 inputs: []inputInfo{
24813 {0, 1073741816},
24814 },
24815 outputs: []outputInfo{
24816 {0, 1071644664},
24817 },
24818 },
24819 },
24820 {
24821 name: "BSTRPICKV",
24822 auxType: auxInt64,
24823 argLen: 1,
24824 asm: loong64.ABSTRPICKV,
24825 reg: regInfo{
24826 inputs: []inputInfo{
24827 {0, 1073741816},
24828 },
24829 outputs: []outputInfo{
24830 {0, 1071644664},
24831 },
24832 },
24833 },
24834 {
24835 name: "MOVVconst",
24836 auxType: auxInt64,
24837 argLen: 0,
24838 rematerializeable: true,
24839 asm: loong64.AMOVV,
24840 reg: regInfo{
24841 outputs: []outputInfo{
24842 {0, 1071644664},
24843 },
24844 },
24845 },
24846 {
24847 name: "MOVFconst",
24848 auxType: auxFloat64,
24849 argLen: 0,
24850 rematerializeable: true,
24851 asm: loong64.AMOVF,
24852 reg: regInfo{
24853 outputs: []outputInfo{
24854 {0, 4611686017353646080},
24855 },
24856 },
24857 },
24858 {
24859 name: "MOVDconst",
24860 auxType: auxFloat64,
24861 argLen: 0,
24862 rematerializeable: true,
24863 asm: loong64.AMOVD,
24864 reg: regInfo{
24865 outputs: []outputInfo{
24866 {0, 4611686017353646080},
24867 },
24868 },
24869 },
24870 {
24871 name: "MOVVaddr",
24872 auxType: auxSymOff,
24873 argLen: 1,
24874 rematerializeable: true,
24875 symEffect: SymAddr,
24876 asm: loong64.AMOVV,
24877 reg: regInfo{
24878 inputs: []inputInfo{
24879 {0, 4611686018427387908},
24880 },
24881 outputs: []outputInfo{
24882 {0, 1071644664},
24883 },
24884 },
24885 },
24886 {
24887 name: "MOVBload",
24888 auxType: auxSymOff,
24889 argLen: 2,
24890 faultOnNilArg0: true,
24891 symEffect: SymRead,
24892 asm: loong64.AMOVB,
24893 reg: regInfo{
24894 inputs: []inputInfo{
24895 {0, 4611686019501129724},
24896 },
24897 outputs: []outputInfo{
24898 {0, 1071644664},
24899 },
24900 },
24901 },
24902 {
24903 name: "MOVBUload",
24904 auxType: auxSymOff,
24905 argLen: 2,
24906 faultOnNilArg0: true,
24907 symEffect: SymRead,
24908 asm: loong64.AMOVBU,
24909 reg: regInfo{
24910 inputs: []inputInfo{
24911 {0, 4611686019501129724},
24912 },
24913 outputs: []outputInfo{
24914 {0, 1071644664},
24915 },
24916 },
24917 },
24918 {
24919 name: "MOVHload",
24920 auxType: auxSymOff,
24921 argLen: 2,
24922 faultOnNilArg0: true,
24923 symEffect: SymRead,
24924 asm: loong64.AMOVH,
24925 reg: regInfo{
24926 inputs: []inputInfo{
24927 {0, 4611686019501129724},
24928 },
24929 outputs: []outputInfo{
24930 {0, 1071644664},
24931 },
24932 },
24933 },
24934 {
24935 name: "MOVHUload",
24936 auxType: auxSymOff,
24937 argLen: 2,
24938 faultOnNilArg0: true,
24939 symEffect: SymRead,
24940 asm: loong64.AMOVHU,
24941 reg: regInfo{
24942 inputs: []inputInfo{
24943 {0, 4611686019501129724},
24944 },
24945 outputs: []outputInfo{
24946 {0, 1071644664},
24947 },
24948 },
24949 },
24950 {
24951 name: "MOVWload",
24952 auxType: auxSymOff,
24953 argLen: 2,
24954 faultOnNilArg0: true,
24955 symEffect: SymRead,
24956 asm: loong64.AMOVW,
24957 reg: regInfo{
24958 inputs: []inputInfo{
24959 {0, 4611686019501129724},
24960 },
24961 outputs: []outputInfo{
24962 {0, 1071644664},
24963 },
24964 },
24965 },
24966 {
24967 name: "MOVWUload",
24968 auxType: auxSymOff,
24969 argLen: 2,
24970 faultOnNilArg0: true,
24971 symEffect: SymRead,
24972 asm: loong64.AMOVWU,
24973 reg: regInfo{
24974 inputs: []inputInfo{
24975 {0, 4611686019501129724},
24976 },
24977 outputs: []outputInfo{
24978 {0, 1071644664},
24979 },
24980 },
24981 },
24982 {
24983 name: "MOVVload",
24984 auxType: auxSymOff,
24985 argLen: 2,
24986 faultOnNilArg0: true,
24987 symEffect: SymRead,
24988 asm: loong64.AMOVV,
24989 reg: regInfo{
24990 inputs: []inputInfo{
24991 {0, 4611686019501129724},
24992 },
24993 outputs: []outputInfo{
24994 {0, 1071644664},
24995 },
24996 },
24997 },
24998 {
24999 name: "MOVFload",
25000 auxType: auxSymOff,
25001 argLen: 2,
25002 faultOnNilArg0: true,
25003 symEffect: SymRead,
25004 asm: loong64.AMOVF,
25005 reg: regInfo{
25006 inputs: []inputInfo{
25007 {0, 4611686019501129724},
25008 },
25009 outputs: []outputInfo{
25010 {0, 4611686017353646080},
25011 },
25012 },
25013 },
25014 {
25015 name: "MOVDload",
25016 auxType: auxSymOff,
25017 argLen: 2,
25018 faultOnNilArg0: true,
25019 symEffect: SymRead,
25020 asm: loong64.AMOVD,
25021 reg: regInfo{
25022 inputs: []inputInfo{
25023 {0, 4611686019501129724},
25024 },
25025 outputs: []outputInfo{
25026 {0, 4611686017353646080},
25027 },
25028 },
25029 },
25030 {
25031 name: "MOVVloadidx",
25032 argLen: 3,
25033 asm: loong64.AMOVV,
25034 reg: regInfo{
25035 inputs: []inputInfo{
25036 {1, 1073741816},
25037 {0, 4611686019501129724},
25038 },
25039 outputs: []outputInfo{
25040 {0, 1071644664},
25041 },
25042 },
25043 },
25044 {
25045 name: "MOVWloadidx",
25046 argLen: 3,
25047 asm: loong64.AMOVW,
25048 reg: regInfo{
25049 inputs: []inputInfo{
25050 {1, 1073741816},
25051 {0, 4611686019501129724},
25052 },
25053 outputs: []outputInfo{
25054 {0, 1071644664},
25055 },
25056 },
25057 },
25058 {
25059 name: "MOVWUloadidx",
25060 argLen: 3,
25061 asm: loong64.AMOVWU,
25062 reg: regInfo{
25063 inputs: []inputInfo{
25064 {1, 1073741816},
25065 {0, 4611686019501129724},
25066 },
25067 outputs: []outputInfo{
25068 {0, 1071644664},
25069 },
25070 },
25071 },
25072 {
25073 name: "MOVHloadidx",
25074 argLen: 3,
25075 asm: loong64.AMOVH,
25076 reg: regInfo{
25077 inputs: []inputInfo{
25078 {1, 1073741816},
25079 {0, 4611686019501129724},
25080 },
25081 outputs: []outputInfo{
25082 {0, 1071644664},
25083 },
25084 },
25085 },
25086 {
25087 name: "MOVHUloadidx",
25088 argLen: 3,
25089 asm: loong64.AMOVHU,
25090 reg: regInfo{
25091 inputs: []inputInfo{
25092 {1, 1073741816},
25093 {0, 4611686019501129724},
25094 },
25095 outputs: []outputInfo{
25096 {0, 1071644664},
25097 },
25098 },
25099 },
25100 {
25101 name: "MOVBloadidx",
25102 argLen: 3,
25103 asm: loong64.AMOVB,
25104 reg: regInfo{
25105 inputs: []inputInfo{
25106 {1, 1073741816},
25107 {0, 4611686019501129724},
25108 },
25109 outputs: []outputInfo{
25110 {0, 1071644664},
25111 },
25112 },
25113 },
25114 {
25115 name: "MOVBUloadidx",
25116 argLen: 3,
25117 asm: loong64.AMOVBU,
25118 reg: regInfo{
25119 inputs: []inputInfo{
25120 {1, 1073741816},
25121 {0, 4611686019501129724},
25122 },
25123 outputs: []outputInfo{
25124 {0, 1071644664},
25125 },
25126 },
25127 },
25128 {
25129 name: "MOVFloadidx",
25130 argLen: 3,
25131 asm: loong64.AMOVF,
25132 reg: regInfo{
25133 inputs: []inputInfo{
25134 {1, 1073741816},
25135 {0, 4611686019501129724},
25136 },
25137 outputs: []outputInfo{
25138 {0, 4611686017353646080},
25139 },
25140 },
25141 },
25142 {
25143 name: "MOVDloadidx",
25144 argLen: 3,
25145 asm: loong64.AMOVD,
25146 reg: regInfo{
25147 inputs: []inputInfo{
25148 {1, 1073741816},
25149 {0, 4611686019501129724},
25150 },
25151 outputs: []outputInfo{
25152 {0, 4611686017353646080},
25153 },
25154 },
25155 },
25156 {
25157 name: "MOVBstore",
25158 auxType: auxSymOff,
25159 argLen: 3,
25160 faultOnNilArg0: true,
25161 symEffect: SymWrite,
25162 asm: loong64.AMOVB,
25163 reg: regInfo{
25164 inputs: []inputInfo{
25165 {1, 1073741816},
25166 {0, 4611686019501129724},
25167 },
25168 },
25169 },
25170 {
25171 name: "MOVHstore",
25172 auxType: auxSymOff,
25173 argLen: 3,
25174 faultOnNilArg0: true,
25175 symEffect: SymWrite,
25176 asm: loong64.AMOVH,
25177 reg: regInfo{
25178 inputs: []inputInfo{
25179 {1, 1073741816},
25180 {0, 4611686019501129724},
25181 },
25182 },
25183 },
25184 {
25185 name: "MOVWstore",
25186 auxType: auxSymOff,
25187 argLen: 3,
25188 faultOnNilArg0: true,
25189 symEffect: SymWrite,
25190 asm: loong64.AMOVW,
25191 reg: regInfo{
25192 inputs: []inputInfo{
25193 {1, 1073741816},
25194 {0, 4611686019501129724},
25195 },
25196 },
25197 },
25198 {
25199 name: "MOVVstore",
25200 auxType: auxSymOff,
25201 argLen: 3,
25202 faultOnNilArg0: true,
25203 symEffect: SymWrite,
25204 asm: loong64.AMOVV,
25205 reg: regInfo{
25206 inputs: []inputInfo{
25207 {1, 1073741816},
25208 {0, 4611686019501129724},
25209 },
25210 },
25211 },
25212 {
25213 name: "MOVFstore",
25214 auxType: auxSymOff,
25215 argLen: 3,
25216 faultOnNilArg0: true,
25217 symEffect: SymWrite,
25218 asm: loong64.AMOVF,
25219 reg: regInfo{
25220 inputs: []inputInfo{
25221 {0, 4611686019501129724},
25222 {1, 4611686017353646080},
25223 },
25224 },
25225 },
25226 {
25227 name: "MOVDstore",
25228 auxType: auxSymOff,
25229 argLen: 3,
25230 faultOnNilArg0: true,
25231 symEffect: SymWrite,
25232 asm: loong64.AMOVD,
25233 reg: regInfo{
25234 inputs: []inputInfo{
25235 {0, 4611686019501129724},
25236 {1, 4611686017353646080},
25237 },
25238 },
25239 },
25240 {
25241 name: "MOVBstoreidx",
25242 argLen: 4,
25243 asm: loong64.AMOVB,
25244 reg: regInfo{
25245 inputs: []inputInfo{
25246 {1, 1073741816},
25247 {2, 1073741816},
25248 {0, 4611686019501129724},
25249 },
25250 },
25251 },
25252 {
25253 name: "MOVHstoreidx",
25254 argLen: 4,
25255 asm: loong64.AMOVH,
25256 reg: regInfo{
25257 inputs: []inputInfo{
25258 {1, 1073741816},
25259 {2, 1073741816},
25260 {0, 4611686019501129724},
25261 },
25262 },
25263 },
25264 {
25265 name: "MOVWstoreidx",
25266 argLen: 4,
25267 asm: loong64.AMOVW,
25268 reg: regInfo{
25269 inputs: []inputInfo{
25270 {1, 1073741816},
25271 {2, 1073741816},
25272 {0, 4611686019501129724},
25273 },
25274 },
25275 },
25276 {
25277 name: "MOVVstoreidx",
25278 argLen: 4,
25279 asm: loong64.AMOVV,
25280 reg: regInfo{
25281 inputs: []inputInfo{
25282 {1, 1073741816},
25283 {2, 1073741816},
25284 {0, 4611686019501129724},
25285 },
25286 },
25287 },
25288 {
25289 name: "MOVFstoreidx",
25290 argLen: 4,
25291 asm: loong64.AMOVF,
25292 reg: regInfo{
25293 inputs: []inputInfo{
25294 {1, 1073741816},
25295 {0, 4611686019501129724},
25296 {2, 4611686017353646080},
25297 },
25298 },
25299 },
25300 {
25301 name: "MOVDstoreidx",
25302 argLen: 4,
25303 asm: loong64.AMOVD,
25304 reg: regInfo{
25305 inputs: []inputInfo{
25306 {1, 1073741816},
25307 {0, 4611686019501129724},
25308 {2, 4611686017353646080},
25309 },
25310 },
25311 },
25312 {
25313 name: "MOVBstorezero",
25314 auxType: auxSymOff,
25315 argLen: 2,
25316 faultOnNilArg0: true,
25317 symEffect: SymWrite,
25318 asm: loong64.AMOVB,
25319 reg: regInfo{
25320 inputs: []inputInfo{
25321 {0, 4611686019501129724},
25322 },
25323 },
25324 },
25325 {
25326 name: "MOVHstorezero",
25327 auxType: auxSymOff,
25328 argLen: 2,
25329 faultOnNilArg0: true,
25330 symEffect: SymWrite,
25331 asm: loong64.AMOVH,
25332 reg: regInfo{
25333 inputs: []inputInfo{
25334 {0, 4611686019501129724},
25335 },
25336 },
25337 },
25338 {
25339 name: "MOVWstorezero",
25340 auxType: auxSymOff,
25341 argLen: 2,
25342 faultOnNilArg0: true,
25343 symEffect: SymWrite,
25344 asm: loong64.AMOVW,
25345 reg: regInfo{
25346 inputs: []inputInfo{
25347 {0, 4611686019501129724},
25348 },
25349 },
25350 },
25351 {
25352 name: "MOVVstorezero",
25353 auxType: auxSymOff,
25354 argLen: 2,
25355 faultOnNilArg0: true,
25356 symEffect: SymWrite,
25357 asm: loong64.AMOVV,
25358 reg: regInfo{
25359 inputs: []inputInfo{
25360 {0, 4611686019501129724},
25361 },
25362 },
25363 },
25364 {
25365 name: "MOVBstorezeroidx",
25366 argLen: 3,
25367 asm: loong64.AMOVB,
25368 reg: regInfo{
25369 inputs: []inputInfo{
25370 {1, 1073741816},
25371 {0, 4611686019501129724},
25372 },
25373 },
25374 },
25375 {
25376 name: "MOVHstorezeroidx",
25377 argLen: 3,
25378 asm: loong64.AMOVH,
25379 reg: regInfo{
25380 inputs: []inputInfo{
25381 {1, 1073741816},
25382 {0, 4611686019501129724},
25383 },
25384 },
25385 },
25386 {
25387 name: "MOVWstorezeroidx",
25388 argLen: 3,
25389 asm: loong64.AMOVW,
25390 reg: regInfo{
25391 inputs: []inputInfo{
25392 {1, 1073741816},
25393 {0, 4611686019501129724},
25394 },
25395 },
25396 },
25397 {
25398 name: "MOVVstorezeroidx",
25399 argLen: 3,
25400 asm: loong64.AMOVV,
25401 reg: regInfo{
25402 inputs: []inputInfo{
25403 {1, 1073741816},
25404 {0, 4611686019501129724},
25405 },
25406 },
25407 },
25408 {
25409 name: "MOVWfpgp",
25410 argLen: 1,
25411 asm: loong64.AMOVW,
25412 reg: regInfo{
25413 inputs: []inputInfo{
25414 {0, 4611686017353646080},
25415 },
25416 outputs: []outputInfo{
25417 {0, 1071644664},
25418 },
25419 },
25420 },
25421 {
25422 name: "MOVWgpfp",
25423 argLen: 1,
25424 asm: loong64.AMOVW,
25425 reg: regInfo{
25426 inputs: []inputInfo{
25427 {0, 1071644664},
25428 },
25429 outputs: []outputInfo{
25430 {0, 4611686017353646080},
25431 },
25432 },
25433 },
25434 {
25435 name: "MOVVfpgp",
25436 argLen: 1,
25437 asm: loong64.AMOVV,
25438 reg: regInfo{
25439 inputs: []inputInfo{
25440 {0, 4611686017353646080},
25441 },
25442 outputs: []outputInfo{
25443 {0, 1071644664},
25444 },
25445 },
25446 },
25447 {
25448 name: "MOVVgpfp",
25449 argLen: 1,
25450 asm: loong64.AMOVV,
25451 reg: regInfo{
25452 inputs: []inputInfo{
25453 {0, 1071644664},
25454 },
25455 outputs: []outputInfo{
25456 {0, 4611686017353646080},
25457 },
25458 },
25459 },
25460 {
25461 name: "MOVBreg",
25462 argLen: 1,
25463 asm: loong64.AMOVB,
25464 reg: regInfo{
25465 inputs: []inputInfo{
25466 {0, 1073741816},
25467 },
25468 outputs: []outputInfo{
25469 {0, 1071644664},
25470 },
25471 },
25472 },
25473 {
25474 name: "MOVBUreg",
25475 argLen: 1,
25476 asm: loong64.AMOVBU,
25477 reg: regInfo{
25478 inputs: []inputInfo{
25479 {0, 1073741816},
25480 },
25481 outputs: []outputInfo{
25482 {0, 1071644664},
25483 },
25484 },
25485 },
25486 {
25487 name: "MOVHreg",
25488 argLen: 1,
25489 asm: loong64.AMOVH,
25490 reg: regInfo{
25491 inputs: []inputInfo{
25492 {0, 1073741816},
25493 },
25494 outputs: []outputInfo{
25495 {0, 1071644664},
25496 },
25497 },
25498 },
25499 {
25500 name: "MOVHUreg",
25501 argLen: 1,
25502 asm: loong64.AMOVHU,
25503 reg: regInfo{
25504 inputs: []inputInfo{
25505 {0, 1073741816},
25506 },
25507 outputs: []outputInfo{
25508 {0, 1071644664},
25509 },
25510 },
25511 },
25512 {
25513 name: "MOVWreg",
25514 argLen: 1,
25515 asm: loong64.AMOVW,
25516 reg: regInfo{
25517 inputs: []inputInfo{
25518 {0, 1073741816},
25519 },
25520 outputs: []outputInfo{
25521 {0, 1071644664},
25522 },
25523 },
25524 },
25525 {
25526 name: "MOVWUreg",
25527 argLen: 1,
25528 asm: loong64.AMOVWU,
25529 reg: regInfo{
25530 inputs: []inputInfo{
25531 {0, 1073741816},
25532 },
25533 outputs: []outputInfo{
25534 {0, 1071644664},
25535 },
25536 },
25537 },
25538 {
25539 name: "MOVVreg",
25540 argLen: 1,
25541 asm: loong64.AMOVV,
25542 reg: regInfo{
25543 inputs: []inputInfo{
25544 {0, 1073741816},
25545 },
25546 outputs: []outputInfo{
25547 {0, 1071644664},
25548 },
25549 },
25550 },
25551 {
25552 name: "MOVVnop",
25553 argLen: 1,
25554 resultInArg0: true,
25555 reg: regInfo{
25556 inputs: []inputInfo{
25557 {0, 1071644664},
25558 },
25559 outputs: []outputInfo{
25560 {0, 1071644664},
25561 },
25562 },
25563 },
25564 {
25565 name: "MOVWF",
25566 argLen: 1,
25567 asm: loong64.AMOVWF,
25568 reg: regInfo{
25569 inputs: []inputInfo{
25570 {0, 4611686017353646080},
25571 },
25572 outputs: []outputInfo{
25573 {0, 4611686017353646080},
25574 },
25575 },
25576 },
25577 {
25578 name: "MOVWD",
25579 argLen: 1,
25580 asm: loong64.AMOVWD,
25581 reg: regInfo{
25582 inputs: []inputInfo{
25583 {0, 4611686017353646080},
25584 },
25585 outputs: []outputInfo{
25586 {0, 4611686017353646080},
25587 },
25588 },
25589 },
25590 {
25591 name: "MOVVF",
25592 argLen: 1,
25593 asm: loong64.AMOVVF,
25594 reg: regInfo{
25595 inputs: []inputInfo{
25596 {0, 4611686017353646080},
25597 },
25598 outputs: []outputInfo{
25599 {0, 4611686017353646080},
25600 },
25601 },
25602 },
25603 {
25604 name: "MOVVD",
25605 argLen: 1,
25606 asm: loong64.AMOVVD,
25607 reg: regInfo{
25608 inputs: []inputInfo{
25609 {0, 4611686017353646080},
25610 },
25611 outputs: []outputInfo{
25612 {0, 4611686017353646080},
25613 },
25614 },
25615 },
25616 {
25617 name: "TRUNCFW",
25618 argLen: 1,
25619 asm: loong64.ATRUNCFW,
25620 reg: regInfo{
25621 inputs: []inputInfo{
25622 {0, 4611686017353646080},
25623 },
25624 outputs: []outputInfo{
25625 {0, 4611686017353646080},
25626 },
25627 },
25628 },
25629 {
25630 name: "TRUNCDW",
25631 argLen: 1,
25632 asm: loong64.ATRUNCDW,
25633 reg: regInfo{
25634 inputs: []inputInfo{
25635 {0, 4611686017353646080},
25636 },
25637 outputs: []outputInfo{
25638 {0, 4611686017353646080},
25639 },
25640 },
25641 },
25642 {
25643 name: "TRUNCFV",
25644 argLen: 1,
25645 asm: loong64.ATRUNCFV,
25646 reg: regInfo{
25647 inputs: []inputInfo{
25648 {0, 4611686017353646080},
25649 },
25650 outputs: []outputInfo{
25651 {0, 4611686017353646080},
25652 },
25653 },
25654 },
25655 {
25656 name: "TRUNCDV",
25657 argLen: 1,
25658 asm: loong64.ATRUNCDV,
25659 reg: regInfo{
25660 inputs: []inputInfo{
25661 {0, 4611686017353646080},
25662 },
25663 outputs: []outputInfo{
25664 {0, 4611686017353646080},
25665 },
25666 },
25667 },
25668 {
25669 name: "MOVFD",
25670 argLen: 1,
25671 asm: loong64.AMOVFD,
25672 reg: regInfo{
25673 inputs: []inputInfo{
25674 {0, 4611686017353646080},
25675 },
25676 outputs: []outputInfo{
25677 {0, 4611686017353646080},
25678 },
25679 },
25680 },
25681 {
25682 name: "MOVDF",
25683 argLen: 1,
25684 asm: loong64.AMOVDF,
25685 reg: regInfo{
25686 inputs: []inputInfo{
25687 {0, 4611686017353646080},
25688 },
25689 outputs: []outputInfo{
25690 {0, 4611686017353646080},
25691 },
25692 },
25693 },
25694 {
25695 name: "LoweredRound32F",
25696 argLen: 1,
25697 resultInArg0: true,
25698 reg: regInfo{
25699 inputs: []inputInfo{
25700 {0, 4611686017353646080},
25701 },
25702 outputs: []outputInfo{
25703 {0, 4611686017353646080},
25704 },
25705 },
25706 },
25707 {
25708 name: "LoweredRound64F",
25709 argLen: 1,
25710 resultInArg0: true,
25711 reg: regInfo{
25712 inputs: []inputInfo{
25713 {0, 4611686017353646080},
25714 },
25715 outputs: []outputInfo{
25716 {0, 4611686017353646080},
25717 },
25718 },
25719 },
25720 {
25721 name: "CALLstatic",
25722 auxType: auxCallOff,
25723 argLen: -1,
25724 clobberFlags: true,
25725 call: true,
25726 reg: regInfo{
25727 clobbers: 4611686018427387896,
25728 },
25729 },
25730 {
25731 name: "CALLtail",
25732 auxType: auxCallOff,
25733 argLen: -1,
25734 clobberFlags: true,
25735 call: true,
25736 tailCall: true,
25737 reg: regInfo{
25738 clobbers: 4611686018427387896,
25739 },
25740 },
25741 {
25742 name: "CALLclosure",
25743 auxType: auxCallOff,
25744 argLen: -1,
25745 clobberFlags: true,
25746 call: true,
25747 reg: regInfo{
25748 inputs: []inputInfo{
25749 {1, 268435456},
25750 {0, 1071644668},
25751 },
25752 clobbers: 4611686018427387896,
25753 },
25754 },
25755 {
25756 name: "CALLinter",
25757 auxType: auxCallOff,
25758 argLen: -1,
25759 clobberFlags: true,
25760 call: true,
25761 reg: regInfo{
25762 inputs: []inputInfo{
25763 {0, 1071644664},
25764 },
25765 clobbers: 4611686018427387896,
25766 },
25767 },
25768 {
25769 name: "DUFFZERO",
25770 auxType: auxInt64,
25771 argLen: 2,
25772 faultOnNilArg0: true,
25773 reg: regInfo{
25774 inputs: []inputInfo{
25775 {0, 524288},
25776 },
25777 clobbers: 524290,
25778 },
25779 },
25780 {
25781 name: "DUFFCOPY",
25782 auxType: auxInt64,
25783 argLen: 3,
25784 faultOnNilArg0: true,
25785 faultOnNilArg1: true,
25786 reg: regInfo{
25787 inputs: []inputInfo{
25788 {0, 1048576},
25789 {1, 524288},
25790 },
25791 clobbers: 1572866,
25792 },
25793 },
25794 {
25795 name: "LoweredZero",
25796 auxType: auxInt64,
25797 argLen: 3,
25798 faultOnNilArg0: true,
25799 reg: regInfo{
25800 inputs: []inputInfo{
25801 {0, 524288},
25802 {1, 1071644664},
25803 },
25804 clobbers: 524288,
25805 },
25806 },
25807 {
25808 name: "LoweredMove",
25809 auxType: auxInt64,
25810 argLen: 4,
25811 faultOnNilArg0: true,
25812 faultOnNilArg1: true,
25813 reg: regInfo{
25814 inputs: []inputInfo{
25815 {0, 1048576},
25816 {1, 524288},
25817 {2, 1071644664},
25818 },
25819 clobbers: 1572864,
25820 },
25821 },
25822 {
25823 name: "LoweredAtomicLoad8",
25824 argLen: 2,
25825 faultOnNilArg0: true,
25826 reg: regInfo{
25827 inputs: []inputInfo{
25828 {0, 4611686019501129724},
25829 },
25830 outputs: []outputInfo{
25831 {0, 1071644664},
25832 },
25833 },
25834 },
25835 {
25836 name: "LoweredAtomicLoad32",
25837 argLen: 2,
25838 faultOnNilArg0: true,
25839 reg: regInfo{
25840 inputs: []inputInfo{
25841 {0, 4611686019501129724},
25842 },
25843 outputs: []outputInfo{
25844 {0, 1071644664},
25845 },
25846 },
25847 },
25848 {
25849 name: "LoweredAtomicLoad64",
25850 argLen: 2,
25851 faultOnNilArg0: true,
25852 reg: regInfo{
25853 inputs: []inputInfo{
25854 {0, 4611686019501129724},
25855 },
25856 outputs: []outputInfo{
25857 {0, 1071644664},
25858 },
25859 },
25860 },
25861 {
25862 name: "LoweredAtomicStore8",
25863 argLen: 3,
25864 faultOnNilArg0: true,
25865 hasSideEffects: true,
25866 reg: regInfo{
25867 inputs: []inputInfo{
25868 {1, 1073741816},
25869 {0, 4611686019501129724},
25870 },
25871 },
25872 },
25873 {
25874 name: "LoweredAtomicStore32",
25875 argLen: 3,
25876 faultOnNilArg0: true,
25877 hasSideEffects: true,
25878 reg: regInfo{
25879 inputs: []inputInfo{
25880 {1, 1073741816},
25881 {0, 4611686019501129724},
25882 },
25883 },
25884 },
25885 {
25886 name: "LoweredAtomicStore64",
25887 argLen: 3,
25888 faultOnNilArg0: true,
25889 hasSideEffects: true,
25890 reg: regInfo{
25891 inputs: []inputInfo{
25892 {1, 1073741816},
25893 {0, 4611686019501129724},
25894 },
25895 },
25896 },
25897 {
25898 name: "LoweredAtomicStore8Variant",
25899 argLen: 3,
25900 faultOnNilArg0: true,
25901 hasSideEffects: true,
25902 reg: regInfo{
25903 inputs: []inputInfo{
25904 {1, 1073741816},
25905 {0, 4611686019501129724},
25906 },
25907 },
25908 },
25909 {
25910 name: "LoweredAtomicStore32Variant",
25911 argLen: 3,
25912 faultOnNilArg0: true,
25913 hasSideEffects: true,
25914 reg: regInfo{
25915 inputs: []inputInfo{
25916 {1, 1073741816},
25917 {0, 4611686019501129724},
25918 },
25919 },
25920 },
25921 {
25922 name: "LoweredAtomicStore64Variant",
25923 argLen: 3,
25924 faultOnNilArg0: true,
25925 hasSideEffects: true,
25926 reg: regInfo{
25927 inputs: []inputInfo{
25928 {1, 1073741816},
25929 {0, 4611686019501129724},
25930 },
25931 },
25932 },
25933 {
25934 name: "LoweredAtomicExchange32",
25935 argLen: 3,
25936 resultNotInArgs: true,
25937 faultOnNilArg0: true,
25938 hasSideEffects: true,
25939 reg: regInfo{
25940 inputs: []inputInfo{
25941 {1, 1073741816},
25942 {0, 4611686019501129724},
25943 },
25944 outputs: []outputInfo{
25945 {0, 1071644664},
25946 },
25947 },
25948 },
25949 {
25950 name: "LoweredAtomicExchange64",
25951 argLen: 3,
25952 resultNotInArgs: true,
25953 faultOnNilArg0: true,
25954 hasSideEffects: true,
25955 reg: regInfo{
25956 inputs: []inputInfo{
25957 {1, 1073741816},
25958 {0, 4611686019501129724},
25959 },
25960 outputs: []outputInfo{
25961 {0, 1071644664},
25962 },
25963 },
25964 },
25965 {
25966 name: "LoweredAtomicExchange8Variant",
25967 argLen: 3,
25968 resultNotInArgs: true,
25969 faultOnNilArg0: true,
25970 hasSideEffects: true,
25971 reg: regInfo{
25972 inputs: []inputInfo{
25973 {1, 1073741816},
25974 {0, 4611686019501129724},
25975 },
25976 outputs: []outputInfo{
25977 {0, 1071644664},
25978 },
25979 },
25980 },
25981 {
25982 name: "LoweredAtomicAdd32",
25983 argLen: 3,
25984 resultNotInArgs: true,
25985 faultOnNilArg0: true,
25986 hasSideEffects: true,
25987 reg: regInfo{
25988 inputs: []inputInfo{
25989 {1, 1073741816},
25990 {0, 4611686019501129724},
25991 },
25992 outputs: []outputInfo{
25993 {0, 1071644664},
25994 },
25995 },
25996 },
25997 {
25998 name: "LoweredAtomicAdd64",
25999 argLen: 3,
26000 resultNotInArgs: true,
26001 faultOnNilArg0: true,
26002 hasSideEffects: true,
26003 reg: regInfo{
26004 inputs: []inputInfo{
26005 {1, 1073741816},
26006 {0, 4611686019501129724},
26007 },
26008 outputs: []outputInfo{
26009 {0, 1071644664},
26010 },
26011 },
26012 },
26013 {
26014 name: "LoweredAtomicCas32",
26015 argLen: 4,
26016 resultNotInArgs: true,
26017 faultOnNilArg0: true,
26018 hasSideEffects: true,
26019 unsafePoint: true,
26020 reg: regInfo{
26021 inputs: []inputInfo{
26022 {1, 1073741816},
26023 {2, 1073741816},
26024 {0, 4611686019501129724},
26025 },
26026 outputs: []outputInfo{
26027 {0, 1071644664},
26028 },
26029 },
26030 },
26031 {
26032 name: "LoweredAtomicCas64",
26033 argLen: 4,
26034 resultNotInArgs: true,
26035 faultOnNilArg0: true,
26036 hasSideEffects: true,
26037 unsafePoint: true,
26038 reg: regInfo{
26039 inputs: []inputInfo{
26040 {1, 1073741816},
26041 {2, 1073741816},
26042 {0, 4611686019501129724},
26043 },
26044 outputs: []outputInfo{
26045 {0, 1071644664},
26046 },
26047 },
26048 },
26049 {
26050 name: "LoweredAtomicCas64Variant",
26051 argLen: 4,
26052 resultNotInArgs: true,
26053 faultOnNilArg0: true,
26054 hasSideEffects: true,
26055 unsafePoint: true,
26056 reg: regInfo{
26057 inputs: []inputInfo{
26058 {1, 1073741816},
26059 {2, 1073741816},
26060 {0, 4611686019501129724},
26061 },
26062 outputs: []outputInfo{
26063 {0, 1071644664},
26064 },
26065 },
26066 },
26067 {
26068 name: "LoweredAtomicCas32Variant",
26069 argLen: 4,
26070 resultNotInArgs: true,
26071 faultOnNilArg0: true,
26072 hasSideEffects: true,
26073 unsafePoint: true,
26074 reg: regInfo{
26075 inputs: []inputInfo{
26076 {1, 1073741816},
26077 {2, 1073741816},
26078 {0, 4611686019501129724},
26079 },
26080 outputs: []outputInfo{
26081 {0, 1071644664},
26082 },
26083 },
26084 },
26085 {
26086 name: "LoweredAtomicAnd32",
26087 argLen: 3,
26088 resultNotInArgs: true,
26089 faultOnNilArg0: true,
26090 hasSideEffects: true,
26091 asm: loong64.AAMANDDBW,
26092 reg: regInfo{
26093 inputs: []inputInfo{
26094 {1, 1073741816},
26095 {0, 4611686019501129724},
26096 },
26097 outputs: []outputInfo{
26098 {0, 1071644664},
26099 },
26100 },
26101 },
26102 {
26103 name: "LoweredAtomicOr32",
26104 argLen: 3,
26105 resultNotInArgs: true,
26106 faultOnNilArg0: true,
26107 hasSideEffects: true,
26108 asm: loong64.AAMORDBW,
26109 reg: regInfo{
26110 inputs: []inputInfo{
26111 {1, 1073741816},
26112 {0, 4611686019501129724},
26113 },
26114 outputs: []outputInfo{
26115 {0, 1071644664},
26116 },
26117 },
26118 },
26119 {
26120 name: "LoweredAtomicAnd32value",
26121 argLen: 3,
26122 resultNotInArgs: true,
26123 faultOnNilArg0: true,
26124 hasSideEffects: true,
26125 asm: loong64.AAMANDDBW,
26126 reg: regInfo{
26127 inputs: []inputInfo{
26128 {1, 1073741816},
26129 {0, 4611686019501129724},
26130 },
26131 outputs: []outputInfo{
26132 {0, 1071644664},
26133 },
26134 },
26135 },
26136 {
26137 name: "LoweredAtomicAnd64value",
26138 argLen: 3,
26139 resultNotInArgs: true,
26140 faultOnNilArg0: true,
26141 hasSideEffects: true,
26142 asm: loong64.AAMANDDBV,
26143 reg: regInfo{
26144 inputs: []inputInfo{
26145 {1, 1073741816},
26146 {0, 4611686019501129724},
26147 },
26148 outputs: []outputInfo{
26149 {0, 1071644664},
26150 },
26151 },
26152 },
26153 {
26154 name: "LoweredAtomicOr32value",
26155 argLen: 3,
26156 resultNotInArgs: true,
26157 faultOnNilArg0: true,
26158 hasSideEffects: true,
26159 asm: loong64.AAMORDBW,
26160 reg: regInfo{
26161 inputs: []inputInfo{
26162 {1, 1073741816},
26163 {0, 4611686019501129724},
26164 },
26165 outputs: []outputInfo{
26166 {0, 1071644664},
26167 },
26168 },
26169 },
26170 {
26171 name: "LoweredAtomicOr64value",
26172 argLen: 3,
26173 resultNotInArgs: true,
26174 faultOnNilArg0: true,
26175 hasSideEffects: true,
26176 asm: loong64.AAMORDBV,
26177 reg: regInfo{
26178 inputs: []inputInfo{
26179 {1, 1073741816},
26180 {0, 4611686019501129724},
26181 },
26182 outputs: []outputInfo{
26183 {0, 1071644664},
26184 },
26185 },
26186 },
26187 {
26188 name: "LoweredNilCheck",
26189 argLen: 2,
26190 nilCheck: true,
26191 faultOnNilArg0: true,
26192 reg: regInfo{
26193 inputs: []inputInfo{
26194 {0, 1073741816},
26195 },
26196 },
26197 },
26198 {
26199 name: "FPFlagTrue",
26200 argLen: 1,
26201 reg: regInfo{
26202 outputs: []outputInfo{
26203 {0, 1071644664},
26204 },
26205 },
26206 },
26207 {
26208 name: "FPFlagFalse",
26209 argLen: 1,
26210 reg: regInfo{
26211 outputs: []outputInfo{
26212 {0, 1071644664},
26213 },
26214 },
26215 },
26216 {
26217 name: "LoweredGetClosurePtr",
26218 argLen: 0,
26219 zeroWidth: true,
26220 reg: regInfo{
26221 outputs: []outputInfo{
26222 {0, 268435456},
26223 },
26224 },
26225 },
26226 {
26227 name: "LoweredGetCallerSP",
26228 argLen: 1,
26229 rematerializeable: true,
26230 reg: regInfo{
26231 outputs: []outputInfo{
26232 {0, 1071644664},
26233 },
26234 },
26235 },
26236 {
26237 name: "LoweredGetCallerPC",
26238 argLen: 0,
26239 rematerializeable: true,
26240 reg: regInfo{
26241 outputs: []outputInfo{
26242 {0, 1071644664},
26243 },
26244 },
26245 },
26246 {
26247 name: "LoweredWB",
26248 auxType: auxInt64,
26249 argLen: 1,
26250 clobberFlags: true,
26251 reg: regInfo{
26252 clobbers: 4611686017353646082,
26253 outputs: []outputInfo{
26254 {0, 268435456},
26255 },
26256 },
26257 },
26258 {
26259 name: "LoweredPubBarrier",
26260 argLen: 1,
26261 hasSideEffects: true,
26262 asm: loong64.ADBAR,
26263 reg: regInfo{},
26264 },
26265 {
26266 name: "LoweredPanicBoundsA",
26267 auxType: auxInt64,
26268 argLen: 3,
26269 call: true,
26270 reg: regInfo{
26271 inputs: []inputInfo{
26272 {0, 4194304},
26273 {1, 8388608},
26274 },
26275 },
26276 },
26277 {
26278 name: "LoweredPanicBoundsB",
26279 auxType: auxInt64,
26280 argLen: 3,
26281 call: true,
26282 reg: regInfo{
26283 inputs: []inputInfo{
26284 {0, 1048576},
26285 {1, 4194304},
26286 },
26287 },
26288 },
26289 {
26290 name: "LoweredPanicBoundsC",
26291 auxType: auxInt64,
26292 argLen: 3,
26293 call: true,
26294 reg: regInfo{
26295 inputs: []inputInfo{
26296 {0, 524288},
26297 {1, 1048576},
26298 },
26299 },
26300 },
26301
26302 {
26303 name: "ADD",
26304 argLen: 2,
26305 commutative: true,
26306 asm: mips.AADDU,
26307 reg: regInfo{
26308 inputs: []inputInfo{
26309 {0, 469762046},
26310 {1, 469762046},
26311 },
26312 outputs: []outputInfo{
26313 {0, 335544318},
26314 },
26315 },
26316 },
26317 {
26318 name: "ADDconst",
26319 auxType: auxInt32,
26320 argLen: 1,
26321 asm: mips.AADDU,
26322 reg: regInfo{
26323 inputs: []inputInfo{
26324 {0, 536870910},
26325 },
26326 outputs: []outputInfo{
26327 {0, 335544318},
26328 },
26329 },
26330 },
26331 {
26332 name: "SUB",
26333 argLen: 2,
26334 asm: mips.ASUBU,
26335 reg: regInfo{
26336 inputs: []inputInfo{
26337 {0, 469762046},
26338 {1, 469762046},
26339 },
26340 outputs: []outputInfo{
26341 {0, 335544318},
26342 },
26343 },
26344 },
26345 {
26346 name: "SUBconst",
26347 auxType: auxInt32,
26348 argLen: 1,
26349 asm: mips.ASUBU,
26350 reg: regInfo{
26351 inputs: []inputInfo{
26352 {0, 469762046},
26353 },
26354 outputs: []outputInfo{
26355 {0, 335544318},
26356 },
26357 },
26358 },
26359 {
26360 name: "MUL",
26361 argLen: 2,
26362 commutative: true,
26363 asm: mips.AMUL,
26364 reg: regInfo{
26365 inputs: []inputInfo{
26366 {0, 469762046},
26367 {1, 469762046},
26368 },
26369 clobbers: 105553116266496,
26370 outputs: []outputInfo{
26371 {0, 335544318},
26372 },
26373 },
26374 },
26375 {
26376 name: "MULT",
26377 argLen: 2,
26378 commutative: true,
26379 asm: mips.AMUL,
26380 reg: regInfo{
26381 inputs: []inputInfo{
26382 {0, 469762046},
26383 {1, 469762046},
26384 },
26385 outputs: []outputInfo{
26386 {0, 35184372088832},
26387 {1, 70368744177664},
26388 },
26389 },
26390 },
26391 {
26392 name: "MULTU",
26393 argLen: 2,
26394 commutative: true,
26395 asm: mips.AMULU,
26396 reg: regInfo{
26397 inputs: []inputInfo{
26398 {0, 469762046},
26399 {1, 469762046},
26400 },
26401 outputs: []outputInfo{
26402 {0, 35184372088832},
26403 {1, 70368744177664},
26404 },
26405 },
26406 },
26407 {
26408 name: "DIV",
26409 argLen: 2,
26410 asm: mips.ADIV,
26411 reg: regInfo{
26412 inputs: []inputInfo{
26413 {0, 469762046},
26414 {1, 469762046},
26415 },
26416 outputs: []outputInfo{
26417 {0, 35184372088832},
26418 {1, 70368744177664},
26419 },
26420 },
26421 },
26422 {
26423 name: "DIVU",
26424 argLen: 2,
26425 asm: mips.ADIVU,
26426 reg: regInfo{
26427 inputs: []inputInfo{
26428 {0, 469762046},
26429 {1, 469762046},
26430 },
26431 outputs: []outputInfo{
26432 {0, 35184372088832},
26433 {1, 70368744177664},
26434 },
26435 },
26436 },
26437 {
26438 name: "ADDF",
26439 argLen: 2,
26440 commutative: true,
26441 asm: mips.AADDF,
26442 reg: regInfo{
26443 inputs: []inputInfo{
26444 {0, 35183835217920},
26445 {1, 35183835217920},
26446 },
26447 outputs: []outputInfo{
26448 {0, 35183835217920},
26449 },
26450 },
26451 },
26452 {
26453 name: "ADDD",
26454 argLen: 2,
26455 commutative: true,
26456 asm: mips.AADDD,
26457 reg: regInfo{
26458 inputs: []inputInfo{
26459 {0, 35183835217920},
26460 {1, 35183835217920},
26461 },
26462 outputs: []outputInfo{
26463 {0, 35183835217920},
26464 },
26465 },
26466 },
26467 {
26468 name: "SUBF",
26469 argLen: 2,
26470 asm: mips.ASUBF,
26471 reg: regInfo{
26472 inputs: []inputInfo{
26473 {0, 35183835217920},
26474 {1, 35183835217920},
26475 },
26476 outputs: []outputInfo{
26477 {0, 35183835217920},
26478 },
26479 },
26480 },
26481 {
26482 name: "SUBD",
26483 argLen: 2,
26484 asm: mips.ASUBD,
26485 reg: regInfo{
26486 inputs: []inputInfo{
26487 {0, 35183835217920},
26488 {1, 35183835217920},
26489 },
26490 outputs: []outputInfo{
26491 {0, 35183835217920},
26492 },
26493 },
26494 },
26495 {
26496 name: "MULF",
26497 argLen: 2,
26498 commutative: true,
26499 asm: mips.AMULF,
26500 reg: regInfo{
26501 inputs: []inputInfo{
26502 {0, 35183835217920},
26503 {1, 35183835217920},
26504 },
26505 outputs: []outputInfo{
26506 {0, 35183835217920},
26507 },
26508 },
26509 },
26510 {
26511 name: "MULD",
26512 argLen: 2,
26513 commutative: true,
26514 asm: mips.AMULD,
26515 reg: regInfo{
26516 inputs: []inputInfo{
26517 {0, 35183835217920},
26518 {1, 35183835217920},
26519 },
26520 outputs: []outputInfo{
26521 {0, 35183835217920},
26522 },
26523 },
26524 },
26525 {
26526 name: "DIVF",
26527 argLen: 2,
26528 asm: mips.ADIVF,
26529 reg: regInfo{
26530 inputs: []inputInfo{
26531 {0, 35183835217920},
26532 {1, 35183835217920},
26533 },
26534 outputs: []outputInfo{
26535 {0, 35183835217920},
26536 },
26537 },
26538 },
26539 {
26540 name: "DIVD",
26541 argLen: 2,
26542 asm: mips.ADIVD,
26543 reg: regInfo{
26544 inputs: []inputInfo{
26545 {0, 35183835217920},
26546 {1, 35183835217920},
26547 },
26548 outputs: []outputInfo{
26549 {0, 35183835217920},
26550 },
26551 },
26552 },
26553 {
26554 name: "AND",
26555 argLen: 2,
26556 commutative: true,
26557 asm: mips.AAND,
26558 reg: regInfo{
26559 inputs: []inputInfo{
26560 {0, 469762046},
26561 {1, 469762046},
26562 },
26563 outputs: []outputInfo{
26564 {0, 335544318},
26565 },
26566 },
26567 },
26568 {
26569 name: "ANDconst",
26570 auxType: auxInt32,
26571 argLen: 1,
26572 asm: mips.AAND,
26573 reg: regInfo{
26574 inputs: []inputInfo{
26575 {0, 469762046},
26576 },
26577 outputs: []outputInfo{
26578 {0, 335544318},
26579 },
26580 },
26581 },
26582 {
26583 name: "OR",
26584 argLen: 2,
26585 commutative: true,
26586 asm: mips.AOR,
26587 reg: regInfo{
26588 inputs: []inputInfo{
26589 {0, 469762046},
26590 {1, 469762046},
26591 },
26592 outputs: []outputInfo{
26593 {0, 335544318},
26594 },
26595 },
26596 },
26597 {
26598 name: "ORconst",
26599 auxType: auxInt32,
26600 argLen: 1,
26601 asm: mips.AOR,
26602 reg: regInfo{
26603 inputs: []inputInfo{
26604 {0, 469762046},
26605 },
26606 outputs: []outputInfo{
26607 {0, 335544318},
26608 },
26609 },
26610 },
26611 {
26612 name: "XOR",
26613 argLen: 2,
26614 commutative: true,
26615 asm: mips.AXOR,
26616 reg: regInfo{
26617 inputs: []inputInfo{
26618 {0, 469762046},
26619 {1, 469762046},
26620 },
26621 outputs: []outputInfo{
26622 {0, 335544318},
26623 },
26624 },
26625 },
26626 {
26627 name: "XORconst",
26628 auxType: auxInt32,
26629 argLen: 1,
26630 asm: mips.AXOR,
26631 reg: regInfo{
26632 inputs: []inputInfo{
26633 {0, 469762046},
26634 },
26635 outputs: []outputInfo{
26636 {0, 335544318},
26637 },
26638 },
26639 },
26640 {
26641 name: "NOR",
26642 argLen: 2,
26643 commutative: true,
26644 asm: mips.ANOR,
26645 reg: regInfo{
26646 inputs: []inputInfo{
26647 {0, 469762046},
26648 {1, 469762046},
26649 },
26650 outputs: []outputInfo{
26651 {0, 335544318},
26652 },
26653 },
26654 },
26655 {
26656 name: "NORconst",
26657 auxType: auxInt32,
26658 argLen: 1,
26659 asm: mips.ANOR,
26660 reg: regInfo{
26661 inputs: []inputInfo{
26662 {0, 469762046},
26663 },
26664 outputs: []outputInfo{
26665 {0, 335544318},
26666 },
26667 },
26668 },
26669 {
26670 name: "NEG",
26671 argLen: 1,
26672 reg: regInfo{
26673 inputs: []inputInfo{
26674 {0, 469762046},
26675 },
26676 outputs: []outputInfo{
26677 {0, 335544318},
26678 },
26679 },
26680 },
26681 {
26682 name: "NEGF",
26683 argLen: 1,
26684 asm: mips.ANEGF,
26685 reg: regInfo{
26686 inputs: []inputInfo{
26687 {0, 35183835217920},
26688 },
26689 outputs: []outputInfo{
26690 {0, 35183835217920},
26691 },
26692 },
26693 },
26694 {
26695 name: "NEGD",
26696 argLen: 1,
26697 asm: mips.ANEGD,
26698 reg: regInfo{
26699 inputs: []inputInfo{
26700 {0, 35183835217920},
26701 },
26702 outputs: []outputInfo{
26703 {0, 35183835217920},
26704 },
26705 },
26706 },
26707 {
26708 name: "ABSD",
26709 argLen: 1,
26710 asm: mips.AABSD,
26711 reg: regInfo{
26712 inputs: []inputInfo{
26713 {0, 35183835217920},
26714 },
26715 outputs: []outputInfo{
26716 {0, 35183835217920},
26717 },
26718 },
26719 },
26720 {
26721 name: "SQRTD",
26722 argLen: 1,
26723 asm: mips.ASQRTD,
26724 reg: regInfo{
26725 inputs: []inputInfo{
26726 {0, 35183835217920},
26727 },
26728 outputs: []outputInfo{
26729 {0, 35183835217920},
26730 },
26731 },
26732 },
26733 {
26734 name: "SQRTF",
26735 argLen: 1,
26736 asm: mips.ASQRTF,
26737 reg: regInfo{
26738 inputs: []inputInfo{
26739 {0, 35183835217920},
26740 },
26741 outputs: []outputInfo{
26742 {0, 35183835217920},
26743 },
26744 },
26745 },
26746 {
26747 name: "SLL",
26748 argLen: 2,
26749 asm: mips.ASLL,
26750 reg: regInfo{
26751 inputs: []inputInfo{
26752 {0, 469762046},
26753 {1, 469762046},
26754 },
26755 outputs: []outputInfo{
26756 {0, 335544318},
26757 },
26758 },
26759 },
26760 {
26761 name: "SLLconst",
26762 auxType: auxInt32,
26763 argLen: 1,
26764 asm: mips.ASLL,
26765 reg: regInfo{
26766 inputs: []inputInfo{
26767 {0, 469762046},
26768 },
26769 outputs: []outputInfo{
26770 {0, 335544318},
26771 },
26772 },
26773 },
26774 {
26775 name: "SRL",
26776 argLen: 2,
26777 asm: mips.ASRL,
26778 reg: regInfo{
26779 inputs: []inputInfo{
26780 {0, 469762046},
26781 {1, 469762046},
26782 },
26783 outputs: []outputInfo{
26784 {0, 335544318},
26785 },
26786 },
26787 },
26788 {
26789 name: "SRLconst",
26790 auxType: auxInt32,
26791 argLen: 1,
26792 asm: mips.ASRL,
26793 reg: regInfo{
26794 inputs: []inputInfo{
26795 {0, 469762046},
26796 },
26797 outputs: []outputInfo{
26798 {0, 335544318},
26799 },
26800 },
26801 },
26802 {
26803 name: "SRA",
26804 argLen: 2,
26805 asm: mips.ASRA,
26806 reg: regInfo{
26807 inputs: []inputInfo{
26808 {0, 469762046},
26809 {1, 469762046},
26810 },
26811 outputs: []outputInfo{
26812 {0, 335544318},
26813 },
26814 },
26815 },
26816 {
26817 name: "SRAconst",
26818 auxType: auxInt32,
26819 argLen: 1,
26820 asm: mips.ASRA,
26821 reg: regInfo{
26822 inputs: []inputInfo{
26823 {0, 469762046},
26824 },
26825 outputs: []outputInfo{
26826 {0, 335544318},
26827 },
26828 },
26829 },
26830 {
26831 name: "CLZ",
26832 argLen: 1,
26833 asm: mips.ACLZ,
26834 reg: regInfo{
26835 inputs: []inputInfo{
26836 {0, 469762046},
26837 },
26838 outputs: []outputInfo{
26839 {0, 335544318},
26840 },
26841 },
26842 },
26843 {
26844 name: "SGT",
26845 argLen: 2,
26846 asm: mips.ASGT,
26847 reg: regInfo{
26848 inputs: []inputInfo{
26849 {0, 469762046},
26850 {1, 469762046},
26851 },
26852 outputs: []outputInfo{
26853 {0, 335544318},
26854 },
26855 },
26856 },
26857 {
26858 name: "SGTconst",
26859 auxType: auxInt32,
26860 argLen: 1,
26861 asm: mips.ASGT,
26862 reg: regInfo{
26863 inputs: []inputInfo{
26864 {0, 469762046},
26865 },
26866 outputs: []outputInfo{
26867 {0, 335544318},
26868 },
26869 },
26870 },
26871 {
26872 name: "SGTzero",
26873 argLen: 1,
26874 asm: mips.ASGT,
26875 reg: regInfo{
26876 inputs: []inputInfo{
26877 {0, 469762046},
26878 },
26879 outputs: []outputInfo{
26880 {0, 335544318},
26881 },
26882 },
26883 },
26884 {
26885 name: "SGTU",
26886 argLen: 2,
26887 asm: mips.ASGTU,
26888 reg: regInfo{
26889 inputs: []inputInfo{
26890 {0, 469762046},
26891 {1, 469762046},
26892 },
26893 outputs: []outputInfo{
26894 {0, 335544318},
26895 },
26896 },
26897 },
26898 {
26899 name: "SGTUconst",
26900 auxType: auxInt32,
26901 argLen: 1,
26902 asm: mips.ASGTU,
26903 reg: regInfo{
26904 inputs: []inputInfo{
26905 {0, 469762046},
26906 },
26907 outputs: []outputInfo{
26908 {0, 335544318},
26909 },
26910 },
26911 },
26912 {
26913 name: "SGTUzero",
26914 argLen: 1,
26915 asm: mips.ASGTU,
26916 reg: regInfo{
26917 inputs: []inputInfo{
26918 {0, 469762046},
26919 },
26920 outputs: []outputInfo{
26921 {0, 335544318},
26922 },
26923 },
26924 },
26925 {
26926 name: "CMPEQF",
26927 argLen: 2,
26928 asm: mips.ACMPEQF,
26929 reg: regInfo{
26930 inputs: []inputInfo{
26931 {0, 35183835217920},
26932 {1, 35183835217920},
26933 },
26934 },
26935 },
26936 {
26937 name: "CMPEQD",
26938 argLen: 2,
26939 asm: mips.ACMPEQD,
26940 reg: regInfo{
26941 inputs: []inputInfo{
26942 {0, 35183835217920},
26943 {1, 35183835217920},
26944 },
26945 },
26946 },
26947 {
26948 name: "CMPGEF",
26949 argLen: 2,
26950 asm: mips.ACMPGEF,
26951 reg: regInfo{
26952 inputs: []inputInfo{
26953 {0, 35183835217920},
26954 {1, 35183835217920},
26955 },
26956 },
26957 },
26958 {
26959 name: "CMPGED",
26960 argLen: 2,
26961 asm: mips.ACMPGED,
26962 reg: regInfo{
26963 inputs: []inputInfo{
26964 {0, 35183835217920},
26965 {1, 35183835217920},
26966 },
26967 },
26968 },
26969 {
26970 name: "CMPGTF",
26971 argLen: 2,
26972 asm: mips.ACMPGTF,
26973 reg: regInfo{
26974 inputs: []inputInfo{
26975 {0, 35183835217920},
26976 {1, 35183835217920},
26977 },
26978 },
26979 },
26980 {
26981 name: "CMPGTD",
26982 argLen: 2,
26983 asm: mips.ACMPGTD,
26984 reg: regInfo{
26985 inputs: []inputInfo{
26986 {0, 35183835217920},
26987 {1, 35183835217920},
26988 },
26989 },
26990 },
26991 {
26992 name: "MOVWconst",
26993 auxType: auxInt32,
26994 argLen: 0,
26995 rematerializeable: true,
26996 asm: mips.AMOVW,
26997 reg: regInfo{
26998 outputs: []outputInfo{
26999 {0, 335544318},
27000 },
27001 },
27002 },
27003 {
27004 name: "MOVFconst",
27005 auxType: auxFloat32,
27006 argLen: 0,
27007 rematerializeable: true,
27008 asm: mips.AMOVF,
27009 reg: regInfo{
27010 outputs: []outputInfo{
27011 {0, 35183835217920},
27012 },
27013 },
27014 },
27015 {
27016 name: "MOVDconst",
27017 auxType: auxFloat64,
27018 argLen: 0,
27019 rematerializeable: true,
27020 asm: mips.AMOVD,
27021 reg: regInfo{
27022 outputs: []outputInfo{
27023 {0, 35183835217920},
27024 },
27025 },
27026 },
27027 {
27028 name: "MOVWaddr",
27029 auxType: auxSymOff,
27030 argLen: 1,
27031 rematerializeable: true,
27032 symEffect: SymAddr,
27033 asm: mips.AMOVW,
27034 reg: regInfo{
27035 inputs: []inputInfo{
27036 {0, 140737555464192},
27037 },
27038 outputs: []outputInfo{
27039 {0, 335544318},
27040 },
27041 },
27042 },
27043 {
27044 name: "MOVBload",
27045 auxType: auxSymOff,
27046 argLen: 2,
27047 faultOnNilArg0: true,
27048 symEffect: SymRead,
27049 asm: mips.AMOVB,
27050 reg: regInfo{
27051 inputs: []inputInfo{
27052 {0, 140738025226238},
27053 },
27054 outputs: []outputInfo{
27055 {0, 335544318},
27056 },
27057 },
27058 },
27059 {
27060 name: "MOVBUload",
27061 auxType: auxSymOff,
27062 argLen: 2,
27063 faultOnNilArg0: true,
27064 symEffect: SymRead,
27065 asm: mips.AMOVBU,
27066 reg: regInfo{
27067 inputs: []inputInfo{
27068 {0, 140738025226238},
27069 },
27070 outputs: []outputInfo{
27071 {0, 335544318},
27072 },
27073 },
27074 },
27075 {
27076 name: "MOVHload",
27077 auxType: auxSymOff,
27078 argLen: 2,
27079 faultOnNilArg0: true,
27080 symEffect: SymRead,
27081 asm: mips.AMOVH,
27082 reg: regInfo{
27083 inputs: []inputInfo{
27084 {0, 140738025226238},
27085 },
27086 outputs: []outputInfo{
27087 {0, 335544318},
27088 },
27089 },
27090 },
27091 {
27092 name: "MOVHUload",
27093 auxType: auxSymOff,
27094 argLen: 2,
27095 faultOnNilArg0: true,
27096 symEffect: SymRead,
27097 asm: mips.AMOVHU,
27098 reg: regInfo{
27099 inputs: []inputInfo{
27100 {0, 140738025226238},
27101 },
27102 outputs: []outputInfo{
27103 {0, 335544318},
27104 },
27105 },
27106 },
27107 {
27108 name: "MOVWload",
27109 auxType: auxSymOff,
27110 argLen: 2,
27111 faultOnNilArg0: true,
27112 symEffect: SymRead,
27113 asm: mips.AMOVW,
27114 reg: regInfo{
27115 inputs: []inputInfo{
27116 {0, 140738025226238},
27117 },
27118 outputs: []outputInfo{
27119 {0, 335544318},
27120 },
27121 },
27122 },
27123 {
27124 name: "MOVFload",
27125 auxType: auxSymOff,
27126 argLen: 2,
27127 faultOnNilArg0: true,
27128 symEffect: SymRead,
27129 asm: mips.AMOVF,
27130 reg: regInfo{
27131 inputs: []inputInfo{
27132 {0, 140738025226238},
27133 },
27134 outputs: []outputInfo{
27135 {0, 35183835217920},
27136 },
27137 },
27138 },
27139 {
27140 name: "MOVDload",
27141 auxType: auxSymOff,
27142 argLen: 2,
27143 faultOnNilArg0: true,
27144 symEffect: SymRead,
27145 asm: mips.AMOVD,
27146 reg: regInfo{
27147 inputs: []inputInfo{
27148 {0, 140738025226238},
27149 },
27150 outputs: []outputInfo{
27151 {0, 35183835217920},
27152 },
27153 },
27154 },
27155 {
27156 name: "MOVBstore",
27157 auxType: auxSymOff,
27158 argLen: 3,
27159 faultOnNilArg0: true,
27160 symEffect: SymWrite,
27161 asm: mips.AMOVB,
27162 reg: regInfo{
27163 inputs: []inputInfo{
27164 {1, 469762046},
27165 {0, 140738025226238},
27166 },
27167 },
27168 },
27169 {
27170 name: "MOVHstore",
27171 auxType: auxSymOff,
27172 argLen: 3,
27173 faultOnNilArg0: true,
27174 symEffect: SymWrite,
27175 asm: mips.AMOVH,
27176 reg: regInfo{
27177 inputs: []inputInfo{
27178 {1, 469762046},
27179 {0, 140738025226238},
27180 },
27181 },
27182 },
27183 {
27184 name: "MOVWstore",
27185 auxType: auxSymOff,
27186 argLen: 3,
27187 faultOnNilArg0: true,
27188 symEffect: SymWrite,
27189 asm: mips.AMOVW,
27190 reg: regInfo{
27191 inputs: []inputInfo{
27192 {1, 469762046},
27193 {0, 140738025226238},
27194 },
27195 },
27196 },
27197 {
27198 name: "MOVFstore",
27199 auxType: auxSymOff,
27200 argLen: 3,
27201 faultOnNilArg0: true,
27202 symEffect: SymWrite,
27203 asm: mips.AMOVF,
27204 reg: regInfo{
27205 inputs: []inputInfo{
27206 {1, 35183835217920},
27207 {0, 140738025226238},
27208 },
27209 },
27210 },
27211 {
27212 name: "MOVDstore",
27213 auxType: auxSymOff,
27214 argLen: 3,
27215 faultOnNilArg0: true,
27216 symEffect: SymWrite,
27217 asm: mips.AMOVD,
27218 reg: regInfo{
27219 inputs: []inputInfo{
27220 {1, 35183835217920},
27221 {0, 140738025226238},
27222 },
27223 },
27224 },
27225 {
27226 name: "MOVBstorezero",
27227 auxType: auxSymOff,
27228 argLen: 2,
27229 faultOnNilArg0: true,
27230 symEffect: SymWrite,
27231 asm: mips.AMOVB,
27232 reg: regInfo{
27233 inputs: []inputInfo{
27234 {0, 140738025226238},
27235 },
27236 },
27237 },
27238 {
27239 name: "MOVHstorezero",
27240 auxType: auxSymOff,
27241 argLen: 2,
27242 faultOnNilArg0: true,
27243 symEffect: SymWrite,
27244 asm: mips.AMOVH,
27245 reg: regInfo{
27246 inputs: []inputInfo{
27247 {0, 140738025226238},
27248 },
27249 },
27250 },
27251 {
27252 name: "MOVWstorezero",
27253 auxType: auxSymOff,
27254 argLen: 2,
27255 faultOnNilArg0: true,
27256 symEffect: SymWrite,
27257 asm: mips.AMOVW,
27258 reg: regInfo{
27259 inputs: []inputInfo{
27260 {0, 140738025226238},
27261 },
27262 },
27263 },
27264 {
27265 name: "MOVWfpgp",
27266 argLen: 1,
27267 asm: mips.AMOVW,
27268 reg: regInfo{
27269 inputs: []inputInfo{
27270 {0, 35183835217920},
27271 },
27272 outputs: []outputInfo{
27273 {0, 335544318},
27274 },
27275 },
27276 },
27277 {
27278 name: "MOVWgpfp",
27279 argLen: 1,
27280 asm: mips.AMOVW,
27281 reg: regInfo{
27282 inputs: []inputInfo{
27283 {0, 335544318},
27284 },
27285 outputs: []outputInfo{
27286 {0, 35183835217920},
27287 },
27288 },
27289 },
27290 {
27291 name: "MOVBreg",
27292 argLen: 1,
27293 asm: mips.AMOVB,
27294 reg: regInfo{
27295 inputs: []inputInfo{
27296 {0, 469762046},
27297 },
27298 outputs: []outputInfo{
27299 {0, 335544318},
27300 },
27301 },
27302 },
27303 {
27304 name: "MOVBUreg",
27305 argLen: 1,
27306 asm: mips.AMOVBU,
27307 reg: regInfo{
27308 inputs: []inputInfo{
27309 {0, 469762046},
27310 },
27311 outputs: []outputInfo{
27312 {0, 335544318},
27313 },
27314 },
27315 },
27316 {
27317 name: "MOVHreg",
27318 argLen: 1,
27319 asm: mips.AMOVH,
27320 reg: regInfo{
27321 inputs: []inputInfo{
27322 {0, 469762046},
27323 },
27324 outputs: []outputInfo{
27325 {0, 335544318},
27326 },
27327 },
27328 },
27329 {
27330 name: "MOVHUreg",
27331 argLen: 1,
27332 asm: mips.AMOVHU,
27333 reg: regInfo{
27334 inputs: []inputInfo{
27335 {0, 469762046},
27336 },
27337 outputs: []outputInfo{
27338 {0, 335544318},
27339 },
27340 },
27341 },
27342 {
27343 name: "MOVWreg",
27344 argLen: 1,
27345 asm: mips.AMOVW,
27346 reg: regInfo{
27347 inputs: []inputInfo{
27348 {0, 469762046},
27349 },
27350 outputs: []outputInfo{
27351 {0, 335544318},
27352 },
27353 },
27354 },
27355 {
27356 name: "MOVWnop",
27357 argLen: 1,
27358 resultInArg0: true,
27359 reg: regInfo{
27360 inputs: []inputInfo{
27361 {0, 335544318},
27362 },
27363 outputs: []outputInfo{
27364 {0, 335544318},
27365 },
27366 },
27367 },
27368 {
27369 name: "CMOVZ",
27370 argLen: 3,
27371 resultInArg0: true,
27372 asm: mips.ACMOVZ,
27373 reg: regInfo{
27374 inputs: []inputInfo{
27375 {0, 335544318},
27376 {1, 335544318},
27377 {2, 335544318},
27378 },
27379 outputs: []outputInfo{
27380 {0, 335544318},
27381 },
27382 },
27383 },
27384 {
27385 name: "CMOVZzero",
27386 argLen: 2,
27387 resultInArg0: true,
27388 asm: mips.ACMOVZ,
27389 reg: regInfo{
27390 inputs: []inputInfo{
27391 {0, 335544318},
27392 {1, 469762046},
27393 },
27394 outputs: []outputInfo{
27395 {0, 335544318},
27396 },
27397 },
27398 },
27399 {
27400 name: "MOVWF",
27401 argLen: 1,
27402 asm: mips.AMOVWF,
27403 reg: regInfo{
27404 inputs: []inputInfo{
27405 {0, 35183835217920},
27406 },
27407 outputs: []outputInfo{
27408 {0, 35183835217920},
27409 },
27410 },
27411 },
27412 {
27413 name: "MOVWD",
27414 argLen: 1,
27415 asm: mips.AMOVWD,
27416 reg: regInfo{
27417 inputs: []inputInfo{
27418 {0, 35183835217920},
27419 },
27420 outputs: []outputInfo{
27421 {0, 35183835217920},
27422 },
27423 },
27424 },
27425 {
27426 name: "TRUNCFW",
27427 argLen: 1,
27428 asm: mips.ATRUNCFW,
27429 reg: regInfo{
27430 inputs: []inputInfo{
27431 {0, 35183835217920},
27432 },
27433 outputs: []outputInfo{
27434 {0, 35183835217920},
27435 },
27436 },
27437 },
27438 {
27439 name: "TRUNCDW",
27440 argLen: 1,
27441 asm: mips.ATRUNCDW,
27442 reg: regInfo{
27443 inputs: []inputInfo{
27444 {0, 35183835217920},
27445 },
27446 outputs: []outputInfo{
27447 {0, 35183835217920},
27448 },
27449 },
27450 },
27451 {
27452 name: "MOVFD",
27453 argLen: 1,
27454 asm: mips.AMOVFD,
27455 reg: regInfo{
27456 inputs: []inputInfo{
27457 {0, 35183835217920},
27458 },
27459 outputs: []outputInfo{
27460 {0, 35183835217920},
27461 },
27462 },
27463 },
27464 {
27465 name: "MOVDF",
27466 argLen: 1,
27467 asm: mips.AMOVDF,
27468 reg: regInfo{
27469 inputs: []inputInfo{
27470 {0, 35183835217920},
27471 },
27472 outputs: []outputInfo{
27473 {0, 35183835217920},
27474 },
27475 },
27476 },
27477 {
27478 name: "CALLstatic",
27479 auxType: auxCallOff,
27480 argLen: 1,
27481 clobberFlags: true,
27482 call: true,
27483 reg: regInfo{
27484 clobbers: 140737421246462,
27485 },
27486 },
27487 {
27488 name: "CALLtail",
27489 auxType: auxCallOff,
27490 argLen: 1,
27491 clobberFlags: true,
27492 call: true,
27493 tailCall: true,
27494 reg: regInfo{
27495 clobbers: 140737421246462,
27496 },
27497 },
27498 {
27499 name: "CALLclosure",
27500 auxType: auxCallOff,
27501 argLen: 3,
27502 clobberFlags: true,
27503 call: true,
27504 reg: regInfo{
27505 inputs: []inputInfo{
27506 {1, 4194304},
27507 {0, 402653182},
27508 },
27509 clobbers: 140737421246462,
27510 },
27511 },
27512 {
27513 name: "CALLinter",
27514 auxType: auxCallOff,
27515 argLen: 2,
27516 clobberFlags: true,
27517 call: true,
27518 reg: regInfo{
27519 inputs: []inputInfo{
27520 {0, 335544318},
27521 },
27522 clobbers: 140737421246462,
27523 },
27524 },
27525 {
27526 name: "LoweredAtomicLoad8",
27527 argLen: 2,
27528 faultOnNilArg0: true,
27529 reg: regInfo{
27530 inputs: []inputInfo{
27531 {0, 140738025226238},
27532 },
27533 outputs: []outputInfo{
27534 {0, 335544318},
27535 },
27536 },
27537 },
27538 {
27539 name: "LoweredAtomicLoad32",
27540 argLen: 2,
27541 faultOnNilArg0: true,
27542 reg: regInfo{
27543 inputs: []inputInfo{
27544 {0, 140738025226238},
27545 },
27546 outputs: []outputInfo{
27547 {0, 335544318},
27548 },
27549 },
27550 },
27551 {
27552 name: "LoweredAtomicStore8",
27553 argLen: 3,
27554 faultOnNilArg0: true,
27555 hasSideEffects: true,
27556 reg: regInfo{
27557 inputs: []inputInfo{
27558 {1, 469762046},
27559 {0, 140738025226238},
27560 },
27561 },
27562 },
27563 {
27564 name: "LoweredAtomicStore32",
27565 argLen: 3,
27566 faultOnNilArg0: true,
27567 hasSideEffects: true,
27568 reg: regInfo{
27569 inputs: []inputInfo{
27570 {1, 469762046},
27571 {0, 140738025226238},
27572 },
27573 },
27574 },
27575 {
27576 name: "LoweredAtomicStorezero",
27577 argLen: 2,
27578 faultOnNilArg0: true,
27579 hasSideEffects: true,
27580 reg: regInfo{
27581 inputs: []inputInfo{
27582 {0, 140738025226238},
27583 },
27584 },
27585 },
27586 {
27587 name: "LoweredAtomicExchange",
27588 argLen: 3,
27589 resultNotInArgs: true,
27590 faultOnNilArg0: true,
27591 hasSideEffects: true,
27592 unsafePoint: true,
27593 reg: regInfo{
27594 inputs: []inputInfo{
27595 {1, 469762046},
27596 {0, 140738025226238},
27597 },
27598 outputs: []outputInfo{
27599 {0, 335544318},
27600 },
27601 },
27602 },
27603 {
27604 name: "LoweredAtomicAdd",
27605 argLen: 3,
27606 resultNotInArgs: true,
27607 faultOnNilArg0: true,
27608 hasSideEffects: true,
27609 unsafePoint: true,
27610 reg: regInfo{
27611 inputs: []inputInfo{
27612 {1, 469762046},
27613 {0, 140738025226238},
27614 },
27615 outputs: []outputInfo{
27616 {0, 335544318},
27617 },
27618 },
27619 },
27620 {
27621 name: "LoweredAtomicAddconst",
27622 auxType: auxInt32,
27623 argLen: 2,
27624 resultNotInArgs: true,
27625 faultOnNilArg0: true,
27626 hasSideEffects: true,
27627 unsafePoint: true,
27628 reg: regInfo{
27629 inputs: []inputInfo{
27630 {0, 140738025226238},
27631 },
27632 outputs: []outputInfo{
27633 {0, 335544318},
27634 },
27635 },
27636 },
27637 {
27638 name: "LoweredAtomicCas",
27639 argLen: 4,
27640 resultNotInArgs: true,
27641 faultOnNilArg0: true,
27642 hasSideEffects: true,
27643 unsafePoint: true,
27644 reg: regInfo{
27645 inputs: []inputInfo{
27646 {1, 469762046},
27647 {2, 469762046},
27648 {0, 140738025226238},
27649 },
27650 outputs: []outputInfo{
27651 {0, 335544318},
27652 },
27653 },
27654 },
27655 {
27656 name: "LoweredAtomicAnd",
27657 argLen: 3,
27658 faultOnNilArg0: true,
27659 hasSideEffects: true,
27660 unsafePoint: true,
27661 asm: mips.AAND,
27662 reg: regInfo{
27663 inputs: []inputInfo{
27664 {1, 469762046},
27665 {0, 140738025226238},
27666 },
27667 },
27668 },
27669 {
27670 name: "LoweredAtomicOr",
27671 argLen: 3,
27672 faultOnNilArg0: true,
27673 hasSideEffects: true,
27674 unsafePoint: true,
27675 asm: mips.AOR,
27676 reg: regInfo{
27677 inputs: []inputInfo{
27678 {1, 469762046},
27679 {0, 140738025226238},
27680 },
27681 },
27682 },
27683 {
27684 name: "LoweredZero",
27685 auxType: auxInt32,
27686 argLen: 3,
27687 faultOnNilArg0: true,
27688 reg: regInfo{
27689 inputs: []inputInfo{
27690 {0, 2},
27691 {1, 335544318},
27692 },
27693 clobbers: 2,
27694 },
27695 },
27696 {
27697 name: "LoweredMove",
27698 auxType: auxInt32,
27699 argLen: 4,
27700 faultOnNilArg0: true,
27701 faultOnNilArg1: true,
27702 reg: regInfo{
27703 inputs: []inputInfo{
27704 {0, 4},
27705 {1, 2},
27706 {2, 335544318},
27707 },
27708 clobbers: 6,
27709 },
27710 },
27711 {
27712 name: "LoweredNilCheck",
27713 argLen: 2,
27714 nilCheck: true,
27715 faultOnNilArg0: true,
27716 reg: regInfo{
27717 inputs: []inputInfo{
27718 {0, 469762046},
27719 },
27720 },
27721 },
27722 {
27723 name: "FPFlagTrue",
27724 argLen: 1,
27725 reg: regInfo{
27726 outputs: []outputInfo{
27727 {0, 335544318},
27728 },
27729 },
27730 },
27731 {
27732 name: "FPFlagFalse",
27733 argLen: 1,
27734 reg: regInfo{
27735 outputs: []outputInfo{
27736 {0, 335544318},
27737 },
27738 },
27739 },
27740 {
27741 name: "LoweredGetClosurePtr",
27742 argLen: 0,
27743 zeroWidth: true,
27744 reg: regInfo{
27745 outputs: []outputInfo{
27746 {0, 4194304},
27747 },
27748 },
27749 },
27750 {
27751 name: "LoweredGetCallerSP",
27752 argLen: 1,
27753 rematerializeable: true,
27754 reg: regInfo{
27755 outputs: []outputInfo{
27756 {0, 335544318},
27757 },
27758 },
27759 },
27760 {
27761 name: "LoweredGetCallerPC",
27762 argLen: 0,
27763 rematerializeable: true,
27764 reg: regInfo{
27765 outputs: []outputInfo{
27766 {0, 335544318},
27767 },
27768 },
27769 },
27770 {
27771 name: "LoweredWB",
27772 auxType: auxInt64,
27773 argLen: 1,
27774 clobberFlags: true,
27775 reg: regInfo{
27776 clobbers: 140737219919872,
27777 outputs: []outputInfo{
27778 {0, 16777216},
27779 },
27780 },
27781 },
27782 {
27783 name: "LoweredPanicBoundsA",
27784 auxType: auxInt64,
27785 argLen: 3,
27786 call: true,
27787 reg: regInfo{
27788 inputs: []inputInfo{
27789 {0, 8},
27790 {1, 16},
27791 },
27792 },
27793 },
27794 {
27795 name: "LoweredPanicBoundsB",
27796 auxType: auxInt64,
27797 argLen: 3,
27798 call: true,
27799 reg: regInfo{
27800 inputs: []inputInfo{
27801 {0, 4},
27802 {1, 8},
27803 },
27804 },
27805 },
27806 {
27807 name: "LoweredPanicBoundsC",
27808 auxType: auxInt64,
27809 argLen: 3,
27810 call: true,
27811 reg: regInfo{
27812 inputs: []inputInfo{
27813 {0, 2},
27814 {1, 4},
27815 },
27816 },
27817 },
27818 {
27819 name: "LoweredPanicExtendA",
27820 auxType: auxInt64,
27821 argLen: 4,
27822 call: true,
27823 reg: regInfo{
27824 inputs: []inputInfo{
27825 {0, 32},
27826 {1, 8},
27827 {2, 16},
27828 },
27829 },
27830 },
27831 {
27832 name: "LoweredPanicExtendB",
27833 auxType: auxInt64,
27834 argLen: 4,
27835 call: true,
27836 reg: regInfo{
27837 inputs: []inputInfo{
27838 {0, 32},
27839 {1, 4},
27840 {2, 8},
27841 },
27842 },
27843 },
27844 {
27845 name: "LoweredPanicExtendC",
27846 auxType: auxInt64,
27847 argLen: 4,
27848 call: true,
27849 reg: regInfo{
27850 inputs: []inputInfo{
27851 {0, 32},
27852 {1, 2},
27853 {2, 4},
27854 },
27855 },
27856 },
27857
27858 {
27859 name: "ADDV",
27860 argLen: 2,
27861 commutative: true,
27862 asm: mips.AADDVU,
27863 reg: regInfo{
27864 inputs: []inputInfo{
27865 {0, 234881022},
27866 {1, 234881022},
27867 },
27868 outputs: []outputInfo{
27869 {0, 167772158},
27870 },
27871 },
27872 },
27873 {
27874 name: "ADDVconst",
27875 auxType: auxInt64,
27876 argLen: 1,
27877 asm: mips.AADDVU,
27878 reg: regInfo{
27879 inputs: []inputInfo{
27880 {0, 268435454},
27881 },
27882 outputs: []outputInfo{
27883 {0, 167772158},
27884 },
27885 },
27886 },
27887 {
27888 name: "SUBV",
27889 argLen: 2,
27890 asm: mips.ASUBVU,
27891 reg: regInfo{
27892 inputs: []inputInfo{
27893 {0, 234881022},
27894 {1, 234881022},
27895 },
27896 outputs: []outputInfo{
27897 {0, 167772158},
27898 },
27899 },
27900 },
27901 {
27902 name: "SUBVconst",
27903 auxType: auxInt64,
27904 argLen: 1,
27905 asm: mips.ASUBVU,
27906 reg: regInfo{
27907 inputs: []inputInfo{
27908 {0, 234881022},
27909 },
27910 outputs: []outputInfo{
27911 {0, 167772158},
27912 },
27913 },
27914 },
27915 {
27916 name: "MULV",
27917 argLen: 2,
27918 commutative: true,
27919 asm: mips.AMULV,
27920 reg: regInfo{
27921 inputs: []inputInfo{
27922 {0, 234881022},
27923 {1, 234881022},
27924 },
27925 outputs: []outputInfo{
27926 {0, 1152921504606846976},
27927 {1, 2305843009213693952},
27928 },
27929 },
27930 },
27931 {
27932 name: "MULVU",
27933 argLen: 2,
27934 commutative: true,
27935 asm: mips.AMULVU,
27936 reg: regInfo{
27937 inputs: []inputInfo{
27938 {0, 234881022},
27939 {1, 234881022},
27940 },
27941 outputs: []outputInfo{
27942 {0, 1152921504606846976},
27943 {1, 2305843009213693952},
27944 },
27945 },
27946 },
27947 {
27948 name: "DIVV",
27949 argLen: 2,
27950 asm: mips.ADIVV,
27951 reg: regInfo{
27952 inputs: []inputInfo{
27953 {0, 234881022},
27954 {1, 234881022},
27955 },
27956 outputs: []outputInfo{
27957 {0, 1152921504606846976},
27958 {1, 2305843009213693952},
27959 },
27960 },
27961 },
27962 {
27963 name: "DIVVU",
27964 argLen: 2,
27965 asm: mips.ADIVVU,
27966 reg: regInfo{
27967 inputs: []inputInfo{
27968 {0, 234881022},
27969 {1, 234881022},
27970 },
27971 outputs: []outputInfo{
27972 {0, 1152921504606846976},
27973 {1, 2305843009213693952},
27974 },
27975 },
27976 },
27977 {
27978 name: "ADDF",
27979 argLen: 2,
27980 commutative: true,
27981 asm: mips.AADDF,
27982 reg: regInfo{
27983 inputs: []inputInfo{
27984 {0, 1152921504338411520},
27985 {1, 1152921504338411520},
27986 },
27987 outputs: []outputInfo{
27988 {0, 1152921504338411520},
27989 },
27990 },
27991 },
27992 {
27993 name: "ADDD",
27994 argLen: 2,
27995 commutative: true,
27996 asm: mips.AADDD,
27997 reg: regInfo{
27998 inputs: []inputInfo{
27999 {0, 1152921504338411520},
28000 {1, 1152921504338411520},
28001 },
28002 outputs: []outputInfo{
28003 {0, 1152921504338411520},
28004 },
28005 },
28006 },
28007 {
28008 name: "SUBF",
28009 argLen: 2,
28010 asm: mips.ASUBF,
28011 reg: regInfo{
28012 inputs: []inputInfo{
28013 {0, 1152921504338411520},
28014 {1, 1152921504338411520},
28015 },
28016 outputs: []outputInfo{
28017 {0, 1152921504338411520},
28018 },
28019 },
28020 },
28021 {
28022 name: "SUBD",
28023 argLen: 2,
28024 asm: mips.ASUBD,
28025 reg: regInfo{
28026 inputs: []inputInfo{
28027 {0, 1152921504338411520},
28028 {1, 1152921504338411520},
28029 },
28030 outputs: []outputInfo{
28031 {0, 1152921504338411520},
28032 },
28033 },
28034 },
28035 {
28036 name: "MULF",
28037 argLen: 2,
28038 commutative: true,
28039 asm: mips.AMULF,
28040 reg: regInfo{
28041 inputs: []inputInfo{
28042 {0, 1152921504338411520},
28043 {1, 1152921504338411520},
28044 },
28045 outputs: []outputInfo{
28046 {0, 1152921504338411520},
28047 },
28048 },
28049 },
28050 {
28051 name: "MULD",
28052 argLen: 2,
28053 commutative: true,
28054 asm: mips.AMULD,
28055 reg: regInfo{
28056 inputs: []inputInfo{
28057 {0, 1152921504338411520},
28058 {1, 1152921504338411520},
28059 },
28060 outputs: []outputInfo{
28061 {0, 1152921504338411520},
28062 },
28063 },
28064 },
28065 {
28066 name: "DIVF",
28067 argLen: 2,
28068 asm: mips.ADIVF,
28069 reg: regInfo{
28070 inputs: []inputInfo{
28071 {0, 1152921504338411520},
28072 {1, 1152921504338411520},
28073 },
28074 outputs: []outputInfo{
28075 {0, 1152921504338411520},
28076 },
28077 },
28078 },
28079 {
28080 name: "DIVD",
28081 argLen: 2,
28082 asm: mips.ADIVD,
28083 reg: regInfo{
28084 inputs: []inputInfo{
28085 {0, 1152921504338411520},
28086 {1, 1152921504338411520},
28087 },
28088 outputs: []outputInfo{
28089 {0, 1152921504338411520},
28090 },
28091 },
28092 },
28093 {
28094 name: "AND",
28095 argLen: 2,
28096 commutative: true,
28097 asm: mips.AAND,
28098 reg: regInfo{
28099 inputs: []inputInfo{
28100 {0, 234881022},
28101 {1, 234881022},
28102 },
28103 outputs: []outputInfo{
28104 {0, 167772158},
28105 },
28106 },
28107 },
28108 {
28109 name: "ANDconst",
28110 auxType: auxInt64,
28111 argLen: 1,
28112 asm: mips.AAND,
28113 reg: regInfo{
28114 inputs: []inputInfo{
28115 {0, 234881022},
28116 },
28117 outputs: []outputInfo{
28118 {0, 167772158},
28119 },
28120 },
28121 },
28122 {
28123 name: "OR",
28124 argLen: 2,
28125 commutative: true,
28126 asm: mips.AOR,
28127 reg: regInfo{
28128 inputs: []inputInfo{
28129 {0, 234881022},
28130 {1, 234881022},
28131 },
28132 outputs: []outputInfo{
28133 {0, 167772158},
28134 },
28135 },
28136 },
28137 {
28138 name: "ORconst",
28139 auxType: auxInt64,
28140 argLen: 1,
28141 asm: mips.AOR,
28142 reg: regInfo{
28143 inputs: []inputInfo{
28144 {0, 234881022},
28145 },
28146 outputs: []outputInfo{
28147 {0, 167772158},
28148 },
28149 },
28150 },
28151 {
28152 name: "XOR",
28153 argLen: 2,
28154 commutative: true,
28155 asm: mips.AXOR,
28156 reg: regInfo{
28157 inputs: []inputInfo{
28158 {0, 234881022},
28159 {1, 234881022},
28160 },
28161 outputs: []outputInfo{
28162 {0, 167772158},
28163 },
28164 },
28165 },
28166 {
28167 name: "XORconst",
28168 auxType: auxInt64,
28169 argLen: 1,
28170 asm: mips.AXOR,
28171 reg: regInfo{
28172 inputs: []inputInfo{
28173 {0, 234881022},
28174 },
28175 outputs: []outputInfo{
28176 {0, 167772158},
28177 },
28178 },
28179 },
28180 {
28181 name: "NOR",
28182 argLen: 2,
28183 commutative: true,
28184 asm: mips.ANOR,
28185 reg: regInfo{
28186 inputs: []inputInfo{
28187 {0, 234881022},
28188 {1, 234881022},
28189 },
28190 outputs: []outputInfo{
28191 {0, 167772158},
28192 },
28193 },
28194 },
28195 {
28196 name: "NORconst",
28197 auxType: auxInt64,
28198 argLen: 1,
28199 asm: mips.ANOR,
28200 reg: regInfo{
28201 inputs: []inputInfo{
28202 {0, 234881022},
28203 },
28204 outputs: []outputInfo{
28205 {0, 167772158},
28206 },
28207 },
28208 },
28209 {
28210 name: "NEGV",
28211 argLen: 1,
28212 reg: regInfo{
28213 inputs: []inputInfo{
28214 {0, 234881022},
28215 },
28216 outputs: []outputInfo{
28217 {0, 167772158},
28218 },
28219 },
28220 },
28221 {
28222 name: "NEGF",
28223 argLen: 1,
28224 asm: mips.ANEGF,
28225 reg: regInfo{
28226 inputs: []inputInfo{
28227 {0, 1152921504338411520},
28228 },
28229 outputs: []outputInfo{
28230 {0, 1152921504338411520},
28231 },
28232 },
28233 },
28234 {
28235 name: "NEGD",
28236 argLen: 1,
28237 asm: mips.ANEGD,
28238 reg: regInfo{
28239 inputs: []inputInfo{
28240 {0, 1152921504338411520},
28241 },
28242 outputs: []outputInfo{
28243 {0, 1152921504338411520},
28244 },
28245 },
28246 },
28247 {
28248 name: "ABSD",
28249 argLen: 1,
28250 asm: mips.AABSD,
28251 reg: regInfo{
28252 inputs: []inputInfo{
28253 {0, 1152921504338411520},
28254 },
28255 outputs: []outputInfo{
28256 {0, 1152921504338411520},
28257 },
28258 },
28259 },
28260 {
28261 name: "SQRTD",
28262 argLen: 1,
28263 asm: mips.ASQRTD,
28264 reg: regInfo{
28265 inputs: []inputInfo{
28266 {0, 1152921504338411520},
28267 },
28268 outputs: []outputInfo{
28269 {0, 1152921504338411520},
28270 },
28271 },
28272 },
28273 {
28274 name: "SQRTF",
28275 argLen: 1,
28276 asm: mips.ASQRTF,
28277 reg: regInfo{
28278 inputs: []inputInfo{
28279 {0, 1152921504338411520},
28280 },
28281 outputs: []outputInfo{
28282 {0, 1152921504338411520},
28283 },
28284 },
28285 },
28286 {
28287 name: "SLLV",
28288 argLen: 2,
28289 asm: mips.ASLLV,
28290 reg: regInfo{
28291 inputs: []inputInfo{
28292 {0, 234881022},
28293 {1, 234881022},
28294 },
28295 outputs: []outputInfo{
28296 {0, 167772158},
28297 },
28298 },
28299 },
28300 {
28301 name: "SLLVconst",
28302 auxType: auxInt64,
28303 argLen: 1,
28304 asm: mips.ASLLV,
28305 reg: regInfo{
28306 inputs: []inputInfo{
28307 {0, 234881022},
28308 },
28309 outputs: []outputInfo{
28310 {0, 167772158},
28311 },
28312 },
28313 },
28314 {
28315 name: "SRLV",
28316 argLen: 2,
28317 asm: mips.ASRLV,
28318 reg: regInfo{
28319 inputs: []inputInfo{
28320 {0, 234881022},
28321 {1, 234881022},
28322 },
28323 outputs: []outputInfo{
28324 {0, 167772158},
28325 },
28326 },
28327 },
28328 {
28329 name: "SRLVconst",
28330 auxType: auxInt64,
28331 argLen: 1,
28332 asm: mips.ASRLV,
28333 reg: regInfo{
28334 inputs: []inputInfo{
28335 {0, 234881022},
28336 },
28337 outputs: []outputInfo{
28338 {0, 167772158},
28339 },
28340 },
28341 },
28342 {
28343 name: "SRAV",
28344 argLen: 2,
28345 asm: mips.ASRAV,
28346 reg: regInfo{
28347 inputs: []inputInfo{
28348 {0, 234881022},
28349 {1, 234881022},
28350 },
28351 outputs: []outputInfo{
28352 {0, 167772158},
28353 },
28354 },
28355 },
28356 {
28357 name: "SRAVconst",
28358 auxType: auxInt64,
28359 argLen: 1,
28360 asm: mips.ASRAV,
28361 reg: regInfo{
28362 inputs: []inputInfo{
28363 {0, 234881022},
28364 },
28365 outputs: []outputInfo{
28366 {0, 167772158},
28367 },
28368 },
28369 },
28370 {
28371 name: "SGT",
28372 argLen: 2,
28373 asm: mips.ASGT,
28374 reg: regInfo{
28375 inputs: []inputInfo{
28376 {0, 234881022},
28377 {1, 234881022},
28378 },
28379 outputs: []outputInfo{
28380 {0, 167772158},
28381 },
28382 },
28383 },
28384 {
28385 name: "SGTconst",
28386 auxType: auxInt64,
28387 argLen: 1,
28388 asm: mips.ASGT,
28389 reg: regInfo{
28390 inputs: []inputInfo{
28391 {0, 234881022},
28392 },
28393 outputs: []outputInfo{
28394 {0, 167772158},
28395 },
28396 },
28397 },
28398 {
28399 name: "SGTU",
28400 argLen: 2,
28401 asm: mips.ASGTU,
28402 reg: regInfo{
28403 inputs: []inputInfo{
28404 {0, 234881022},
28405 {1, 234881022},
28406 },
28407 outputs: []outputInfo{
28408 {0, 167772158},
28409 },
28410 },
28411 },
28412 {
28413 name: "SGTUconst",
28414 auxType: auxInt64,
28415 argLen: 1,
28416 asm: mips.ASGTU,
28417 reg: regInfo{
28418 inputs: []inputInfo{
28419 {0, 234881022},
28420 },
28421 outputs: []outputInfo{
28422 {0, 167772158},
28423 },
28424 },
28425 },
28426 {
28427 name: "CMPEQF",
28428 argLen: 2,
28429 asm: mips.ACMPEQF,
28430 reg: regInfo{
28431 inputs: []inputInfo{
28432 {0, 1152921504338411520},
28433 {1, 1152921504338411520},
28434 },
28435 },
28436 },
28437 {
28438 name: "CMPEQD",
28439 argLen: 2,
28440 asm: mips.ACMPEQD,
28441 reg: regInfo{
28442 inputs: []inputInfo{
28443 {0, 1152921504338411520},
28444 {1, 1152921504338411520},
28445 },
28446 },
28447 },
28448 {
28449 name: "CMPGEF",
28450 argLen: 2,
28451 asm: mips.ACMPGEF,
28452 reg: regInfo{
28453 inputs: []inputInfo{
28454 {0, 1152921504338411520},
28455 {1, 1152921504338411520},
28456 },
28457 },
28458 },
28459 {
28460 name: "CMPGED",
28461 argLen: 2,
28462 asm: mips.ACMPGED,
28463 reg: regInfo{
28464 inputs: []inputInfo{
28465 {0, 1152921504338411520},
28466 {1, 1152921504338411520},
28467 },
28468 },
28469 },
28470 {
28471 name: "CMPGTF",
28472 argLen: 2,
28473 asm: mips.ACMPGTF,
28474 reg: regInfo{
28475 inputs: []inputInfo{
28476 {0, 1152921504338411520},
28477 {1, 1152921504338411520},
28478 },
28479 },
28480 },
28481 {
28482 name: "CMPGTD",
28483 argLen: 2,
28484 asm: mips.ACMPGTD,
28485 reg: regInfo{
28486 inputs: []inputInfo{
28487 {0, 1152921504338411520},
28488 {1, 1152921504338411520},
28489 },
28490 },
28491 },
28492 {
28493 name: "MOVVconst",
28494 auxType: auxInt64,
28495 argLen: 0,
28496 rematerializeable: true,
28497 asm: mips.AMOVV,
28498 reg: regInfo{
28499 outputs: []outputInfo{
28500 {0, 167772158},
28501 },
28502 },
28503 },
28504 {
28505 name: "MOVFconst",
28506 auxType: auxFloat64,
28507 argLen: 0,
28508 rematerializeable: true,
28509 asm: mips.AMOVF,
28510 reg: regInfo{
28511 outputs: []outputInfo{
28512 {0, 1152921504338411520},
28513 },
28514 },
28515 },
28516 {
28517 name: "MOVDconst",
28518 auxType: auxFloat64,
28519 argLen: 0,
28520 rematerializeable: true,
28521 asm: mips.AMOVD,
28522 reg: regInfo{
28523 outputs: []outputInfo{
28524 {0, 1152921504338411520},
28525 },
28526 },
28527 },
28528 {
28529 name: "MOVVaddr",
28530 auxType: auxSymOff,
28531 argLen: 1,
28532 rematerializeable: true,
28533 symEffect: SymAddr,
28534 asm: mips.AMOVV,
28535 reg: regInfo{
28536 inputs: []inputInfo{
28537 {0, 4611686018460942336},
28538 },
28539 outputs: []outputInfo{
28540 {0, 167772158},
28541 },
28542 },
28543 },
28544 {
28545 name: "MOVBload",
28546 auxType: auxSymOff,
28547 argLen: 2,
28548 faultOnNilArg0: true,
28549 symEffect: SymRead,
28550 asm: mips.AMOVB,
28551 reg: regInfo{
28552 inputs: []inputInfo{
28553 {0, 4611686018695823358},
28554 },
28555 outputs: []outputInfo{
28556 {0, 167772158},
28557 },
28558 },
28559 },
28560 {
28561 name: "MOVBUload",
28562 auxType: auxSymOff,
28563 argLen: 2,
28564 faultOnNilArg0: true,
28565 symEffect: SymRead,
28566 asm: mips.AMOVBU,
28567 reg: regInfo{
28568 inputs: []inputInfo{
28569 {0, 4611686018695823358},
28570 },
28571 outputs: []outputInfo{
28572 {0, 167772158},
28573 },
28574 },
28575 },
28576 {
28577 name: "MOVHload",
28578 auxType: auxSymOff,
28579 argLen: 2,
28580 faultOnNilArg0: true,
28581 symEffect: SymRead,
28582 asm: mips.AMOVH,
28583 reg: regInfo{
28584 inputs: []inputInfo{
28585 {0, 4611686018695823358},
28586 },
28587 outputs: []outputInfo{
28588 {0, 167772158},
28589 },
28590 },
28591 },
28592 {
28593 name: "MOVHUload",
28594 auxType: auxSymOff,
28595 argLen: 2,
28596 faultOnNilArg0: true,
28597 symEffect: SymRead,
28598 asm: mips.AMOVHU,
28599 reg: regInfo{
28600 inputs: []inputInfo{
28601 {0, 4611686018695823358},
28602 },
28603 outputs: []outputInfo{
28604 {0, 167772158},
28605 },
28606 },
28607 },
28608 {
28609 name: "MOVWload",
28610 auxType: auxSymOff,
28611 argLen: 2,
28612 faultOnNilArg0: true,
28613 symEffect: SymRead,
28614 asm: mips.AMOVW,
28615 reg: regInfo{
28616 inputs: []inputInfo{
28617 {0, 4611686018695823358},
28618 },
28619 outputs: []outputInfo{
28620 {0, 167772158},
28621 },
28622 },
28623 },
28624 {
28625 name: "MOVWUload",
28626 auxType: auxSymOff,
28627 argLen: 2,
28628 faultOnNilArg0: true,
28629 symEffect: SymRead,
28630 asm: mips.AMOVWU,
28631 reg: regInfo{
28632 inputs: []inputInfo{
28633 {0, 4611686018695823358},
28634 },
28635 outputs: []outputInfo{
28636 {0, 167772158},
28637 },
28638 },
28639 },
28640 {
28641 name: "MOVVload",
28642 auxType: auxSymOff,
28643 argLen: 2,
28644 faultOnNilArg0: true,
28645 symEffect: SymRead,
28646 asm: mips.AMOVV,
28647 reg: regInfo{
28648 inputs: []inputInfo{
28649 {0, 4611686018695823358},
28650 },
28651 outputs: []outputInfo{
28652 {0, 167772158},
28653 },
28654 },
28655 },
28656 {
28657 name: "MOVFload",
28658 auxType: auxSymOff,
28659 argLen: 2,
28660 faultOnNilArg0: true,
28661 symEffect: SymRead,
28662 asm: mips.AMOVF,
28663 reg: regInfo{
28664 inputs: []inputInfo{
28665 {0, 4611686018695823358},
28666 },
28667 outputs: []outputInfo{
28668 {0, 1152921504338411520},
28669 },
28670 },
28671 },
28672 {
28673 name: "MOVDload",
28674 auxType: auxSymOff,
28675 argLen: 2,
28676 faultOnNilArg0: true,
28677 symEffect: SymRead,
28678 asm: mips.AMOVD,
28679 reg: regInfo{
28680 inputs: []inputInfo{
28681 {0, 4611686018695823358},
28682 },
28683 outputs: []outputInfo{
28684 {0, 1152921504338411520},
28685 },
28686 },
28687 },
28688 {
28689 name: "MOVBstore",
28690 auxType: auxSymOff,
28691 argLen: 3,
28692 faultOnNilArg0: true,
28693 symEffect: SymWrite,
28694 asm: mips.AMOVB,
28695 reg: regInfo{
28696 inputs: []inputInfo{
28697 {1, 234881022},
28698 {0, 4611686018695823358},
28699 },
28700 },
28701 },
28702 {
28703 name: "MOVHstore",
28704 auxType: auxSymOff,
28705 argLen: 3,
28706 faultOnNilArg0: true,
28707 symEffect: SymWrite,
28708 asm: mips.AMOVH,
28709 reg: regInfo{
28710 inputs: []inputInfo{
28711 {1, 234881022},
28712 {0, 4611686018695823358},
28713 },
28714 },
28715 },
28716 {
28717 name: "MOVWstore",
28718 auxType: auxSymOff,
28719 argLen: 3,
28720 faultOnNilArg0: true,
28721 symEffect: SymWrite,
28722 asm: mips.AMOVW,
28723 reg: regInfo{
28724 inputs: []inputInfo{
28725 {1, 234881022},
28726 {0, 4611686018695823358},
28727 },
28728 },
28729 },
28730 {
28731 name: "MOVVstore",
28732 auxType: auxSymOff,
28733 argLen: 3,
28734 faultOnNilArg0: true,
28735 symEffect: SymWrite,
28736 asm: mips.AMOVV,
28737 reg: regInfo{
28738 inputs: []inputInfo{
28739 {1, 234881022},
28740 {0, 4611686018695823358},
28741 },
28742 },
28743 },
28744 {
28745 name: "MOVFstore",
28746 auxType: auxSymOff,
28747 argLen: 3,
28748 faultOnNilArg0: true,
28749 symEffect: SymWrite,
28750 asm: mips.AMOVF,
28751 reg: regInfo{
28752 inputs: []inputInfo{
28753 {0, 4611686018695823358},
28754 {1, 1152921504338411520},
28755 },
28756 },
28757 },
28758 {
28759 name: "MOVDstore",
28760 auxType: auxSymOff,
28761 argLen: 3,
28762 faultOnNilArg0: true,
28763 symEffect: SymWrite,
28764 asm: mips.AMOVD,
28765 reg: regInfo{
28766 inputs: []inputInfo{
28767 {0, 4611686018695823358},
28768 {1, 1152921504338411520},
28769 },
28770 },
28771 },
28772 {
28773 name: "MOVBstorezero",
28774 auxType: auxSymOff,
28775 argLen: 2,
28776 faultOnNilArg0: true,
28777 symEffect: SymWrite,
28778 asm: mips.AMOVB,
28779 reg: regInfo{
28780 inputs: []inputInfo{
28781 {0, 4611686018695823358},
28782 },
28783 },
28784 },
28785 {
28786 name: "MOVHstorezero",
28787 auxType: auxSymOff,
28788 argLen: 2,
28789 faultOnNilArg0: true,
28790 symEffect: SymWrite,
28791 asm: mips.AMOVH,
28792 reg: regInfo{
28793 inputs: []inputInfo{
28794 {0, 4611686018695823358},
28795 },
28796 },
28797 },
28798 {
28799 name: "MOVWstorezero",
28800 auxType: auxSymOff,
28801 argLen: 2,
28802 faultOnNilArg0: true,
28803 symEffect: SymWrite,
28804 asm: mips.AMOVW,
28805 reg: regInfo{
28806 inputs: []inputInfo{
28807 {0, 4611686018695823358},
28808 },
28809 },
28810 },
28811 {
28812 name: "MOVVstorezero",
28813 auxType: auxSymOff,
28814 argLen: 2,
28815 faultOnNilArg0: true,
28816 symEffect: SymWrite,
28817 asm: mips.AMOVV,
28818 reg: regInfo{
28819 inputs: []inputInfo{
28820 {0, 4611686018695823358},
28821 },
28822 },
28823 },
28824 {
28825 name: "MOVWfpgp",
28826 argLen: 1,
28827 asm: mips.AMOVW,
28828 reg: regInfo{
28829 inputs: []inputInfo{
28830 {0, 1152921504338411520},
28831 },
28832 outputs: []outputInfo{
28833 {0, 167772158},
28834 },
28835 },
28836 },
28837 {
28838 name: "MOVWgpfp",
28839 argLen: 1,
28840 asm: mips.AMOVW,
28841 reg: regInfo{
28842 inputs: []inputInfo{
28843 {0, 167772158},
28844 },
28845 outputs: []outputInfo{
28846 {0, 1152921504338411520},
28847 },
28848 },
28849 },
28850 {
28851 name: "MOVVfpgp",
28852 argLen: 1,
28853 asm: mips.AMOVV,
28854 reg: regInfo{
28855 inputs: []inputInfo{
28856 {0, 1152921504338411520},
28857 },
28858 outputs: []outputInfo{
28859 {0, 167772158},
28860 },
28861 },
28862 },
28863 {
28864 name: "MOVVgpfp",
28865 argLen: 1,
28866 asm: mips.AMOVV,
28867 reg: regInfo{
28868 inputs: []inputInfo{
28869 {0, 167772158},
28870 },
28871 outputs: []outputInfo{
28872 {0, 1152921504338411520},
28873 },
28874 },
28875 },
28876 {
28877 name: "MOVBreg",
28878 argLen: 1,
28879 asm: mips.AMOVB,
28880 reg: regInfo{
28881 inputs: []inputInfo{
28882 {0, 234881022},
28883 },
28884 outputs: []outputInfo{
28885 {0, 167772158},
28886 },
28887 },
28888 },
28889 {
28890 name: "MOVBUreg",
28891 argLen: 1,
28892 asm: mips.AMOVBU,
28893 reg: regInfo{
28894 inputs: []inputInfo{
28895 {0, 234881022},
28896 },
28897 outputs: []outputInfo{
28898 {0, 167772158},
28899 },
28900 },
28901 },
28902 {
28903 name: "MOVHreg",
28904 argLen: 1,
28905 asm: mips.AMOVH,
28906 reg: regInfo{
28907 inputs: []inputInfo{
28908 {0, 234881022},
28909 },
28910 outputs: []outputInfo{
28911 {0, 167772158},
28912 },
28913 },
28914 },
28915 {
28916 name: "MOVHUreg",
28917 argLen: 1,
28918 asm: mips.AMOVHU,
28919 reg: regInfo{
28920 inputs: []inputInfo{
28921 {0, 234881022},
28922 },
28923 outputs: []outputInfo{
28924 {0, 167772158},
28925 },
28926 },
28927 },
28928 {
28929 name: "MOVWreg",
28930 argLen: 1,
28931 asm: mips.AMOVW,
28932 reg: regInfo{
28933 inputs: []inputInfo{
28934 {0, 234881022},
28935 },
28936 outputs: []outputInfo{
28937 {0, 167772158},
28938 },
28939 },
28940 },
28941 {
28942 name: "MOVWUreg",
28943 argLen: 1,
28944 asm: mips.AMOVWU,
28945 reg: regInfo{
28946 inputs: []inputInfo{
28947 {0, 234881022},
28948 },
28949 outputs: []outputInfo{
28950 {0, 167772158},
28951 },
28952 },
28953 },
28954 {
28955 name: "MOVVreg",
28956 argLen: 1,
28957 asm: mips.AMOVV,
28958 reg: regInfo{
28959 inputs: []inputInfo{
28960 {0, 234881022},
28961 },
28962 outputs: []outputInfo{
28963 {0, 167772158},
28964 },
28965 },
28966 },
28967 {
28968 name: "MOVVnop",
28969 argLen: 1,
28970 resultInArg0: true,
28971 reg: regInfo{
28972 inputs: []inputInfo{
28973 {0, 167772158},
28974 },
28975 outputs: []outputInfo{
28976 {0, 167772158},
28977 },
28978 },
28979 },
28980 {
28981 name: "MOVWF",
28982 argLen: 1,
28983 asm: mips.AMOVWF,
28984 reg: regInfo{
28985 inputs: []inputInfo{
28986 {0, 1152921504338411520},
28987 },
28988 outputs: []outputInfo{
28989 {0, 1152921504338411520},
28990 },
28991 },
28992 },
28993 {
28994 name: "MOVWD",
28995 argLen: 1,
28996 asm: mips.AMOVWD,
28997 reg: regInfo{
28998 inputs: []inputInfo{
28999 {0, 1152921504338411520},
29000 },
29001 outputs: []outputInfo{
29002 {0, 1152921504338411520},
29003 },
29004 },
29005 },
29006 {
29007 name: "MOVVF",
29008 argLen: 1,
29009 asm: mips.AMOVVF,
29010 reg: regInfo{
29011 inputs: []inputInfo{
29012 {0, 1152921504338411520},
29013 },
29014 outputs: []outputInfo{
29015 {0, 1152921504338411520},
29016 },
29017 },
29018 },
29019 {
29020 name: "MOVVD",
29021 argLen: 1,
29022 asm: mips.AMOVVD,
29023 reg: regInfo{
29024 inputs: []inputInfo{
29025 {0, 1152921504338411520},
29026 },
29027 outputs: []outputInfo{
29028 {0, 1152921504338411520},
29029 },
29030 },
29031 },
29032 {
29033 name: "TRUNCFW",
29034 argLen: 1,
29035 asm: mips.ATRUNCFW,
29036 reg: regInfo{
29037 inputs: []inputInfo{
29038 {0, 1152921504338411520},
29039 },
29040 outputs: []outputInfo{
29041 {0, 1152921504338411520},
29042 },
29043 },
29044 },
29045 {
29046 name: "TRUNCDW",
29047 argLen: 1,
29048 asm: mips.ATRUNCDW,
29049 reg: regInfo{
29050 inputs: []inputInfo{
29051 {0, 1152921504338411520},
29052 },
29053 outputs: []outputInfo{
29054 {0, 1152921504338411520},
29055 },
29056 },
29057 },
29058 {
29059 name: "TRUNCFV",
29060 argLen: 1,
29061 asm: mips.ATRUNCFV,
29062 reg: regInfo{
29063 inputs: []inputInfo{
29064 {0, 1152921504338411520},
29065 },
29066 outputs: []outputInfo{
29067 {0, 1152921504338411520},
29068 },
29069 },
29070 },
29071 {
29072 name: "TRUNCDV",
29073 argLen: 1,
29074 asm: mips.ATRUNCDV,
29075 reg: regInfo{
29076 inputs: []inputInfo{
29077 {0, 1152921504338411520},
29078 },
29079 outputs: []outputInfo{
29080 {0, 1152921504338411520},
29081 },
29082 },
29083 },
29084 {
29085 name: "MOVFD",
29086 argLen: 1,
29087 asm: mips.AMOVFD,
29088 reg: regInfo{
29089 inputs: []inputInfo{
29090 {0, 1152921504338411520},
29091 },
29092 outputs: []outputInfo{
29093 {0, 1152921504338411520},
29094 },
29095 },
29096 },
29097 {
29098 name: "MOVDF",
29099 argLen: 1,
29100 asm: mips.AMOVDF,
29101 reg: regInfo{
29102 inputs: []inputInfo{
29103 {0, 1152921504338411520},
29104 },
29105 outputs: []outputInfo{
29106 {0, 1152921504338411520},
29107 },
29108 },
29109 },
29110 {
29111 name: "CALLstatic",
29112 auxType: auxCallOff,
29113 argLen: 1,
29114 clobberFlags: true,
29115 call: true,
29116 reg: regInfo{
29117 clobbers: 4611686018393833470,
29118 },
29119 },
29120 {
29121 name: "CALLtail",
29122 auxType: auxCallOff,
29123 argLen: 1,
29124 clobberFlags: true,
29125 call: true,
29126 tailCall: true,
29127 reg: regInfo{
29128 clobbers: 4611686018393833470,
29129 },
29130 },
29131 {
29132 name: "CALLclosure",
29133 auxType: auxCallOff,
29134 argLen: 3,
29135 clobberFlags: true,
29136 call: true,
29137 reg: regInfo{
29138 inputs: []inputInfo{
29139 {1, 4194304},
29140 {0, 201326590},
29141 },
29142 clobbers: 4611686018393833470,
29143 },
29144 },
29145 {
29146 name: "CALLinter",
29147 auxType: auxCallOff,
29148 argLen: 2,
29149 clobberFlags: true,
29150 call: true,
29151 reg: regInfo{
29152 inputs: []inputInfo{
29153 {0, 167772158},
29154 },
29155 clobbers: 4611686018393833470,
29156 },
29157 },
29158 {
29159 name: "DUFFZERO",
29160 auxType: auxInt64,
29161 argLen: 2,
29162 faultOnNilArg0: true,
29163 reg: regInfo{
29164 inputs: []inputInfo{
29165 {0, 167772158},
29166 },
29167 clobbers: 134217730,
29168 },
29169 },
29170 {
29171 name: "DUFFCOPY",
29172 auxType: auxInt64,
29173 argLen: 3,
29174 faultOnNilArg0: true,
29175 faultOnNilArg1: true,
29176 reg: regInfo{
29177 inputs: []inputInfo{
29178 {0, 4},
29179 {1, 2},
29180 },
29181 clobbers: 134217734,
29182 },
29183 },
29184 {
29185 name: "LoweredZero",
29186 auxType: auxInt64,
29187 argLen: 3,
29188 clobberFlags: true,
29189 faultOnNilArg0: true,
29190 reg: regInfo{
29191 inputs: []inputInfo{
29192 {0, 2},
29193 {1, 167772158},
29194 },
29195 clobbers: 2,
29196 },
29197 },
29198 {
29199 name: "LoweredMove",
29200 auxType: auxInt64,
29201 argLen: 4,
29202 clobberFlags: true,
29203 faultOnNilArg0: true,
29204 faultOnNilArg1: true,
29205 reg: regInfo{
29206 inputs: []inputInfo{
29207 {0, 4},
29208 {1, 2},
29209 {2, 167772158},
29210 },
29211 clobbers: 6,
29212 },
29213 },
29214 {
29215 name: "LoweredAtomicAnd32",
29216 argLen: 3,
29217 faultOnNilArg0: true,
29218 hasSideEffects: true,
29219 unsafePoint: true,
29220 asm: mips.AAND,
29221 reg: regInfo{
29222 inputs: []inputInfo{
29223 {1, 234881022},
29224 {0, 4611686018695823358},
29225 },
29226 },
29227 },
29228 {
29229 name: "LoweredAtomicOr32",
29230 argLen: 3,
29231 faultOnNilArg0: true,
29232 hasSideEffects: true,
29233 unsafePoint: true,
29234 asm: mips.AOR,
29235 reg: regInfo{
29236 inputs: []inputInfo{
29237 {1, 234881022},
29238 {0, 4611686018695823358},
29239 },
29240 },
29241 },
29242 {
29243 name: "LoweredAtomicLoad8",
29244 argLen: 2,
29245 faultOnNilArg0: true,
29246 reg: regInfo{
29247 inputs: []inputInfo{
29248 {0, 4611686018695823358},
29249 },
29250 outputs: []outputInfo{
29251 {0, 167772158},
29252 },
29253 },
29254 },
29255 {
29256 name: "LoweredAtomicLoad32",
29257 argLen: 2,
29258 faultOnNilArg0: true,
29259 reg: regInfo{
29260 inputs: []inputInfo{
29261 {0, 4611686018695823358},
29262 },
29263 outputs: []outputInfo{
29264 {0, 167772158},
29265 },
29266 },
29267 },
29268 {
29269 name: "LoweredAtomicLoad64",
29270 argLen: 2,
29271 faultOnNilArg0: true,
29272 reg: regInfo{
29273 inputs: []inputInfo{
29274 {0, 4611686018695823358},
29275 },
29276 outputs: []outputInfo{
29277 {0, 167772158},
29278 },
29279 },
29280 },
29281 {
29282 name: "LoweredAtomicStore8",
29283 argLen: 3,
29284 faultOnNilArg0: true,
29285 hasSideEffects: true,
29286 reg: regInfo{
29287 inputs: []inputInfo{
29288 {1, 234881022},
29289 {0, 4611686018695823358},
29290 },
29291 },
29292 },
29293 {
29294 name: "LoweredAtomicStore32",
29295 argLen: 3,
29296 faultOnNilArg0: true,
29297 hasSideEffects: true,
29298 reg: regInfo{
29299 inputs: []inputInfo{
29300 {1, 234881022},
29301 {0, 4611686018695823358},
29302 },
29303 },
29304 },
29305 {
29306 name: "LoweredAtomicStore64",
29307 argLen: 3,
29308 faultOnNilArg0: true,
29309 hasSideEffects: true,
29310 reg: regInfo{
29311 inputs: []inputInfo{
29312 {1, 234881022},
29313 {0, 4611686018695823358},
29314 },
29315 },
29316 },
29317 {
29318 name: "LoweredAtomicStorezero32",
29319 argLen: 2,
29320 faultOnNilArg0: true,
29321 hasSideEffects: true,
29322 reg: regInfo{
29323 inputs: []inputInfo{
29324 {0, 4611686018695823358},
29325 },
29326 },
29327 },
29328 {
29329 name: "LoweredAtomicStorezero64",
29330 argLen: 2,
29331 faultOnNilArg0: true,
29332 hasSideEffects: true,
29333 reg: regInfo{
29334 inputs: []inputInfo{
29335 {0, 4611686018695823358},
29336 },
29337 },
29338 },
29339 {
29340 name: "LoweredAtomicExchange32",
29341 argLen: 3,
29342 resultNotInArgs: true,
29343 faultOnNilArg0: true,
29344 hasSideEffects: true,
29345 unsafePoint: true,
29346 reg: regInfo{
29347 inputs: []inputInfo{
29348 {1, 234881022},
29349 {0, 4611686018695823358},
29350 },
29351 outputs: []outputInfo{
29352 {0, 167772158},
29353 },
29354 },
29355 },
29356 {
29357 name: "LoweredAtomicExchange64",
29358 argLen: 3,
29359 resultNotInArgs: true,
29360 faultOnNilArg0: true,
29361 hasSideEffects: true,
29362 unsafePoint: true,
29363 reg: regInfo{
29364 inputs: []inputInfo{
29365 {1, 234881022},
29366 {0, 4611686018695823358},
29367 },
29368 outputs: []outputInfo{
29369 {0, 167772158},
29370 },
29371 },
29372 },
29373 {
29374 name: "LoweredAtomicAdd32",
29375 argLen: 3,
29376 resultNotInArgs: true,
29377 faultOnNilArg0: true,
29378 hasSideEffects: true,
29379 unsafePoint: true,
29380 reg: regInfo{
29381 inputs: []inputInfo{
29382 {1, 234881022},
29383 {0, 4611686018695823358},
29384 },
29385 outputs: []outputInfo{
29386 {0, 167772158},
29387 },
29388 },
29389 },
29390 {
29391 name: "LoweredAtomicAdd64",
29392 argLen: 3,
29393 resultNotInArgs: true,
29394 faultOnNilArg0: true,
29395 hasSideEffects: true,
29396 unsafePoint: true,
29397 reg: regInfo{
29398 inputs: []inputInfo{
29399 {1, 234881022},
29400 {0, 4611686018695823358},
29401 },
29402 outputs: []outputInfo{
29403 {0, 167772158},
29404 },
29405 },
29406 },
29407 {
29408 name: "LoweredAtomicAddconst32",
29409 auxType: auxInt32,
29410 argLen: 2,
29411 resultNotInArgs: true,
29412 faultOnNilArg0: true,
29413 hasSideEffects: true,
29414 unsafePoint: true,
29415 reg: regInfo{
29416 inputs: []inputInfo{
29417 {0, 4611686018695823358},
29418 },
29419 outputs: []outputInfo{
29420 {0, 167772158},
29421 },
29422 },
29423 },
29424 {
29425 name: "LoweredAtomicAddconst64",
29426 auxType: auxInt64,
29427 argLen: 2,
29428 resultNotInArgs: true,
29429 faultOnNilArg0: true,
29430 hasSideEffects: true,
29431 unsafePoint: true,
29432 reg: regInfo{
29433 inputs: []inputInfo{
29434 {0, 4611686018695823358},
29435 },
29436 outputs: []outputInfo{
29437 {0, 167772158},
29438 },
29439 },
29440 },
29441 {
29442 name: "LoweredAtomicCas32",
29443 argLen: 4,
29444 resultNotInArgs: true,
29445 faultOnNilArg0: true,
29446 hasSideEffects: true,
29447 unsafePoint: true,
29448 reg: regInfo{
29449 inputs: []inputInfo{
29450 {1, 234881022},
29451 {2, 234881022},
29452 {0, 4611686018695823358},
29453 },
29454 outputs: []outputInfo{
29455 {0, 167772158},
29456 },
29457 },
29458 },
29459 {
29460 name: "LoweredAtomicCas64",
29461 argLen: 4,
29462 resultNotInArgs: true,
29463 faultOnNilArg0: true,
29464 hasSideEffects: true,
29465 unsafePoint: true,
29466 reg: regInfo{
29467 inputs: []inputInfo{
29468 {1, 234881022},
29469 {2, 234881022},
29470 {0, 4611686018695823358},
29471 },
29472 outputs: []outputInfo{
29473 {0, 167772158},
29474 },
29475 },
29476 },
29477 {
29478 name: "LoweredNilCheck",
29479 argLen: 2,
29480 nilCheck: true,
29481 faultOnNilArg0: true,
29482 reg: regInfo{
29483 inputs: []inputInfo{
29484 {0, 234881022},
29485 },
29486 },
29487 },
29488 {
29489 name: "FPFlagTrue",
29490 argLen: 1,
29491 reg: regInfo{
29492 outputs: []outputInfo{
29493 {0, 167772158},
29494 },
29495 },
29496 },
29497 {
29498 name: "FPFlagFalse",
29499 argLen: 1,
29500 reg: regInfo{
29501 outputs: []outputInfo{
29502 {0, 167772158},
29503 },
29504 },
29505 },
29506 {
29507 name: "LoweredGetClosurePtr",
29508 argLen: 0,
29509 zeroWidth: true,
29510 reg: regInfo{
29511 outputs: []outputInfo{
29512 {0, 4194304},
29513 },
29514 },
29515 },
29516 {
29517 name: "LoweredGetCallerSP",
29518 argLen: 1,
29519 rematerializeable: true,
29520 reg: regInfo{
29521 outputs: []outputInfo{
29522 {0, 167772158},
29523 },
29524 },
29525 },
29526 {
29527 name: "LoweredGetCallerPC",
29528 argLen: 0,
29529 rematerializeable: true,
29530 reg: regInfo{
29531 outputs: []outputInfo{
29532 {0, 167772158},
29533 },
29534 },
29535 },
29536 {
29537 name: "LoweredWB",
29538 auxType: auxInt64,
29539 argLen: 1,
29540 clobberFlags: true,
29541 reg: regInfo{
29542 clobbers: 4611686018293170176,
29543 outputs: []outputInfo{
29544 {0, 16777216},
29545 },
29546 },
29547 },
29548 {
29549 name: "LoweredPanicBoundsA",
29550 auxType: auxInt64,
29551 argLen: 3,
29552 call: true,
29553 reg: regInfo{
29554 inputs: []inputInfo{
29555 {0, 8},
29556 {1, 16},
29557 },
29558 },
29559 },
29560 {
29561 name: "LoweredPanicBoundsB",
29562 auxType: auxInt64,
29563 argLen: 3,
29564 call: true,
29565 reg: regInfo{
29566 inputs: []inputInfo{
29567 {0, 4},
29568 {1, 8},
29569 },
29570 },
29571 },
29572 {
29573 name: "LoweredPanicBoundsC",
29574 auxType: auxInt64,
29575 argLen: 3,
29576 call: true,
29577 reg: regInfo{
29578 inputs: []inputInfo{
29579 {0, 2},
29580 {1, 4},
29581 },
29582 },
29583 },
29584
29585 {
29586 name: "ADD",
29587 argLen: 2,
29588 commutative: true,
29589 asm: ppc64.AADD,
29590 reg: regInfo{
29591 inputs: []inputInfo{
29592 {0, 1073733630},
29593 {1, 1073733630},
29594 },
29595 outputs: []outputInfo{
29596 {0, 1073733624},
29597 },
29598 },
29599 },
29600 {
29601 name: "ADDCC",
29602 argLen: 2,
29603 commutative: true,
29604 asm: ppc64.AADDCC,
29605 reg: regInfo{
29606 inputs: []inputInfo{
29607 {0, 1073733630},
29608 {1, 1073733630},
29609 },
29610 outputs: []outputInfo{
29611 {0, 1073733624},
29612 },
29613 },
29614 },
29615 {
29616 name: "ADDconst",
29617 auxType: auxInt64,
29618 argLen: 1,
29619 asm: ppc64.AADD,
29620 reg: regInfo{
29621 inputs: []inputInfo{
29622 {0, 1073733630},
29623 },
29624 outputs: []outputInfo{
29625 {0, 1073733624},
29626 },
29627 },
29628 },
29629 {
29630 name: "ADDCCconst",
29631 auxType: auxInt64,
29632 argLen: 1,
29633 asm: ppc64.AADDCCC,
29634 reg: regInfo{
29635 inputs: []inputInfo{
29636 {0, 1073733630},
29637 },
29638 clobbers: 9223372036854775808,
29639 outputs: []outputInfo{
29640 {0, 1073733624},
29641 },
29642 },
29643 },
29644 {
29645 name: "FADD",
29646 argLen: 2,
29647 commutative: true,
29648 asm: ppc64.AFADD,
29649 reg: regInfo{
29650 inputs: []inputInfo{
29651 {0, 9223372032559808512},
29652 {1, 9223372032559808512},
29653 },
29654 outputs: []outputInfo{
29655 {0, 9223372032559808512},
29656 },
29657 },
29658 },
29659 {
29660 name: "FADDS",
29661 argLen: 2,
29662 commutative: true,
29663 asm: ppc64.AFADDS,
29664 reg: regInfo{
29665 inputs: []inputInfo{
29666 {0, 9223372032559808512},
29667 {1, 9223372032559808512},
29668 },
29669 outputs: []outputInfo{
29670 {0, 9223372032559808512},
29671 },
29672 },
29673 },
29674 {
29675 name: "SUB",
29676 argLen: 2,
29677 asm: ppc64.ASUB,
29678 reg: regInfo{
29679 inputs: []inputInfo{
29680 {0, 1073733630},
29681 {1, 1073733630},
29682 },
29683 outputs: []outputInfo{
29684 {0, 1073733624},
29685 },
29686 },
29687 },
29688 {
29689 name: "SUBCC",
29690 argLen: 2,
29691 asm: ppc64.ASUBCC,
29692 reg: regInfo{
29693 inputs: []inputInfo{
29694 {0, 1073733630},
29695 {1, 1073733630},
29696 },
29697 outputs: []outputInfo{
29698 {0, 1073733624},
29699 },
29700 },
29701 },
29702 {
29703 name: "SUBFCconst",
29704 auxType: auxInt64,
29705 argLen: 1,
29706 asm: ppc64.ASUBC,
29707 reg: regInfo{
29708 inputs: []inputInfo{
29709 {0, 1073733630},
29710 },
29711 clobbers: 9223372036854775808,
29712 outputs: []outputInfo{
29713 {0, 1073733624},
29714 },
29715 },
29716 },
29717 {
29718 name: "FSUB",
29719 argLen: 2,
29720 asm: ppc64.AFSUB,
29721 reg: regInfo{
29722 inputs: []inputInfo{
29723 {0, 9223372032559808512},
29724 {1, 9223372032559808512},
29725 },
29726 outputs: []outputInfo{
29727 {0, 9223372032559808512},
29728 },
29729 },
29730 },
29731 {
29732 name: "FSUBS",
29733 argLen: 2,
29734 asm: ppc64.AFSUBS,
29735 reg: regInfo{
29736 inputs: []inputInfo{
29737 {0, 9223372032559808512},
29738 {1, 9223372032559808512},
29739 },
29740 outputs: []outputInfo{
29741 {0, 9223372032559808512},
29742 },
29743 },
29744 },
29745 {
29746 name: "XSMINJDP",
29747 argLen: 2,
29748 asm: ppc64.AXSMINJDP,
29749 reg: regInfo{
29750 inputs: []inputInfo{
29751 {0, 9223372032559808512},
29752 {1, 9223372032559808512},
29753 },
29754 outputs: []outputInfo{
29755 {0, 9223372032559808512},
29756 },
29757 },
29758 },
29759 {
29760 name: "XSMAXJDP",
29761 argLen: 2,
29762 asm: ppc64.AXSMAXJDP,
29763 reg: regInfo{
29764 inputs: []inputInfo{
29765 {0, 9223372032559808512},
29766 {1, 9223372032559808512},
29767 },
29768 outputs: []outputInfo{
29769 {0, 9223372032559808512},
29770 },
29771 },
29772 },
29773 {
29774 name: "MULLD",
29775 argLen: 2,
29776 commutative: true,
29777 asm: ppc64.AMULLD,
29778 reg: regInfo{
29779 inputs: []inputInfo{
29780 {0, 1073733630},
29781 {1, 1073733630},
29782 },
29783 outputs: []outputInfo{
29784 {0, 1073733624},
29785 },
29786 },
29787 },
29788 {
29789 name: "MULLW",
29790 argLen: 2,
29791 commutative: true,
29792 asm: ppc64.AMULLW,
29793 reg: regInfo{
29794 inputs: []inputInfo{
29795 {0, 1073733630},
29796 {1, 1073733630},
29797 },
29798 outputs: []outputInfo{
29799 {0, 1073733624},
29800 },
29801 },
29802 },
29803 {
29804 name: "MULLDconst",
29805 auxType: auxInt32,
29806 argLen: 1,
29807 asm: ppc64.AMULLD,
29808 reg: regInfo{
29809 inputs: []inputInfo{
29810 {0, 1073733630},
29811 },
29812 outputs: []outputInfo{
29813 {0, 1073733624},
29814 },
29815 },
29816 },
29817 {
29818 name: "MULLWconst",
29819 auxType: auxInt32,
29820 argLen: 1,
29821 asm: ppc64.AMULLW,
29822 reg: regInfo{
29823 inputs: []inputInfo{
29824 {0, 1073733630},
29825 },
29826 outputs: []outputInfo{
29827 {0, 1073733624},
29828 },
29829 },
29830 },
29831 {
29832 name: "MADDLD",
29833 argLen: 3,
29834 asm: ppc64.AMADDLD,
29835 reg: regInfo{
29836 inputs: []inputInfo{
29837 {0, 1073733630},
29838 {1, 1073733630},
29839 {2, 1073733630},
29840 },
29841 outputs: []outputInfo{
29842 {0, 1073733624},
29843 },
29844 },
29845 },
29846 {
29847 name: "MULHD",
29848 argLen: 2,
29849 commutative: true,
29850 asm: ppc64.AMULHD,
29851 reg: regInfo{
29852 inputs: []inputInfo{
29853 {0, 1073733630},
29854 {1, 1073733630},
29855 },
29856 outputs: []outputInfo{
29857 {0, 1073733624},
29858 },
29859 },
29860 },
29861 {
29862 name: "MULHW",
29863 argLen: 2,
29864 commutative: true,
29865 asm: ppc64.AMULHW,
29866 reg: regInfo{
29867 inputs: []inputInfo{
29868 {0, 1073733630},
29869 {1, 1073733630},
29870 },
29871 outputs: []outputInfo{
29872 {0, 1073733624},
29873 },
29874 },
29875 },
29876 {
29877 name: "MULHDU",
29878 argLen: 2,
29879 commutative: true,
29880 asm: ppc64.AMULHDU,
29881 reg: regInfo{
29882 inputs: []inputInfo{
29883 {0, 1073733630},
29884 {1, 1073733630},
29885 },
29886 outputs: []outputInfo{
29887 {0, 1073733624},
29888 },
29889 },
29890 },
29891 {
29892 name: "MULHDUCC",
29893 argLen: 2,
29894 commutative: true,
29895 asm: ppc64.AMULHDUCC,
29896 reg: regInfo{
29897 inputs: []inputInfo{
29898 {0, 1073733630},
29899 {1, 1073733630},
29900 },
29901 outputs: []outputInfo{
29902 {0, 1073733624},
29903 },
29904 },
29905 },
29906 {
29907 name: "MULHWU",
29908 argLen: 2,
29909 commutative: true,
29910 asm: ppc64.AMULHWU,
29911 reg: regInfo{
29912 inputs: []inputInfo{
29913 {0, 1073733630},
29914 {1, 1073733630},
29915 },
29916 outputs: []outputInfo{
29917 {0, 1073733624},
29918 },
29919 },
29920 },
29921 {
29922 name: "FMUL",
29923 argLen: 2,
29924 commutative: true,
29925 asm: ppc64.AFMUL,
29926 reg: regInfo{
29927 inputs: []inputInfo{
29928 {0, 9223372032559808512},
29929 {1, 9223372032559808512},
29930 },
29931 outputs: []outputInfo{
29932 {0, 9223372032559808512},
29933 },
29934 },
29935 },
29936 {
29937 name: "FMULS",
29938 argLen: 2,
29939 commutative: true,
29940 asm: ppc64.AFMULS,
29941 reg: regInfo{
29942 inputs: []inputInfo{
29943 {0, 9223372032559808512},
29944 {1, 9223372032559808512},
29945 },
29946 outputs: []outputInfo{
29947 {0, 9223372032559808512},
29948 },
29949 },
29950 },
29951 {
29952 name: "FMADD",
29953 argLen: 3,
29954 asm: ppc64.AFMADD,
29955 reg: regInfo{
29956 inputs: []inputInfo{
29957 {0, 9223372032559808512},
29958 {1, 9223372032559808512},
29959 {2, 9223372032559808512},
29960 },
29961 outputs: []outputInfo{
29962 {0, 9223372032559808512},
29963 },
29964 },
29965 },
29966 {
29967 name: "FMADDS",
29968 argLen: 3,
29969 asm: ppc64.AFMADDS,
29970 reg: regInfo{
29971 inputs: []inputInfo{
29972 {0, 9223372032559808512},
29973 {1, 9223372032559808512},
29974 {2, 9223372032559808512},
29975 },
29976 outputs: []outputInfo{
29977 {0, 9223372032559808512},
29978 },
29979 },
29980 },
29981 {
29982 name: "FMSUB",
29983 argLen: 3,
29984 asm: ppc64.AFMSUB,
29985 reg: regInfo{
29986 inputs: []inputInfo{
29987 {0, 9223372032559808512},
29988 {1, 9223372032559808512},
29989 {2, 9223372032559808512},
29990 },
29991 outputs: []outputInfo{
29992 {0, 9223372032559808512},
29993 },
29994 },
29995 },
29996 {
29997 name: "FMSUBS",
29998 argLen: 3,
29999 asm: ppc64.AFMSUBS,
30000 reg: regInfo{
30001 inputs: []inputInfo{
30002 {0, 9223372032559808512},
30003 {1, 9223372032559808512},
30004 {2, 9223372032559808512},
30005 },
30006 outputs: []outputInfo{
30007 {0, 9223372032559808512},
30008 },
30009 },
30010 },
30011 {
30012 name: "SRAD",
30013 argLen: 2,
30014 asm: ppc64.ASRAD,
30015 reg: regInfo{
30016 inputs: []inputInfo{
30017 {0, 1073733630},
30018 {1, 1073733630},
30019 },
30020 clobbers: 9223372036854775808,
30021 outputs: []outputInfo{
30022 {0, 1073733624},
30023 },
30024 },
30025 },
30026 {
30027 name: "SRAW",
30028 argLen: 2,
30029 asm: ppc64.ASRAW,
30030 reg: regInfo{
30031 inputs: []inputInfo{
30032 {0, 1073733630},
30033 {1, 1073733630},
30034 },
30035 clobbers: 9223372036854775808,
30036 outputs: []outputInfo{
30037 {0, 1073733624},
30038 },
30039 },
30040 },
30041 {
30042 name: "SRD",
30043 argLen: 2,
30044 asm: ppc64.ASRD,
30045 reg: regInfo{
30046 inputs: []inputInfo{
30047 {0, 1073733630},
30048 {1, 1073733630},
30049 },
30050 outputs: []outputInfo{
30051 {0, 1073733624},
30052 },
30053 },
30054 },
30055 {
30056 name: "SRW",
30057 argLen: 2,
30058 asm: ppc64.ASRW,
30059 reg: regInfo{
30060 inputs: []inputInfo{
30061 {0, 1073733630},
30062 {1, 1073733630},
30063 },
30064 outputs: []outputInfo{
30065 {0, 1073733624},
30066 },
30067 },
30068 },
30069 {
30070 name: "SLD",
30071 argLen: 2,
30072 asm: ppc64.ASLD,
30073 reg: regInfo{
30074 inputs: []inputInfo{
30075 {0, 1073733630},
30076 {1, 1073733630},
30077 },
30078 outputs: []outputInfo{
30079 {0, 1073733624},
30080 },
30081 },
30082 },
30083 {
30084 name: "SLW",
30085 argLen: 2,
30086 asm: ppc64.ASLW,
30087 reg: regInfo{
30088 inputs: []inputInfo{
30089 {0, 1073733630},
30090 {1, 1073733630},
30091 },
30092 outputs: []outputInfo{
30093 {0, 1073733624},
30094 },
30095 },
30096 },
30097 {
30098 name: "ROTL",
30099 argLen: 2,
30100 asm: ppc64.AROTL,
30101 reg: regInfo{
30102 inputs: []inputInfo{
30103 {0, 1073733630},
30104 {1, 1073733630},
30105 },
30106 outputs: []outputInfo{
30107 {0, 1073733624},
30108 },
30109 },
30110 },
30111 {
30112 name: "ROTLW",
30113 argLen: 2,
30114 asm: ppc64.AROTLW,
30115 reg: regInfo{
30116 inputs: []inputInfo{
30117 {0, 1073733630},
30118 {1, 1073733630},
30119 },
30120 outputs: []outputInfo{
30121 {0, 1073733624},
30122 },
30123 },
30124 },
30125 {
30126 name: "CLRLSLWI",
30127 auxType: auxInt32,
30128 argLen: 1,
30129 asm: ppc64.ACLRLSLWI,
30130 reg: regInfo{
30131 inputs: []inputInfo{
30132 {0, 1073733630},
30133 },
30134 outputs: []outputInfo{
30135 {0, 1073733624},
30136 },
30137 },
30138 },
30139 {
30140 name: "CLRLSLDI",
30141 auxType: auxInt32,
30142 argLen: 1,
30143 asm: ppc64.ACLRLSLDI,
30144 reg: regInfo{
30145 inputs: []inputInfo{
30146 {0, 1073733630},
30147 },
30148 outputs: []outputInfo{
30149 {0, 1073733624},
30150 },
30151 },
30152 },
30153 {
30154 name: "ADDC",
30155 argLen: 2,
30156 commutative: true,
30157 asm: ppc64.AADDC,
30158 reg: regInfo{
30159 inputs: []inputInfo{
30160 {0, 1073733630},
30161 {1, 1073733630},
30162 },
30163 clobbers: 9223372036854775808,
30164 outputs: []outputInfo{
30165 {1, 9223372036854775808},
30166 {0, 1073733624},
30167 },
30168 },
30169 },
30170 {
30171 name: "SUBC",
30172 argLen: 2,
30173 asm: ppc64.ASUBC,
30174 reg: regInfo{
30175 inputs: []inputInfo{
30176 {0, 1073733630},
30177 {1, 1073733630},
30178 },
30179 clobbers: 9223372036854775808,
30180 outputs: []outputInfo{
30181 {1, 9223372036854775808},
30182 {0, 1073733624},
30183 },
30184 },
30185 },
30186 {
30187 name: "ADDCconst",
30188 auxType: auxInt64,
30189 argLen: 1,
30190 asm: ppc64.AADDC,
30191 reg: regInfo{
30192 inputs: []inputInfo{
30193 {0, 1073733630},
30194 },
30195 outputs: []outputInfo{
30196 {1, 9223372036854775808},
30197 {0, 1073733624},
30198 },
30199 },
30200 },
30201 {
30202 name: "SUBCconst",
30203 auxType: auxInt64,
30204 argLen: 1,
30205 asm: ppc64.ASUBC,
30206 reg: regInfo{
30207 inputs: []inputInfo{
30208 {0, 1073733630},
30209 },
30210 outputs: []outputInfo{
30211 {1, 9223372036854775808},
30212 {0, 1073733624},
30213 },
30214 },
30215 },
30216 {
30217 name: "ADDE",
30218 argLen: 3,
30219 commutative: true,
30220 asm: ppc64.AADDE,
30221 reg: regInfo{
30222 inputs: []inputInfo{
30223 {2, 9223372036854775808},
30224 {0, 1073733630},
30225 {1, 1073733630},
30226 },
30227 clobbers: 9223372036854775808,
30228 outputs: []outputInfo{
30229 {1, 9223372036854775808},
30230 {0, 1073733624},
30231 },
30232 },
30233 },
30234 {
30235 name: "ADDZE",
30236 argLen: 2,
30237 asm: ppc64.AADDZE,
30238 reg: regInfo{
30239 inputs: []inputInfo{
30240 {1, 9223372036854775808},
30241 {0, 1073733630},
30242 },
30243 clobbers: 9223372036854775808,
30244 outputs: []outputInfo{
30245 {1, 9223372036854775808},
30246 {0, 1073733624},
30247 },
30248 },
30249 },
30250 {
30251 name: "SUBE",
30252 argLen: 3,
30253 asm: ppc64.ASUBE,
30254 reg: regInfo{
30255 inputs: []inputInfo{
30256 {2, 9223372036854775808},
30257 {0, 1073733630},
30258 {1, 1073733630},
30259 },
30260 clobbers: 9223372036854775808,
30261 outputs: []outputInfo{
30262 {1, 9223372036854775808},
30263 {0, 1073733624},
30264 },
30265 },
30266 },
30267 {
30268 name: "ADDZEzero",
30269 argLen: 1,
30270 asm: ppc64.AADDZE,
30271 reg: regInfo{
30272 inputs: []inputInfo{
30273 {0, 9223372036854775808},
30274 },
30275 clobbers: 9223372036854775808,
30276 outputs: []outputInfo{
30277 {0, 1073733624},
30278 },
30279 },
30280 },
30281 {
30282 name: "SUBZEzero",
30283 argLen: 1,
30284 asm: ppc64.ASUBZE,
30285 reg: regInfo{
30286 inputs: []inputInfo{
30287 {0, 9223372036854775808},
30288 },
30289 clobbers: 9223372036854775808,
30290 outputs: []outputInfo{
30291 {0, 1073733624},
30292 },
30293 },
30294 },
30295 {
30296 name: "SRADconst",
30297 auxType: auxInt64,
30298 argLen: 1,
30299 asm: ppc64.ASRAD,
30300 reg: regInfo{
30301 inputs: []inputInfo{
30302 {0, 1073733630},
30303 },
30304 clobbers: 9223372036854775808,
30305 outputs: []outputInfo{
30306 {0, 1073733624},
30307 },
30308 },
30309 },
30310 {
30311 name: "SRAWconst",
30312 auxType: auxInt64,
30313 argLen: 1,
30314 asm: ppc64.ASRAW,
30315 reg: regInfo{
30316 inputs: []inputInfo{
30317 {0, 1073733630},
30318 },
30319 clobbers: 9223372036854775808,
30320 outputs: []outputInfo{
30321 {0, 1073733624},
30322 },
30323 },
30324 },
30325 {
30326 name: "SRDconst",
30327 auxType: auxInt64,
30328 argLen: 1,
30329 asm: ppc64.ASRD,
30330 reg: regInfo{
30331 inputs: []inputInfo{
30332 {0, 1073733630},
30333 },
30334 outputs: []outputInfo{
30335 {0, 1073733624},
30336 },
30337 },
30338 },
30339 {
30340 name: "SRWconst",
30341 auxType: auxInt64,
30342 argLen: 1,
30343 asm: ppc64.ASRW,
30344 reg: regInfo{
30345 inputs: []inputInfo{
30346 {0, 1073733630},
30347 },
30348 outputs: []outputInfo{
30349 {0, 1073733624},
30350 },
30351 },
30352 },
30353 {
30354 name: "SLDconst",
30355 auxType: auxInt64,
30356 argLen: 1,
30357 asm: ppc64.ASLD,
30358 reg: regInfo{
30359 inputs: []inputInfo{
30360 {0, 1073733630},
30361 },
30362 outputs: []outputInfo{
30363 {0, 1073733624},
30364 },
30365 },
30366 },
30367 {
30368 name: "SLWconst",
30369 auxType: auxInt64,
30370 argLen: 1,
30371 asm: ppc64.ASLW,
30372 reg: regInfo{
30373 inputs: []inputInfo{
30374 {0, 1073733630},
30375 },
30376 outputs: []outputInfo{
30377 {0, 1073733624},
30378 },
30379 },
30380 },
30381 {
30382 name: "ROTLconst",
30383 auxType: auxInt64,
30384 argLen: 1,
30385 asm: ppc64.AROTL,
30386 reg: regInfo{
30387 inputs: []inputInfo{
30388 {0, 1073733630},
30389 },
30390 outputs: []outputInfo{
30391 {0, 1073733624},
30392 },
30393 },
30394 },
30395 {
30396 name: "ROTLWconst",
30397 auxType: auxInt64,
30398 argLen: 1,
30399 asm: ppc64.AROTLW,
30400 reg: regInfo{
30401 inputs: []inputInfo{
30402 {0, 1073733630},
30403 },
30404 outputs: []outputInfo{
30405 {0, 1073733624},
30406 },
30407 },
30408 },
30409 {
30410 name: "EXTSWSLconst",
30411 auxType: auxInt64,
30412 argLen: 1,
30413 asm: ppc64.AEXTSWSLI,
30414 reg: regInfo{
30415 inputs: []inputInfo{
30416 {0, 1073733630},
30417 },
30418 outputs: []outputInfo{
30419 {0, 1073733624},
30420 },
30421 },
30422 },
30423 {
30424 name: "RLWINM",
30425 auxType: auxInt64,
30426 argLen: 1,
30427 asm: ppc64.ARLWNM,
30428 reg: regInfo{
30429 inputs: []inputInfo{
30430 {0, 1073733630},
30431 },
30432 outputs: []outputInfo{
30433 {0, 1073733624},
30434 },
30435 },
30436 },
30437 {
30438 name: "RLWNM",
30439 auxType: auxInt64,
30440 argLen: 2,
30441 asm: ppc64.ARLWNM,
30442 reg: regInfo{
30443 inputs: []inputInfo{
30444 {0, 1073733630},
30445 {1, 1073733630},
30446 },
30447 outputs: []outputInfo{
30448 {0, 1073733624},
30449 },
30450 },
30451 },
30452 {
30453 name: "RLWMI",
30454 auxType: auxInt64,
30455 argLen: 2,
30456 resultInArg0: true,
30457 asm: ppc64.ARLWMI,
30458 reg: regInfo{
30459 inputs: []inputInfo{
30460 {0, 1073733624},
30461 {1, 1073733630},
30462 },
30463 outputs: []outputInfo{
30464 {0, 1073733624},
30465 },
30466 },
30467 },
30468 {
30469 name: "RLDICL",
30470 auxType: auxInt64,
30471 argLen: 1,
30472 asm: ppc64.ARLDICL,
30473 reg: regInfo{
30474 inputs: []inputInfo{
30475 {0, 1073733630},
30476 },
30477 outputs: []outputInfo{
30478 {0, 1073733624},
30479 },
30480 },
30481 },
30482 {
30483 name: "RLDICLCC",
30484 auxType: auxInt64,
30485 argLen: 1,
30486 asm: ppc64.ARLDICLCC,
30487 reg: regInfo{
30488 inputs: []inputInfo{
30489 {0, 1073733630},
30490 },
30491 outputs: []outputInfo{
30492 {0, 1073733624},
30493 },
30494 },
30495 },
30496 {
30497 name: "RLDICR",
30498 auxType: auxInt64,
30499 argLen: 1,
30500 asm: ppc64.ARLDICR,
30501 reg: regInfo{
30502 inputs: []inputInfo{
30503 {0, 1073733630},
30504 },
30505 outputs: []outputInfo{
30506 {0, 1073733624},
30507 },
30508 },
30509 },
30510 {
30511 name: "CNTLZD",
30512 argLen: 1,
30513 asm: ppc64.ACNTLZD,
30514 reg: regInfo{
30515 inputs: []inputInfo{
30516 {0, 1073733630},
30517 },
30518 outputs: []outputInfo{
30519 {0, 1073733624},
30520 },
30521 },
30522 },
30523 {
30524 name: "CNTLZDCC",
30525 argLen: 1,
30526 asm: ppc64.ACNTLZDCC,
30527 reg: regInfo{
30528 inputs: []inputInfo{
30529 {0, 1073733630},
30530 },
30531 outputs: []outputInfo{
30532 {0, 1073733624},
30533 },
30534 },
30535 },
30536 {
30537 name: "CNTLZW",
30538 argLen: 1,
30539 asm: ppc64.ACNTLZW,
30540 reg: regInfo{
30541 inputs: []inputInfo{
30542 {0, 1073733630},
30543 },
30544 outputs: []outputInfo{
30545 {0, 1073733624},
30546 },
30547 },
30548 },
30549 {
30550 name: "CNTTZD",
30551 argLen: 1,
30552 asm: ppc64.ACNTTZD,
30553 reg: regInfo{
30554 inputs: []inputInfo{
30555 {0, 1073733630},
30556 },
30557 outputs: []outputInfo{
30558 {0, 1073733624},
30559 },
30560 },
30561 },
30562 {
30563 name: "CNTTZW",
30564 argLen: 1,
30565 asm: ppc64.ACNTTZW,
30566 reg: regInfo{
30567 inputs: []inputInfo{
30568 {0, 1073733630},
30569 },
30570 outputs: []outputInfo{
30571 {0, 1073733624},
30572 },
30573 },
30574 },
30575 {
30576 name: "POPCNTD",
30577 argLen: 1,
30578 asm: ppc64.APOPCNTD,
30579 reg: regInfo{
30580 inputs: []inputInfo{
30581 {0, 1073733630},
30582 },
30583 outputs: []outputInfo{
30584 {0, 1073733624},
30585 },
30586 },
30587 },
30588 {
30589 name: "POPCNTW",
30590 argLen: 1,
30591 asm: ppc64.APOPCNTW,
30592 reg: regInfo{
30593 inputs: []inputInfo{
30594 {0, 1073733630},
30595 },
30596 outputs: []outputInfo{
30597 {0, 1073733624},
30598 },
30599 },
30600 },
30601 {
30602 name: "POPCNTB",
30603 argLen: 1,
30604 asm: ppc64.APOPCNTB,
30605 reg: regInfo{
30606 inputs: []inputInfo{
30607 {0, 1073733630},
30608 },
30609 outputs: []outputInfo{
30610 {0, 1073733624},
30611 },
30612 },
30613 },
30614 {
30615 name: "FDIV",
30616 argLen: 2,
30617 asm: ppc64.AFDIV,
30618 reg: regInfo{
30619 inputs: []inputInfo{
30620 {0, 9223372032559808512},
30621 {1, 9223372032559808512},
30622 },
30623 outputs: []outputInfo{
30624 {0, 9223372032559808512},
30625 },
30626 },
30627 },
30628 {
30629 name: "FDIVS",
30630 argLen: 2,
30631 asm: ppc64.AFDIVS,
30632 reg: regInfo{
30633 inputs: []inputInfo{
30634 {0, 9223372032559808512},
30635 {1, 9223372032559808512},
30636 },
30637 outputs: []outputInfo{
30638 {0, 9223372032559808512},
30639 },
30640 },
30641 },
30642 {
30643 name: "DIVD",
30644 argLen: 2,
30645 asm: ppc64.ADIVD,
30646 reg: regInfo{
30647 inputs: []inputInfo{
30648 {0, 1073733630},
30649 {1, 1073733630},
30650 },
30651 outputs: []outputInfo{
30652 {0, 1073733624},
30653 },
30654 },
30655 },
30656 {
30657 name: "DIVW",
30658 argLen: 2,
30659 asm: ppc64.ADIVW,
30660 reg: regInfo{
30661 inputs: []inputInfo{
30662 {0, 1073733630},
30663 {1, 1073733630},
30664 },
30665 outputs: []outputInfo{
30666 {0, 1073733624},
30667 },
30668 },
30669 },
30670 {
30671 name: "DIVDU",
30672 argLen: 2,
30673 asm: ppc64.ADIVDU,
30674 reg: regInfo{
30675 inputs: []inputInfo{
30676 {0, 1073733630},
30677 {1, 1073733630},
30678 },
30679 outputs: []outputInfo{
30680 {0, 1073733624},
30681 },
30682 },
30683 },
30684 {
30685 name: "DIVWU",
30686 argLen: 2,
30687 asm: ppc64.ADIVWU,
30688 reg: regInfo{
30689 inputs: []inputInfo{
30690 {0, 1073733630},
30691 {1, 1073733630},
30692 },
30693 outputs: []outputInfo{
30694 {0, 1073733624},
30695 },
30696 },
30697 },
30698 {
30699 name: "MODUD",
30700 argLen: 2,
30701 asm: ppc64.AMODUD,
30702 reg: regInfo{
30703 inputs: []inputInfo{
30704 {0, 1073733630},
30705 {1, 1073733630},
30706 },
30707 outputs: []outputInfo{
30708 {0, 1073733624},
30709 },
30710 },
30711 },
30712 {
30713 name: "MODSD",
30714 argLen: 2,
30715 asm: ppc64.AMODSD,
30716 reg: regInfo{
30717 inputs: []inputInfo{
30718 {0, 1073733630},
30719 {1, 1073733630},
30720 },
30721 outputs: []outputInfo{
30722 {0, 1073733624},
30723 },
30724 },
30725 },
30726 {
30727 name: "MODUW",
30728 argLen: 2,
30729 asm: ppc64.AMODUW,
30730 reg: regInfo{
30731 inputs: []inputInfo{
30732 {0, 1073733630},
30733 {1, 1073733630},
30734 },
30735 outputs: []outputInfo{
30736 {0, 1073733624},
30737 },
30738 },
30739 },
30740 {
30741 name: "MODSW",
30742 argLen: 2,
30743 asm: ppc64.AMODSW,
30744 reg: regInfo{
30745 inputs: []inputInfo{
30746 {0, 1073733630},
30747 {1, 1073733630},
30748 },
30749 outputs: []outputInfo{
30750 {0, 1073733624},
30751 },
30752 },
30753 },
30754 {
30755 name: "FCTIDZ",
30756 argLen: 1,
30757 asm: ppc64.AFCTIDZ,
30758 reg: regInfo{
30759 inputs: []inputInfo{
30760 {0, 9223372032559808512},
30761 },
30762 outputs: []outputInfo{
30763 {0, 9223372032559808512},
30764 },
30765 },
30766 },
30767 {
30768 name: "FCTIWZ",
30769 argLen: 1,
30770 asm: ppc64.AFCTIWZ,
30771 reg: regInfo{
30772 inputs: []inputInfo{
30773 {0, 9223372032559808512},
30774 },
30775 outputs: []outputInfo{
30776 {0, 9223372032559808512},
30777 },
30778 },
30779 },
30780 {
30781 name: "FCFID",
30782 argLen: 1,
30783 asm: ppc64.AFCFID,
30784 reg: regInfo{
30785 inputs: []inputInfo{
30786 {0, 9223372032559808512},
30787 },
30788 outputs: []outputInfo{
30789 {0, 9223372032559808512},
30790 },
30791 },
30792 },
30793 {
30794 name: "FCFIDS",
30795 argLen: 1,
30796 asm: ppc64.AFCFIDS,
30797 reg: regInfo{
30798 inputs: []inputInfo{
30799 {0, 9223372032559808512},
30800 },
30801 outputs: []outputInfo{
30802 {0, 9223372032559808512},
30803 },
30804 },
30805 },
30806 {
30807 name: "FRSP",
30808 argLen: 1,
30809 asm: ppc64.AFRSP,
30810 reg: regInfo{
30811 inputs: []inputInfo{
30812 {0, 9223372032559808512},
30813 },
30814 outputs: []outputInfo{
30815 {0, 9223372032559808512},
30816 },
30817 },
30818 },
30819 {
30820 name: "MFVSRD",
30821 argLen: 1,
30822 asm: ppc64.AMFVSRD,
30823 reg: regInfo{
30824 inputs: []inputInfo{
30825 {0, 9223372032559808512},
30826 },
30827 outputs: []outputInfo{
30828 {0, 1073733624},
30829 },
30830 },
30831 },
30832 {
30833 name: "MTVSRD",
30834 argLen: 1,
30835 asm: ppc64.AMTVSRD,
30836 reg: regInfo{
30837 inputs: []inputInfo{
30838 {0, 1073733624},
30839 },
30840 outputs: []outputInfo{
30841 {0, 9223372032559808512},
30842 },
30843 },
30844 },
30845 {
30846 name: "AND",
30847 argLen: 2,
30848 commutative: true,
30849 asm: ppc64.AAND,
30850 reg: regInfo{
30851 inputs: []inputInfo{
30852 {0, 1073733630},
30853 {1, 1073733630},
30854 },
30855 outputs: []outputInfo{
30856 {0, 1073733624},
30857 },
30858 },
30859 },
30860 {
30861 name: "ANDN",
30862 argLen: 2,
30863 asm: ppc64.AANDN,
30864 reg: regInfo{
30865 inputs: []inputInfo{
30866 {0, 1073733630},
30867 {1, 1073733630},
30868 },
30869 outputs: []outputInfo{
30870 {0, 1073733624},
30871 },
30872 },
30873 },
30874 {
30875 name: "ANDNCC",
30876 argLen: 2,
30877 asm: ppc64.AANDNCC,
30878 reg: regInfo{
30879 inputs: []inputInfo{
30880 {0, 1073733630},
30881 {1, 1073733630},
30882 },
30883 outputs: []outputInfo{
30884 {0, 1073733624},
30885 },
30886 },
30887 },
30888 {
30889 name: "ANDCC",
30890 argLen: 2,
30891 commutative: true,
30892 asm: ppc64.AANDCC,
30893 reg: regInfo{
30894 inputs: []inputInfo{
30895 {0, 1073733630},
30896 {1, 1073733630},
30897 },
30898 outputs: []outputInfo{
30899 {0, 1073733624},
30900 },
30901 },
30902 },
30903 {
30904 name: "OR",
30905 argLen: 2,
30906 commutative: true,
30907 asm: ppc64.AOR,
30908 reg: regInfo{
30909 inputs: []inputInfo{
30910 {0, 1073733630},
30911 {1, 1073733630},
30912 },
30913 outputs: []outputInfo{
30914 {0, 1073733624},
30915 },
30916 },
30917 },
30918 {
30919 name: "ORN",
30920 argLen: 2,
30921 asm: ppc64.AORN,
30922 reg: regInfo{
30923 inputs: []inputInfo{
30924 {0, 1073733630},
30925 {1, 1073733630},
30926 },
30927 outputs: []outputInfo{
30928 {0, 1073733624},
30929 },
30930 },
30931 },
30932 {
30933 name: "ORCC",
30934 argLen: 2,
30935 commutative: true,
30936 asm: ppc64.AORCC,
30937 reg: regInfo{
30938 inputs: []inputInfo{
30939 {0, 1073733630},
30940 {1, 1073733630},
30941 },
30942 outputs: []outputInfo{
30943 {0, 1073733624},
30944 },
30945 },
30946 },
30947 {
30948 name: "NOR",
30949 argLen: 2,
30950 commutative: true,
30951 asm: ppc64.ANOR,
30952 reg: regInfo{
30953 inputs: []inputInfo{
30954 {0, 1073733630},
30955 {1, 1073733630},
30956 },
30957 outputs: []outputInfo{
30958 {0, 1073733624},
30959 },
30960 },
30961 },
30962 {
30963 name: "NORCC",
30964 argLen: 2,
30965 commutative: true,
30966 asm: ppc64.ANORCC,
30967 reg: regInfo{
30968 inputs: []inputInfo{
30969 {0, 1073733630},
30970 {1, 1073733630},
30971 },
30972 outputs: []outputInfo{
30973 {0, 1073733624},
30974 },
30975 },
30976 },
30977 {
30978 name: "XOR",
30979 argLen: 2,
30980 commutative: true,
30981 asm: ppc64.AXOR,
30982 reg: regInfo{
30983 inputs: []inputInfo{
30984 {0, 1073733630},
30985 {1, 1073733630},
30986 },
30987 outputs: []outputInfo{
30988 {0, 1073733624},
30989 },
30990 },
30991 },
30992 {
30993 name: "XORCC",
30994 argLen: 2,
30995 commutative: true,
30996 asm: ppc64.AXORCC,
30997 reg: regInfo{
30998 inputs: []inputInfo{
30999 {0, 1073733630},
31000 {1, 1073733630},
31001 },
31002 outputs: []outputInfo{
31003 {0, 1073733624},
31004 },
31005 },
31006 },
31007 {
31008 name: "EQV",
31009 argLen: 2,
31010 commutative: true,
31011 asm: ppc64.AEQV,
31012 reg: regInfo{
31013 inputs: []inputInfo{
31014 {0, 1073733630},
31015 {1, 1073733630},
31016 },
31017 outputs: []outputInfo{
31018 {0, 1073733624},
31019 },
31020 },
31021 },
31022 {
31023 name: "NEG",
31024 argLen: 1,
31025 asm: ppc64.ANEG,
31026 reg: regInfo{
31027 inputs: []inputInfo{
31028 {0, 1073733630},
31029 },
31030 outputs: []outputInfo{
31031 {0, 1073733624},
31032 },
31033 },
31034 },
31035 {
31036 name: "NEGCC",
31037 argLen: 1,
31038 asm: ppc64.ANEGCC,
31039 reg: regInfo{
31040 inputs: []inputInfo{
31041 {0, 1073733630},
31042 },
31043 outputs: []outputInfo{
31044 {0, 1073733624},
31045 },
31046 },
31047 },
31048 {
31049 name: "BRD",
31050 argLen: 1,
31051 asm: ppc64.ABRD,
31052 reg: regInfo{
31053 inputs: []inputInfo{
31054 {0, 1073733630},
31055 },
31056 outputs: []outputInfo{
31057 {0, 1073733624},
31058 },
31059 },
31060 },
31061 {
31062 name: "BRW",
31063 argLen: 1,
31064 asm: ppc64.ABRW,
31065 reg: regInfo{
31066 inputs: []inputInfo{
31067 {0, 1073733630},
31068 },
31069 outputs: []outputInfo{
31070 {0, 1073733624},
31071 },
31072 },
31073 },
31074 {
31075 name: "BRH",
31076 argLen: 1,
31077 asm: ppc64.ABRH,
31078 reg: regInfo{
31079 inputs: []inputInfo{
31080 {0, 1073733630},
31081 },
31082 outputs: []outputInfo{
31083 {0, 1073733624},
31084 },
31085 },
31086 },
31087 {
31088 name: "FNEG",
31089 argLen: 1,
31090 asm: ppc64.AFNEG,
31091 reg: regInfo{
31092 inputs: []inputInfo{
31093 {0, 9223372032559808512},
31094 },
31095 outputs: []outputInfo{
31096 {0, 9223372032559808512},
31097 },
31098 },
31099 },
31100 {
31101 name: "FSQRT",
31102 argLen: 1,
31103 asm: ppc64.AFSQRT,
31104 reg: regInfo{
31105 inputs: []inputInfo{
31106 {0, 9223372032559808512},
31107 },
31108 outputs: []outputInfo{
31109 {0, 9223372032559808512},
31110 },
31111 },
31112 },
31113 {
31114 name: "FSQRTS",
31115 argLen: 1,
31116 asm: ppc64.AFSQRTS,
31117 reg: regInfo{
31118 inputs: []inputInfo{
31119 {0, 9223372032559808512},
31120 },
31121 outputs: []outputInfo{
31122 {0, 9223372032559808512},
31123 },
31124 },
31125 },
31126 {
31127 name: "FFLOOR",
31128 argLen: 1,
31129 asm: ppc64.AFRIM,
31130 reg: regInfo{
31131 inputs: []inputInfo{
31132 {0, 9223372032559808512},
31133 },
31134 outputs: []outputInfo{
31135 {0, 9223372032559808512},
31136 },
31137 },
31138 },
31139 {
31140 name: "FCEIL",
31141 argLen: 1,
31142 asm: ppc64.AFRIP,
31143 reg: regInfo{
31144 inputs: []inputInfo{
31145 {0, 9223372032559808512},
31146 },
31147 outputs: []outputInfo{
31148 {0, 9223372032559808512},
31149 },
31150 },
31151 },
31152 {
31153 name: "FTRUNC",
31154 argLen: 1,
31155 asm: ppc64.AFRIZ,
31156 reg: regInfo{
31157 inputs: []inputInfo{
31158 {0, 9223372032559808512},
31159 },
31160 outputs: []outputInfo{
31161 {0, 9223372032559808512},
31162 },
31163 },
31164 },
31165 {
31166 name: "FROUND",
31167 argLen: 1,
31168 asm: ppc64.AFRIN,
31169 reg: regInfo{
31170 inputs: []inputInfo{
31171 {0, 9223372032559808512},
31172 },
31173 outputs: []outputInfo{
31174 {0, 9223372032559808512},
31175 },
31176 },
31177 },
31178 {
31179 name: "FABS",
31180 argLen: 1,
31181 asm: ppc64.AFABS,
31182 reg: regInfo{
31183 inputs: []inputInfo{
31184 {0, 9223372032559808512},
31185 },
31186 outputs: []outputInfo{
31187 {0, 9223372032559808512},
31188 },
31189 },
31190 },
31191 {
31192 name: "FNABS",
31193 argLen: 1,
31194 asm: ppc64.AFNABS,
31195 reg: regInfo{
31196 inputs: []inputInfo{
31197 {0, 9223372032559808512},
31198 },
31199 outputs: []outputInfo{
31200 {0, 9223372032559808512},
31201 },
31202 },
31203 },
31204 {
31205 name: "FCPSGN",
31206 argLen: 2,
31207 asm: ppc64.AFCPSGN,
31208 reg: regInfo{
31209 inputs: []inputInfo{
31210 {0, 9223372032559808512},
31211 {1, 9223372032559808512},
31212 },
31213 outputs: []outputInfo{
31214 {0, 9223372032559808512},
31215 },
31216 },
31217 },
31218 {
31219 name: "ORconst",
31220 auxType: auxInt64,
31221 argLen: 1,
31222 asm: ppc64.AOR,
31223 reg: regInfo{
31224 inputs: []inputInfo{
31225 {0, 1073733630},
31226 },
31227 outputs: []outputInfo{
31228 {0, 1073733624},
31229 },
31230 },
31231 },
31232 {
31233 name: "XORconst",
31234 auxType: auxInt64,
31235 argLen: 1,
31236 asm: ppc64.AXOR,
31237 reg: regInfo{
31238 inputs: []inputInfo{
31239 {0, 1073733630},
31240 },
31241 outputs: []outputInfo{
31242 {0, 1073733624},
31243 },
31244 },
31245 },
31246 {
31247 name: "ANDCCconst",
31248 auxType: auxInt64,
31249 argLen: 1,
31250 asm: ppc64.AANDCC,
31251 reg: regInfo{
31252 inputs: []inputInfo{
31253 {0, 1073733630},
31254 },
31255 outputs: []outputInfo{
31256 {0, 1073733624},
31257 },
31258 },
31259 },
31260 {
31261 name: "ANDconst",
31262 auxType: auxInt64,
31263 argLen: 1,
31264 clobberFlags: true,
31265 asm: ppc64.AANDCC,
31266 reg: regInfo{
31267 inputs: []inputInfo{
31268 {0, 1073733630},
31269 },
31270 outputs: []outputInfo{
31271 {0, 1073733624},
31272 },
31273 },
31274 },
31275 {
31276 name: "MOVBreg",
31277 argLen: 1,
31278 asm: ppc64.AMOVB,
31279 reg: regInfo{
31280 inputs: []inputInfo{
31281 {0, 1073733630},
31282 },
31283 outputs: []outputInfo{
31284 {0, 1073733624},
31285 },
31286 },
31287 },
31288 {
31289 name: "MOVBZreg",
31290 argLen: 1,
31291 asm: ppc64.AMOVBZ,
31292 reg: regInfo{
31293 inputs: []inputInfo{
31294 {0, 1073733630},
31295 },
31296 outputs: []outputInfo{
31297 {0, 1073733624},
31298 },
31299 },
31300 },
31301 {
31302 name: "MOVHreg",
31303 argLen: 1,
31304 asm: ppc64.AMOVH,
31305 reg: regInfo{
31306 inputs: []inputInfo{
31307 {0, 1073733630},
31308 },
31309 outputs: []outputInfo{
31310 {0, 1073733624},
31311 },
31312 },
31313 },
31314 {
31315 name: "MOVHZreg",
31316 argLen: 1,
31317 asm: ppc64.AMOVHZ,
31318 reg: regInfo{
31319 inputs: []inputInfo{
31320 {0, 1073733630},
31321 },
31322 outputs: []outputInfo{
31323 {0, 1073733624},
31324 },
31325 },
31326 },
31327 {
31328 name: "MOVWreg",
31329 argLen: 1,
31330 asm: ppc64.AMOVW,
31331 reg: regInfo{
31332 inputs: []inputInfo{
31333 {0, 1073733630},
31334 },
31335 outputs: []outputInfo{
31336 {0, 1073733624},
31337 },
31338 },
31339 },
31340 {
31341 name: "MOVWZreg",
31342 argLen: 1,
31343 asm: ppc64.AMOVWZ,
31344 reg: regInfo{
31345 inputs: []inputInfo{
31346 {0, 1073733630},
31347 },
31348 outputs: []outputInfo{
31349 {0, 1073733624},
31350 },
31351 },
31352 },
31353 {
31354 name: "MOVBZload",
31355 auxType: auxSymOff,
31356 argLen: 2,
31357 faultOnNilArg0: true,
31358 symEffect: SymRead,
31359 asm: ppc64.AMOVBZ,
31360 reg: regInfo{
31361 inputs: []inputInfo{
31362 {0, 1073733630},
31363 },
31364 outputs: []outputInfo{
31365 {0, 1073733624},
31366 },
31367 },
31368 },
31369 {
31370 name: "MOVHload",
31371 auxType: auxSymOff,
31372 argLen: 2,
31373 faultOnNilArg0: true,
31374 symEffect: SymRead,
31375 asm: ppc64.AMOVH,
31376 reg: regInfo{
31377 inputs: []inputInfo{
31378 {0, 1073733630},
31379 },
31380 outputs: []outputInfo{
31381 {0, 1073733624},
31382 },
31383 },
31384 },
31385 {
31386 name: "MOVHZload",
31387 auxType: auxSymOff,
31388 argLen: 2,
31389 faultOnNilArg0: true,
31390 symEffect: SymRead,
31391 asm: ppc64.AMOVHZ,
31392 reg: regInfo{
31393 inputs: []inputInfo{
31394 {0, 1073733630},
31395 },
31396 outputs: []outputInfo{
31397 {0, 1073733624},
31398 },
31399 },
31400 },
31401 {
31402 name: "MOVWload",
31403 auxType: auxSymOff,
31404 argLen: 2,
31405 faultOnNilArg0: true,
31406 symEffect: SymRead,
31407 asm: ppc64.AMOVW,
31408 reg: regInfo{
31409 inputs: []inputInfo{
31410 {0, 1073733630},
31411 },
31412 outputs: []outputInfo{
31413 {0, 1073733624},
31414 },
31415 },
31416 },
31417 {
31418 name: "MOVWZload",
31419 auxType: auxSymOff,
31420 argLen: 2,
31421 faultOnNilArg0: true,
31422 symEffect: SymRead,
31423 asm: ppc64.AMOVWZ,
31424 reg: regInfo{
31425 inputs: []inputInfo{
31426 {0, 1073733630},
31427 },
31428 outputs: []outputInfo{
31429 {0, 1073733624},
31430 },
31431 },
31432 },
31433 {
31434 name: "MOVDload",
31435 auxType: auxSymOff,
31436 argLen: 2,
31437 faultOnNilArg0: true,
31438 symEffect: SymRead,
31439 asm: ppc64.AMOVD,
31440 reg: regInfo{
31441 inputs: []inputInfo{
31442 {0, 1073733630},
31443 },
31444 outputs: []outputInfo{
31445 {0, 1073733624},
31446 },
31447 },
31448 },
31449 {
31450 name: "MOVDBRload",
31451 argLen: 2,
31452 faultOnNilArg0: true,
31453 asm: ppc64.AMOVDBR,
31454 reg: regInfo{
31455 inputs: []inputInfo{
31456 {0, 1073733630},
31457 },
31458 outputs: []outputInfo{
31459 {0, 1073733624},
31460 },
31461 },
31462 },
31463 {
31464 name: "MOVWBRload",
31465 argLen: 2,
31466 faultOnNilArg0: true,
31467 asm: ppc64.AMOVWBR,
31468 reg: regInfo{
31469 inputs: []inputInfo{
31470 {0, 1073733630},
31471 },
31472 outputs: []outputInfo{
31473 {0, 1073733624},
31474 },
31475 },
31476 },
31477 {
31478 name: "MOVHBRload",
31479 argLen: 2,
31480 faultOnNilArg0: true,
31481 asm: ppc64.AMOVHBR,
31482 reg: regInfo{
31483 inputs: []inputInfo{
31484 {0, 1073733630},
31485 },
31486 outputs: []outputInfo{
31487 {0, 1073733624},
31488 },
31489 },
31490 },
31491 {
31492 name: "MOVBZloadidx",
31493 argLen: 3,
31494 asm: ppc64.AMOVBZ,
31495 reg: regInfo{
31496 inputs: []inputInfo{
31497 {1, 1073733624},
31498 {0, 1073733630},
31499 },
31500 outputs: []outputInfo{
31501 {0, 1073733624},
31502 },
31503 },
31504 },
31505 {
31506 name: "MOVHloadidx",
31507 argLen: 3,
31508 asm: ppc64.AMOVH,
31509 reg: regInfo{
31510 inputs: []inputInfo{
31511 {1, 1073733624},
31512 {0, 1073733630},
31513 },
31514 outputs: []outputInfo{
31515 {0, 1073733624},
31516 },
31517 },
31518 },
31519 {
31520 name: "MOVHZloadidx",
31521 argLen: 3,
31522 asm: ppc64.AMOVHZ,
31523 reg: regInfo{
31524 inputs: []inputInfo{
31525 {1, 1073733624},
31526 {0, 1073733630},
31527 },
31528 outputs: []outputInfo{
31529 {0, 1073733624},
31530 },
31531 },
31532 },
31533 {
31534 name: "MOVWloadidx",
31535 argLen: 3,
31536 asm: ppc64.AMOVW,
31537 reg: regInfo{
31538 inputs: []inputInfo{
31539 {1, 1073733624},
31540 {0, 1073733630},
31541 },
31542 outputs: []outputInfo{
31543 {0, 1073733624},
31544 },
31545 },
31546 },
31547 {
31548 name: "MOVWZloadidx",
31549 argLen: 3,
31550 asm: ppc64.AMOVWZ,
31551 reg: regInfo{
31552 inputs: []inputInfo{
31553 {1, 1073733624},
31554 {0, 1073733630},
31555 },
31556 outputs: []outputInfo{
31557 {0, 1073733624},
31558 },
31559 },
31560 },
31561 {
31562 name: "MOVDloadidx",
31563 argLen: 3,
31564 asm: ppc64.AMOVD,
31565 reg: regInfo{
31566 inputs: []inputInfo{
31567 {1, 1073733624},
31568 {0, 1073733630},
31569 },
31570 outputs: []outputInfo{
31571 {0, 1073733624},
31572 },
31573 },
31574 },
31575 {
31576 name: "MOVHBRloadidx",
31577 argLen: 3,
31578 asm: ppc64.AMOVHBR,
31579 reg: regInfo{
31580 inputs: []inputInfo{
31581 {1, 1073733624},
31582 {0, 1073733630},
31583 },
31584 outputs: []outputInfo{
31585 {0, 1073733624},
31586 },
31587 },
31588 },
31589 {
31590 name: "MOVWBRloadidx",
31591 argLen: 3,
31592 asm: ppc64.AMOVWBR,
31593 reg: regInfo{
31594 inputs: []inputInfo{
31595 {1, 1073733624},
31596 {0, 1073733630},
31597 },
31598 outputs: []outputInfo{
31599 {0, 1073733624},
31600 },
31601 },
31602 },
31603 {
31604 name: "MOVDBRloadidx",
31605 argLen: 3,
31606 asm: ppc64.AMOVDBR,
31607 reg: regInfo{
31608 inputs: []inputInfo{
31609 {1, 1073733624},
31610 {0, 1073733630},
31611 },
31612 outputs: []outputInfo{
31613 {0, 1073733624},
31614 },
31615 },
31616 },
31617 {
31618 name: "FMOVDloadidx",
31619 argLen: 3,
31620 asm: ppc64.AFMOVD,
31621 reg: regInfo{
31622 inputs: []inputInfo{
31623 {0, 1073733630},
31624 {1, 1073733630},
31625 },
31626 outputs: []outputInfo{
31627 {0, 9223372032559808512},
31628 },
31629 },
31630 },
31631 {
31632 name: "FMOVSloadidx",
31633 argLen: 3,
31634 asm: ppc64.AFMOVS,
31635 reg: regInfo{
31636 inputs: []inputInfo{
31637 {0, 1073733630},
31638 {1, 1073733630},
31639 },
31640 outputs: []outputInfo{
31641 {0, 9223372032559808512},
31642 },
31643 },
31644 },
31645 {
31646 name: "DCBT",
31647 auxType: auxInt64,
31648 argLen: 2,
31649 hasSideEffects: true,
31650 asm: ppc64.ADCBT,
31651 reg: regInfo{
31652 inputs: []inputInfo{
31653 {0, 1073733630},
31654 },
31655 },
31656 },
31657 {
31658 name: "MOVDBRstore",
31659 argLen: 3,
31660 faultOnNilArg0: true,
31661 asm: ppc64.AMOVDBR,
31662 reg: regInfo{
31663 inputs: []inputInfo{
31664 {0, 1073733630},
31665 {1, 1073733630},
31666 },
31667 },
31668 },
31669 {
31670 name: "MOVWBRstore",
31671 argLen: 3,
31672 faultOnNilArg0: true,
31673 asm: ppc64.AMOVWBR,
31674 reg: regInfo{
31675 inputs: []inputInfo{
31676 {0, 1073733630},
31677 {1, 1073733630},
31678 },
31679 },
31680 },
31681 {
31682 name: "MOVHBRstore",
31683 argLen: 3,
31684 faultOnNilArg0: true,
31685 asm: ppc64.AMOVHBR,
31686 reg: regInfo{
31687 inputs: []inputInfo{
31688 {0, 1073733630},
31689 {1, 1073733630},
31690 },
31691 },
31692 },
31693 {
31694 name: "FMOVDload",
31695 auxType: auxSymOff,
31696 argLen: 2,
31697 faultOnNilArg0: true,
31698 symEffect: SymRead,
31699 asm: ppc64.AFMOVD,
31700 reg: regInfo{
31701 inputs: []inputInfo{
31702 {0, 1073733630},
31703 },
31704 outputs: []outputInfo{
31705 {0, 9223372032559808512},
31706 },
31707 },
31708 },
31709 {
31710 name: "FMOVSload",
31711 auxType: auxSymOff,
31712 argLen: 2,
31713 faultOnNilArg0: true,
31714 symEffect: SymRead,
31715 asm: ppc64.AFMOVS,
31716 reg: regInfo{
31717 inputs: []inputInfo{
31718 {0, 1073733630},
31719 },
31720 outputs: []outputInfo{
31721 {0, 9223372032559808512},
31722 },
31723 },
31724 },
31725 {
31726 name: "MOVBstore",
31727 auxType: auxSymOff,
31728 argLen: 3,
31729 faultOnNilArg0: true,
31730 symEffect: SymWrite,
31731 asm: ppc64.AMOVB,
31732 reg: regInfo{
31733 inputs: []inputInfo{
31734 {0, 1073733630},
31735 {1, 1073733630},
31736 },
31737 },
31738 },
31739 {
31740 name: "MOVHstore",
31741 auxType: auxSymOff,
31742 argLen: 3,
31743 faultOnNilArg0: true,
31744 symEffect: SymWrite,
31745 asm: ppc64.AMOVH,
31746 reg: regInfo{
31747 inputs: []inputInfo{
31748 {0, 1073733630},
31749 {1, 1073733630},
31750 },
31751 },
31752 },
31753 {
31754 name: "MOVWstore",
31755 auxType: auxSymOff,
31756 argLen: 3,
31757 faultOnNilArg0: true,
31758 symEffect: SymWrite,
31759 asm: ppc64.AMOVW,
31760 reg: regInfo{
31761 inputs: []inputInfo{
31762 {0, 1073733630},
31763 {1, 1073733630},
31764 },
31765 },
31766 },
31767 {
31768 name: "MOVDstore",
31769 auxType: auxSymOff,
31770 argLen: 3,
31771 faultOnNilArg0: true,
31772 symEffect: SymWrite,
31773 asm: ppc64.AMOVD,
31774 reg: regInfo{
31775 inputs: []inputInfo{
31776 {0, 1073733630},
31777 {1, 1073733630},
31778 },
31779 },
31780 },
31781 {
31782 name: "FMOVDstore",
31783 auxType: auxSymOff,
31784 argLen: 3,
31785 faultOnNilArg0: true,
31786 symEffect: SymWrite,
31787 asm: ppc64.AFMOVD,
31788 reg: regInfo{
31789 inputs: []inputInfo{
31790 {0, 1073733630},
31791 {1, 9223372032559808512},
31792 },
31793 },
31794 },
31795 {
31796 name: "FMOVSstore",
31797 auxType: auxSymOff,
31798 argLen: 3,
31799 faultOnNilArg0: true,
31800 symEffect: SymWrite,
31801 asm: ppc64.AFMOVS,
31802 reg: regInfo{
31803 inputs: []inputInfo{
31804 {0, 1073733630},
31805 {1, 9223372032559808512},
31806 },
31807 },
31808 },
31809 {
31810 name: "MOVBstoreidx",
31811 argLen: 4,
31812 asm: ppc64.AMOVB,
31813 reg: regInfo{
31814 inputs: []inputInfo{
31815 {0, 1073733630},
31816 {1, 1073733630},
31817 {2, 1073733630},
31818 },
31819 },
31820 },
31821 {
31822 name: "MOVHstoreidx",
31823 argLen: 4,
31824 asm: ppc64.AMOVH,
31825 reg: regInfo{
31826 inputs: []inputInfo{
31827 {0, 1073733630},
31828 {1, 1073733630},
31829 {2, 1073733630},
31830 },
31831 },
31832 },
31833 {
31834 name: "MOVWstoreidx",
31835 argLen: 4,
31836 asm: ppc64.AMOVW,
31837 reg: regInfo{
31838 inputs: []inputInfo{
31839 {0, 1073733630},
31840 {1, 1073733630},
31841 {2, 1073733630},
31842 },
31843 },
31844 },
31845 {
31846 name: "MOVDstoreidx",
31847 argLen: 4,
31848 asm: ppc64.AMOVD,
31849 reg: regInfo{
31850 inputs: []inputInfo{
31851 {0, 1073733630},
31852 {1, 1073733630},
31853 {2, 1073733630},
31854 },
31855 },
31856 },
31857 {
31858 name: "FMOVDstoreidx",
31859 argLen: 4,
31860 asm: ppc64.AFMOVD,
31861 reg: regInfo{
31862 inputs: []inputInfo{
31863 {0, 1073733630},
31864 {1, 1073733630},
31865 {2, 9223372032559808512},
31866 },
31867 },
31868 },
31869 {
31870 name: "FMOVSstoreidx",
31871 argLen: 4,
31872 asm: ppc64.AFMOVS,
31873 reg: regInfo{
31874 inputs: []inputInfo{
31875 {0, 1073733630},
31876 {1, 1073733630},
31877 {2, 9223372032559808512},
31878 },
31879 },
31880 },
31881 {
31882 name: "MOVHBRstoreidx",
31883 argLen: 4,
31884 asm: ppc64.AMOVHBR,
31885 reg: regInfo{
31886 inputs: []inputInfo{
31887 {0, 1073733630},
31888 {1, 1073733630},
31889 {2, 1073733630},
31890 },
31891 },
31892 },
31893 {
31894 name: "MOVWBRstoreidx",
31895 argLen: 4,
31896 asm: ppc64.AMOVWBR,
31897 reg: regInfo{
31898 inputs: []inputInfo{
31899 {0, 1073733630},
31900 {1, 1073733630},
31901 {2, 1073733630},
31902 },
31903 },
31904 },
31905 {
31906 name: "MOVDBRstoreidx",
31907 argLen: 4,
31908 asm: ppc64.AMOVDBR,
31909 reg: regInfo{
31910 inputs: []inputInfo{
31911 {0, 1073733630},
31912 {1, 1073733630},
31913 {2, 1073733630},
31914 },
31915 },
31916 },
31917 {
31918 name: "MOVBstorezero",
31919 auxType: auxSymOff,
31920 argLen: 2,
31921 faultOnNilArg0: true,
31922 symEffect: SymWrite,
31923 asm: ppc64.AMOVB,
31924 reg: regInfo{
31925 inputs: []inputInfo{
31926 {0, 1073733630},
31927 },
31928 },
31929 },
31930 {
31931 name: "MOVHstorezero",
31932 auxType: auxSymOff,
31933 argLen: 2,
31934 faultOnNilArg0: true,
31935 symEffect: SymWrite,
31936 asm: ppc64.AMOVH,
31937 reg: regInfo{
31938 inputs: []inputInfo{
31939 {0, 1073733630},
31940 },
31941 },
31942 },
31943 {
31944 name: "MOVWstorezero",
31945 auxType: auxSymOff,
31946 argLen: 2,
31947 faultOnNilArg0: true,
31948 symEffect: SymWrite,
31949 asm: ppc64.AMOVW,
31950 reg: regInfo{
31951 inputs: []inputInfo{
31952 {0, 1073733630},
31953 },
31954 },
31955 },
31956 {
31957 name: "MOVDstorezero",
31958 auxType: auxSymOff,
31959 argLen: 2,
31960 faultOnNilArg0: true,
31961 symEffect: SymWrite,
31962 asm: ppc64.AMOVD,
31963 reg: regInfo{
31964 inputs: []inputInfo{
31965 {0, 1073733630},
31966 },
31967 },
31968 },
31969 {
31970 name: "MOVDaddr",
31971 auxType: auxSymOff,
31972 argLen: 1,
31973 rematerializeable: true,
31974 symEffect: SymAddr,
31975 asm: ppc64.AMOVD,
31976 reg: regInfo{
31977 inputs: []inputInfo{
31978 {0, 1073733630},
31979 },
31980 outputs: []outputInfo{
31981 {0, 1073733624},
31982 },
31983 },
31984 },
31985 {
31986 name: "MOVDconst",
31987 auxType: auxInt64,
31988 argLen: 0,
31989 rematerializeable: true,
31990 asm: ppc64.AMOVD,
31991 reg: regInfo{
31992 outputs: []outputInfo{
31993 {0, 1073733624},
31994 },
31995 },
31996 },
31997 {
31998 name: "FMOVDconst",
31999 auxType: auxFloat64,
32000 argLen: 0,
32001 rematerializeable: true,
32002 asm: ppc64.AFMOVD,
32003 reg: regInfo{
32004 outputs: []outputInfo{
32005 {0, 9223372032559808512},
32006 },
32007 },
32008 },
32009 {
32010 name: "FMOVSconst",
32011 auxType: auxFloat32,
32012 argLen: 0,
32013 rematerializeable: true,
32014 asm: ppc64.AFMOVS,
32015 reg: regInfo{
32016 outputs: []outputInfo{
32017 {0, 9223372032559808512},
32018 },
32019 },
32020 },
32021 {
32022 name: "FCMPU",
32023 argLen: 2,
32024 asm: ppc64.AFCMPU,
32025 reg: regInfo{
32026 inputs: []inputInfo{
32027 {0, 9223372032559808512},
32028 {1, 9223372032559808512},
32029 },
32030 },
32031 },
32032 {
32033 name: "CMP",
32034 argLen: 2,
32035 asm: ppc64.ACMP,
32036 reg: regInfo{
32037 inputs: []inputInfo{
32038 {0, 1073733630},
32039 {1, 1073733630},
32040 },
32041 },
32042 },
32043 {
32044 name: "CMPU",
32045 argLen: 2,
32046 asm: ppc64.ACMPU,
32047 reg: regInfo{
32048 inputs: []inputInfo{
32049 {0, 1073733630},
32050 {1, 1073733630},
32051 },
32052 },
32053 },
32054 {
32055 name: "CMPW",
32056 argLen: 2,
32057 asm: ppc64.ACMPW,
32058 reg: regInfo{
32059 inputs: []inputInfo{
32060 {0, 1073733630},
32061 {1, 1073733630},
32062 },
32063 },
32064 },
32065 {
32066 name: "CMPWU",
32067 argLen: 2,
32068 asm: ppc64.ACMPWU,
32069 reg: regInfo{
32070 inputs: []inputInfo{
32071 {0, 1073733630},
32072 {1, 1073733630},
32073 },
32074 },
32075 },
32076 {
32077 name: "CMPconst",
32078 auxType: auxInt64,
32079 argLen: 1,
32080 asm: ppc64.ACMP,
32081 reg: regInfo{
32082 inputs: []inputInfo{
32083 {0, 1073733630},
32084 },
32085 },
32086 },
32087 {
32088 name: "CMPUconst",
32089 auxType: auxInt64,
32090 argLen: 1,
32091 asm: ppc64.ACMPU,
32092 reg: regInfo{
32093 inputs: []inputInfo{
32094 {0, 1073733630},
32095 },
32096 },
32097 },
32098 {
32099 name: "CMPWconst",
32100 auxType: auxInt32,
32101 argLen: 1,
32102 asm: ppc64.ACMPW,
32103 reg: regInfo{
32104 inputs: []inputInfo{
32105 {0, 1073733630},
32106 },
32107 },
32108 },
32109 {
32110 name: "CMPWUconst",
32111 auxType: auxInt32,
32112 argLen: 1,
32113 asm: ppc64.ACMPWU,
32114 reg: regInfo{
32115 inputs: []inputInfo{
32116 {0, 1073733630},
32117 },
32118 },
32119 },
32120 {
32121 name: "ISEL",
32122 auxType: auxInt32,
32123 argLen: 3,
32124 asm: ppc64.AISEL,
32125 reg: regInfo{
32126 inputs: []inputInfo{
32127 {0, 1073733624},
32128 {1, 1073733624},
32129 },
32130 outputs: []outputInfo{
32131 {0, 1073733624},
32132 },
32133 },
32134 },
32135 {
32136 name: "ISELZ",
32137 auxType: auxInt32,
32138 argLen: 2,
32139 asm: ppc64.AISEL,
32140 reg: regInfo{
32141 inputs: []inputInfo{
32142 {0, 1073733624},
32143 },
32144 outputs: []outputInfo{
32145 {0, 1073733624},
32146 },
32147 },
32148 },
32149 {
32150 name: "SETBC",
32151 auxType: auxInt32,
32152 argLen: 1,
32153 asm: ppc64.ASETBC,
32154 reg: regInfo{
32155 outputs: []outputInfo{
32156 {0, 1073733624},
32157 },
32158 },
32159 },
32160 {
32161 name: "SETBCR",
32162 auxType: auxInt32,
32163 argLen: 1,
32164 asm: ppc64.ASETBCR,
32165 reg: regInfo{
32166 outputs: []outputInfo{
32167 {0, 1073733624},
32168 },
32169 },
32170 },
32171 {
32172 name: "Equal",
32173 argLen: 1,
32174 reg: regInfo{
32175 outputs: []outputInfo{
32176 {0, 1073733624},
32177 },
32178 },
32179 },
32180 {
32181 name: "NotEqual",
32182 argLen: 1,
32183 reg: regInfo{
32184 outputs: []outputInfo{
32185 {0, 1073733624},
32186 },
32187 },
32188 },
32189 {
32190 name: "LessThan",
32191 argLen: 1,
32192 reg: regInfo{
32193 outputs: []outputInfo{
32194 {0, 1073733624},
32195 },
32196 },
32197 },
32198 {
32199 name: "FLessThan",
32200 argLen: 1,
32201 reg: regInfo{
32202 outputs: []outputInfo{
32203 {0, 1073733624},
32204 },
32205 },
32206 },
32207 {
32208 name: "LessEqual",
32209 argLen: 1,
32210 reg: regInfo{
32211 outputs: []outputInfo{
32212 {0, 1073733624},
32213 },
32214 },
32215 },
32216 {
32217 name: "FLessEqual",
32218 argLen: 1,
32219 reg: regInfo{
32220 outputs: []outputInfo{
32221 {0, 1073733624},
32222 },
32223 },
32224 },
32225 {
32226 name: "GreaterThan",
32227 argLen: 1,
32228 reg: regInfo{
32229 outputs: []outputInfo{
32230 {0, 1073733624},
32231 },
32232 },
32233 },
32234 {
32235 name: "FGreaterThan",
32236 argLen: 1,
32237 reg: regInfo{
32238 outputs: []outputInfo{
32239 {0, 1073733624},
32240 },
32241 },
32242 },
32243 {
32244 name: "GreaterEqual",
32245 argLen: 1,
32246 reg: regInfo{
32247 outputs: []outputInfo{
32248 {0, 1073733624},
32249 },
32250 },
32251 },
32252 {
32253 name: "FGreaterEqual",
32254 argLen: 1,
32255 reg: regInfo{
32256 outputs: []outputInfo{
32257 {0, 1073733624},
32258 },
32259 },
32260 },
32261 {
32262 name: "LoweredGetClosurePtr",
32263 argLen: 0,
32264 zeroWidth: true,
32265 reg: regInfo{
32266 outputs: []outputInfo{
32267 {0, 2048},
32268 },
32269 },
32270 },
32271 {
32272 name: "LoweredGetCallerSP",
32273 argLen: 1,
32274 rematerializeable: true,
32275 reg: regInfo{
32276 outputs: []outputInfo{
32277 {0, 1073733624},
32278 },
32279 },
32280 },
32281 {
32282 name: "LoweredGetCallerPC",
32283 argLen: 0,
32284 rematerializeable: true,
32285 reg: regInfo{
32286 outputs: []outputInfo{
32287 {0, 1073733624},
32288 },
32289 },
32290 },
32291 {
32292 name: "LoweredNilCheck",
32293 argLen: 2,
32294 clobberFlags: true,
32295 nilCheck: true,
32296 faultOnNilArg0: true,
32297 reg: regInfo{
32298 inputs: []inputInfo{
32299 {0, 1073733630},
32300 },
32301 clobbers: 2147483648,
32302 },
32303 },
32304 {
32305 name: "LoweredRound32F",
32306 argLen: 1,
32307 resultInArg0: true,
32308 zeroWidth: true,
32309 reg: regInfo{
32310 inputs: []inputInfo{
32311 {0, 9223372032559808512},
32312 },
32313 outputs: []outputInfo{
32314 {0, 9223372032559808512},
32315 },
32316 },
32317 },
32318 {
32319 name: "LoweredRound64F",
32320 argLen: 1,
32321 resultInArg0: true,
32322 zeroWidth: true,
32323 reg: regInfo{
32324 inputs: []inputInfo{
32325 {0, 9223372032559808512},
32326 },
32327 outputs: []outputInfo{
32328 {0, 9223372032559808512},
32329 },
32330 },
32331 },
32332 {
32333 name: "CALLstatic",
32334 auxType: auxCallOff,
32335 argLen: -1,
32336 clobberFlags: true,
32337 call: true,
32338 reg: regInfo{
32339 clobbers: 18446744071562059768,
32340 },
32341 },
32342 {
32343 name: "CALLtail",
32344 auxType: auxCallOff,
32345 argLen: -1,
32346 clobberFlags: true,
32347 call: true,
32348 tailCall: true,
32349 reg: regInfo{
32350 clobbers: 18446744071562059768,
32351 },
32352 },
32353 {
32354 name: "CALLclosure",
32355 auxType: auxCallOff,
32356 argLen: -1,
32357 clobberFlags: true,
32358 call: true,
32359 reg: regInfo{
32360 inputs: []inputInfo{
32361 {0, 4096},
32362 {1, 2048},
32363 },
32364 clobbers: 18446744071562059768,
32365 },
32366 },
32367 {
32368 name: "CALLinter",
32369 auxType: auxCallOff,
32370 argLen: -1,
32371 clobberFlags: true,
32372 call: true,
32373 reg: regInfo{
32374 inputs: []inputInfo{
32375 {0, 4096},
32376 },
32377 clobbers: 18446744071562059768,
32378 },
32379 },
32380 {
32381 name: "LoweredZero",
32382 auxType: auxInt64,
32383 argLen: 2,
32384 clobberFlags: true,
32385 faultOnNilArg0: true,
32386 unsafePoint: true,
32387 reg: regInfo{
32388 inputs: []inputInfo{
32389 {0, 1048576},
32390 },
32391 clobbers: 1048576,
32392 },
32393 },
32394 {
32395 name: "LoweredZeroShort",
32396 auxType: auxInt64,
32397 argLen: 2,
32398 faultOnNilArg0: true,
32399 unsafePoint: true,
32400 reg: regInfo{
32401 inputs: []inputInfo{
32402 {0, 1073733624},
32403 },
32404 },
32405 },
32406 {
32407 name: "LoweredQuadZeroShort",
32408 auxType: auxInt64,
32409 argLen: 2,
32410 faultOnNilArg0: true,
32411 unsafePoint: true,
32412 reg: regInfo{
32413 inputs: []inputInfo{
32414 {0, 1073733624},
32415 },
32416 },
32417 },
32418 {
32419 name: "LoweredQuadZero",
32420 auxType: auxInt64,
32421 argLen: 2,
32422 clobberFlags: true,
32423 faultOnNilArg0: true,
32424 unsafePoint: true,
32425 reg: regInfo{
32426 inputs: []inputInfo{
32427 {0, 1048576},
32428 },
32429 clobbers: 1048576,
32430 },
32431 },
32432 {
32433 name: "LoweredMove",
32434 auxType: auxInt64,
32435 argLen: 3,
32436 clobberFlags: true,
32437 faultOnNilArg0: true,
32438 faultOnNilArg1: true,
32439 unsafePoint: true,
32440 reg: regInfo{
32441 inputs: []inputInfo{
32442 {0, 1048576},
32443 {1, 2097152},
32444 },
32445 clobbers: 3145728,
32446 },
32447 },
32448 {
32449 name: "LoweredMoveShort",
32450 auxType: auxInt64,
32451 argLen: 3,
32452 faultOnNilArg0: true,
32453 faultOnNilArg1: true,
32454 unsafePoint: true,
32455 reg: regInfo{
32456 inputs: []inputInfo{
32457 {0, 1073733624},
32458 {1, 1073733624},
32459 },
32460 },
32461 },
32462 {
32463 name: "LoweredQuadMove",
32464 auxType: auxInt64,
32465 argLen: 3,
32466 clobberFlags: true,
32467 faultOnNilArg0: true,
32468 faultOnNilArg1: true,
32469 unsafePoint: true,
32470 reg: regInfo{
32471 inputs: []inputInfo{
32472 {0, 1048576},
32473 {1, 2097152},
32474 },
32475 clobbers: 3145728,
32476 },
32477 },
32478 {
32479 name: "LoweredQuadMoveShort",
32480 auxType: auxInt64,
32481 argLen: 3,
32482 faultOnNilArg0: true,
32483 faultOnNilArg1: true,
32484 unsafePoint: true,
32485 reg: regInfo{
32486 inputs: []inputInfo{
32487 {0, 1073733624},
32488 {1, 1073733624},
32489 },
32490 },
32491 },
32492 {
32493 name: "LoweredAtomicStore8",
32494 auxType: auxInt64,
32495 argLen: 3,
32496 faultOnNilArg0: true,
32497 hasSideEffects: true,
32498 reg: regInfo{
32499 inputs: []inputInfo{
32500 {0, 1073733630},
32501 {1, 1073733630},
32502 },
32503 },
32504 },
32505 {
32506 name: "LoweredAtomicStore32",
32507 auxType: auxInt64,
32508 argLen: 3,
32509 faultOnNilArg0: true,
32510 hasSideEffects: true,
32511 reg: regInfo{
32512 inputs: []inputInfo{
32513 {0, 1073733630},
32514 {1, 1073733630},
32515 },
32516 },
32517 },
32518 {
32519 name: "LoweredAtomicStore64",
32520 auxType: auxInt64,
32521 argLen: 3,
32522 faultOnNilArg0: true,
32523 hasSideEffects: true,
32524 reg: regInfo{
32525 inputs: []inputInfo{
32526 {0, 1073733630},
32527 {1, 1073733630},
32528 },
32529 },
32530 },
32531 {
32532 name: "LoweredAtomicLoad8",
32533 auxType: auxInt64,
32534 argLen: 2,
32535 clobberFlags: true,
32536 faultOnNilArg0: true,
32537 reg: regInfo{
32538 inputs: []inputInfo{
32539 {0, 1073733630},
32540 },
32541 outputs: []outputInfo{
32542 {0, 1073733624},
32543 },
32544 },
32545 },
32546 {
32547 name: "LoweredAtomicLoad32",
32548 auxType: auxInt64,
32549 argLen: 2,
32550 clobberFlags: true,
32551 faultOnNilArg0: true,
32552 reg: regInfo{
32553 inputs: []inputInfo{
32554 {0, 1073733630},
32555 },
32556 outputs: []outputInfo{
32557 {0, 1073733624},
32558 },
32559 },
32560 },
32561 {
32562 name: "LoweredAtomicLoad64",
32563 auxType: auxInt64,
32564 argLen: 2,
32565 clobberFlags: true,
32566 faultOnNilArg0: true,
32567 reg: regInfo{
32568 inputs: []inputInfo{
32569 {0, 1073733630},
32570 },
32571 outputs: []outputInfo{
32572 {0, 1073733624},
32573 },
32574 },
32575 },
32576 {
32577 name: "LoweredAtomicLoadPtr",
32578 auxType: auxInt64,
32579 argLen: 2,
32580 clobberFlags: true,
32581 faultOnNilArg0: true,
32582 reg: regInfo{
32583 inputs: []inputInfo{
32584 {0, 1073733630},
32585 },
32586 outputs: []outputInfo{
32587 {0, 1073733624},
32588 },
32589 },
32590 },
32591 {
32592 name: "LoweredAtomicAdd32",
32593 argLen: 3,
32594 resultNotInArgs: true,
32595 clobberFlags: true,
32596 faultOnNilArg0: true,
32597 hasSideEffects: true,
32598 reg: regInfo{
32599 inputs: []inputInfo{
32600 {1, 1073733624},
32601 {0, 1073733630},
32602 },
32603 outputs: []outputInfo{
32604 {0, 1073733624},
32605 },
32606 },
32607 },
32608 {
32609 name: "LoweredAtomicAdd64",
32610 argLen: 3,
32611 resultNotInArgs: true,
32612 clobberFlags: true,
32613 faultOnNilArg0: true,
32614 hasSideEffects: true,
32615 reg: regInfo{
32616 inputs: []inputInfo{
32617 {1, 1073733624},
32618 {0, 1073733630},
32619 },
32620 outputs: []outputInfo{
32621 {0, 1073733624},
32622 },
32623 },
32624 },
32625 {
32626 name: "LoweredAtomicExchange8",
32627 argLen: 3,
32628 resultNotInArgs: true,
32629 clobberFlags: true,
32630 faultOnNilArg0: true,
32631 hasSideEffects: true,
32632 reg: regInfo{
32633 inputs: []inputInfo{
32634 {1, 1073733624},
32635 {0, 1073733630},
32636 },
32637 outputs: []outputInfo{
32638 {0, 1073733624},
32639 },
32640 },
32641 },
32642 {
32643 name: "LoweredAtomicExchange32",
32644 argLen: 3,
32645 resultNotInArgs: true,
32646 clobberFlags: true,
32647 faultOnNilArg0: true,
32648 hasSideEffects: true,
32649 reg: regInfo{
32650 inputs: []inputInfo{
32651 {1, 1073733624},
32652 {0, 1073733630},
32653 },
32654 outputs: []outputInfo{
32655 {0, 1073733624},
32656 },
32657 },
32658 },
32659 {
32660 name: "LoweredAtomicExchange64",
32661 argLen: 3,
32662 resultNotInArgs: true,
32663 clobberFlags: true,
32664 faultOnNilArg0: true,
32665 hasSideEffects: true,
32666 reg: regInfo{
32667 inputs: []inputInfo{
32668 {1, 1073733624},
32669 {0, 1073733630},
32670 },
32671 outputs: []outputInfo{
32672 {0, 1073733624},
32673 },
32674 },
32675 },
32676 {
32677 name: "LoweredAtomicCas64",
32678 auxType: auxInt64,
32679 argLen: 4,
32680 resultNotInArgs: true,
32681 clobberFlags: true,
32682 faultOnNilArg0: true,
32683 hasSideEffects: true,
32684 reg: regInfo{
32685 inputs: []inputInfo{
32686 {1, 1073733624},
32687 {2, 1073733624},
32688 {0, 1073733630},
32689 },
32690 outputs: []outputInfo{
32691 {0, 1073733624},
32692 },
32693 },
32694 },
32695 {
32696 name: "LoweredAtomicCas32",
32697 auxType: auxInt64,
32698 argLen: 4,
32699 resultNotInArgs: true,
32700 clobberFlags: true,
32701 faultOnNilArg0: true,
32702 hasSideEffects: true,
32703 reg: regInfo{
32704 inputs: []inputInfo{
32705 {1, 1073733624},
32706 {2, 1073733624},
32707 {0, 1073733630},
32708 },
32709 outputs: []outputInfo{
32710 {0, 1073733624},
32711 },
32712 },
32713 },
32714 {
32715 name: "LoweredAtomicAnd8",
32716 argLen: 3,
32717 faultOnNilArg0: true,
32718 hasSideEffects: true,
32719 asm: ppc64.AAND,
32720 reg: regInfo{
32721 inputs: []inputInfo{
32722 {0, 1073733630},
32723 {1, 1073733630},
32724 },
32725 },
32726 },
32727 {
32728 name: "LoweredAtomicAnd32",
32729 argLen: 3,
32730 faultOnNilArg0: true,
32731 hasSideEffects: true,
32732 asm: ppc64.AAND,
32733 reg: regInfo{
32734 inputs: []inputInfo{
32735 {0, 1073733630},
32736 {1, 1073733630},
32737 },
32738 },
32739 },
32740 {
32741 name: "LoweredAtomicOr8",
32742 argLen: 3,
32743 faultOnNilArg0: true,
32744 hasSideEffects: true,
32745 asm: ppc64.AOR,
32746 reg: regInfo{
32747 inputs: []inputInfo{
32748 {0, 1073733630},
32749 {1, 1073733630},
32750 },
32751 },
32752 },
32753 {
32754 name: "LoweredAtomicOr32",
32755 argLen: 3,
32756 faultOnNilArg0: true,
32757 hasSideEffects: true,
32758 asm: ppc64.AOR,
32759 reg: regInfo{
32760 inputs: []inputInfo{
32761 {0, 1073733630},
32762 {1, 1073733630},
32763 },
32764 },
32765 },
32766 {
32767 name: "LoweredWB",
32768 auxType: auxInt64,
32769 argLen: 1,
32770 clobberFlags: true,
32771 reg: regInfo{
32772 clobbers: 18446744072632408064,
32773 outputs: []outputInfo{
32774 {0, 536870912},
32775 },
32776 },
32777 },
32778 {
32779 name: "LoweredPubBarrier",
32780 argLen: 1,
32781 hasSideEffects: true,
32782 asm: ppc64.ALWSYNC,
32783 reg: regInfo{},
32784 },
32785 {
32786 name: "LoweredPanicBoundsA",
32787 auxType: auxInt64,
32788 argLen: 3,
32789 call: true,
32790 reg: regInfo{
32791 inputs: []inputInfo{
32792 {0, 32},
32793 {1, 64},
32794 },
32795 },
32796 },
32797 {
32798 name: "LoweredPanicBoundsB",
32799 auxType: auxInt64,
32800 argLen: 3,
32801 call: true,
32802 reg: regInfo{
32803 inputs: []inputInfo{
32804 {0, 16},
32805 {1, 32},
32806 },
32807 },
32808 },
32809 {
32810 name: "LoweredPanicBoundsC",
32811 auxType: auxInt64,
32812 argLen: 3,
32813 call: true,
32814 reg: regInfo{
32815 inputs: []inputInfo{
32816 {0, 8},
32817 {1, 16},
32818 },
32819 },
32820 },
32821 {
32822 name: "InvertFlags",
32823 argLen: 1,
32824 reg: regInfo{},
32825 },
32826 {
32827 name: "FlagEQ",
32828 argLen: 0,
32829 reg: regInfo{},
32830 },
32831 {
32832 name: "FlagLT",
32833 argLen: 0,
32834 reg: regInfo{},
32835 },
32836 {
32837 name: "FlagGT",
32838 argLen: 0,
32839 reg: regInfo{},
32840 },
32841
32842 {
32843 name: "ADD",
32844 argLen: 2,
32845 commutative: true,
32846 asm: riscv.AADD,
32847 reg: regInfo{
32848 inputs: []inputInfo{
32849 {0, 1006632944},
32850 {1, 1006632944},
32851 },
32852 outputs: []outputInfo{
32853 {0, 1006632944},
32854 },
32855 },
32856 },
32857 {
32858 name: "ADDI",
32859 auxType: auxInt64,
32860 argLen: 1,
32861 asm: riscv.AADDI,
32862 reg: regInfo{
32863 inputs: []inputInfo{
32864 {0, 9223372037861408754},
32865 },
32866 outputs: []outputInfo{
32867 {0, 1006632944},
32868 },
32869 },
32870 },
32871 {
32872 name: "ADDIW",
32873 auxType: auxInt64,
32874 argLen: 1,
32875 asm: riscv.AADDIW,
32876 reg: regInfo{
32877 inputs: []inputInfo{
32878 {0, 1006632944},
32879 },
32880 outputs: []outputInfo{
32881 {0, 1006632944},
32882 },
32883 },
32884 },
32885 {
32886 name: "NEG",
32887 argLen: 1,
32888 asm: riscv.ANEG,
32889 reg: regInfo{
32890 inputs: []inputInfo{
32891 {0, 1006632944},
32892 },
32893 outputs: []outputInfo{
32894 {0, 1006632944},
32895 },
32896 },
32897 },
32898 {
32899 name: "NEGW",
32900 argLen: 1,
32901 asm: riscv.ANEGW,
32902 reg: regInfo{
32903 inputs: []inputInfo{
32904 {0, 1006632944},
32905 },
32906 outputs: []outputInfo{
32907 {0, 1006632944},
32908 },
32909 },
32910 },
32911 {
32912 name: "SUB",
32913 argLen: 2,
32914 asm: riscv.ASUB,
32915 reg: regInfo{
32916 inputs: []inputInfo{
32917 {0, 1006632944},
32918 {1, 1006632944},
32919 },
32920 outputs: []outputInfo{
32921 {0, 1006632944},
32922 },
32923 },
32924 },
32925 {
32926 name: "SUBW",
32927 argLen: 2,
32928 asm: riscv.ASUBW,
32929 reg: regInfo{
32930 inputs: []inputInfo{
32931 {0, 1006632944},
32932 {1, 1006632944},
32933 },
32934 outputs: []outputInfo{
32935 {0, 1006632944},
32936 },
32937 },
32938 },
32939 {
32940 name: "MUL",
32941 argLen: 2,
32942 commutative: true,
32943 asm: riscv.AMUL,
32944 reg: regInfo{
32945 inputs: []inputInfo{
32946 {0, 1006632944},
32947 {1, 1006632944},
32948 },
32949 outputs: []outputInfo{
32950 {0, 1006632944},
32951 },
32952 },
32953 },
32954 {
32955 name: "MULW",
32956 argLen: 2,
32957 commutative: true,
32958 asm: riscv.AMULW,
32959 reg: regInfo{
32960 inputs: []inputInfo{
32961 {0, 1006632944},
32962 {1, 1006632944},
32963 },
32964 outputs: []outputInfo{
32965 {0, 1006632944},
32966 },
32967 },
32968 },
32969 {
32970 name: "MULH",
32971 argLen: 2,
32972 commutative: true,
32973 asm: riscv.AMULH,
32974 reg: regInfo{
32975 inputs: []inputInfo{
32976 {0, 1006632944},
32977 {1, 1006632944},
32978 },
32979 outputs: []outputInfo{
32980 {0, 1006632944},
32981 },
32982 },
32983 },
32984 {
32985 name: "MULHU",
32986 argLen: 2,
32987 commutative: true,
32988 asm: riscv.AMULHU,
32989 reg: regInfo{
32990 inputs: []inputInfo{
32991 {0, 1006632944},
32992 {1, 1006632944},
32993 },
32994 outputs: []outputInfo{
32995 {0, 1006632944},
32996 },
32997 },
32998 },
32999 {
33000 name: "LoweredMuluhilo",
33001 argLen: 2,
33002 resultNotInArgs: true,
33003 reg: regInfo{
33004 inputs: []inputInfo{
33005 {0, 1006632944},
33006 {1, 1006632944},
33007 },
33008 outputs: []outputInfo{
33009 {0, 1006632944},
33010 {1, 1006632944},
33011 },
33012 },
33013 },
33014 {
33015 name: "LoweredMuluover",
33016 argLen: 2,
33017 resultNotInArgs: true,
33018 reg: regInfo{
33019 inputs: []inputInfo{
33020 {0, 1006632944},
33021 {1, 1006632944},
33022 },
33023 outputs: []outputInfo{
33024 {0, 1006632944},
33025 {1, 1006632944},
33026 },
33027 },
33028 },
33029 {
33030 name: "DIV",
33031 argLen: 2,
33032 asm: riscv.ADIV,
33033 reg: regInfo{
33034 inputs: []inputInfo{
33035 {0, 1006632944},
33036 {1, 1006632944},
33037 },
33038 outputs: []outputInfo{
33039 {0, 1006632944},
33040 },
33041 },
33042 },
33043 {
33044 name: "DIVU",
33045 argLen: 2,
33046 asm: riscv.ADIVU,
33047 reg: regInfo{
33048 inputs: []inputInfo{
33049 {0, 1006632944},
33050 {1, 1006632944},
33051 },
33052 outputs: []outputInfo{
33053 {0, 1006632944},
33054 },
33055 },
33056 },
33057 {
33058 name: "DIVW",
33059 argLen: 2,
33060 asm: riscv.ADIVW,
33061 reg: regInfo{
33062 inputs: []inputInfo{
33063 {0, 1006632944},
33064 {1, 1006632944},
33065 },
33066 outputs: []outputInfo{
33067 {0, 1006632944},
33068 },
33069 },
33070 },
33071 {
33072 name: "DIVUW",
33073 argLen: 2,
33074 asm: riscv.ADIVUW,
33075 reg: regInfo{
33076 inputs: []inputInfo{
33077 {0, 1006632944},
33078 {1, 1006632944},
33079 },
33080 outputs: []outputInfo{
33081 {0, 1006632944},
33082 },
33083 },
33084 },
33085 {
33086 name: "REM",
33087 argLen: 2,
33088 asm: riscv.AREM,
33089 reg: regInfo{
33090 inputs: []inputInfo{
33091 {0, 1006632944},
33092 {1, 1006632944},
33093 },
33094 outputs: []outputInfo{
33095 {0, 1006632944},
33096 },
33097 },
33098 },
33099 {
33100 name: "REMU",
33101 argLen: 2,
33102 asm: riscv.AREMU,
33103 reg: regInfo{
33104 inputs: []inputInfo{
33105 {0, 1006632944},
33106 {1, 1006632944},
33107 },
33108 outputs: []outputInfo{
33109 {0, 1006632944},
33110 },
33111 },
33112 },
33113 {
33114 name: "REMW",
33115 argLen: 2,
33116 asm: riscv.AREMW,
33117 reg: regInfo{
33118 inputs: []inputInfo{
33119 {0, 1006632944},
33120 {1, 1006632944},
33121 },
33122 outputs: []outputInfo{
33123 {0, 1006632944},
33124 },
33125 },
33126 },
33127 {
33128 name: "REMUW",
33129 argLen: 2,
33130 asm: riscv.AREMUW,
33131 reg: regInfo{
33132 inputs: []inputInfo{
33133 {0, 1006632944},
33134 {1, 1006632944},
33135 },
33136 outputs: []outputInfo{
33137 {0, 1006632944},
33138 },
33139 },
33140 },
33141 {
33142 name: "MOVaddr",
33143 auxType: auxSymOff,
33144 argLen: 1,
33145 rematerializeable: true,
33146 symEffect: SymAddr,
33147 asm: riscv.AMOV,
33148 reg: regInfo{
33149 inputs: []inputInfo{
33150 {0, 9223372037861408754},
33151 },
33152 outputs: []outputInfo{
33153 {0, 1006632944},
33154 },
33155 },
33156 },
33157 {
33158 name: "MOVDconst",
33159 auxType: auxInt64,
33160 argLen: 0,
33161 rematerializeable: true,
33162 asm: riscv.AMOV,
33163 reg: regInfo{
33164 outputs: []outputInfo{
33165 {0, 1006632944},
33166 },
33167 },
33168 },
33169 {
33170 name: "MOVBload",
33171 auxType: auxSymOff,
33172 argLen: 2,
33173 faultOnNilArg0: true,
33174 symEffect: SymRead,
33175 asm: riscv.AMOVB,
33176 reg: regInfo{
33177 inputs: []inputInfo{
33178 {0, 9223372037861408754},
33179 },
33180 outputs: []outputInfo{
33181 {0, 1006632944},
33182 },
33183 },
33184 },
33185 {
33186 name: "MOVHload",
33187 auxType: auxSymOff,
33188 argLen: 2,
33189 faultOnNilArg0: true,
33190 symEffect: SymRead,
33191 asm: riscv.AMOVH,
33192 reg: regInfo{
33193 inputs: []inputInfo{
33194 {0, 9223372037861408754},
33195 },
33196 outputs: []outputInfo{
33197 {0, 1006632944},
33198 },
33199 },
33200 },
33201 {
33202 name: "MOVWload",
33203 auxType: auxSymOff,
33204 argLen: 2,
33205 faultOnNilArg0: true,
33206 symEffect: SymRead,
33207 asm: riscv.AMOVW,
33208 reg: regInfo{
33209 inputs: []inputInfo{
33210 {0, 9223372037861408754},
33211 },
33212 outputs: []outputInfo{
33213 {0, 1006632944},
33214 },
33215 },
33216 },
33217 {
33218 name: "MOVDload",
33219 auxType: auxSymOff,
33220 argLen: 2,
33221 faultOnNilArg0: true,
33222 symEffect: SymRead,
33223 asm: riscv.AMOV,
33224 reg: regInfo{
33225 inputs: []inputInfo{
33226 {0, 9223372037861408754},
33227 },
33228 outputs: []outputInfo{
33229 {0, 1006632944},
33230 },
33231 },
33232 },
33233 {
33234 name: "MOVBUload",
33235 auxType: auxSymOff,
33236 argLen: 2,
33237 faultOnNilArg0: true,
33238 symEffect: SymRead,
33239 asm: riscv.AMOVBU,
33240 reg: regInfo{
33241 inputs: []inputInfo{
33242 {0, 9223372037861408754},
33243 },
33244 outputs: []outputInfo{
33245 {0, 1006632944},
33246 },
33247 },
33248 },
33249 {
33250 name: "MOVHUload",
33251 auxType: auxSymOff,
33252 argLen: 2,
33253 faultOnNilArg0: true,
33254 symEffect: SymRead,
33255 asm: riscv.AMOVHU,
33256 reg: regInfo{
33257 inputs: []inputInfo{
33258 {0, 9223372037861408754},
33259 },
33260 outputs: []outputInfo{
33261 {0, 1006632944},
33262 },
33263 },
33264 },
33265 {
33266 name: "MOVWUload",
33267 auxType: auxSymOff,
33268 argLen: 2,
33269 faultOnNilArg0: true,
33270 symEffect: SymRead,
33271 asm: riscv.AMOVWU,
33272 reg: regInfo{
33273 inputs: []inputInfo{
33274 {0, 9223372037861408754},
33275 },
33276 outputs: []outputInfo{
33277 {0, 1006632944},
33278 },
33279 },
33280 },
33281 {
33282 name: "MOVBstore",
33283 auxType: auxSymOff,
33284 argLen: 3,
33285 faultOnNilArg0: true,
33286 symEffect: SymWrite,
33287 asm: riscv.AMOVB,
33288 reg: regInfo{
33289 inputs: []inputInfo{
33290 {1, 1006632946},
33291 {0, 9223372037861408754},
33292 },
33293 },
33294 },
33295 {
33296 name: "MOVHstore",
33297 auxType: auxSymOff,
33298 argLen: 3,
33299 faultOnNilArg0: true,
33300 symEffect: SymWrite,
33301 asm: riscv.AMOVH,
33302 reg: regInfo{
33303 inputs: []inputInfo{
33304 {1, 1006632946},
33305 {0, 9223372037861408754},
33306 },
33307 },
33308 },
33309 {
33310 name: "MOVWstore",
33311 auxType: auxSymOff,
33312 argLen: 3,
33313 faultOnNilArg0: true,
33314 symEffect: SymWrite,
33315 asm: riscv.AMOVW,
33316 reg: regInfo{
33317 inputs: []inputInfo{
33318 {1, 1006632946},
33319 {0, 9223372037861408754},
33320 },
33321 },
33322 },
33323 {
33324 name: "MOVDstore",
33325 auxType: auxSymOff,
33326 argLen: 3,
33327 faultOnNilArg0: true,
33328 symEffect: SymWrite,
33329 asm: riscv.AMOV,
33330 reg: regInfo{
33331 inputs: []inputInfo{
33332 {1, 1006632946},
33333 {0, 9223372037861408754},
33334 },
33335 },
33336 },
33337 {
33338 name: "MOVBstorezero",
33339 auxType: auxSymOff,
33340 argLen: 2,
33341 faultOnNilArg0: true,
33342 symEffect: SymWrite,
33343 asm: riscv.AMOVB,
33344 reg: regInfo{
33345 inputs: []inputInfo{
33346 {0, 9223372037861408754},
33347 },
33348 },
33349 },
33350 {
33351 name: "MOVHstorezero",
33352 auxType: auxSymOff,
33353 argLen: 2,
33354 faultOnNilArg0: true,
33355 symEffect: SymWrite,
33356 asm: riscv.AMOVH,
33357 reg: regInfo{
33358 inputs: []inputInfo{
33359 {0, 9223372037861408754},
33360 },
33361 },
33362 },
33363 {
33364 name: "MOVWstorezero",
33365 auxType: auxSymOff,
33366 argLen: 2,
33367 faultOnNilArg0: true,
33368 symEffect: SymWrite,
33369 asm: riscv.AMOVW,
33370 reg: regInfo{
33371 inputs: []inputInfo{
33372 {0, 9223372037861408754},
33373 },
33374 },
33375 },
33376 {
33377 name: "MOVDstorezero",
33378 auxType: auxSymOff,
33379 argLen: 2,
33380 faultOnNilArg0: true,
33381 symEffect: SymWrite,
33382 asm: riscv.AMOV,
33383 reg: regInfo{
33384 inputs: []inputInfo{
33385 {0, 9223372037861408754},
33386 },
33387 },
33388 },
33389 {
33390 name: "MOVBreg",
33391 argLen: 1,
33392 asm: riscv.AMOVB,
33393 reg: regInfo{
33394 inputs: []inputInfo{
33395 {0, 1006632944},
33396 },
33397 outputs: []outputInfo{
33398 {0, 1006632944},
33399 },
33400 },
33401 },
33402 {
33403 name: "MOVHreg",
33404 argLen: 1,
33405 asm: riscv.AMOVH,
33406 reg: regInfo{
33407 inputs: []inputInfo{
33408 {0, 1006632944},
33409 },
33410 outputs: []outputInfo{
33411 {0, 1006632944},
33412 },
33413 },
33414 },
33415 {
33416 name: "MOVWreg",
33417 argLen: 1,
33418 asm: riscv.AMOVW,
33419 reg: regInfo{
33420 inputs: []inputInfo{
33421 {0, 1006632944},
33422 },
33423 outputs: []outputInfo{
33424 {0, 1006632944},
33425 },
33426 },
33427 },
33428 {
33429 name: "MOVDreg",
33430 argLen: 1,
33431 asm: riscv.AMOV,
33432 reg: regInfo{
33433 inputs: []inputInfo{
33434 {0, 1006632944},
33435 },
33436 outputs: []outputInfo{
33437 {0, 1006632944},
33438 },
33439 },
33440 },
33441 {
33442 name: "MOVBUreg",
33443 argLen: 1,
33444 asm: riscv.AMOVBU,
33445 reg: regInfo{
33446 inputs: []inputInfo{
33447 {0, 1006632944},
33448 },
33449 outputs: []outputInfo{
33450 {0, 1006632944},
33451 },
33452 },
33453 },
33454 {
33455 name: "MOVHUreg",
33456 argLen: 1,
33457 asm: riscv.AMOVHU,
33458 reg: regInfo{
33459 inputs: []inputInfo{
33460 {0, 1006632944},
33461 },
33462 outputs: []outputInfo{
33463 {0, 1006632944},
33464 },
33465 },
33466 },
33467 {
33468 name: "MOVWUreg",
33469 argLen: 1,
33470 asm: riscv.AMOVWU,
33471 reg: regInfo{
33472 inputs: []inputInfo{
33473 {0, 1006632944},
33474 },
33475 outputs: []outputInfo{
33476 {0, 1006632944},
33477 },
33478 },
33479 },
33480 {
33481 name: "MOVDnop",
33482 argLen: 1,
33483 resultInArg0: true,
33484 reg: regInfo{
33485 inputs: []inputInfo{
33486 {0, 1006632944},
33487 },
33488 outputs: []outputInfo{
33489 {0, 1006632944},
33490 },
33491 },
33492 },
33493 {
33494 name: "SLL",
33495 argLen: 2,
33496 asm: riscv.ASLL,
33497 reg: regInfo{
33498 inputs: []inputInfo{
33499 {0, 1006632944},
33500 {1, 1006632944},
33501 },
33502 outputs: []outputInfo{
33503 {0, 1006632944},
33504 },
33505 },
33506 },
33507 {
33508 name: "SLLW",
33509 argLen: 2,
33510 asm: riscv.ASLLW,
33511 reg: regInfo{
33512 inputs: []inputInfo{
33513 {0, 1006632944},
33514 {1, 1006632944},
33515 },
33516 outputs: []outputInfo{
33517 {0, 1006632944},
33518 },
33519 },
33520 },
33521 {
33522 name: "SRA",
33523 argLen: 2,
33524 asm: riscv.ASRA,
33525 reg: regInfo{
33526 inputs: []inputInfo{
33527 {0, 1006632944},
33528 {1, 1006632944},
33529 },
33530 outputs: []outputInfo{
33531 {0, 1006632944},
33532 },
33533 },
33534 },
33535 {
33536 name: "SRAW",
33537 argLen: 2,
33538 asm: riscv.ASRAW,
33539 reg: regInfo{
33540 inputs: []inputInfo{
33541 {0, 1006632944},
33542 {1, 1006632944},
33543 },
33544 outputs: []outputInfo{
33545 {0, 1006632944},
33546 },
33547 },
33548 },
33549 {
33550 name: "SRL",
33551 argLen: 2,
33552 asm: riscv.ASRL,
33553 reg: regInfo{
33554 inputs: []inputInfo{
33555 {0, 1006632944},
33556 {1, 1006632944},
33557 },
33558 outputs: []outputInfo{
33559 {0, 1006632944},
33560 },
33561 },
33562 },
33563 {
33564 name: "SRLW",
33565 argLen: 2,
33566 asm: riscv.ASRLW,
33567 reg: regInfo{
33568 inputs: []inputInfo{
33569 {0, 1006632944},
33570 {1, 1006632944},
33571 },
33572 outputs: []outputInfo{
33573 {0, 1006632944},
33574 },
33575 },
33576 },
33577 {
33578 name: "SLLI",
33579 auxType: auxInt64,
33580 argLen: 1,
33581 asm: riscv.ASLLI,
33582 reg: regInfo{
33583 inputs: []inputInfo{
33584 {0, 1006632944},
33585 },
33586 outputs: []outputInfo{
33587 {0, 1006632944},
33588 },
33589 },
33590 },
33591 {
33592 name: "SLLIW",
33593 auxType: auxInt64,
33594 argLen: 1,
33595 asm: riscv.ASLLIW,
33596 reg: regInfo{
33597 inputs: []inputInfo{
33598 {0, 1006632944},
33599 },
33600 outputs: []outputInfo{
33601 {0, 1006632944},
33602 },
33603 },
33604 },
33605 {
33606 name: "SRAI",
33607 auxType: auxInt64,
33608 argLen: 1,
33609 asm: riscv.ASRAI,
33610 reg: regInfo{
33611 inputs: []inputInfo{
33612 {0, 1006632944},
33613 },
33614 outputs: []outputInfo{
33615 {0, 1006632944},
33616 },
33617 },
33618 },
33619 {
33620 name: "SRAIW",
33621 auxType: auxInt64,
33622 argLen: 1,
33623 asm: riscv.ASRAIW,
33624 reg: regInfo{
33625 inputs: []inputInfo{
33626 {0, 1006632944},
33627 },
33628 outputs: []outputInfo{
33629 {0, 1006632944},
33630 },
33631 },
33632 },
33633 {
33634 name: "SRLI",
33635 auxType: auxInt64,
33636 argLen: 1,
33637 asm: riscv.ASRLI,
33638 reg: regInfo{
33639 inputs: []inputInfo{
33640 {0, 1006632944},
33641 },
33642 outputs: []outputInfo{
33643 {0, 1006632944},
33644 },
33645 },
33646 },
33647 {
33648 name: "SRLIW",
33649 auxType: auxInt64,
33650 argLen: 1,
33651 asm: riscv.ASRLIW,
33652 reg: regInfo{
33653 inputs: []inputInfo{
33654 {0, 1006632944},
33655 },
33656 outputs: []outputInfo{
33657 {0, 1006632944},
33658 },
33659 },
33660 },
33661 {
33662 name: "SH1ADD",
33663 argLen: 2,
33664 asm: riscv.ASH1ADD,
33665 reg: regInfo{
33666 inputs: []inputInfo{
33667 {0, 1006632944},
33668 {1, 1006632944},
33669 },
33670 outputs: []outputInfo{
33671 {0, 1006632944},
33672 },
33673 },
33674 },
33675 {
33676 name: "SH2ADD",
33677 argLen: 2,
33678 asm: riscv.ASH2ADD,
33679 reg: regInfo{
33680 inputs: []inputInfo{
33681 {0, 1006632944},
33682 {1, 1006632944},
33683 },
33684 outputs: []outputInfo{
33685 {0, 1006632944},
33686 },
33687 },
33688 },
33689 {
33690 name: "SH3ADD",
33691 argLen: 2,
33692 asm: riscv.ASH3ADD,
33693 reg: regInfo{
33694 inputs: []inputInfo{
33695 {0, 1006632944},
33696 {1, 1006632944},
33697 },
33698 outputs: []outputInfo{
33699 {0, 1006632944},
33700 },
33701 },
33702 },
33703 {
33704 name: "AND",
33705 argLen: 2,
33706 commutative: true,
33707 asm: riscv.AAND,
33708 reg: regInfo{
33709 inputs: []inputInfo{
33710 {0, 1006632944},
33711 {1, 1006632944},
33712 },
33713 outputs: []outputInfo{
33714 {0, 1006632944},
33715 },
33716 },
33717 },
33718 {
33719 name: "ANDN",
33720 argLen: 2,
33721 asm: riscv.AANDN,
33722 reg: regInfo{
33723 inputs: []inputInfo{
33724 {0, 1006632944},
33725 {1, 1006632944},
33726 },
33727 outputs: []outputInfo{
33728 {0, 1006632944},
33729 },
33730 },
33731 },
33732 {
33733 name: "ANDI",
33734 auxType: auxInt64,
33735 argLen: 1,
33736 asm: riscv.AANDI,
33737 reg: regInfo{
33738 inputs: []inputInfo{
33739 {0, 1006632944},
33740 },
33741 outputs: []outputInfo{
33742 {0, 1006632944},
33743 },
33744 },
33745 },
33746 {
33747 name: "NOT",
33748 argLen: 1,
33749 asm: riscv.ANOT,
33750 reg: regInfo{
33751 inputs: []inputInfo{
33752 {0, 1006632944},
33753 },
33754 outputs: []outputInfo{
33755 {0, 1006632944},
33756 },
33757 },
33758 },
33759 {
33760 name: "OR",
33761 argLen: 2,
33762 commutative: true,
33763 asm: riscv.AOR,
33764 reg: regInfo{
33765 inputs: []inputInfo{
33766 {0, 1006632944},
33767 {1, 1006632944},
33768 },
33769 outputs: []outputInfo{
33770 {0, 1006632944},
33771 },
33772 },
33773 },
33774 {
33775 name: "ORN",
33776 argLen: 2,
33777 asm: riscv.AORN,
33778 reg: regInfo{
33779 inputs: []inputInfo{
33780 {0, 1006632944},
33781 {1, 1006632944},
33782 },
33783 outputs: []outputInfo{
33784 {0, 1006632944},
33785 },
33786 },
33787 },
33788 {
33789 name: "ORI",
33790 auxType: auxInt64,
33791 argLen: 1,
33792 asm: riscv.AORI,
33793 reg: regInfo{
33794 inputs: []inputInfo{
33795 {0, 1006632944},
33796 },
33797 outputs: []outputInfo{
33798 {0, 1006632944},
33799 },
33800 },
33801 },
33802 {
33803 name: "ROL",
33804 argLen: 2,
33805 asm: riscv.AROL,
33806 reg: regInfo{
33807 inputs: []inputInfo{
33808 {0, 1006632944},
33809 {1, 1006632944},
33810 },
33811 outputs: []outputInfo{
33812 {0, 1006632944},
33813 },
33814 },
33815 },
33816 {
33817 name: "ROLW",
33818 argLen: 2,
33819 asm: riscv.AROLW,
33820 reg: regInfo{
33821 inputs: []inputInfo{
33822 {0, 1006632944},
33823 {1, 1006632944},
33824 },
33825 outputs: []outputInfo{
33826 {0, 1006632944},
33827 },
33828 },
33829 },
33830 {
33831 name: "ROR",
33832 argLen: 2,
33833 asm: riscv.AROR,
33834 reg: regInfo{
33835 inputs: []inputInfo{
33836 {0, 1006632944},
33837 {1, 1006632944},
33838 },
33839 outputs: []outputInfo{
33840 {0, 1006632944},
33841 },
33842 },
33843 },
33844 {
33845 name: "RORI",
33846 auxType: auxInt64,
33847 argLen: 1,
33848 asm: riscv.ARORI,
33849 reg: regInfo{
33850 inputs: []inputInfo{
33851 {0, 1006632944},
33852 },
33853 outputs: []outputInfo{
33854 {0, 1006632944},
33855 },
33856 },
33857 },
33858 {
33859 name: "RORIW",
33860 auxType: auxInt64,
33861 argLen: 1,
33862 asm: riscv.ARORIW,
33863 reg: regInfo{
33864 inputs: []inputInfo{
33865 {0, 1006632944},
33866 },
33867 outputs: []outputInfo{
33868 {0, 1006632944},
33869 },
33870 },
33871 },
33872 {
33873 name: "RORW",
33874 argLen: 2,
33875 asm: riscv.ARORW,
33876 reg: regInfo{
33877 inputs: []inputInfo{
33878 {0, 1006632944},
33879 {1, 1006632944},
33880 },
33881 outputs: []outputInfo{
33882 {0, 1006632944},
33883 },
33884 },
33885 },
33886 {
33887 name: "XNOR",
33888 argLen: 2,
33889 commutative: true,
33890 asm: riscv.AXNOR,
33891 reg: regInfo{
33892 inputs: []inputInfo{
33893 {0, 1006632944},
33894 {1, 1006632944},
33895 },
33896 outputs: []outputInfo{
33897 {0, 1006632944},
33898 },
33899 },
33900 },
33901 {
33902 name: "XOR",
33903 argLen: 2,
33904 commutative: true,
33905 asm: riscv.AXOR,
33906 reg: regInfo{
33907 inputs: []inputInfo{
33908 {0, 1006632944},
33909 {1, 1006632944},
33910 },
33911 outputs: []outputInfo{
33912 {0, 1006632944},
33913 },
33914 },
33915 },
33916 {
33917 name: "XORI",
33918 auxType: auxInt64,
33919 argLen: 1,
33920 asm: riscv.AXORI,
33921 reg: regInfo{
33922 inputs: []inputInfo{
33923 {0, 1006632944},
33924 },
33925 outputs: []outputInfo{
33926 {0, 1006632944},
33927 },
33928 },
33929 },
33930 {
33931 name: "MIN",
33932 argLen: 2,
33933 commutative: true,
33934 asm: riscv.AMIN,
33935 reg: regInfo{
33936 inputs: []inputInfo{
33937 {0, 1006632944},
33938 {1, 1006632944},
33939 },
33940 outputs: []outputInfo{
33941 {0, 1006632944},
33942 },
33943 },
33944 },
33945 {
33946 name: "MAX",
33947 argLen: 2,
33948 commutative: true,
33949 asm: riscv.AMAX,
33950 reg: regInfo{
33951 inputs: []inputInfo{
33952 {0, 1006632944},
33953 {1, 1006632944},
33954 },
33955 outputs: []outputInfo{
33956 {0, 1006632944},
33957 },
33958 },
33959 },
33960 {
33961 name: "MINU",
33962 argLen: 2,
33963 commutative: true,
33964 asm: riscv.AMINU,
33965 reg: regInfo{
33966 inputs: []inputInfo{
33967 {0, 1006632944},
33968 {1, 1006632944},
33969 },
33970 outputs: []outputInfo{
33971 {0, 1006632944},
33972 },
33973 },
33974 },
33975 {
33976 name: "MAXU",
33977 argLen: 2,
33978 commutative: true,
33979 asm: riscv.AMAXU,
33980 reg: regInfo{
33981 inputs: []inputInfo{
33982 {0, 1006632944},
33983 {1, 1006632944},
33984 },
33985 outputs: []outputInfo{
33986 {0, 1006632944},
33987 },
33988 },
33989 },
33990 {
33991 name: "SEQZ",
33992 argLen: 1,
33993 asm: riscv.ASEQZ,
33994 reg: regInfo{
33995 inputs: []inputInfo{
33996 {0, 1006632944},
33997 },
33998 outputs: []outputInfo{
33999 {0, 1006632944},
34000 },
34001 },
34002 },
34003 {
34004 name: "SNEZ",
34005 argLen: 1,
34006 asm: riscv.ASNEZ,
34007 reg: regInfo{
34008 inputs: []inputInfo{
34009 {0, 1006632944},
34010 },
34011 outputs: []outputInfo{
34012 {0, 1006632944},
34013 },
34014 },
34015 },
34016 {
34017 name: "SLT",
34018 argLen: 2,
34019 asm: riscv.ASLT,
34020 reg: regInfo{
34021 inputs: []inputInfo{
34022 {0, 1006632944},
34023 {1, 1006632944},
34024 },
34025 outputs: []outputInfo{
34026 {0, 1006632944},
34027 },
34028 },
34029 },
34030 {
34031 name: "SLTI",
34032 auxType: auxInt64,
34033 argLen: 1,
34034 asm: riscv.ASLTI,
34035 reg: regInfo{
34036 inputs: []inputInfo{
34037 {0, 1006632944},
34038 },
34039 outputs: []outputInfo{
34040 {0, 1006632944},
34041 },
34042 },
34043 },
34044 {
34045 name: "SLTU",
34046 argLen: 2,
34047 asm: riscv.ASLTU,
34048 reg: regInfo{
34049 inputs: []inputInfo{
34050 {0, 1006632944},
34051 {1, 1006632944},
34052 },
34053 outputs: []outputInfo{
34054 {0, 1006632944},
34055 },
34056 },
34057 },
34058 {
34059 name: "SLTIU",
34060 auxType: auxInt64,
34061 argLen: 1,
34062 asm: riscv.ASLTIU,
34063 reg: regInfo{
34064 inputs: []inputInfo{
34065 {0, 1006632944},
34066 },
34067 outputs: []outputInfo{
34068 {0, 1006632944},
34069 },
34070 },
34071 },
34072 {
34073 name: "LoweredRound32F",
34074 argLen: 1,
34075 resultInArg0: true,
34076 reg: regInfo{
34077 inputs: []inputInfo{
34078 {0, 9223372034707292160},
34079 },
34080 outputs: []outputInfo{
34081 {0, 9223372034707292160},
34082 },
34083 },
34084 },
34085 {
34086 name: "LoweredRound64F",
34087 argLen: 1,
34088 resultInArg0: true,
34089 reg: regInfo{
34090 inputs: []inputInfo{
34091 {0, 9223372034707292160},
34092 },
34093 outputs: []outputInfo{
34094 {0, 9223372034707292160},
34095 },
34096 },
34097 },
34098 {
34099 name: "CALLstatic",
34100 auxType: auxCallOff,
34101 argLen: -1,
34102 call: true,
34103 reg: regInfo{
34104 clobbers: 9223372035781033968,
34105 },
34106 },
34107 {
34108 name: "CALLtail",
34109 auxType: auxCallOff,
34110 argLen: -1,
34111 call: true,
34112 tailCall: true,
34113 reg: regInfo{
34114 clobbers: 9223372035781033968,
34115 },
34116 },
34117 {
34118 name: "CALLclosure",
34119 auxType: auxCallOff,
34120 argLen: -1,
34121 call: true,
34122 reg: regInfo{
34123 inputs: []inputInfo{
34124 {1, 33554432},
34125 {0, 1006632946},
34126 },
34127 clobbers: 9223372035781033968,
34128 },
34129 },
34130 {
34131 name: "CALLinter",
34132 auxType: auxCallOff,
34133 argLen: -1,
34134 call: true,
34135 reg: regInfo{
34136 inputs: []inputInfo{
34137 {0, 1006632944},
34138 },
34139 clobbers: 9223372035781033968,
34140 },
34141 },
34142 {
34143 name: "DUFFZERO",
34144 auxType: auxInt64,
34145 argLen: 2,
34146 faultOnNilArg0: true,
34147 reg: regInfo{
34148 inputs: []inputInfo{
34149 {0, 16777216},
34150 },
34151 clobbers: 16777216,
34152 },
34153 },
34154 {
34155 name: "DUFFCOPY",
34156 auxType: auxInt64,
34157 argLen: 3,
34158 faultOnNilArg0: true,
34159 faultOnNilArg1: true,
34160 reg: regInfo{
34161 inputs: []inputInfo{
34162 {0, 16777216},
34163 {1, 8388608},
34164 },
34165 clobbers: 25165824,
34166 },
34167 },
34168 {
34169 name: "LoweredZero",
34170 auxType: auxInt64,
34171 argLen: 3,
34172 faultOnNilArg0: true,
34173 reg: regInfo{
34174 inputs: []inputInfo{
34175 {0, 16},
34176 {1, 1006632944},
34177 },
34178 clobbers: 16,
34179 },
34180 },
34181 {
34182 name: "LoweredMove",
34183 auxType: auxInt64,
34184 argLen: 4,
34185 faultOnNilArg0: true,
34186 faultOnNilArg1: true,
34187 reg: regInfo{
34188 inputs: []inputInfo{
34189 {0, 16},
34190 {1, 32},
34191 {2, 1006632880},
34192 },
34193 clobbers: 112,
34194 },
34195 },
34196 {
34197 name: "LoweredAtomicLoad8",
34198 argLen: 2,
34199 faultOnNilArg0: true,
34200 reg: regInfo{
34201 inputs: []inputInfo{
34202 {0, 9223372037861408754},
34203 },
34204 outputs: []outputInfo{
34205 {0, 1006632944},
34206 },
34207 },
34208 },
34209 {
34210 name: "LoweredAtomicLoad32",
34211 argLen: 2,
34212 faultOnNilArg0: true,
34213 reg: regInfo{
34214 inputs: []inputInfo{
34215 {0, 9223372037861408754},
34216 },
34217 outputs: []outputInfo{
34218 {0, 1006632944},
34219 },
34220 },
34221 },
34222 {
34223 name: "LoweredAtomicLoad64",
34224 argLen: 2,
34225 faultOnNilArg0: true,
34226 reg: regInfo{
34227 inputs: []inputInfo{
34228 {0, 9223372037861408754},
34229 },
34230 outputs: []outputInfo{
34231 {0, 1006632944},
34232 },
34233 },
34234 },
34235 {
34236 name: "LoweredAtomicStore8",
34237 argLen: 3,
34238 faultOnNilArg0: true,
34239 hasSideEffects: true,
34240 reg: regInfo{
34241 inputs: []inputInfo{
34242 {1, 1006632946},
34243 {0, 9223372037861408754},
34244 },
34245 },
34246 },
34247 {
34248 name: "LoweredAtomicStore32",
34249 argLen: 3,
34250 faultOnNilArg0: true,
34251 hasSideEffects: true,
34252 reg: regInfo{
34253 inputs: []inputInfo{
34254 {1, 1006632946},
34255 {0, 9223372037861408754},
34256 },
34257 },
34258 },
34259 {
34260 name: "LoweredAtomicStore64",
34261 argLen: 3,
34262 faultOnNilArg0: true,
34263 hasSideEffects: true,
34264 reg: regInfo{
34265 inputs: []inputInfo{
34266 {1, 1006632946},
34267 {0, 9223372037861408754},
34268 },
34269 },
34270 },
34271 {
34272 name: "LoweredAtomicExchange32",
34273 argLen: 3,
34274 resultNotInArgs: true,
34275 faultOnNilArg0: true,
34276 hasSideEffects: true,
34277 reg: regInfo{
34278 inputs: []inputInfo{
34279 {1, 1073741808},
34280 {0, 9223372037928517618},
34281 },
34282 outputs: []outputInfo{
34283 {0, 1006632944},
34284 },
34285 },
34286 },
34287 {
34288 name: "LoweredAtomicExchange64",
34289 argLen: 3,
34290 resultNotInArgs: true,
34291 faultOnNilArg0: true,
34292 hasSideEffects: true,
34293 reg: regInfo{
34294 inputs: []inputInfo{
34295 {1, 1073741808},
34296 {0, 9223372037928517618},
34297 },
34298 outputs: []outputInfo{
34299 {0, 1006632944},
34300 },
34301 },
34302 },
34303 {
34304 name: "LoweredAtomicAdd32",
34305 argLen: 3,
34306 resultNotInArgs: true,
34307 faultOnNilArg0: true,
34308 hasSideEffects: true,
34309 unsafePoint: true,
34310 reg: regInfo{
34311 inputs: []inputInfo{
34312 {1, 1073741808},
34313 {0, 9223372037928517618},
34314 },
34315 outputs: []outputInfo{
34316 {0, 1006632944},
34317 },
34318 },
34319 },
34320 {
34321 name: "LoweredAtomicAdd64",
34322 argLen: 3,
34323 resultNotInArgs: true,
34324 faultOnNilArg0: true,
34325 hasSideEffects: true,
34326 unsafePoint: true,
34327 reg: regInfo{
34328 inputs: []inputInfo{
34329 {1, 1073741808},
34330 {0, 9223372037928517618},
34331 },
34332 outputs: []outputInfo{
34333 {0, 1006632944},
34334 },
34335 },
34336 },
34337 {
34338 name: "LoweredAtomicCas32",
34339 argLen: 4,
34340 resultNotInArgs: true,
34341 faultOnNilArg0: true,
34342 hasSideEffects: true,
34343 unsafePoint: true,
34344 reg: regInfo{
34345 inputs: []inputInfo{
34346 {1, 1073741808},
34347 {2, 1073741808},
34348 {0, 9223372037928517618},
34349 },
34350 outputs: []outputInfo{
34351 {0, 1006632944},
34352 },
34353 },
34354 },
34355 {
34356 name: "LoweredAtomicCas64",
34357 argLen: 4,
34358 resultNotInArgs: true,
34359 faultOnNilArg0: true,
34360 hasSideEffects: true,
34361 unsafePoint: true,
34362 reg: regInfo{
34363 inputs: []inputInfo{
34364 {1, 1073741808},
34365 {2, 1073741808},
34366 {0, 9223372037928517618},
34367 },
34368 outputs: []outputInfo{
34369 {0, 1006632944},
34370 },
34371 },
34372 },
34373 {
34374 name: "LoweredAtomicAnd32",
34375 argLen: 3,
34376 faultOnNilArg0: true,
34377 hasSideEffects: true,
34378 asm: riscv.AAMOANDW,
34379 reg: regInfo{
34380 inputs: []inputInfo{
34381 {1, 1073741808},
34382 {0, 9223372037928517618},
34383 },
34384 },
34385 },
34386 {
34387 name: "LoweredAtomicOr32",
34388 argLen: 3,
34389 faultOnNilArg0: true,
34390 hasSideEffects: true,
34391 asm: riscv.AAMOORW,
34392 reg: regInfo{
34393 inputs: []inputInfo{
34394 {1, 1073741808},
34395 {0, 9223372037928517618},
34396 },
34397 },
34398 },
34399 {
34400 name: "LoweredNilCheck",
34401 argLen: 2,
34402 nilCheck: true,
34403 faultOnNilArg0: true,
34404 reg: regInfo{
34405 inputs: []inputInfo{
34406 {0, 1006632946},
34407 },
34408 },
34409 },
34410 {
34411 name: "LoweredGetClosurePtr",
34412 argLen: 0,
34413 reg: regInfo{
34414 outputs: []outputInfo{
34415 {0, 33554432},
34416 },
34417 },
34418 },
34419 {
34420 name: "LoweredGetCallerSP",
34421 argLen: 1,
34422 rematerializeable: true,
34423 reg: regInfo{
34424 outputs: []outputInfo{
34425 {0, 1006632944},
34426 },
34427 },
34428 },
34429 {
34430 name: "LoweredGetCallerPC",
34431 argLen: 0,
34432 rematerializeable: true,
34433 reg: regInfo{
34434 outputs: []outputInfo{
34435 {0, 1006632944},
34436 },
34437 },
34438 },
34439 {
34440 name: "LoweredWB",
34441 auxType: auxInt64,
34442 argLen: 1,
34443 clobberFlags: true,
34444 reg: regInfo{
34445 clobbers: 9223372034707292160,
34446 outputs: []outputInfo{
34447 {0, 8388608},
34448 },
34449 },
34450 },
34451 {
34452 name: "LoweredPubBarrier",
34453 argLen: 1,
34454 hasSideEffects: true,
34455 asm: riscv.AFENCE,
34456 reg: regInfo{},
34457 },
34458 {
34459 name: "LoweredPanicBoundsA",
34460 auxType: auxInt64,
34461 argLen: 3,
34462 call: true,
34463 reg: regInfo{
34464 inputs: []inputInfo{
34465 {0, 64},
34466 {1, 134217728},
34467 },
34468 },
34469 },
34470 {
34471 name: "LoweredPanicBoundsB",
34472 auxType: auxInt64,
34473 argLen: 3,
34474 call: true,
34475 reg: regInfo{
34476 inputs: []inputInfo{
34477 {0, 32},
34478 {1, 64},
34479 },
34480 },
34481 },
34482 {
34483 name: "LoweredPanicBoundsC",
34484 auxType: auxInt64,
34485 argLen: 3,
34486 call: true,
34487 reg: regInfo{
34488 inputs: []inputInfo{
34489 {0, 16},
34490 {1, 32},
34491 },
34492 },
34493 },
34494 {
34495 name: "FADDS",
34496 argLen: 2,
34497 commutative: true,
34498 asm: riscv.AFADDS,
34499 reg: regInfo{
34500 inputs: []inputInfo{
34501 {0, 9223372034707292160},
34502 {1, 9223372034707292160},
34503 },
34504 outputs: []outputInfo{
34505 {0, 9223372034707292160},
34506 },
34507 },
34508 },
34509 {
34510 name: "FSUBS",
34511 argLen: 2,
34512 asm: riscv.AFSUBS,
34513 reg: regInfo{
34514 inputs: []inputInfo{
34515 {0, 9223372034707292160},
34516 {1, 9223372034707292160},
34517 },
34518 outputs: []outputInfo{
34519 {0, 9223372034707292160},
34520 },
34521 },
34522 },
34523 {
34524 name: "FMULS",
34525 argLen: 2,
34526 commutative: true,
34527 asm: riscv.AFMULS,
34528 reg: regInfo{
34529 inputs: []inputInfo{
34530 {0, 9223372034707292160},
34531 {1, 9223372034707292160},
34532 },
34533 outputs: []outputInfo{
34534 {0, 9223372034707292160},
34535 },
34536 },
34537 },
34538 {
34539 name: "FDIVS",
34540 argLen: 2,
34541 asm: riscv.AFDIVS,
34542 reg: regInfo{
34543 inputs: []inputInfo{
34544 {0, 9223372034707292160},
34545 {1, 9223372034707292160},
34546 },
34547 outputs: []outputInfo{
34548 {0, 9223372034707292160},
34549 },
34550 },
34551 },
34552 {
34553 name: "FMADDS",
34554 argLen: 3,
34555 commutative: true,
34556 asm: riscv.AFMADDS,
34557 reg: regInfo{
34558 inputs: []inputInfo{
34559 {0, 9223372034707292160},
34560 {1, 9223372034707292160},
34561 {2, 9223372034707292160},
34562 },
34563 outputs: []outputInfo{
34564 {0, 9223372034707292160},
34565 },
34566 },
34567 },
34568 {
34569 name: "FMSUBS",
34570 argLen: 3,
34571 commutative: true,
34572 asm: riscv.AFMSUBS,
34573 reg: regInfo{
34574 inputs: []inputInfo{
34575 {0, 9223372034707292160},
34576 {1, 9223372034707292160},
34577 {2, 9223372034707292160},
34578 },
34579 outputs: []outputInfo{
34580 {0, 9223372034707292160},
34581 },
34582 },
34583 },
34584 {
34585 name: "FNMADDS",
34586 argLen: 3,
34587 commutative: true,
34588 asm: riscv.AFNMADDS,
34589 reg: regInfo{
34590 inputs: []inputInfo{
34591 {0, 9223372034707292160},
34592 {1, 9223372034707292160},
34593 {2, 9223372034707292160},
34594 },
34595 outputs: []outputInfo{
34596 {0, 9223372034707292160},
34597 },
34598 },
34599 },
34600 {
34601 name: "FNMSUBS",
34602 argLen: 3,
34603 commutative: true,
34604 asm: riscv.AFNMSUBS,
34605 reg: regInfo{
34606 inputs: []inputInfo{
34607 {0, 9223372034707292160},
34608 {1, 9223372034707292160},
34609 {2, 9223372034707292160},
34610 },
34611 outputs: []outputInfo{
34612 {0, 9223372034707292160},
34613 },
34614 },
34615 },
34616 {
34617 name: "FSQRTS",
34618 argLen: 1,
34619 asm: riscv.AFSQRTS,
34620 reg: regInfo{
34621 inputs: []inputInfo{
34622 {0, 9223372034707292160},
34623 },
34624 outputs: []outputInfo{
34625 {0, 9223372034707292160},
34626 },
34627 },
34628 },
34629 {
34630 name: "FNEGS",
34631 argLen: 1,
34632 asm: riscv.AFNEGS,
34633 reg: regInfo{
34634 inputs: []inputInfo{
34635 {0, 9223372034707292160},
34636 },
34637 outputs: []outputInfo{
34638 {0, 9223372034707292160},
34639 },
34640 },
34641 },
34642 {
34643 name: "FMVSX",
34644 argLen: 1,
34645 asm: riscv.AFMVSX,
34646 reg: regInfo{
34647 inputs: []inputInfo{
34648 {0, 1006632944},
34649 },
34650 outputs: []outputInfo{
34651 {0, 9223372034707292160},
34652 },
34653 },
34654 },
34655 {
34656 name: "FCVTSW",
34657 argLen: 1,
34658 asm: riscv.AFCVTSW,
34659 reg: regInfo{
34660 inputs: []inputInfo{
34661 {0, 1006632944},
34662 },
34663 outputs: []outputInfo{
34664 {0, 9223372034707292160},
34665 },
34666 },
34667 },
34668 {
34669 name: "FCVTSL",
34670 argLen: 1,
34671 asm: riscv.AFCVTSL,
34672 reg: regInfo{
34673 inputs: []inputInfo{
34674 {0, 1006632944},
34675 },
34676 outputs: []outputInfo{
34677 {0, 9223372034707292160},
34678 },
34679 },
34680 },
34681 {
34682 name: "FCVTWS",
34683 argLen: 1,
34684 asm: riscv.AFCVTWS,
34685 reg: regInfo{
34686 inputs: []inputInfo{
34687 {0, 9223372034707292160},
34688 },
34689 outputs: []outputInfo{
34690 {0, 1006632944},
34691 },
34692 },
34693 },
34694 {
34695 name: "FCVTLS",
34696 argLen: 1,
34697 asm: riscv.AFCVTLS,
34698 reg: regInfo{
34699 inputs: []inputInfo{
34700 {0, 9223372034707292160},
34701 },
34702 outputs: []outputInfo{
34703 {0, 1006632944},
34704 },
34705 },
34706 },
34707 {
34708 name: "FMOVWload",
34709 auxType: auxSymOff,
34710 argLen: 2,
34711 faultOnNilArg0: true,
34712 symEffect: SymRead,
34713 asm: riscv.AMOVF,
34714 reg: regInfo{
34715 inputs: []inputInfo{
34716 {0, 9223372037861408754},
34717 },
34718 outputs: []outputInfo{
34719 {0, 9223372034707292160},
34720 },
34721 },
34722 },
34723 {
34724 name: "FMOVWstore",
34725 auxType: auxSymOff,
34726 argLen: 3,
34727 faultOnNilArg0: true,
34728 symEffect: SymWrite,
34729 asm: riscv.AMOVF,
34730 reg: regInfo{
34731 inputs: []inputInfo{
34732 {0, 9223372037861408754},
34733 {1, 9223372034707292160},
34734 },
34735 },
34736 },
34737 {
34738 name: "FEQS",
34739 argLen: 2,
34740 commutative: true,
34741 asm: riscv.AFEQS,
34742 reg: regInfo{
34743 inputs: []inputInfo{
34744 {0, 9223372034707292160},
34745 {1, 9223372034707292160},
34746 },
34747 outputs: []outputInfo{
34748 {0, 1006632944},
34749 },
34750 },
34751 },
34752 {
34753 name: "FNES",
34754 argLen: 2,
34755 commutative: true,
34756 asm: riscv.AFNES,
34757 reg: regInfo{
34758 inputs: []inputInfo{
34759 {0, 9223372034707292160},
34760 {1, 9223372034707292160},
34761 },
34762 outputs: []outputInfo{
34763 {0, 1006632944},
34764 },
34765 },
34766 },
34767 {
34768 name: "FLTS",
34769 argLen: 2,
34770 asm: riscv.AFLTS,
34771 reg: regInfo{
34772 inputs: []inputInfo{
34773 {0, 9223372034707292160},
34774 {1, 9223372034707292160},
34775 },
34776 outputs: []outputInfo{
34777 {0, 1006632944},
34778 },
34779 },
34780 },
34781 {
34782 name: "FLES",
34783 argLen: 2,
34784 asm: riscv.AFLES,
34785 reg: regInfo{
34786 inputs: []inputInfo{
34787 {0, 9223372034707292160},
34788 {1, 9223372034707292160},
34789 },
34790 outputs: []outputInfo{
34791 {0, 1006632944},
34792 },
34793 },
34794 },
34795 {
34796 name: "LoweredFMAXS",
34797 argLen: 2,
34798 commutative: true,
34799 resultNotInArgs: true,
34800 asm: riscv.AFMAXS,
34801 reg: regInfo{
34802 inputs: []inputInfo{
34803 {0, 9223372034707292160},
34804 {1, 9223372034707292160},
34805 },
34806 outputs: []outputInfo{
34807 {0, 9223372034707292160},
34808 },
34809 },
34810 },
34811 {
34812 name: "LoweredFMINS",
34813 argLen: 2,
34814 commutative: true,
34815 resultNotInArgs: true,
34816 asm: riscv.AFMINS,
34817 reg: regInfo{
34818 inputs: []inputInfo{
34819 {0, 9223372034707292160},
34820 {1, 9223372034707292160},
34821 },
34822 outputs: []outputInfo{
34823 {0, 9223372034707292160},
34824 },
34825 },
34826 },
34827 {
34828 name: "FADDD",
34829 argLen: 2,
34830 commutative: true,
34831 asm: riscv.AFADDD,
34832 reg: regInfo{
34833 inputs: []inputInfo{
34834 {0, 9223372034707292160},
34835 {1, 9223372034707292160},
34836 },
34837 outputs: []outputInfo{
34838 {0, 9223372034707292160},
34839 },
34840 },
34841 },
34842 {
34843 name: "FSUBD",
34844 argLen: 2,
34845 asm: riscv.AFSUBD,
34846 reg: regInfo{
34847 inputs: []inputInfo{
34848 {0, 9223372034707292160},
34849 {1, 9223372034707292160},
34850 },
34851 outputs: []outputInfo{
34852 {0, 9223372034707292160},
34853 },
34854 },
34855 },
34856 {
34857 name: "FMULD",
34858 argLen: 2,
34859 commutative: true,
34860 asm: riscv.AFMULD,
34861 reg: regInfo{
34862 inputs: []inputInfo{
34863 {0, 9223372034707292160},
34864 {1, 9223372034707292160},
34865 },
34866 outputs: []outputInfo{
34867 {0, 9223372034707292160},
34868 },
34869 },
34870 },
34871 {
34872 name: "FDIVD",
34873 argLen: 2,
34874 asm: riscv.AFDIVD,
34875 reg: regInfo{
34876 inputs: []inputInfo{
34877 {0, 9223372034707292160},
34878 {1, 9223372034707292160},
34879 },
34880 outputs: []outputInfo{
34881 {0, 9223372034707292160},
34882 },
34883 },
34884 },
34885 {
34886 name: "FMADDD",
34887 argLen: 3,
34888 commutative: true,
34889 asm: riscv.AFMADDD,
34890 reg: regInfo{
34891 inputs: []inputInfo{
34892 {0, 9223372034707292160},
34893 {1, 9223372034707292160},
34894 {2, 9223372034707292160},
34895 },
34896 outputs: []outputInfo{
34897 {0, 9223372034707292160},
34898 },
34899 },
34900 },
34901 {
34902 name: "FMSUBD",
34903 argLen: 3,
34904 commutative: true,
34905 asm: riscv.AFMSUBD,
34906 reg: regInfo{
34907 inputs: []inputInfo{
34908 {0, 9223372034707292160},
34909 {1, 9223372034707292160},
34910 {2, 9223372034707292160},
34911 },
34912 outputs: []outputInfo{
34913 {0, 9223372034707292160},
34914 },
34915 },
34916 },
34917 {
34918 name: "FNMADDD",
34919 argLen: 3,
34920 commutative: true,
34921 asm: riscv.AFNMADDD,
34922 reg: regInfo{
34923 inputs: []inputInfo{
34924 {0, 9223372034707292160},
34925 {1, 9223372034707292160},
34926 {2, 9223372034707292160},
34927 },
34928 outputs: []outputInfo{
34929 {0, 9223372034707292160},
34930 },
34931 },
34932 },
34933 {
34934 name: "FNMSUBD",
34935 argLen: 3,
34936 commutative: true,
34937 asm: riscv.AFNMSUBD,
34938 reg: regInfo{
34939 inputs: []inputInfo{
34940 {0, 9223372034707292160},
34941 {1, 9223372034707292160},
34942 {2, 9223372034707292160},
34943 },
34944 outputs: []outputInfo{
34945 {0, 9223372034707292160},
34946 },
34947 },
34948 },
34949 {
34950 name: "FSQRTD",
34951 argLen: 1,
34952 asm: riscv.AFSQRTD,
34953 reg: regInfo{
34954 inputs: []inputInfo{
34955 {0, 9223372034707292160},
34956 },
34957 outputs: []outputInfo{
34958 {0, 9223372034707292160},
34959 },
34960 },
34961 },
34962 {
34963 name: "FNEGD",
34964 argLen: 1,
34965 asm: riscv.AFNEGD,
34966 reg: regInfo{
34967 inputs: []inputInfo{
34968 {0, 9223372034707292160},
34969 },
34970 outputs: []outputInfo{
34971 {0, 9223372034707292160},
34972 },
34973 },
34974 },
34975 {
34976 name: "FABSD",
34977 argLen: 1,
34978 asm: riscv.AFABSD,
34979 reg: regInfo{
34980 inputs: []inputInfo{
34981 {0, 9223372034707292160},
34982 },
34983 outputs: []outputInfo{
34984 {0, 9223372034707292160},
34985 },
34986 },
34987 },
34988 {
34989 name: "FSGNJD",
34990 argLen: 2,
34991 asm: riscv.AFSGNJD,
34992 reg: regInfo{
34993 inputs: []inputInfo{
34994 {0, 9223372034707292160},
34995 {1, 9223372034707292160},
34996 },
34997 outputs: []outputInfo{
34998 {0, 9223372034707292160},
34999 },
35000 },
35001 },
35002 {
35003 name: "FMVDX",
35004 argLen: 1,
35005 asm: riscv.AFMVDX,
35006 reg: regInfo{
35007 inputs: []inputInfo{
35008 {0, 1006632944},
35009 },
35010 outputs: []outputInfo{
35011 {0, 9223372034707292160},
35012 },
35013 },
35014 },
35015 {
35016 name: "FCVTDW",
35017 argLen: 1,
35018 asm: riscv.AFCVTDW,
35019 reg: regInfo{
35020 inputs: []inputInfo{
35021 {0, 1006632944},
35022 },
35023 outputs: []outputInfo{
35024 {0, 9223372034707292160},
35025 },
35026 },
35027 },
35028 {
35029 name: "FCVTDL",
35030 argLen: 1,
35031 asm: riscv.AFCVTDL,
35032 reg: regInfo{
35033 inputs: []inputInfo{
35034 {0, 1006632944},
35035 },
35036 outputs: []outputInfo{
35037 {0, 9223372034707292160},
35038 },
35039 },
35040 },
35041 {
35042 name: "FCVTWD",
35043 argLen: 1,
35044 asm: riscv.AFCVTWD,
35045 reg: regInfo{
35046 inputs: []inputInfo{
35047 {0, 9223372034707292160},
35048 },
35049 outputs: []outputInfo{
35050 {0, 1006632944},
35051 },
35052 },
35053 },
35054 {
35055 name: "FCVTLD",
35056 argLen: 1,
35057 asm: riscv.AFCVTLD,
35058 reg: regInfo{
35059 inputs: []inputInfo{
35060 {0, 9223372034707292160},
35061 },
35062 outputs: []outputInfo{
35063 {0, 1006632944},
35064 },
35065 },
35066 },
35067 {
35068 name: "FCVTDS",
35069 argLen: 1,
35070 asm: riscv.AFCVTDS,
35071 reg: regInfo{
35072 inputs: []inputInfo{
35073 {0, 9223372034707292160},
35074 },
35075 outputs: []outputInfo{
35076 {0, 9223372034707292160},
35077 },
35078 },
35079 },
35080 {
35081 name: "FCVTSD",
35082 argLen: 1,
35083 asm: riscv.AFCVTSD,
35084 reg: regInfo{
35085 inputs: []inputInfo{
35086 {0, 9223372034707292160},
35087 },
35088 outputs: []outputInfo{
35089 {0, 9223372034707292160},
35090 },
35091 },
35092 },
35093 {
35094 name: "FMOVDload",
35095 auxType: auxSymOff,
35096 argLen: 2,
35097 faultOnNilArg0: true,
35098 symEffect: SymRead,
35099 asm: riscv.AMOVD,
35100 reg: regInfo{
35101 inputs: []inputInfo{
35102 {0, 9223372037861408754},
35103 },
35104 outputs: []outputInfo{
35105 {0, 9223372034707292160},
35106 },
35107 },
35108 },
35109 {
35110 name: "FMOVDstore",
35111 auxType: auxSymOff,
35112 argLen: 3,
35113 faultOnNilArg0: true,
35114 symEffect: SymWrite,
35115 asm: riscv.AMOVD,
35116 reg: regInfo{
35117 inputs: []inputInfo{
35118 {0, 9223372037861408754},
35119 {1, 9223372034707292160},
35120 },
35121 },
35122 },
35123 {
35124 name: "FEQD",
35125 argLen: 2,
35126 commutative: true,
35127 asm: riscv.AFEQD,
35128 reg: regInfo{
35129 inputs: []inputInfo{
35130 {0, 9223372034707292160},
35131 {1, 9223372034707292160},
35132 },
35133 outputs: []outputInfo{
35134 {0, 1006632944},
35135 },
35136 },
35137 },
35138 {
35139 name: "FNED",
35140 argLen: 2,
35141 commutative: true,
35142 asm: riscv.AFNED,
35143 reg: regInfo{
35144 inputs: []inputInfo{
35145 {0, 9223372034707292160},
35146 {1, 9223372034707292160},
35147 },
35148 outputs: []outputInfo{
35149 {0, 1006632944},
35150 },
35151 },
35152 },
35153 {
35154 name: "FLTD",
35155 argLen: 2,
35156 asm: riscv.AFLTD,
35157 reg: regInfo{
35158 inputs: []inputInfo{
35159 {0, 9223372034707292160},
35160 {1, 9223372034707292160},
35161 },
35162 outputs: []outputInfo{
35163 {0, 1006632944},
35164 },
35165 },
35166 },
35167 {
35168 name: "FLED",
35169 argLen: 2,
35170 asm: riscv.AFLED,
35171 reg: regInfo{
35172 inputs: []inputInfo{
35173 {0, 9223372034707292160},
35174 {1, 9223372034707292160},
35175 },
35176 outputs: []outputInfo{
35177 {0, 1006632944},
35178 },
35179 },
35180 },
35181 {
35182 name: "LoweredFMIND",
35183 argLen: 2,
35184 commutative: true,
35185 resultNotInArgs: true,
35186 asm: riscv.AFMIND,
35187 reg: regInfo{
35188 inputs: []inputInfo{
35189 {0, 9223372034707292160},
35190 {1, 9223372034707292160},
35191 },
35192 outputs: []outputInfo{
35193 {0, 9223372034707292160},
35194 },
35195 },
35196 },
35197 {
35198 name: "LoweredFMAXD",
35199 argLen: 2,
35200 commutative: true,
35201 resultNotInArgs: true,
35202 asm: riscv.AFMAXD,
35203 reg: regInfo{
35204 inputs: []inputInfo{
35205 {0, 9223372034707292160},
35206 {1, 9223372034707292160},
35207 },
35208 outputs: []outputInfo{
35209 {0, 9223372034707292160},
35210 },
35211 },
35212 },
35213
35214 {
35215 name: "FADDS",
35216 argLen: 2,
35217 commutative: true,
35218 resultInArg0: true,
35219 asm: s390x.AFADDS,
35220 reg: regInfo{
35221 inputs: []inputInfo{
35222 {0, 4294901760},
35223 {1, 4294901760},
35224 },
35225 outputs: []outputInfo{
35226 {0, 4294901760},
35227 },
35228 },
35229 },
35230 {
35231 name: "FADD",
35232 argLen: 2,
35233 commutative: true,
35234 resultInArg0: true,
35235 asm: s390x.AFADD,
35236 reg: regInfo{
35237 inputs: []inputInfo{
35238 {0, 4294901760},
35239 {1, 4294901760},
35240 },
35241 outputs: []outputInfo{
35242 {0, 4294901760},
35243 },
35244 },
35245 },
35246 {
35247 name: "FSUBS",
35248 argLen: 2,
35249 resultInArg0: true,
35250 asm: s390x.AFSUBS,
35251 reg: regInfo{
35252 inputs: []inputInfo{
35253 {0, 4294901760},
35254 {1, 4294901760},
35255 },
35256 outputs: []outputInfo{
35257 {0, 4294901760},
35258 },
35259 },
35260 },
35261 {
35262 name: "FSUB",
35263 argLen: 2,
35264 resultInArg0: true,
35265 asm: s390x.AFSUB,
35266 reg: regInfo{
35267 inputs: []inputInfo{
35268 {0, 4294901760},
35269 {1, 4294901760},
35270 },
35271 outputs: []outputInfo{
35272 {0, 4294901760},
35273 },
35274 },
35275 },
35276 {
35277 name: "FMULS",
35278 argLen: 2,
35279 commutative: true,
35280 resultInArg0: true,
35281 asm: s390x.AFMULS,
35282 reg: regInfo{
35283 inputs: []inputInfo{
35284 {0, 4294901760},
35285 {1, 4294901760},
35286 },
35287 outputs: []outputInfo{
35288 {0, 4294901760},
35289 },
35290 },
35291 },
35292 {
35293 name: "FMUL",
35294 argLen: 2,
35295 commutative: true,
35296 resultInArg0: true,
35297 asm: s390x.AFMUL,
35298 reg: regInfo{
35299 inputs: []inputInfo{
35300 {0, 4294901760},
35301 {1, 4294901760},
35302 },
35303 outputs: []outputInfo{
35304 {0, 4294901760},
35305 },
35306 },
35307 },
35308 {
35309 name: "FDIVS",
35310 argLen: 2,
35311 resultInArg0: true,
35312 asm: s390x.AFDIVS,
35313 reg: regInfo{
35314 inputs: []inputInfo{
35315 {0, 4294901760},
35316 {1, 4294901760},
35317 },
35318 outputs: []outputInfo{
35319 {0, 4294901760},
35320 },
35321 },
35322 },
35323 {
35324 name: "FDIV",
35325 argLen: 2,
35326 resultInArg0: true,
35327 asm: s390x.AFDIV,
35328 reg: regInfo{
35329 inputs: []inputInfo{
35330 {0, 4294901760},
35331 {1, 4294901760},
35332 },
35333 outputs: []outputInfo{
35334 {0, 4294901760},
35335 },
35336 },
35337 },
35338 {
35339 name: "FNEGS",
35340 argLen: 1,
35341 clobberFlags: true,
35342 asm: s390x.AFNEGS,
35343 reg: regInfo{
35344 inputs: []inputInfo{
35345 {0, 4294901760},
35346 },
35347 outputs: []outputInfo{
35348 {0, 4294901760},
35349 },
35350 },
35351 },
35352 {
35353 name: "FNEG",
35354 argLen: 1,
35355 clobberFlags: true,
35356 asm: s390x.AFNEG,
35357 reg: regInfo{
35358 inputs: []inputInfo{
35359 {0, 4294901760},
35360 },
35361 outputs: []outputInfo{
35362 {0, 4294901760},
35363 },
35364 },
35365 },
35366 {
35367 name: "FMADDS",
35368 argLen: 3,
35369 resultInArg0: true,
35370 asm: s390x.AFMADDS,
35371 reg: regInfo{
35372 inputs: []inputInfo{
35373 {0, 4294901760},
35374 {1, 4294901760},
35375 {2, 4294901760},
35376 },
35377 outputs: []outputInfo{
35378 {0, 4294901760},
35379 },
35380 },
35381 },
35382 {
35383 name: "FMADD",
35384 argLen: 3,
35385 resultInArg0: true,
35386 asm: s390x.AFMADD,
35387 reg: regInfo{
35388 inputs: []inputInfo{
35389 {0, 4294901760},
35390 {1, 4294901760},
35391 {2, 4294901760},
35392 },
35393 outputs: []outputInfo{
35394 {0, 4294901760},
35395 },
35396 },
35397 },
35398 {
35399 name: "FMSUBS",
35400 argLen: 3,
35401 resultInArg0: true,
35402 asm: s390x.AFMSUBS,
35403 reg: regInfo{
35404 inputs: []inputInfo{
35405 {0, 4294901760},
35406 {1, 4294901760},
35407 {2, 4294901760},
35408 },
35409 outputs: []outputInfo{
35410 {0, 4294901760},
35411 },
35412 },
35413 },
35414 {
35415 name: "FMSUB",
35416 argLen: 3,
35417 resultInArg0: true,
35418 asm: s390x.AFMSUB,
35419 reg: regInfo{
35420 inputs: []inputInfo{
35421 {0, 4294901760},
35422 {1, 4294901760},
35423 {2, 4294901760},
35424 },
35425 outputs: []outputInfo{
35426 {0, 4294901760},
35427 },
35428 },
35429 },
35430 {
35431 name: "LPDFR",
35432 argLen: 1,
35433 asm: s390x.ALPDFR,
35434 reg: regInfo{
35435 inputs: []inputInfo{
35436 {0, 4294901760},
35437 },
35438 outputs: []outputInfo{
35439 {0, 4294901760},
35440 },
35441 },
35442 },
35443 {
35444 name: "LNDFR",
35445 argLen: 1,
35446 asm: s390x.ALNDFR,
35447 reg: regInfo{
35448 inputs: []inputInfo{
35449 {0, 4294901760},
35450 },
35451 outputs: []outputInfo{
35452 {0, 4294901760},
35453 },
35454 },
35455 },
35456 {
35457 name: "CPSDR",
35458 argLen: 2,
35459 asm: s390x.ACPSDR,
35460 reg: regInfo{
35461 inputs: []inputInfo{
35462 {0, 4294901760},
35463 {1, 4294901760},
35464 },
35465 outputs: []outputInfo{
35466 {0, 4294901760},
35467 },
35468 },
35469 },
35470 {
35471 name: "FIDBR",
35472 auxType: auxInt8,
35473 argLen: 1,
35474 asm: s390x.AFIDBR,
35475 reg: regInfo{
35476 inputs: []inputInfo{
35477 {0, 4294901760},
35478 },
35479 outputs: []outputInfo{
35480 {0, 4294901760},
35481 },
35482 },
35483 },
35484 {
35485 name: "FMOVSload",
35486 auxType: auxSymOff,
35487 argLen: 2,
35488 faultOnNilArg0: true,
35489 symEffect: SymRead,
35490 asm: s390x.AFMOVS,
35491 reg: regInfo{
35492 inputs: []inputInfo{
35493 {0, 4295023614},
35494 },
35495 outputs: []outputInfo{
35496 {0, 4294901760},
35497 },
35498 },
35499 },
35500 {
35501 name: "FMOVDload",
35502 auxType: auxSymOff,
35503 argLen: 2,
35504 faultOnNilArg0: true,
35505 symEffect: SymRead,
35506 asm: s390x.AFMOVD,
35507 reg: regInfo{
35508 inputs: []inputInfo{
35509 {0, 4295023614},
35510 },
35511 outputs: []outputInfo{
35512 {0, 4294901760},
35513 },
35514 },
35515 },
35516 {
35517 name: "FMOVSconst",
35518 auxType: auxFloat32,
35519 argLen: 0,
35520 rematerializeable: true,
35521 asm: s390x.AFMOVS,
35522 reg: regInfo{
35523 outputs: []outputInfo{
35524 {0, 4294901760},
35525 },
35526 },
35527 },
35528 {
35529 name: "FMOVDconst",
35530 auxType: auxFloat64,
35531 argLen: 0,
35532 rematerializeable: true,
35533 asm: s390x.AFMOVD,
35534 reg: regInfo{
35535 outputs: []outputInfo{
35536 {0, 4294901760},
35537 },
35538 },
35539 },
35540 {
35541 name: "FMOVSloadidx",
35542 auxType: auxSymOff,
35543 argLen: 3,
35544 symEffect: SymRead,
35545 asm: s390x.AFMOVS,
35546 reg: regInfo{
35547 inputs: []inputInfo{
35548 {0, 56318},
35549 {1, 56318},
35550 },
35551 outputs: []outputInfo{
35552 {0, 4294901760},
35553 },
35554 },
35555 },
35556 {
35557 name: "FMOVDloadidx",
35558 auxType: auxSymOff,
35559 argLen: 3,
35560 symEffect: SymRead,
35561 asm: s390x.AFMOVD,
35562 reg: regInfo{
35563 inputs: []inputInfo{
35564 {0, 56318},
35565 {1, 56318},
35566 },
35567 outputs: []outputInfo{
35568 {0, 4294901760},
35569 },
35570 },
35571 },
35572 {
35573 name: "FMOVSstore",
35574 auxType: auxSymOff,
35575 argLen: 3,
35576 faultOnNilArg0: true,
35577 symEffect: SymWrite,
35578 asm: s390x.AFMOVS,
35579 reg: regInfo{
35580 inputs: []inputInfo{
35581 {0, 4295023614},
35582 {1, 4294901760},
35583 },
35584 },
35585 },
35586 {
35587 name: "FMOVDstore",
35588 auxType: auxSymOff,
35589 argLen: 3,
35590 faultOnNilArg0: true,
35591 symEffect: SymWrite,
35592 asm: s390x.AFMOVD,
35593 reg: regInfo{
35594 inputs: []inputInfo{
35595 {0, 4295023614},
35596 {1, 4294901760},
35597 },
35598 },
35599 },
35600 {
35601 name: "FMOVSstoreidx",
35602 auxType: auxSymOff,
35603 argLen: 4,
35604 symEffect: SymWrite,
35605 asm: s390x.AFMOVS,
35606 reg: regInfo{
35607 inputs: []inputInfo{
35608 {0, 56318},
35609 {1, 56318},
35610 {2, 4294901760},
35611 },
35612 },
35613 },
35614 {
35615 name: "FMOVDstoreidx",
35616 auxType: auxSymOff,
35617 argLen: 4,
35618 symEffect: SymWrite,
35619 asm: s390x.AFMOVD,
35620 reg: regInfo{
35621 inputs: []inputInfo{
35622 {0, 56318},
35623 {1, 56318},
35624 {2, 4294901760},
35625 },
35626 },
35627 },
35628 {
35629 name: "ADD",
35630 argLen: 2,
35631 commutative: true,
35632 clobberFlags: true,
35633 asm: s390x.AADD,
35634 reg: regInfo{
35635 inputs: []inputInfo{
35636 {1, 23551},
35637 {0, 56319},
35638 },
35639 outputs: []outputInfo{
35640 {0, 23551},
35641 },
35642 },
35643 },
35644 {
35645 name: "ADDW",
35646 argLen: 2,
35647 commutative: true,
35648 clobberFlags: true,
35649 asm: s390x.AADDW,
35650 reg: regInfo{
35651 inputs: []inputInfo{
35652 {1, 23551},
35653 {0, 56319},
35654 },
35655 outputs: []outputInfo{
35656 {0, 23551},
35657 },
35658 },
35659 },
35660 {
35661 name: "ADDconst",
35662 auxType: auxInt32,
35663 argLen: 1,
35664 clobberFlags: true,
35665 asm: s390x.AADD,
35666 reg: regInfo{
35667 inputs: []inputInfo{
35668 {0, 56319},
35669 },
35670 outputs: []outputInfo{
35671 {0, 23551},
35672 },
35673 },
35674 },
35675 {
35676 name: "ADDWconst",
35677 auxType: auxInt32,
35678 argLen: 1,
35679 clobberFlags: true,
35680 asm: s390x.AADDW,
35681 reg: regInfo{
35682 inputs: []inputInfo{
35683 {0, 56319},
35684 },
35685 outputs: []outputInfo{
35686 {0, 23551},
35687 },
35688 },
35689 },
35690 {
35691 name: "ADDload",
35692 auxType: auxSymOff,
35693 argLen: 3,
35694 resultInArg0: true,
35695 clobberFlags: true,
35696 faultOnNilArg1: true,
35697 symEffect: SymRead,
35698 asm: s390x.AADD,
35699 reg: regInfo{
35700 inputs: []inputInfo{
35701 {0, 23551},
35702 {1, 56318},
35703 },
35704 outputs: []outputInfo{
35705 {0, 23551},
35706 },
35707 },
35708 },
35709 {
35710 name: "ADDWload",
35711 auxType: auxSymOff,
35712 argLen: 3,
35713 resultInArg0: true,
35714 clobberFlags: true,
35715 faultOnNilArg1: true,
35716 symEffect: SymRead,
35717 asm: s390x.AADDW,
35718 reg: regInfo{
35719 inputs: []inputInfo{
35720 {0, 23551},
35721 {1, 56318},
35722 },
35723 outputs: []outputInfo{
35724 {0, 23551},
35725 },
35726 },
35727 },
35728 {
35729 name: "SUB",
35730 argLen: 2,
35731 clobberFlags: true,
35732 asm: s390x.ASUB,
35733 reg: regInfo{
35734 inputs: []inputInfo{
35735 {0, 23551},
35736 {1, 23551},
35737 },
35738 outputs: []outputInfo{
35739 {0, 23551},
35740 },
35741 },
35742 },
35743 {
35744 name: "SUBW",
35745 argLen: 2,
35746 clobberFlags: true,
35747 asm: s390x.ASUBW,
35748 reg: regInfo{
35749 inputs: []inputInfo{
35750 {0, 23551},
35751 {1, 23551},
35752 },
35753 outputs: []outputInfo{
35754 {0, 23551},
35755 },
35756 },
35757 },
35758 {
35759 name: "SUBconst",
35760 auxType: auxInt32,
35761 argLen: 1,
35762 resultInArg0: true,
35763 clobberFlags: true,
35764 asm: s390x.ASUB,
35765 reg: regInfo{
35766 inputs: []inputInfo{
35767 {0, 23551},
35768 },
35769 outputs: []outputInfo{
35770 {0, 23551},
35771 },
35772 },
35773 },
35774 {
35775 name: "SUBWconst",
35776 auxType: auxInt32,
35777 argLen: 1,
35778 resultInArg0: true,
35779 clobberFlags: true,
35780 asm: s390x.ASUBW,
35781 reg: regInfo{
35782 inputs: []inputInfo{
35783 {0, 23551},
35784 },
35785 outputs: []outputInfo{
35786 {0, 23551},
35787 },
35788 },
35789 },
35790 {
35791 name: "SUBload",
35792 auxType: auxSymOff,
35793 argLen: 3,
35794 resultInArg0: true,
35795 clobberFlags: true,
35796 faultOnNilArg1: true,
35797 symEffect: SymRead,
35798 asm: s390x.ASUB,
35799 reg: regInfo{
35800 inputs: []inputInfo{
35801 {0, 23551},
35802 {1, 56318},
35803 },
35804 outputs: []outputInfo{
35805 {0, 23551},
35806 },
35807 },
35808 },
35809 {
35810 name: "SUBWload",
35811 auxType: auxSymOff,
35812 argLen: 3,
35813 resultInArg0: true,
35814 clobberFlags: true,
35815 faultOnNilArg1: true,
35816 symEffect: SymRead,
35817 asm: s390x.ASUBW,
35818 reg: regInfo{
35819 inputs: []inputInfo{
35820 {0, 23551},
35821 {1, 56318},
35822 },
35823 outputs: []outputInfo{
35824 {0, 23551},
35825 },
35826 },
35827 },
35828 {
35829 name: "MULLD",
35830 argLen: 2,
35831 commutative: true,
35832 resultInArg0: true,
35833 clobberFlags: true,
35834 asm: s390x.AMULLD,
35835 reg: regInfo{
35836 inputs: []inputInfo{
35837 {0, 23551},
35838 {1, 23551},
35839 },
35840 outputs: []outputInfo{
35841 {0, 23551},
35842 },
35843 },
35844 },
35845 {
35846 name: "MULLW",
35847 argLen: 2,
35848 commutative: true,
35849 resultInArg0: true,
35850 clobberFlags: true,
35851 asm: s390x.AMULLW,
35852 reg: regInfo{
35853 inputs: []inputInfo{
35854 {0, 23551},
35855 {1, 23551},
35856 },
35857 outputs: []outputInfo{
35858 {0, 23551},
35859 },
35860 },
35861 },
35862 {
35863 name: "MULLDconst",
35864 auxType: auxInt32,
35865 argLen: 1,
35866 resultInArg0: true,
35867 clobberFlags: true,
35868 asm: s390x.AMULLD,
35869 reg: regInfo{
35870 inputs: []inputInfo{
35871 {0, 23551},
35872 },
35873 outputs: []outputInfo{
35874 {0, 23551},
35875 },
35876 },
35877 },
35878 {
35879 name: "MULLWconst",
35880 auxType: auxInt32,
35881 argLen: 1,
35882 resultInArg0: true,
35883 clobberFlags: true,
35884 asm: s390x.AMULLW,
35885 reg: regInfo{
35886 inputs: []inputInfo{
35887 {0, 23551},
35888 },
35889 outputs: []outputInfo{
35890 {0, 23551},
35891 },
35892 },
35893 },
35894 {
35895 name: "MULLDload",
35896 auxType: auxSymOff,
35897 argLen: 3,
35898 resultInArg0: true,
35899 clobberFlags: true,
35900 faultOnNilArg1: true,
35901 symEffect: SymRead,
35902 asm: s390x.AMULLD,
35903 reg: regInfo{
35904 inputs: []inputInfo{
35905 {0, 23551},
35906 {1, 56318},
35907 },
35908 outputs: []outputInfo{
35909 {0, 23551},
35910 },
35911 },
35912 },
35913 {
35914 name: "MULLWload",
35915 auxType: auxSymOff,
35916 argLen: 3,
35917 resultInArg0: true,
35918 clobberFlags: true,
35919 faultOnNilArg1: true,
35920 symEffect: SymRead,
35921 asm: s390x.AMULLW,
35922 reg: regInfo{
35923 inputs: []inputInfo{
35924 {0, 23551},
35925 {1, 56318},
35926 },
35927 outputs: []outputInfo{
35928 {0, 23551},
35929 },
35930 },
35931 },
35932 {
35933 name: "MULHD",
35934 argLen: 2,
35935 commutative: true,
35936 resultInArg0: true,
35937 clobberFlags: true,
35938 asm: s390x.AMULHD,
35939 reg: regInfo{
35940 inputs: []inputInfo{
35941 {0, 21503},
35942 {1, 21503},
35943 },
35944 clobbers: 2048,
35945 outputs: []outputInfo{
35946 {0, 21503},
35947 },
35948 },
35949 },
35950 {
35951 name: "MULHDU",
35952 argLen: 2,
35953 commutative: true,
35954 resultInArg0: true,
35955 clobberFlags: true,
35956 asm: s390x.AMULHDU,
35957 reg: regInfo{
35958 inputs: []inputInfo{
35959 {0, 21503},
35960 {1, 21503},
35961 },
35962 clobbers: 2048,
35963 outputs: []outputInfo{
35964 {0, 21503},
35965 },
35966 },
35967 },
35968 {
35969 name: "DIVD",
35970 argLen: 2,
35971 resultInArg0: true,
35972 clobberFlags: true,
35973 asm: s390x.ADIVD,
35974 reg: regInfo{
35975 inputs: []inputInfo{
35976 {0, 21503},
35977 {1, 21503},
35978 },
35979 clobbers: 2048,
35980 outputs: []outputInfo{
35981 {0, 21503},
35982 },
35983 },
35984 },
35985 {
35986 name: "DIVW",
35987 argLen: 2,
35988 resultInArg0: true,
35989 clobberFlags: true,
35990 asm: s390x.ADIVW,
35991 reg: regInfo{
35992 inputs: []inputInfo{
35993 {0, 21503},
35994 {1, 21503},
35995 },
35996 clobbers: 2048,
35997 outputs: []outputInfo{
35998 {0, 21503},
35999 },
36000 },
36001 },
36002 {
36003 name: "DIVDU",
36004 argLen: 2,
36005 resultInArg0: true,
36006 clobberFlags: true,
36007 asm: s390x.ADIVDU,
36008 reg: regInfo{
36009 inputs: []inputInfo{
36010 {0, 21503},
36011 {1, 21503},
36012 },
36013 clobbers: 2048,
36014 outputs: []outputInfo{
36015 {0, 21503},
36016 },
36017 },
36018 },
36019 {
36020 name: "DIVWU",
36021 argLen: 2,
36022 resultInArg0: true,
36023 clobberFlags: true,
36024 asm: s390x.ADIVWU,
36025 reg: regInfo{
36026 inputs: []inputInfo{
36027 {0, 21503},
36028 {1, 21503},
36029 },
36030 clobbers: 2048,
36031 outputs: []outputInfo{
36032 {0, 21503},
36033 },
36034 },
36035 },
36036 {
36037 name: "MODD",
36038 argLen: 2,
36039 resultInArg0: true,
36040 clobberFlags: true,
36041 asm: s390x.AMODD,
36042 reg: regInfo{
36043 inputs: []inputInfo{
36044 {0, 21503},
36045 {1, 21503},
36046 },
36047 clobbers: 2048,
36048 outputs: []outputInfo{
36049 {0, 21503},
36050 },
36051 },
36052 },
36053 {
36054 name: "MODW",
36055 argLen: 2,
36056 resultInArg0: true,
36057 clobberFlags: true,
36058 asm: s390x.AMODW,
36059 reg: regInfo{
36060 inputs: []inputInfo{
36061 {0, 21503},
36062 {1, 21503},
36063 },
36064 clobbers: 2048,
36065 outputs: []outputInfo{
36066 {0, 21503},
36067 },
36068 },
36069 },
36070 {
36071 name: "MODDU",
36072 argLen: 2,
36073 resultInArg0: true,
36074 clobberFlags: true,
36075 asm: s390x.AMODDU,
36076 reg: regInfo{
36077 inputs: []inputInfo{
36078 {0, 21503},
36079 {1, 21503},
36080 },
36081 clobbers: 2048,
36082 outputs: []outputInfo{
36083 {0, 21503},
36084 },
36085 },
36086 },
36087 {
36088 name: "MODWU",
36089 argLen: 2,
36090 resultInArg0: true,
36091 clobberFlags: true,
36092 asm: s390x.AMODWU,
36093 reg: regInfo{
36094 inputs: []inputInfo{
36095 {0, 21503},
36096 {1, 21503},
36097 },
36098 clobbers: 2048,
36099 outputs: []outputInfo{
36100 {0, 21503},
36101 },
36102 },
36103 },
36104 {
36105 name: "AND",
36106 argLen: 2,
36107 commutative: true,
36108 clobberFlags: true,
36109 asm: s390x.AAND,
36110 reg: regInfo{
36111 inputs: []inputInfo{
36112 {0, 23551},
36113 {1, 23551},
36114 },
36115 outputs: []outputInfo{
36116 {0, 23551},
36117 },
36118 },
36119 },
36120 {
36121 name: "ANDW",
36122 argLen: 2,
36123 commutative: true,
36124 clobberFlags: true,
36125 asm: s390x.AANDW,
36126 reg: regInfo{
36127 inputs: []inputInfo{
36128 {0, 23551},
36129 {1, 23551},
36130 },
36131 outputs: []outputInfo{
36132 {0, 23551},
36133 },
36134 },
36135 },
36136 {
36137 name: "ANDconst",
36138 auxType: auxInt64,
36139 argLen: 1,
36140 resultInArg0: true,
36141 clobberFlags: true,
36142 asm: s390x.AAND,
36143 reg: regInfo{
36144 inputs: []inputInfo{
36145 {0, 23551},
36146 },
36147 outputs: []outputInfo{
36148 {0, 23551},
36149 },
36150 },
36151 },
36152 {
36153 name: "ANDWconst",
36154 auxType: auxInt32,
36155 argLen: 1,
36156 resultInArg0: true,
36157 clobberFlags: true,
36158 asm: s390x.AANDW,
36159 reg: regInfo{
36160 inputs: []inputInfo{
36161 {0, 23551},
36162 },
36163 outputs: []outputInfo{
36164 {0, 23551},
36165 },
36166 },
36167 },
36168 {
36169 name: "ANDload",
36170 auxType: auxSymOff,
36171 argLen: 3,
36172 resultInArg0: true,
36173 clobberFlags: true,
36174 faultOnNilArg1: true,
36175 symEffect: SymRead,
36176 asm: s390x.AAND,
36177 reg: regInfo{
36178 inputs: []inputInfo{
36179 {0, 23551},
36180 {1, 56318},
36181 },
36182 outputs: []outputInfo{
36183 {0, 23551},
36184 },
36185 },
36186 },
36187 {
36188 name: "ANDWload",
36189 auxType: auxSymOff,
36190 argLen: 3,
36191 resultInArg0: true,
36192 clobberFlags: true,
36193 faultOnNilArg1: true,
36194 symEffect: SymRead,
36195 asm: s390x.AANDW,
36196 reg: regInfo{
36197 inputs: []inputInfo{
36198 {0, 23551},
36199 {1, 56318},
36200 },
36201 outputs: []outputInfo{
36202 {0, 23551},
36203 },
36204 },
36205 },
36206 {
36207 name: "OR",
36208 argLen: 2,
36209 commutative: true,
36210 clobberFlags: true,
36211 asm: s390x.AOR,
36212 reg: regInfo{
36213 inputs: []inputInfo{
36214 {0, 23551},
36215 {1, 23551},
36216 },
36217 outputs: []outputInfo{
36218 {0, 23551},
36219 },
36220 },
36221 },
36222 {
36223 name: "ORW",
36224 argLen: 2,
36225 commutative: true,
36226 clobberFlags: true,
36227 asm: s390x.AORW,
36228 reg: regInfo{
36229 inputs: []inputInfo{
36230 {0, 23551},
36231 {1, 23551},
36232 },
36233 outputs: []outputInfo{
36234 {0, 23551},
36235 },
36236 },
36237 },
36238 {
36239 name: "ORconst",
36240 auxType: auxInt64,
36241 argLen: 1,
36242 resultInArg0: true,
36243 clobberFlags: true,
36244 asm: s390x.AOR,
36245 reg: regInfo{
36246 inputs: []inputInfo{
36247 {0, 23551},
36248 },
36249 outputs: []outputInfo{
36250 {0, 23551},
36251 },
36252 },
36253 },
36254 {
36255 name: "ORWconst",
36256 auxType: auxInt32,
36257 argLen: 1,
36258 resultInArg0: true,
36259 clobberFlags: true,
36260 asm: s390x.AORW,
36261 reg: regInfo{
36262 inputs: []inputInfo{
36263 {0, 23551},
36264 },
36265 outputs: []outputInfo{
36266 {0, 23551},
36267 },
36268 },
36269 },
36270 {
36271 name: "ORload",
36272 auxType: auxSymOff,
36273 argLen: 3,
36274 resultInArg0: true,
36275 clobberFlags: true,
36276 faultOnNilArg1: true,
36277 symEffect: SymRead,
36278 asm: s390x.AOR,
36279 reg: regInfo{
36280 inputs: []inputInfo{
36281 {0, 23551},
36282 {1, 56318},
36283 },
36284 outputs: []outputInfo{
36285 {0, 23551},
36286 },
36287 },
36288 },
36289 {
36290 name: "ORWload",
36291 auxType: auxSymOff,
36292 argLen: 3,
36293 resultInArg0: true,
36294 clobberFlags: true,
36295 faultOnNilArg1: true,
36296 symEffect: SymRead,
36297 asm: s390x.AORW,
36298 reg: regInfo{
36299 inputs: []inputInfo{
36300 {0, 23551},
36301 {1, 56318},
36302 },
36303 outputs: []outputInfo{
36304 {0, 23551},
36305 },
36306 },
36307 },
36308 {
36309 name: "XOR",
36310 argLen: 2,
36311 commutative: true,
36312 clobberFlags: true,
36313 asm: s390x.AXOR,
36314 reg: regInfo{
36315 inputs: []inputInfo{
36316 {0, 23551},
36317 {1, 23551},
36318 },
36319 outputs: []outputInfo{
36320 {0, 23551},
36321 },
36322 },
36323 },
36324 {
36325 name: "XORW",
36326 argLen: 2,
36327 commutative: true,
36328 clobberFlags: true,
36329 asm: s390x.AXORW,
36330 reg: regInfo{
36331 inputs: []inputInfo{
36332 {0, 23551},
36333 {1, 23551},
36334 },
36335 outputs: []outputInfo{
36336 {0, 23551},
36337 },
36338 },
36339 },
36340 {
36341 name: "XORconst",
36342 auxType: auxInt64,
36343 argLen: 1,
36344 resultInArg0: true,
36345 clobberFlags: true,
36346 asm: s390x.AXOR,
36347 reg: regInfo{
36348 inputs: []inputInfo{
36349 {0, 23551},
36350 },
36351 outputs: []outputInfo{
36352 {0, 23551},
36353 },
36354 },
36355 },
36356 {
36357 name: "XORWconst",
36358 auxType: auxInt32,
36359 argLen: 1,
36360 resultInArg0: true,
36361 clobberFlags: true,
36362 asm: s390x.AXORW,
36363 reg: regInfo{
36364 inputs: []inputInfo{
36365 {0, 23551},
36366 },
36367 outputs: []outputInfo{
36368 {0, 23551},
36369 },
36370 },
36371 },
36372 {
36373 name: "XORload",
36374 auxType: auxSymOff,
36375 argLen: 3,
36376 resultInArg0: true,
36377 clobberFlags: true,
36378 faultOnNilArg1: true,
36379 symEffect: SymRead,
36380 asm: s390x.AXOR,
36381 reg: regInfo{
36382 inputs: []inputInfo{
36383 {0, 23551},
36384 {1, 56318},
36385 },
36386 outputs: []outputInfo{
36387 {0, 23551},
36388 },
36389 },
36390 },
36391 {
36392 name: "XORWload",
36393 auxType: auxSymOff,
36394 argLen: 3,
36395 resultInArg0: true,
36396 clobberFlags: true,
36397 faultOnNilArg1: true,
36398 symEffect: SymRead,
36399 asm: s390x.AXORW,
36400 reg: regInfo{
36401 inputs: []inputInfo{
36402 {0, 23551},
36403 {1, 56318},
36404 },
36405 outputs: []outputInfo{
36406 {0, 23551},
36407 },
36408 },
36409 },
36410 {
36411 name: "ADDC",
36412 argLen: 2,
36413 commutative: true,
36414 asm: s390x.AADDC,
36415 reg: regInfo{
36416 inputs: []inputInfo{
36417 {0, 23551},
36418 {1, 23551},
36419 },
36420 outputs: []outputInfo{
36421 {0, 23551},
36422 },
36423 },
36424 },
36425 {
36426 name: "ADDCconst",
36427 auxType: auxInt16,
36428 argLen: 1,
36429 asm: s390x.AADDC,
36430 reg: regInfo{
36431 inputs: []inputInfo{
36432 {0, 23551},
36433 },
36434 outputs: []outputInfo{
36435 {0, 23551},
36436 },
36437 },
36438 },
36439 {
36440 name: "ADDE",
36441 argLen: 3,
36442 commutative: true,
36443 resultInArg0: true,
36444 asm: s390x.AADDE,
36445 reg: regInfo{
36446 inputs: []inputInfo{
36447 {0, 23551},
36448 {1, 23551},
36449 },
36450 outputs: []outputInfo{
36451 {0, 23551},
36452 },
36453 },
36454 },
36455 {
36456 name: "SUBC",
36457 argLen: 2,
36458 asm: s390x.ASUBC,
36459 reg: regInfo{
36460 inputs: []inputInfo{
36461 {0, 23551},
36462 {1, 23551},
36463 },
36464 outputs: []outputInfo{
36465 {0, 23551},
36466 },
36467 },
36468 },
36469 {
36470 name: "SUBE",
36471 argLen: 3,
36472 resultInArg0: true,
36473 asm: s390x.ASUBE,
36474 reg: regInfo{
36475 inputs: []inputInfo{
36476 {0, 23551},
36477 {1, 23551},
36478 },
36479 outputs: []outputInfo{
36480 {0, 23551},
36481 },
36482 },
36483 },
36484 {
36485 name: "CMP",
36486 argLen: 2,
36487 asm: s390x.ACMP,
36488 reg: regInfo{
36489 inputs: []inputInfo{
36490 {0, 56319},
36491 {1, 56319},
36492 },
36493 },
36494 },
36495 {
36496 name: "CMPW",
36497 argLen: 2,
36498 asm: s390x.ACMPW,
36499 reg: regInfo{
36500 inputs: []inputInfo{
36501 {0, 56319},
36502 {1, 56319},
36503 },
36504 },
36505 },
36506 {
36507 name: "CMPU",
36508 argLen: 2,
36509 asm: s390x.ACMPU,
36510 reg: regInfo{
36511 inputs: []inputInfo{
36512 {0, 56319},
36513 {1, 56319},
36514 },
36515 },
36516 },
36517 {
36518 name: "CMPWU",
36519 argLen: 2,
36520 asm: s390x.ACMPWU,
36521 reg: regInfo{
36522 inputs: []inputInfo{
36523 {0, 56319},
36524 {1, 56319},
36525 },
36526 },
36527 },
36528 {
36529 name: "CMPconst",
36530 auxType: auxInt32,
36531 argLen: 1,
36532 asm: s390x.ACMP,
36533 reg: regInfo{
36534 inputs: []inputInfo{
36535 {0, 56319},
36536 },
36537 },
36538 },
36539 {
36540 name: "CMPWconst",
36541 auxType: auxInt32,
36542 argLen: 1,
36543 asm: s390x.ACMPW,
36544 reg: regInfo{
36545 inputs: []inputInfo{
36546 {0, 56319},
36547 },
36548 },
36549 },
36550 {
36551 name: "CMPUconst",
36552 auxType: auxInt32,
36553 argLen: 1,
36554 asm: s390x.ACMPU,
36555 reg: regInfo{
36556 inputs: []inputInfo{
36557 {0, 56319},
36558 },
36559 },
36560 },
36561 {
36562 name: "CMPWUconst",
36563 auxType: auxInt32,
36564 argLen: 1,
36565 asm: s390x.ACMPWU,
36566 reg: regInfo{
36567 inputs: []inputInfo{
36568 {0, 56319},
36569 },
36570 },
36571 },
36572 {
36573 name: "FCMPS",
36574 argLen: 2,
36575 asm: s390x.ACEBR,
36576 reg: regInfo{
36577 inputs: []inputInfo{
36578 {0, 4294901760},
36579 {1, 4294901760},
36580 },
36581 },
36582 },
36583 {
36584 name: "FCMP",
36585 argLen: 2,
36586 asm: s390x.AFCMPU,
36587 reg: regInfo{
36588 inputs: []inputInfo{
36589 {0, 4294901760},
36590 {1, 4294901760},
36591 },
36592 },
36593 },
36594 {
36595 name: "LTDBR",
36596 argLen: 1,
36597 asm: s390x.ALTDBR,
36598 reg: regInfo{
36599 inputs: []inputInfo{
36600 {0, 4294901760},
36601 },
36602 },
36603 },
36604 {
36605 name: "LTEBR",
36606 argLen: 1,
36607 asm: s390x.ALTEBR,
36608 reg: regInfo{
36609 inputs: []inputInfo{
36610 {0, 4294901760},
36611 },
36612 },
36613 },
36614 {
36615 name: "SLD",
36616 argLen: 2,
36617 asm: s390x.ASLD,
36618 reg: regInfo{
36619 inputs: []inputInfo{
36620 {1, 23550},
36621 {0, 23551},
36622 },
36623 outputs: []outputInfo{
36624 {0, 23551},
36625 },
36626 },
36627 },
36628 {
36629 name: "SLW",
36630 argLen: 2,
36631 asm: s390x.ASLW,
36632 reg: regInfo{
36633 inputs: []inputInfo{
36634 {1, 23550},
36635 {0, 23551},
36636 },
36637 outputs: []outputInfo{
36638 {0, 23551},
36639 },
36640 },
36641 },
36642 {
36643 name: "SLDconst",
36644 auxType: auxUInt8,
36645 argLen: 1,
36646 asm: s390x.ASLD,
36647 reg: regInfo{
36648 inputs: []inputInfo{
36649 {0, 23551},
36650 },
36651 outputs: []outputInfo{
36652 {0, 23551},
36653 },
36654 },
36655 },
36656 {
36657 name: "SLWconst",
36658 auxType: auxUInt8,
36659 argLen: 1,
36660 asm: s390x.ASLW,
36661 reg: regInfo{
36662 inputs: []inputInfo{
36663 {0, 23551},
36664 },
36665 outputs: []outputInfo{
36666 {0, 23551},
36667 },
36668 },
36669 },
36670 {
36671 name: "SRD",
36672 argLen: 2,
36673 asm: s390x.ASRD,
36674 reg: regInfo{
36675 inputs: []inputInfo{
36676 {1, 23550},
36677 {0, 23551},
36678 },
36679 outputs: []outputInfo{
36680 {0, 23551},
36681 },
36682 },
36683 },
36684 {
36685 name: "SRW",
36686 argLen: 2,
36687 asm: s390x.ASRW,
36688 reg: regInfo{
36689 inputs: []inputInfo{
36690 {1, 23550},
36691 {0, 23551},
36692 },
36693 outputs: []outputInfo{
36694 {0, 23551},
36695 },
36696 },
36697 },
36698 {
36699 name: "SRDconst",
36700 auxType: auxUInt8,
36701 argLen: 1,
36702 asm: s390x.ASRD,
36703 reg: regInfo{
36704 inputs: []inputInfo{
36705 {0, 23551},
36706 },
36707 outputs: []outputInfo{
36708 {0, 23551},
36709 },
36710 },
36711 },
36712 {
36713 name: "SRWconst",
36714 auxType: auxUInt8,
36715 argLen: 1,
36716 asm: s390x.ASRW,
36717 reg: regInfo{
36718 inputs: []inputInfo{
36719 {0, 23551},
36720 },
36721 outputs: []outputInfo{
36722 {0, 23551},
36723 },
36724 },
36725 },
36726 {
36727 name: "SRAD",
36728 argLen: 2,
36729 clobberFlags: true,
36730 asm: s390x.ASRAD,
36731 reg: regInfo{
36732 inputs: []inputInfo{
36733 {1, 23550},
36734 {0, 23551},
36735 },
36736 outputs: []outputInfo{
36737 {0, 23551},
36738 },
36739 },
36740 },
36741 {
36742 name: "SRAW",
36743 argLen: 2,
36744 clobberFlags: true,
36745 asm: s390x.ASRAW,
36746 reg: regInfo{
36747 inputs: []inputInfo{
36748 {1, 23550},
36749 {0, 23551},
36750 },
36751 outputs: []outputInfo{
36752 {0, 23551},
36753 },
36754 },
36755 },
36756 {
36757 name: "SRADconst",
36758 auxType: auxUInt8,
36759 argLen: 1,
36760 clobberFlags: true,
36761 asm: s390x.ASRAD,
36762 reg: regInfo{
36763 inputs: []inputInfo{
36764 {0, 23551},
36765 },
36766 outputs: []outputInfo{
36767 {0, 23551},
36768 },
36769 },
36770 },
36771 {
36772 name: "SRAWconst",
36773 auxType: auxUInt8,
36774 argLen: 1,
36775 clobberFlags: true,
36776 asm: s390x.ASRAW,
36777 reg: regInfo{
36778 inputs: []inputInfo{
36779 {0, 23551},
36780 },
36781 outputs: []outputInfo{
36782 {0, 23551},
36783 },
36784 },
36785 },
36786 {
36787 name: "RLLG",
36788 argLen: 2,
36789 asm: s390x.ARLLG,
36790 reg: regInfo{
36791 inputs: []inputInfo{
36792 {1, 23550},
36793 {0, 23551},
36794 },
36795 outputs: []outputInfo{
36796 {0, 23551},
36797 },
36798 },
36799 },
36800 {
36801 name: "RLL",
36802 argLen: 2,
36803 asm: s390x.ARLL,
36804 reg: regInfo{
36805 inputs: []inputInfo{
36806 {1, 23550},
36807 {0, 23551},
36808 },
36809 outputs: []outputInfo{
36810 {0, 23551},
36811 },
36812 },
36813 },
36814 {
36815 name: "RLLconst",
36816 auxType: auxUInt8,
36817 argLen: 1,
36818 asm: s390x.ARLL,
36819 reg: regInfo{
36820 inputs: []inputInfo{
36821 {0, 23551},
36822 },
36823 outputs: []outputInfo{
36824 {0, 23551},
36825 },
36826 },
36827 },
36828 {
36829 name: "RXSBG",
36830 auxType: auxS390XRotateParams,
36831 argLen: 2,
36832 resultInArg0: true,
36833 clobberFlags: true,
36834 asm: s390x.ARXSBG,
36835 reg: regInfo{
36836 inputs: []inputInfo{
36837 {0, 23551},
36838 {1, 23551},
36839 },
36840 outputs: []outputInfo{
36841 {0, 23551},
36842 },
36843 },
36844 },
36845 {
36846 name: "RISBGZ",
36847 auxType: auxS390XRotateParams,
36848 argLen: 1,
36849 clobberFlags: true,
36850 asm: s390x.ARISBGZ,
36851 reg: regInfo{
36852 inputs: []inputInfo{
36853 {0, 23551},
36854 },
36855 outputs: []outputInfo{
36856 {0, 23551},
36857 },
36858 },
36859 },
36860 {
36861 name: "NEG",
36862 argLen: 1,
36863 clobberFlags: true,
36864 asm: s390x.ANEG,
36865 reg: regInfo{
36866 inputs: []inputInfo{
36867 {0, 23551},
36868 },
36869 outputs: []outputInfo{
36870 {0, 23551},
36871 },
36872 },
36873 },
36874 {
36875 name: "NEGW",
36876 argLen: 1,
36877 clobberFlags: true,
36878 asm: s390x.ANEGW,
36879 reg: regInfo{
36880 inputs: []inputInfo{
36881 {0, 23551},
36882 },
36883 outputs: []outputInfo{
36884 {0, 23551},
36885 },
36886 },
36887 },
36888 {
36889 name: "NOT",
36890 argLen: 1,
36891 resultInArg0: true,
36892 clobberFlags: true,
36893 reg: regInfo{
36894 inputs: []inputInfo{
36895 {0, 23551},
36896 },
36897 outputs: []outputInfo{
36898 {0, 23551},
36899 },
36900 },
36901 },
36902 {
36903 name: "NOTW",
36904 argLen: 1,
36905 resultInArg0: true,
36906 clobberFlags: true,
36907 reg: regInfo{
36908 inputs: []inputInfo{
36909 {0, 23551},
36910 },
36911 outputs: []outputInfo{
36912 {0, 23551},
36913 },
36914 },
36915 },
36916 {
36917 name: "FSQRT",
36918 argLen: 1,
36919 asm: s390x.AFSQRT,
36920 reg: regInfo{
36921 inputs: []inputInfo{
36922 {0, 4294901760},
36923 },
36924 outputs: []outputInfo{
36925 {0, 4294901760},
36926 },
36927 },
36928 },
36929 {
36930 name: "FSQRTS",
36931 argLen: 1,
36932 asm: s390x.AFSQRTS,
36933 reg: regInfo{
36934 inputs: []inputInfo{
36935 {0, 4294901760},
36936 },
36937 outputs: []outputInfo{
36938 {0, 4294901760},
36939 },
36940 },
36941 },
36942 {
36943 name: "LOCGR",
36944 auxType: auxS390XCCMask,
36945 argLen: 3,
36946 resultInArg0: true,
36947 asm: s390x.ALOCGR,
36948 reg: regInfo{
36949 inputs: []inputInfo{
36950 {0, 23551},
36951 {1, 23551},
36952 },
36953 outputs: []outputInfo{
36954 {0, 23551},
36955 },
36956 },
36957 },
36958 {
36959 name: "MOVBreg",
36960 argLen: 1,
36961 asm: s390x.AMOVB,
36962 reg: regInfo{
36963 inputs: []inputInfo{
36964 {0, 56319},
36965 },
36966 outputs: []outputInfo{
36967 {0, 23551},
36968 },
36969 },
36970 },
36971 {
36972 name: "MOVBZreg",
36973 argLen: 1,
36974 asm: s390x.AMOVBZ,
36975 reg: regInfo{
36976 inputs: []inputInfo{
36977 {0, 56319},
36978 },
36979 outputs: []outputInfo{
36980 {0, 23551},
36981 },
36982 },
36983 },
36984 {
36985 name: "MOVHreg",
36986 argLen: 1,
36987 asm: s390x.AMOVH,
36988 reg: regInfo{
36989 inputs: []inputInfo{
36990 {0, 56319},
36991 },
36992 outputs: []outputInfo{
36993 {0, 23551},
36994 },
36995 },
36996 },
36997 {
36998 name: "MOVHZreg",
36999 argLen: 1,
37000 asm: s390x.AMOVHZ,
37001 reg: regInfo{
37002 inputs: []inputInfo{
37003 {0, 56319},
37004 },
37005 outputs: []outputInfo{
37006 {0, 23551},
37007 },
37008 },
37009 },
37010 {
37011 name: "MOVWreg",
37012 argLen: 1,
37013 asm: s390x.AMOVW,
37014 reg: regInfo{
37015 inputs: []inputInfo{
37016 {0, 56319},
37017 },
37018 outputs: []outputInfo{
37019 {0, 23551},
37020 },
37021 },
37022 },
37023 {
37024 name: "MOVWZreg",
37025 argLen: 1,
37026 asm: s390x.AMOVWZ,
37027 reg: regInfo{
37028 inputs: []inputInfo{
37029 {0, 56319},
37030 },
37031 outputs: []outputInfo{
37032 {0, 23551},
37033 },
37034 },
37035 },
37036 {
37037 name: "MOVDconst",
37038 auxType: auxInt64,
37039 argLen: 0,
37040 rematerializeable: true,
37041 asm: s390x.AMOVD,
37042 reg: regInfo{
37043 outputs: []outputInfo{
37044 {0, 23551},
37045 },
37046 },
37047 },
37048 {
37049 name: "LDGR",
37050 argLen: 1,
37051 asm: s390x.ALDGR,
37052 reg: regInfo{
37053 inputs: []inputInfo{
37054 {0, 23551},
37055 },
37056 outputs: []outputInfo{
37057 {0, 4294901760},
37058 },
37059 },
37060 },
37061 {
37062 name: "LGDR",
37063 argLen: 1,
37064 asm: s390x.ALGDR,
37065 reg: regInfo{
37066 inputs: []inputInfo{
37067 {0, 4294901760},
37068 },
37069 outputs: []outputInfo{
37070 {0, 23551},
37071 },
37072 },
37073 },
37074 {
37075 name: "CFDBRA",
37076 argLen: 1,
37077 clobberFlags: true,
37078 asm: s390x.ACFDBRA,
37079 reg: regInfo{
37080 inputs: []inputInfo{
37081 {0, 4294901760},
37082 },
37083 outputs: []outputInfo{
37084 {0, 23551},
37085 },
37086 },
37087 },
37088 {
37089 name: "CGDBRA",
37090 argLen: 1,
37091 clobberFlags: true,
37092 asm: s390x.ACGDBRA,
37093 reg: regInfo{
37094 inputs: []inputInfo{
37095 {0, 4294901760},
37096 },
37097 outputs: []outputInfo{
37098 {0, 23551},
37099 },
37100 },
37101 },
37102 {
37103 name: "CFEBRA",
37104 argLen: 1,
37105 clobberFlags: true,
37106 asm: s390x.ACFEBRA,
37107 reg: regInfo{
37108 inputs: []inputInfo{
37109 {0, 4294901760},
37110 },
37111 outputs: []outputInfo{
37112 {0, 23551},
37113 },
37114 },
37115 },
37116 {
37117 name: "CGEBRA",
37118 argLen: 1,
37119 clobberFlags: true,
37120 asm: s390x.ACGEBRA,
37121 reg: regInfo{
37122 inputs: []inputInfo{
37123 {0, 4294901760},
37124 },
37125 outputs: []outputInfo{
37126 {0, 23551},
37127 },
37128 },
37129 },
37130 {
37131 name: "CEFBRA",
37132 argLen: 1,
37133 clobberFlags: true,
37134 asm: s390x.ACEFBRA,
37135 reg: regInfo{
37136 inputs: []inputInfo{
37137 {0, 23551},
37138 },
37139 outputs: []outputInfo{
37140 {0, 4294901760},
37141 },
37142 },
37143 },
37144 {
37145 name: "CDFBRA",
37146 argLen: 1,
37147 clobberFlags: true,
37148 asm: s390x.ACDFBRA,
37149 reg: regInfo{
37150 inputs: []inputInfo{
37151 {0, 23551},
37152 },
37153 outputs: []outputInfo{
37154 {0, 4294901760},
37155 },
37156 },
37157 },
37158 {
37159 name: "CEGBRA",
37160 argLen: 1,
37161 clobberFlags: true,
37162 asm: s390x.ACEGBRA,
37163 reg: regInfo{
37164 inputs: []inputInfo{
37165 {0, 23551},
37166 },
37167 outputs: []outputInfo{
37168 {0, 4294901760},
37169 },
37170 },
37171 },
37172 {
37173 name: "CDGBRA",
37174 argLen: 1,
37175 clobberFlags: true,
37176 asm: s390x.ACDGBRA,
37177 reg: regInfo{
37178 inputs: []inputInfo{
37179 {0, 23551},
37180 },
37181 outputs: []outputInfo{
37182 {0, 4294901760},
37183 },
37184 },
37185 },
37186 {
37187 name: "CLFEBR",
37188 argLen: 1,
37189 clobberFlags: true,
37190 asm: s390x.ACLFEBR,
37191 reg: regInfo{
37192 inputs: []inputInfo{
37193 {0, 4294901760},
37194 },
37195 outputs: []outputInfo{
37196 {0, 23551},
37197 },
37198 },
37199 },
37200 {
37201 name: "CLFDBR",
37202 argLen: 1,
37203 clobberFlags: true,
37204 asm: s390x.ACLFDBR,
37205 reg: regInfo{
37206 inputs: []inputInfo{
37207 {0, 4294901760},
37208 },
37209 outputs: []outputInfo{
37210 {0, 23551},
37211 },
37212 },
37213 },
37214 {
37215 name: "CLGEBR",
37216 argLen: 1,
37217 clobberFlags: true,
37218 asm: s390x.ACLGEBR,
37219 reg: regInfo{
37220 inputs: []inputInfo{
37221 {0, 4294901760},
37222 },
37223 outputs: []outputInfo{
37224 {0, 23551},
37225 },
37226 },
37227 },
37228 {
37229 name: "CLGDBR",
37230 argLen: 1,
37231 clobberFlags: true,
37232 asm: s390x.ACLGDBR,
37233 reg: regInfo{
37234 inputs: []inputInfo{
37235 {0, 4294901760},
37236 },
37237 outputs: []outputInfo{
37238 {0, 23551},
37239 },
37240 },
37241 },
37242 {
37243 name: "CELFBR",
37244 argLen: 1,
37245 clobberFlags: true,
37246 asm: s390x.ACELFBR,
37247 reg: regInfo{
37248 inputs: []inputInfo{
37249 {0, 23551},
37250 },
37251 outputs: []outputInfo{
37252 {0, 4294901760},
37253 },
37254 },
37255 },
37256 {
37257 name: "CDLFBR",
37258 argLen: 1,
37259 clobberFlags: true,
37260 asm: s390x.ACDLFBR,
37261 reg: regInfo{
37262 inputs: []inputInfo{
37263 {0, 23551},
37264 },
37265 outputs: []outputInfo{
37266 {0, 4294901760},
37267 },
37268 },
37269 },
37270 {
37271 name: "CELGBR",
37272 argLen: 1,
37273 clobberFlags: true,
37274 asm: s390x.ACELGBR,
37275 reg: regInfo{
37276 inputs: []inputInfo{
37277 {0, 23551},
37278 },
37279 outputs: []outputInfo{
37280 {0, 4294901760},
37281 },
37282 },
37283 },
37284 {
37285 name: "CDLGBR",
37286 argLen: 1,
37287 clobberFlags: true,
37288 asm: s390x.ACDLGBR,
37289 reg: regInfo{
37290 inputs: []inputInfo{
37291 {0, 23551},
37292 },
37293 outputs: []outputInfo{
37294 {0, 4294901760},
37295 },
37296 },
37297 },
37298 {
37299 name: "LEDBR",
37300 argLen: 1,
37301 asm: s390x.ALEDBR,
37302 reg: regInfo{
37303 inputs: []inputInfo{
37304 {0, 4294901760},
37305 },
37306 outputs: []outputInfo{
37307 {0, 4294901760},
37308 },
37309 },
37310 },
37311 {
37312 name: "LDEBR",
37313 argLen: 1,
37314 asm: s390x.ALDEBR,
37315 reg: regInfo{
37316 inputs: []inputInfo{
37317 {0, 4294901760},
37318 },
37319 outputs: []outputInfo{
37320 {0, 4294901760},
37321 },
37322 },
37323 },
37324 {
37325 name: "MOVDaddr",
37326 auxType: auxSymOff,
37327 argLen: 1,
37328 rematerializeable: true,
37329 symEffect: SymAddr,
37330 reg: regInfo{
37331 inputs: []inputInfo{
37332 {0, 4295000064},
37333 },
37334 outputs: []outputInfo{
37335 {0, 23551},
37336 },
37337 },
37338 },
37339 {
37340 name: "MOVDaddridx",
37341 auxType: auxSymOff,
37342 argLen: 2,
37343 symEffect: SymAddr,
37344 reg: regInfo{
37345 inputs: []inputInfo{
37346 {0, 4295000064},
37347 {1, 56318},
37348 },
37349 outputs: []outputInfo{
37350 {0, 23551},
37351 },
37352 },
37353 },
37354 {
37355 name: "MOVBZload",
37356 auxType: auxSymOff,
37357 argLen: 2,
37358 faultOnNilArg0: true,
37359 symEffect: SymRead,
37360 asm: s390x.AMOVBZ,
37361 reg: regInfo{
37362 inputs: []inputInfo{
37363 {0, 4295023614},
37364 },
37365 outputs: []outputInfo{
37366 {0, 23551},
37367 },
37368 },
37369 },
37370 {
37371 name: "MOVBload",
37372 auxType: auxSymOff,
37373 argLen: 2,
37374 faultOnNilArg0: true,
37375 symEffect: SymRead,
37376 asm: s390x.AMOVB,
37377 reg: regInfo{
37378 inputs: []inputInfo{
37379 {0, 4295023614},
37380 },
37381 outputs: []outputInfo{
37382 {0, 23551},
37383 },
37384 },
37385 },
37386 {
37387 name: "MOVHZload",
37388 auxType: auxSymOff,
37389 argLen: 2,
37390 faultOnNilArg0: true,
37391 symEffect: SymRead,
37392 asm: s390x.AMOVHZ,
37393 reg: regInfo{
37394 inputs: []inputInfo{
37395 {0, 4295023614},
37396 },
37397 outputs: []outputInfo{
37398 {0, 23551},
37399 },
37400 },
37401 },
37402 {
37403 name: "MOVHload",
37404 auxType: auxSymOff,
37405 argLen: 2,
37406 faultOnNilArg0: true,
37407 symEffect: SymRead,
37408 asm: s390x.AMOVH,
37409 reg: regInfo{
37410 inputs: []inputInfo{
37411 {0, 4295023614},
37412 },
37413 outputs: []outputInfo{
37414 {0, 23551},
37415 },
37416 },
37417 },
37418 {
37419 name: "MOVWZload",
37420 auxType: auxSymOff,
37421 argLen: 2,
37422 faultOnNilArg0: true,
37423 symEffect: SymRead,
37424 asm: s390x.AMOVWZ,
37425 reg: regInfo{
37426 inputs: []inputInfo{
37427 {0, 4295023614},
37428 },
37429 outputs: []outputInfo{
37430 {0, 23551},
37431 },
37432 },
37433 },
37434 {
37435 name: "MOVWload",
37436 auxType: auxSymOff,
37437 argLen: 2,
37438 faultOnNilArg0: true,
37439 symEffect: SymRead,
37440 asm: s390x.AMOVW,
37441 reg: regInfo{
37442 inputs: []inputInfo{
37443 {0, 4295023614},
37444 },
37445 outputs: []outputInfo{
37446 {0, 23551},
37447 },
37448 },
37449 },
37450 {
37451 name: "MOVDload",
37452 auxType: auxSymOff,
37453 argLen: 2,
37454 faultOnNilArg0: true,
37455 symEffect: SymRead,
37456 asm: s390x.AMOVD,
37457 reg: regInfo{
37458 inputs: []inputInfo{
37459 {0, 4295023614},
37460 },
37461 outputs: []outputInfo{
37462 {0, 23551},
37463 },
37464 },
37465 },
37466 {
37467 name: "MOVWBR",
37468 argLen: 1,
37469 asm: s390x.AMOVWBR,
37470 reg: regInfo{
37471 inputs: []inputInfo{
37472 {0, 23551},
37473 },
37474 outputs: []outputInfo{
37475 {0, 23551},
37476 },
37477 },
37478 },
37479 {
37480 name: "MOVDBR",
37481 argLen: 1,
37482 asm: s390x.AMOVDBR,
37483 reg: regInfo{
37484 inputs: []inputInfo{
37485 {0, 23551},
37486 },
37487 outputs: []outputInfo{
37488 {0, 23551},
37489 },
37490 },
37491 },
37492 {
37493 name: "MOVHBRload",
37494 auxType: auxSymOff,
37495 argLen: 2,
37496 faultOnNilArg0: true,
37497 symEffect: SymRead,
37498 asm: s390x.AMOVHBR,
37499 reg: regInfo{
37500 inputs: []inputInfo{
37501 {0, 4295023614},
37502 },
37503 outputs: []outputInfo{
37504 {0, 23551},
37505 },
37506 },
37507 },
37508 {
37509 name: "MOVWBRload",
37510 auxType: auxSymOff,
37511 argLen: 2,
37512 faultOnNilArg0: true,
37513 symEffect: SymRead,
37514 asm: s390x.AMOVWBR,
37515 reg: regInfo{
37516 inputs: []inputInfo{
37517 {0, 4295023614},
37518 },
37519 outputs: []outputInfo{
37520 {0, 23551},
37521 },
37522 },
37523 },
37524 {
37525 name: "MOVDBRload",
37526 auxType: auxSymOff,
37527 argLen: 2,
37528 faultOnNilArg0: true,
37529 symEffect: SymRead,
37530 asm: s390x.AMOVDBR,
37531 reg: regInfo{
37532 inputs: []inputInfo{
37533 {0, 4295023614},
37534 },
37535 outputs: []outputInfo{
37536 {0, 23551},
37537 },
37538 },
37539 },
37540 {
37541 name: "MOVBstore",
37542 auxType: auxSymOff,
37543 argLen: 3,
37544 faultOnNilArg0: true,
37545 symEffect: SymWrite,
37546 asm: s390x.AMOVB,
37547 reg: regInfo{
37548 inputs: []inputInfo{
37549 {0, 4295023614},
37550 {1, 56319},
37551 },
37552 },
37553 },
37554 {
37555 name: "MOVHstore",
37556 auxType: auxSymOff,
37557 argLen: 3,
37558 faultOnNilArg0: true,
37559 symEffect: SymWrite,
37560 asm: s390x.AMOVH,
37561 reg: regInfo{
37562 inputs: []inputInfo{
37563 {0, 4295023614},
37564 {1, 56319},
37565 },
37566 },
37567 },
37568 {
37569 name: "MOVWstore",
37570 auxType: auxSymOff,
37571 argLen: 3,
37572 faultOnNilArg0: true,
37573 symEffect: SymWrite,
37574 asm: s390x.AMOVW,
37575 reg: regInfo{
37576 inputs: []inputInfo{
37577 {0, 4295023614},
37578 {1, 56319},
37579 },
37580 },
37581 },
37582 {
37583 name: "MOVDstore",
37584 auxType: auxSymOff,
37585 argLen: 3,
37586 faultOnNilArg0: true,
37587 symEffect: SymWrite,
37588 asm: s390x.AMOVD,
37589 reg: regInfo{
37590 inputs: []inputInfo{
37591 {0, 4295023614},
37592 {1, 56319},
37593 },
37594 },
37595 },
37596 {
37597 name: "MOVHBRstore",
37598 auxType: auxSymOff,
37599 argLen: 3,
37600 faultOnNilArg0: true,
37601 symEffect: SymWrite,
37602 asm: s390x.AMOVHBR,
37603 reg: regInfo{
37604 inputs: []inputInfo{
37605 {0, 56318},
37606 {1, 56319},
37607 },
37608 },
37609 },
37610 {
37611 name: "MOVWBRstore",
37612 auxType: auxSymOff,
37613 argLen: 3,
37614 faultOnNilArg0: true,
37615 symEffect: SymWrite,
37616 asm: s390x.AMOVWBR,
37617 reg: regInfo{
37618 inputs: []inputInfo{
37619 {0, 56318},
37620 {1, 56319},
37621 },
37622 },
37623 },
37624 {
37625 name: "MOVDBRstore",
37626 auxType: auxSymOff,
37627 argLen: 3,
37628 faultOnNilArg0: true,
37629 symEffect: SymWrite,
37630 asm: s390x.AMOVDBR,
37631 reg: regInfo{
37632 inputs: []inputInfo{
37633 {0, 56318},
37634 {1, 56319},
37635 },
37636 },
37637 },
37638 {
37639 name: "MVC",
37640 auxType: auxSymValAndOff,
37641 argLen: 3,
37642 clobberFlags: true,
37643 faultOnNilArg0: true,
37644 faultOnNilArg1: true,
37645 symEffect: SymNone,
37646 asm: s390x.AMVC,
37647 reg: regInfo{
37648 inputs: []inputInfo{
37649 {0, 56318},
37650 {1, 56318},
37651 },
37652 },
37653 },
37654 {
37655 name: "MOVBZloadidx",
37656 auxType: auxSymOff,
37657 argLen: 3,
37658 commutative: true,
37659 symEffect: SymRead,
37660 asm: s390x.AMOVBZ,
37661 reg: regInfo{
37662 inputs: []inputInfo{
37663 {1, 56318},
37664 {0, 4295023614},
37665 },
37666 outputs: []outputInfo{
37667 {0, 23551},
37668 },
37669 },
37670 },
37671 {
37672 name: "MOVBloadidx",
37673 auxType: auxSymOff,
37674 argLen: 3,
37675 commutative: true,
37676 symEffect: SymRead,
37677 asm: s390x.AMOVB,
37678 reg: regInfo{
37679 inputs: []inputInfo{
37680 {1, 56318},
37681 {0, 4295023614},
37682 },
37683 outputs: []outputInfo{
37684 {0, 23551},
37685 },
37686 },
37687 },
37688 {
37689 name: "MOVHZloadidx",
37690 auxType: auxSymOff,
37691 argLen: 3,
37692 commutative: true,
37693 symEffect: SymRead,
37694 asm: s390x.AMOVHZ,
37695 reg: regInfo{
37696 inputs: []inputInfo{
37697 {1, 56318},
37698 {0, 4295023614},
37699 },
37700 outputs: []outputInfo{
37701 {0, 23551},
37702 },
37703 },
37704 },
37705 {
37706 name: "MOVHloadidx",
37707 auxType: auxSymOff,
37708 argLen: 3,
37709 commutative: true,
37710 symEffect: SymRead,
37711 asm: s390x.AMOVH,
37712 reg: regInfo{
37713 inputs: []inputInfo{
37714 {1, 56318},
37715 {0, 4295023614},
37716 },
37717 outputs: []outputInfo{
37718 {0, 23551},
37719 },
37720 },
37721 },
37722 {
37723 name: "MOVWZloadidx",
37724 auxType: auxSymOff,
37725 argLen: 3,
37726 commutative: true,
37727 symEffect: SymRead,
37728 asm: s390x.AMOVWZ,
37729 reg: regInfo{
37730 inputs: []inputInfo{
37731 {1, 56318},
37732 {0, 4295023614},
37733 },
37734 outputs: []outputInfo{
37735 {0, 23551},
37736 },
37737 },
37738 },
37739 {
37740 name: "MOVWloadidx",
37741 auxType: auxSymOff,
37742 argLen: 3,
37743 commutative: true,
37744 symEffect: SymRead,
37745 asm: s390x.AMOVW,
37746 reg: regInfo{
37747 inputs: []inputInfo{
37748 {1, 56318},
37749 {0, 4295023614},
37750 },
37751 outputs: []outputInfo{
37752 {0, 23551},
37753 },
37754 },
37755 },
37756 {
37757 name: "MOVDloadidx",
37758 auxType: auxSymOff,
37759 argLen: 3,
37760 commutative: true,
37761 symEffect: SymRead,
37762 asm: s390x.AMOVD,
37763 reg: regInfo{
37764 inputs: []inputInfo{
37765 {1, 56318},
37766 {0, 4295023614},
37767 },
37768 outputs: []outputInfo{
37769 {0, 23551},
37770 },
37771 },
37772 },
37773 {
37774 name: "MOVHBRloadidx",
37775 auxType: auxSymOff,
37776 argLen: 3,
37777 commutative: true,
37778 symEffect: SymRead,
37779 asm: s390x.AMOVHBR,
37780 reg: regInfo{
37781 inputs: []inputInfo{
37782 {1, 56318},
37783 {0, 4295023614},
37784 },
37785 outputs: []outputInfo{
37786 {0, 23551},
37787 },
37788 },
37789 },
37790 {
37791 name: "MOVWBRloadidx",
37792 auxType: auxSymOff,
37793 argLen: 3,
37794 commutative: true,
37795 symEffect: SymRead,
37796 asm: s390x.AMOVWBR,
37797 reg: regInfo{
37798 inputs: []inputInfo{
37799 {1, 56318},
37800 {0, 4295023614},
37801 },
37802 outputs: []outputInfo{
37803 {0, 23551},
37804 },
37805 },
37806 },
37807 {
37808 name: "MOVDBRloadidx",
37809 auxType: auxSymOff,
37810 argLen: 3,
37811 commutative: true,
37812 symEffect: SymRead,
37813 asm: s390x.AMOVDBR,
37814 reg: regInfo{
37815 inputs: []inputInfo{
37816 {1, 56318},
37817 {0, 4295023614},
37818 },
37819 outputs: []outputInfo{
37820 {0, 23551},
37821 },
37822 },
37823 },
37824 {
37825 name: "MOVBstoreidx",
37826 auxType: auxSymOff,
37827 argLen: 4,
37828 commutative: true,
37829 symEffect: SymWrite,
37830 asm: s390x.AMOVB,
37831 reg: regInfo{
37832 inputs: []inputInfo{
37833 {0, 56318},
37834 {1, 56318},
37835 {2, 56319},
37836 },
37837 },
37838 },
37839 {
37840 name: "MOVHstoreidx",
37841 auxType: auxSymOff,
37842 argLen: 4,
37843 commutative: true,
37844 symEffect: SymWrite,
37845 asm: s390x.AMOVH,
37846 reg: regInfo{
37847 inputs: []inputInfo{
37848 {0, 56318},
37849 {1, 56318},
37850 {2, 56319},
37851 },
37852 },
37853 },
37854 {
37855 name: "MOVWstoreidx",
37856 auxType: auxSymOff,
37857 argLen: 4,
37858 commutative: true,
37859 symEffect: SymWrite,
37860 asm: s390x.AMOVW,
37861 reg: regInfo{
37862 inputs: []inputInfo{
37863 {0, 56318},
37864 {1, 56318},
37865 {2, 56319},
37866 },
37867 },
37868 },
37869 {
37870 name: "MOVDstoreidx",
37871 auxType: auxSymOff,
37872 argLen: 4,
37873 commutative: true,
37874 symEffect: SymWrite,
37875 asm: s390x.AMOVD,
37876 reg: regInfo{
37877 inputs: []inputInfo{
37878 {0, 56318},
37879 {1, 56318},
37880 {2, 56319},
37881 },
37882 },
37883 },
37884 {
37885 name: "MOVHBRstoreidx",
37886 auxType: auxSymOff,
37887 argLen: 4,
37888 commutative: true,
37889 symEffect: SymWrite,
37890 asm: s390x.AMOVHBR,
37891 reg: regInfo{
37892 inputs: []inputInfo{
37893 {0, 56318},
37894 {1, 56318},
37895 {2, 56319},
37896 },
37897 },
37898 },
37899 {
37900 name: "MOVWBRstoreidx",
37901 auxType: auxSymOff,
37902 argLen: 4,
37903 commutative: true,
37904 symEffect: SymWrite,
37905 asm: s390x.AMOVWBR,
37906 reg: regInfo{
37907 inputs: []inputInfo{
37908 {0, 56318},
37909 {1, 56318},
37910 {2, 56319},
37911 },
37912 },
37913 },
37914 {
37915 name: "MOVDBRstoreidx",
37916 auxType: auxSymOff,
37917 argLen: 4,
37918 commutative: true,
37919 symEffect: SymWrite,
37920 asm: s390x.AMOVDBR,
37921 reg: regInfo{
37922 inputs: []inputInfo{
37923 {0, 56318},
37924 {1, 56318},
37925 {2, 56319},
37926 },
37927 },
37928 },
37929 {
37930 name: "MOVBstoreconst",
37931 auxType: auxSymValAndOff,
37932 argLen: 2,
37933 faultOnNilArg0: true,
37934 symEffect: SymWrite,
37935 asm: s390x.AMOVB,
37936 reg: regInfo{
37937 inputs: []inputInfo{
37938 {0, 4295023614},
37939 },
37940 },
37941 },
37942 {
37943 name: "MOVHstoreconst",
37944 auxType: auxSymValAndOff,
37945 argLen: 2,
37946 faultOnNilArg0: true,
37947 symEffect: SymWrite,
37948 asm: s390x.AMOVH,
37949 reg: regInfo{
37950 inputs: []inputInfo{
37951 {0, 4295023614},
37952 },
37953 },
37954 },
37955 {
37956 name: "MOVWstoreconst",
37957 auxType: auxSymValAndOff,
37958 argLen: 2,
37959 faultOnNilArg0: true,
37960 symEffect: SymWrite,
37961 asm: s390x.AMOVW,
37962 reg: regInfo{
37963 inputs: []inputInfo{
37964 {0, 4295023614},
37965 },
37966 },
37967 },
37968 {
37969 name: "MOVDstoreconst",
37970 auxType: auxSymValAndOff,
37971 argLen: 2,
37972 faultOnNilArg0: true,
37973 symEffect: SymWrite,
37974 asm: s390x.AMOVD,
37975 reg: regInfo{
37976 inputs: []inputInfo{
37977 {0, 4295023614},
37978 },
37979 },
37980 },
37981 {
37982 name: "CLEAR",
37983 auxType: auxSymValAndOff,
37984 argLen: 2,
37985 clobberFlags: true,
37986 faultOnNilArg0: true,
37987 symEffect: SymWrite,
37988 asm: s390x.ACLEAR,
37989 reg: regInfo{
37990 inputs: []inputInfo{
37991 {0, 23550},
37992 },
37993 },
37994 },
37995 {
37996 name: "CALLstatic",
37997 auxType: auxCallOff,
37998 argLen: 1,
37999 clobberFlags: true,
38000 call: true,
38001 reg: regInfo{
38002 clobbers: 4294933503,
38003 },
38004 },
38005 {
38006 name: "CALLtail",
38007 auxType: auxCallOff,
38008 argLen: 1,
38009 clobberFlags: true,
38010 call: true,
38011 tailCall: true,
38012 reg: regInfo{
38013 clobbers: 4294933503,
38014 },
38015 },
38016 {
38017 name: "CALLclosure",
38018 auxType: auxCallOff,
38019 argLen: 3,
38020 clobberFlags: true,
38021 call: true,
38022 reg: regInfo{
38023 inputs: []inputInfo{
38024 {1, 4096},
38025 {0, 56318},
38026 },
38027 clobbers: 4294933503,
38028 },
38029 },
38030 {
38031 name: "CALLinter",
38032 auxType: auxCallOff,
38033 argLen: 2,
38034 clobberFlags: true,
38035 call: true,
38036 reg: regInfo{
38037 inputs: []inputInfo{
38038 {0, 23550},
38039 },
38040 clobbers: 4294933503,
38041 },
38042 },
38043 {
38044 name: "InvertFlags",
38045 argLen: 1,
38046 reg: regInfo{},
38047 },
38048 {
38049 name: "LoweredGetG",
38050 argLen: 1,
38051 reg: regInfo{
38052 outputs: []outputInfo{
38053 {0, 23551},
38054 },
38055 },
38056 },
38057 {
38058 name: "LoweredGetClosurePtr",
38059 argLen: 0,
38060 zeroWidth: true,
38061 reg: regInfo{
38062 outputs: []outputInfo{
38063 {0, 4096},
38064 },
38065 },
38066 },
38067 {
38068 name: "LoweredGetCallerSP",
38069 argLen: 1,
38070 rematerializeable: true,
38071 reg: regInfo{
38072 outputs: []outputInfo{
38073 {0, 23551},
38074 },
38075 },
38076 },
38077 {
38078 name: "LoweredGetCallerPC",
38079 argLen: 0,
38080 rematerializeable: true,
38081 reg: regInfo{
38082 outputs: []outputInfo{
38083 {0, 23551},
38084 },
38085 },
38086 },
38087 {
38088 name: "LoweredNilCheck",
38089 argLen: 2,
38090 clobberFlags: true,
38091 nilCheck: true,
38092 faultOnNilArg0: true,
38093 reg: regInfo{
38094 inputs: []inputInfo{
38095 {0, 56318},
38096 },
38097 },
38098 },
38099 {
38100 name: "LoweredRound32F",
38101 argLen: 1,
38102 resultInArg0: true,
38103 zeroWidth: true,
38104 reg: regInfo{
38105 inputs: []inputInfo{
38106 {0, 4294901760},
38107 },
38108 outputs: []outputInfo{
38109 {0, 4294901760},
38110 },
38111 },
38112 },
38113 {
38114 name: "LoweredRound64F",
38115 argLen: 1,
38116 resultInArg0: true,
38117 zeroWidth: true,
38118 reg: regInfo{
38119 inputs: []inputInfo{
38120 {0, 4294901760},
38121 },
38122 outputs: []outputInfo{
38123 {0, 4294901760},
38124 },
38125 },
38126 },
38127 {
38128 name: "LoweredWB",
38129 auxType: auxInt64,
38130 argLen: 1,
38131 clobberFlags: true,
38132 reg: regInfo{
38133 clobbers: 4294918146,
38134 outputs: []outputInfo{
38135 {0, 512},
38136 },
38137 },
38138 },
38139 {
38140 name: "LoweredPanicBoundsA",
38141 auxType: auxInt64,
38142 argLen: 3,
38143 call: true,
38144 reg: regInfo{
38145 inputs: []inputInfo{
38146 {0, 4},
38147 {1, 8},
38148 },
38149 },
38150 },
38151 {
38152 name: "LoweredPanicBoundsB",
38153 auxType: auxInt64,
38154 argLen: 3,
38155 call: true,
38156 reg: regInfo{
38157 inputs: []inputInfo{
38158 {0, 2},
38159 {1, 4},
38160 },
38161 },
38162 },
38163 {
38164 name: "LoweredPanicBoundsC",
38165 auxType: auxInt64,
38166 argLen: 3,
38167 call: true,
38168 reg: regInfo{
38169 inputs: []inputInfo{
38170 {0, 1},
38171 {1, 2},
38172 },
38173 },
38174 },
38175 {
38176 name: "FlagEQ",
38177 argLen: 0,
38178 reg: regInfo{},
38179 },
38180 {
38181 name: "FlagLT",
38182 argLen: 0,
38183 reg: regInfo{},
38184 },
38185 {
38186 name: "FlagGT",
38187 argLen: 0,
38188 reg: regInfo{},
38189 },
38190 {
38191 name: "FlagOV",
38192 argLen: 0,
38193 reg: regInfo{},
38194 },
38195 {
38196 name: "SYNC",
38197 argLen: 1,
38198 asm: s390x.ASYNC,
38199 reg: regInfo{},
38200 },
38201 {
38202 name: "MOVBZatomicload",
38203 auxType: auxSymOff,
38204 argLen: 2,
38205 faultOnNilArg0: true,
38206 symEffect: SymRead,
38207 asm: s390x.AMOVBZ,
38208 reg: regInfo{
38209 inputs: []inputInfo{
38210 {0, 4295023614},
38211 },
38212 outputs: []outputInfo{
38213 {0, 23551},
38214 },
38215 },
38216 },
38217 {
38218 name: "MOVWZatomicload",
38219 auxType: auxSymOff,
38220 argLen: 2,
38221 faultOnNilArg0: true,
38222 symEffect: SymRead,
38223 asm: s390x.AMOVWZ,
38224 reg: regInfo{
38225 inputs: []inputInfo{
38226 {0, 4295023614},
38227 },
38228 outputs: []outputInfo{
38229 {0, 23551},
38230 },
38231 },
38232 },
38233 {
38234 name: "MOVDatomicload",
38235 auxType: auxSymOff,
38236 argLen: 2,
38237 faultOnNilArg0: true,
38238 symEffect: SymRead,
38239 asm: s390x.AMOVD,
38240 reg: regInfo{
38241 inputs: []inputInfo{
38242 {0, 4295023614},
38243 },
38244 outputs: []outputInfo{
38245 {0, 23551},
38246 },
38247 },
38248 },
38249 {
38250 name: "MOVBatomicstore",
38251 auxType: auxSymOff,
38252 argLen: 3,
38253 clobberFlags: true,
38254 faultOnNilArg0: true,
38255 hasSideEffects: true,
38256 symEffect: SymWrite,
38257 asm: s390x.AMOVB,
38258 reg: regInfo{
38259 inputs: []inputInfo{
38260 {0, 4295023614},
38261 {1, 56319},
38262 },
38263 },
38264 },
38265 {
38266 name: "MOVWatomicstore",
38267 auxType: auxSymOff,
38268 argLen: 3,
38269 clobberFlags: true,
38270 faultOnNilArg0: true,
38271 hasSideEffects: true,
38272 symEffect: SymWrite,
38273 asm: s390x.AMOVW,
38274 reg: regInfo{
38275 inputs: []inputInfo{
38276 {0, 4295023614},
38277 {1, 56319},
38278 },
38279 },
38280 },
38281 {
38282 name: "MOVDatomicstore",
38283 auxType: auxSymOff,
38284 argLen: 3,
38285 clobberFlags: true,
38286 faultOnNilArg0: true,
38287 hasSideEffects: true,
38288 symEffect: SymWrite,
38289 asm: s390x.AMOVD,
38290 reg: regInfo{
38291 inputs: []inputInfo{
38292 {0, 4295023614},
38293 {1, 56319},
38294 },
38295 },
38296 },
38297 {
38298 name: "LAA",
38299 auxType: auxSymOff,
38300 argLen: 3,
38301 clobberFlags: true,
38302 faultOnNilArg0: true,
38303 hasSideEffects: true,
38304 symEffect: SymRdWr,
38305 asm: s390x.ALAA,
38306 reg: regInfo{
38307 inputs: []inputInfo{
38308 {0, 4295023614},
38309 {1, 56319},
38310 },
38311 outputs: []outputInfo{
38312 {0, 23551},
38313 },
38314 },
38315 },
38316 {
38317 name: "LAAG",
38318 auxType: auxSymOff,
38319 argLen: 3,
38320 clobberFlags: true,
38321 faultOnNilArg0: true,
38322 hasSideEffects: true,
38323 symEffect: SymRdWr,
38324 asm: s390x.ALAAG,
38325 reg: regInfo{
38326 inputs: []inputInfo{
38327 {0, 4295023614},
38328 {1, 56319},
38329 },
38330 outputs: []outputInfo{
38331 {0, 23551},
38332 },
38333 },
38334 },
38335 {
38336 name: "AddTupleFirst32",
38337 argLen: 2,
38338 reg: regInfo{},
38339 },
38340 {
38341 name: "AddTupleFirst64",
38342 argLen: 2,
38343 reg: regInfo{},
38344 },
38345 {
38346 name: "LAN",
38347 argLen: 3,
38348 clobberFlags: true,
38349 hasSideEffects: true,
38350 asm: s390x.ALAN,
38351 reg: regInfo{
38352 inputs: []inputInfo{
38353 {0, 4295023614},
38354 {1, 56319},
38355 },
38356 },
38357 },
38358 {
38359 name: "LANfloor",
38360 argLen: 3,
38361 clobberFlags: true,
38362 hasSideEffects: true,
38363 asm: s390x.ALAN,
38364 reg: regInfo{
38365 inputs: []inputInfo{
38366 {0, 2},
38367 {1, 56319},
38368 },
38369 clobbers: 2,
38370 },
38371 },
38372 {
38373 name: "LAO",
38374 argLen: 3,
38375 clobberFlags: true,
38376 hasSideEffects: true,
38377 asm: s390x.ALAO,
38378 reg: regInfo{
38379 inputs: []inputInfo{
38380 {0, 4295023614},
38381 {1, 56319},
38382 },
38383 },
38384 },
38385 {
38386 name: "LAOfloor",
38387 argLen: 3,
38388 clobberFlags: true,
38389 hasSideEffects: true,
38390 asm: s390x.ALAO,
38391 reg: regInfo{
38392 inputs: []inputInfo{
38393 {0, 2},
38394 {1, 56319},
38395 },
38396 clobbers: 2,
38397 },
38398 },
38399 {
38400 name: "LoweredAtomicCas32",
38401 auxType: auxSymOff,
38402 argLen: 4,
38403 clobberFlags: true,
38404 faultOnNilArg0: true,
38405 hasSideEffects: true,
38406 symEffect: SymRdWr,
38407 asm: s390x.ACS,
38408 reg: regInfo{
38409 inputs: []inputInfo{
38410 {1, 1},
38411 {0, 56318},
38412 {2, 56319},
38413 },
38414 clobbers: 1,
38415 outputs: []outputInfo{
38416 {1, 0},
38417 {0, 23551},
38418 },
38419 },
38420 },
38421 {
38422 name: "LoweredAtomicCas64",
38423 auxType: auxSymOff,
38424 argLen: 4,
38425 clobberFlags: true,
38426 faultOnNilArg0: true,
38427 hasSideEffects: true,
38428 symEffect: SymRdWr,
38429 asm: s390x.ACSG,
38430 reg: regInfo{
38431 inputs: []inputInfo{
38432 {1, 1},
38433 {0, 56318},
38434 {2, 56319},
38435 },
38436 clobbers: 1,
38437 outputs: []outputInfo{
38438 {1, 0},
38439 {0, 23551},
38440 },
38441 },
38442 },
38443 {
38444 name: "LoweredAtomicExchange32",
38445 auxType: auxSymOff,
38446 argLen: 3,
38447 clobberFlags: true,
38448 faultOnNilArg0: true,
38449 hasSideEffects: true,
38450 symEffect: SymRdWr,
38451 asm: s390x.ACS,
38452 reg: regInfo{
38453 inputs: []inputInfo{
38454 {0, 56318},
38455 {1, 56318},
38456 },
38457 outputs: []outputInfo{
38458 {1, 0},
38459 {0, 1},
38460 },
38461 },
38462 },
38463 {
38464 name: "LoweredAtomicExchange64",
38465 auxType: auxSymOff,
38466 argLen: 3,
38467 clobberFlags: true,
38468 faultOnNilArg0: true,
38469 hasSideEffects: true,
38470 symEffect: SymRdWr,
38471 asm: s390x.ACSG,
38472 reg: regInfo{
38473 inputs: []inputInfo{
38474 {0, 56318},
38475 {1, 56318},
38476 },
38477 outputs: []outputInfo{
38478 {1, 0},
38479 {0, 1},
38480 },
38481 },
38482 },
38483 {
38484 name: "FLOGR",
38485 argLen: 1,
38486 clobberFlags: true,
38487 asm: s390x.AFLOGR,
38488 reg: regInfo{
38489 inputs: []inputInfo{
38490 {0, 23551},
38491 },
38492 clobbers: 2,
38493 outputs: []outputInfo{
38494 {0, 1},
38495 },
38496 },
38497 },
38498 {
38499 name: "POPCNT",
38500 argLen: 1,
38501 clobberFlags: true,
38502 asm: s390x.APOPCNT,
38503 reg: regInfo{
38504 inputs: []inputInfo{
38505 {0, 23551},
38506 },
38507 outputs: []outputInfo{
38508 {0, 23551},
38509 },
38510 },
38511 },
38512 {
38513 name: "MLGR",
38514 argLen: 2,
38515 asm: s390x.AMLGR,
38516 reg: regInfo{
38517 inputs: []inputInfo{
38518 {1, 8},
38519 {0, 23551},
38520 },
38521 outputs: []outputInfo{
38522 {0, 4},
38523 {1, 8},
38524 },
38525 },
38526 },
38527 {
38528 name: "SumBytes2",
38529 argLen: 1,
38530 reg: regInfo{},
38531 },
38532 {
38533 name: "SumBytes4",
38534 argLen: 1,
38535 reg: regInfo{},
38536 },
38537 {
38538 name: "SumBytes8",
38539 argLen: 1,
38540 reg: regInfo{},
38541 },
38542 {
38543 name: "STMG2",
38544 auxType: auxSymOff,
38545 argLen: 4,
38546 clobberFlags: true,
38547 faultOnNilArg0: true,
38548 symEffect: SymWrite,
38549 asm: s390x.ASTMG,
38550 reg: regInfo{
38551 inputs: []inputInfo{
38552 {1, 2},
38553 {2, 4},
38554 {0, 56318},
38555 },
38556 },
38557 },
38558 {
38559 name: "STMG3",
38560 auxType: auxSymOff,
38561 argLen: 5,
38562 clobberFlags: true,
38563 faultOnNilArg0: true,
38564 symEffect: SymWrite,
38565 asm: s390x.ASTMG,
38566 reg: regInfo{
38567 inputs: []inputInfo{
38568 {1, 2},
38569 {2, 4},
38570 {3, 8},
38571 {0, 56318},
38572 },
38573 },
38574 },
38575 {
38576 name: "STMG4",
38577 auxType: auxSymOff,
38578 argLen: 6,
38579 clobberFlags: true,
38580 faultOnNilArg0: true,
38581 symEffect: SymWrite,
38582 asm: s390x.ASTMG,
38583 reg: regInfo{
38584 inputs: []inputInfo{
38585 {1, 2},
38586 {2, 4},
38587 {3, 8},
38588 {4, 16},
38589 {0, 56318},
38590 },
38591 },
38592 },
38593 {
38594 name: "STM2",
38595 auxType: auxSymOff,
38596 argLen: 4,
38597 clobberFlags: true,
38598 faultOnNilArg0: true,
38599 symEffect: SymWrite,
38600 asm: s390x.ASTMY,
38601 reg: regInfo{
38602 inputs: []inputInfo{
38603 {1, 2},
38604 {2, 4},
38605 {0, 56318},
38606 },
38607 },
38608 },
38609 {
38610 name: "STM3",
38611 auxType: auxSymOff,
38612 argLen: 5,
38613 clobberFlags: true,
38614 faultOnNilArg0: true,
38615 symEffect: SymWrite,
38616 asm: s390x.ASTMY,
38617 reg: regInfo{
38618 inputs: []inputInfo{
38619 {1, 2},
38620 {2, 4},
38621 {3, 8},
38622 {0, 56318},
38623 },
38624 },
38625 },
38626 {
38627 name: "STM4",
38628 auxType: auxSymOff,
38629 argLen: 6,
38630 clobberFlags: true,
38631 faultOnNilArg0: true,
38632 symEffect: SymWrite,
38633 asm: s390x.ASTMY,
38634 reg: regInfo{
38635 inputs: []inputInfo{
38636 {1, 2},
38637 {2, 4},
38638 {3, 8},
38639 {4, 16},
38640 {0, 56318},
38641 },
38642 },
38643 },
38644 {
38645 name: "LoweredMove",
38646 auxType: auxInt64,
38647 argLen: 4,
38648 clobberFlags: true,
38649 faultOnNilArg0: true,
38650 faultOnNilArg1: true,
38651 reg: regInfo{
38652 inputs: []inputInfo{
38653 {0, 2},
38654 {1, 4},
38655 {2, 56319},
38656 },
38657 clobbers: 6,
38658 },
38659 },
38660 {
38661 name: "LoweredZero",
38662 auxType: auxInt64,
38663 argLen: 3,
38664 clobberFlags: true,
38665 faultOnNilArg0: true,
38666 reg: regInfo{
38667 inputs: []inputInfo{
38668 {0, 2},
38669 {1, 56319},
38670 },
38671 clobbers: 2,
38672 },
38673 },
38674
38675 {
38676 name: "LoweredStaticCall",
38677 auxType: auxCallOff,
38678 argLen: 1,
38679 call: true,
38680 reg: regInfo{
38681 clobbers: 844424930131967,
38682 },
38683 },
38684 {
38685 name: "LoweredTailCall",
38686 auxType: auxCallOff,
38687 argLen: 1,
38688 call: true,
38689 tailCall: true,
38690 reg: regInfo{
38691 clobbers: 844424930131967,
38692 },
38693 },
38694 {
38695 name: "LoweredClosureCall",
38696 auxType: auxCallOff,
38697 argLen: 3,
38698 call: true,
38699 reg: regInfo{
38700 inputs: []inputInfo{
38701 {0, 65535},
38702 {1, 65535},
38703 },
38704 clobbers: 844424930131967,
38705 },
38706 },
38707 {
38708 name: "LoweredInterCall",
38709 auxType: auxCallOff,
38710 argLen: 2,
38711 call: true,
38712 reg: regInfo{
38713 inputs: []inputInfo{
38714 {0, 65535},
38715 },
38716 clobbers: 844424930131967,
38717 },
38718 },
38719 {
38720 name: "LoweredAddr",
38721 auxType: auxSymOff,
38722 argLen: 1,
38723 rematerializeable: true,
38724 symEffect: SymAddr,
38725 reg: regInfo{
38726 inputs: []inputInfo{
38727 {0, 281474976776191},
38728 },
38729 outputs: []outputInfo{
38730 {0, 65535},
38731 },
38732 },
38733 },
38734 {
38735 name: "LoweredMove",
38736 auxType: auxInt64,
38737 argLen: 3,
38738 reg: regInfo{
38739 inputs: []inputInfo{
38740 {0, 65535},
38741 {1, 65535},
38742 },
38743 },
38744 },
38745 {
38746 name: "LoweredZero",
38747 auxType: auxInt64,
38748 argLen: 2,
38749 reg: regInfo{
38750 inputs: []inputInfo{
38751 {0, 65535},
38752 },
38753 },
38754 },
38755 {
38756 name: "LoweredGetClosurePtr",
38757 argLen: 0,
38758 reg: regInfo{
38759 outputs: []outputInfo{
38760 {0, 65535},
38761 },
38762 },
38763 },
38764 {
38765 name: "LoweredGetCallerPC",
38766 argLen: 0,
38767 rematerializeable: true,
38768 reg: regInfo{
38769 outputs: []outputInfo{
38770 {0, 65535},
38771 },
38772 },
38773 },
38774 {
38775 name: "LoweredGetCallerSP",
38776 argLen: 1,
38777 rematerializeable: true,
38778 reg: regInfo{
38779 outputs: []outputInfo{
38780 {0, 65535},
38781 },
38782 },
38783 },
38784 {
38785 name: "LoweredNilCheck",
38786 argLen: 2,
38787 nilCheck: true,
38788 faultOnNilArg0: true,
38789 reg: regInfo{
38790 inputs: []inputInfo{
38791 {0, 65535},
38792 },
38793 },
38794 },
38795 {
38796 name: "LoweredWB",
38797 auxType: auxInt64,
38798 argLen: 1,
38799 reg: regInfo{
38800 clobbers: 844424930131967,
38801 outputs: []outputInfo{
38802 {0, 65535},
38803 },
38804 },
38805 },
38806 {
38807 name: "LoweredConvert",
38808 argLen: 2,
38809 reg: regInfo{
38810 inputs: []inputInfo{
38811 {0, 65535},
38812 },
38813 outputs: []outputInfo{
38814 {0, 65535},
38815 },
38816 },
38817 },
38818 {
38819 name: "Select",
38820 argLen: 3,
38821 asm: wasm.ASelect,
38822 reg: regInfo{
38823 inputs: []inputInfo{
38824 {0, 281474976776191},
38825 {1, 281474976776191},
38826 {2, 281474976776191},
38827 },
38828 outputs: []outputInfo{
38829 {0, 65535},
38830 },
38831 },
38832 },
38833 {
38834 name: "I64Load8U",
38835 auxType: auxInt64,
38836 argLen: 2,
38837 asm: wasm.AI64Load8U,
38838 reg: regInfo{
38839 inputs: []inputInfo{
38840 {0, 1407374883618815},
38841 },
38842 outputs: []outputInfo{
38843 {0, 65535},
38844 },
38845 },
38846 },
38847 {
38848 name: "I64Load8S",
38849 auxType: auxInt64,
38850 argLen: 2,
38851 asm: wasm.AI64Load8S,
38852 reg: regInfo{
38853 inputs: []inputInfo{
38854 {0, 1407374883618815},
38855 },
38856 outputs: []outputInfo{
38857 {0, 65535},
38858 },
38859 },
38860 },
38861 {
38862 name: "I64Load16U",
38863 auxType: auxInt64,
38864 argLen: 2,
38865 asm: wasm.AI64Load16U,
38866 reg: regInfo{
38867 inputs: []inputInfo{
38868 {0, 1407374883618815},
38869 },
38870 outputs: []outputInfo{
38871 {0, 65535},
38872 },
38873 },
38874 },
38875 {
38876 name: "I64Load16S",
38877 auxType: auxInt64,
38878 argLen: 2,
38879 asm: wasm.AI64Load16S,
38880 reg: regInfo{
38881 inputs: []inputInfo{
38882 {0, 1407374883618815},
38883 },
38884 outputs: []outputInfo{
38885 {0, 65535},
38886 },
38887 },
38888 },
38889 {
38890 name: "I64Load32U",
38891 auxType: auxInt64,
38892 argLen: 2,
38893 asm: wasm.AI64Load32U,
38894 reg: regInfo{
38895 inputs: []inputInfo{
38896 {0, 1407374883618815},
38897 },
38898 outputs: []outputInfo{
38899 {0, 65535},
38900 },
38901 },
38902 },
38903 {
38904 name: "I64Load32S",
38905 auxType: auxInt64,
38906 argLen: 2,
38907 asm: wasm.AI64Load32S,
38908 reg: regInfo{
38909 inputs: []inputInfo{
38910 {0, 1407374883618815},
38911 },
38912 outputs: []outputInfo{
38913 {0, 65535},
38914 },
38915 },
38916 },
38917 {
38918 name: "I64Load",
38919 auxType: auxInt64,
38920 argLen: 2,
38921 asm: wasm.AI64Load,
38922 reg: regInfo{
38923 inputs: []inputInfo{
38924 {0, 1407374883618815},
38925 },
38926 outputs: []outputInfo{
38927 {0, 65535},
38928 },
38929 },
38930 },
38931 {
38932 name: "I64Store8",
38933 auxType: auxInt64,
38934 argLen: 3,
38935 asm: wasm.AI64Store8,
38936 reg: regInfo{
38937 inputs: []inputInfo{
38938 {1, 281474976776191},
38939 {0, 1407374883618815},
38940 },
38941 },
38942 },
38943 {
38944 name: "I64Store16",
38945 auxType: auxInt64,
38946 argLen: 3,
38947 asm: wasm.AI64Store16,
38948 reg: regInfo{
38949 inputs: []inputInfo{
38950 {1, 281474976776191},
38951 {0, 1407374883618815},
38952 },
38953 },
38954 },
38955 {
38956 name: "I64Store32",
38957 auxType: auxInt64,
38958 argLen: 3,
38959 asm: wasm.AI64Store32,
38960 reg: regInfo{
38961 inputs: []inputInfo{
38962 {1, 281474976776191},
38963 {0, 1407374883618815},
38964 },
38965 },
38966 },
38967 {
38968 name: "I64Store",
38969 auxType: auxInt64,
38970 argLen: 3,
38971 asm: wasm.AI64Store,
38972 reg: regInfo{
38973 inputs: []inputInfo{
38974 {1, 281474976776191},
38975 {0, 1407374883618815},
38976 },
38977 },
38978 },
38979 {
38980 name: "F32Load",
38981 auxType: auxInt64,
38982 argLen: 2,
38983 asm: wasm.AF32Load,
38984 reg: regInfo{
38985 inputs: []inputInfo{
38986 {0, 1407374883618815},
38987 },
38988 outputs: []outputInfo{
38989 {0, 4294901760},
38990 },
38991 },
38992 },
38993 {
38994 name: "F64Load",
38995 auxType: auxInt64,
38996 argLen: 2,
38997 asm: wasm.AF64Load,
38998 reg: regInfo{
38999 inputs: []inputInfo{
39000 {0, 1407374883618815},
39001 },
39002 outputs: []outputInfo{
39003 {0, 281470681743360},
39004 },
39005 },
39006 },
39007 {
39008 name: "F32Store",
39009 auxType: auxInt64,
39010 argLen: 3,
39011 asm: wasm.AF32Store,
39012 reg: regInfo{
39013 inputs: []inputInfo{
39014 {1, 4294901760},
39015 {0, 1407374883618815},
39016 },
39017 },
39018 },
39019 {
39020 name: "F64Store",
39021 auxType: auxInt64,
39022 argLen: 3,
39023 asm: wasm.AF64Store,
39024 reg: regInfo{
39025 inputs: []inputInfo{
39026 {1, 281470681743360},
39027 {0, 1407374883618815},
39028 },
39029 },
39030 },
39031 {
39032 name: "I64Const",
39033 auxType: auxInt64,
39034 argLen: 0,
39035 rematerializeable: true,
39036 reg: regInfo{
39037 outputs: []outputInfo{
39038 {0, 65535},
39039 },
39040 },
39041 },
39042 {
39043 name: "F32Const",
39044 auxType: auxFloat32,
39045 argLen: 0,
39046 rematerializeable: true,
39047 reg: regInfo{
39048 outputs: []outputInfo{
39049 {0, 4294901760},
39050 },
39051 },
39052 },
39053 {
39054 name: "F64Const",
39055 auxType: auxFloat64,
39056 argLen: 0,
39057 rematerializeable: true,
39058 reg: regInfo{
39059 outputs: []outputInfo{
39060 {0, 281470681743360},
39061 },
39062 },
39063 },
39064 {
39065 name: "I64Eqz",
39066 argLen: 1,
39067 asm: wasm.AI64Eqz,
39068 reg: regInfo{
39069 inputs: []inputInfo{
39070 {0, 281474976776191},
39071 },
39072 outputs: []outputInfo{
39073 {0, 65535},
39074 },
39075 },
39076 },
39077 {
39078 name: "I64Eq",
39079 argLen: 2,
39080 asm: wasm.AI64Eq,
39081 reg: regInfo{
39082 inputs: []inputInfo{
39083 {0, 281474976776191},
39084 {1, 281474976776191},
39085 },
39086 outputs: []outputInfo{
39087 {0, 65535},
39088 },
39089 },
39090 },
39091 {
39092 name: "I64Ne",
39093 argLen: 2,
39094 asm: wasm.AI64Ne,
39095 reg: regInfo{
39096 inputs: []inputInfo{
39097 {0, 281474976776191},
39098 {1, 281474976776191},
39099 },
39100 outputs: []outputInfo{
39101 {0, 65535},
39102 },
39103 },
39104 },
39105 {
39106 name: "I64LtS",
39107 argLen: 2,
39108 asm: wasm.AI64LtS,
39109 reg: regInfo{
39110 inputs: []inputInfo{
39111 {0, 281474976776191},
39112 {1, 281474976776191},
39113 },
39114 outputs: []outputInfo{
39115 {0, 65535},
39116 },
39117 },
39118 },
39119 {
39120 name: "I64LtU",
39121 argLen: 2,
39122 asm: wasm.AI64LtU,
39123 reg: regInfo{
39124 inputs: []inputInfo{
39125 {0, 281474976776191},
39126 {1, 281474976776191},
39127 },
39128 outputs: []outputInfo{
39129 {0, 65535},
39130 },
39131 },
39132 },
39133 {
39134 name: "I64GtS",
39135 argLen: 2,
39136 asm: wasm.AI64GtS,
39137 reg: regInfo{
39138 inputs: []inputInfo{
39139 {0, 281474976776191},
39140 {1, 281474976776191},
39141 },
39142 outputs: []outputInfo{
39143 {0, 65535},
39144 },
39145 },
39146 },
39147 {
39148 name: "I64GtU",
39149 argLen: 2,
39150 asm: wasm.AI64GtU,
39151 reg: regInfo{
39152 inputs: []inputInfo{
39153 {0, 281474976776191},
39154 {1, 281474976776191},
39155 },
39156 outputs: []outputInfo{
39157 {0, 65535},
39158 },
39159 },
39160 },
39161 {
39162 name: "I64LeS",
39163 argLen: 2,
39164 asm: wasm.AI64LeS,
39165 reg: regInfo{
39166 inputs: []inputInfo{
39167 {0, 281474976776191},
39168 {1, 281474976776191},
39169 },
39170 outputs: []outputInfo{
39171 {0, 65535},
39172 },
39173 },
39174 },
39175 {
39176 name: "I64LeU",
39177 argLen: 2,
39178 asm: wasm.AI64LeU,
39179 reg: regInfo{
39180 inputs: []inputInfo{
39181 {0, 281474976776191},
39182 {1, 281474976776191},
39183 },
39184 outputs: []outputInfo{
39185 {0, 65535},
39186 },
39187 },
39188 },
39189 {
39190 name: "I64GeS",
39191 argLen: 2,
39192 asm: wasm.AI64GeS,
39193 reg: regInfo{
39194 inputs: []inputInfo{
39195 {0, 281474976776191},
39196 {1, 281474976776191},
39197 },
39198 outputs: []outputInfo{
39199 {0, 65535},
39200 },
39201 },
39202 },
39203 {
39204 name: "I64GeU",
39205 argLen: 2,
39206 asm: wasm.AI64GeU,
39207 reg: regInfo{
39208 inputs: []inputInfo{
39209 {0, 281474976776191},
39210 {1, 281474976776191},
39211 },
39212 outputs: []outputInfo{
39213 {0, 65535},
39214 },
39215 },
39216 },
39217 {
39218 name: "F32Eq",
39219 argLen: 2,
39220 asm: wasm.AF32Eq,
39221 reg: regInfo{
39222 inputs: []inputInfo{
39223 {0, 4294901760},
39224 {1, 4294901760},
39225 },
39226 outputs: []outputInfo{
39227 {0, 65535},
39228 },
39229 },
39230 },
39231 {
39232 name: "F32Ne",
39233 argLen: 2,
39234 asm: wasm.AF32Ne,
39235 reg: regInfo{
39236 inputs: []inputInfo{
39237 {0, 4294901760},
39238 {1, 4294901760},
39239 },
39240 outputs: []outputInfo{
39241 {0, 65535},
39242 },
39243 },
39244 },
39245 {
39246 name: "F32Lt",
39247 argLen: 2,
39248 asm: wasm.AF32Lt,
39249 reg: regInfo{
39250 inputs: []inputInfo{
39251 {0, 4294901760},
39252 {1, 4294901760},
39253 },
39254 outputs: []outputInfo{
39255 {0, 65535},
39256 },
39257 },
39258 },
39259 {
39260 name: "F32Gt",
39261 argLen: 2,
39262 asm: wasm.AF32Gt,
39263 reg: regInfo{
39264 inputs: []inputInfo{
39265 {0, 4294901760},
39266 {1, 4294901760},
39267 },
39268 outputs: []outputInfo{
39269 {0, 65535},
39270 },
39271 },
39272 },
39273 {
39274 name: "F32Le",
39275 argLen: 2,
39276 asm: wasm.AF32Le,
39277 reg: regInfo{
39278 inputs: []inputInfo{
39279 {0, 4294901760},
39280 {1, 4294901760},
39281 },
39282 outputs: []outputInfo{
39283 {0, 65535},
39284 },
39285 },
39286 },
39287 {
39288 name: "F32Ge",
39289 argLen: 2,
39290 asm: wasm.AF32Ge,
39291 reg: regInfo{
39292 inputs: []inputInfo{
39293 {0, 4294901760},
39294 {1, 4294901760},
39295 },
39296 outputs: []outputInfo{
39297 {0, 65535},
39298 },
39299 },
39300 },
39301 {
39302 name: "F64Eq",
39303 argLen: 2,
39304 asm: wasm.AF64Eq,
39305 reg: regInfo{
39306 inputs: []inputInfo{
39307 {0, 281470681743360},
39308 {1, 281470681743360},
39309 },
39310 outputs: []outputInfo{
39311 {0, 65535},
39312 },
39313 },
39314 },
39315 {
39316 name: "F64Ne",
39317 argLen: 2,
39318 asm: wasm.AF64Ne,
39319 reg: regInfo{
39320 inputs: []inputInfo{
39321 {0, 281470681743360},
39322 {1, 281470681743360},
39323 },
39324 outputs: []outputInfo{
39325 {0, 65535},
39326 },
39327 },
39328 },
39329 {
39330 name: "F64Lt",
39331 argLen: 2,
39332 asm: wasm.AF64Lt,
39333 reg: regInfo{
39334 inputs: []inputInfo{
39335 {0, 281470681743360},
39336 {1, 281470681743360},
39337 },
39338 outputs: []outputInfo{
39339 {0, 65535},
39340 },
39341 },
39342 },
39343 {
39344 name: "F64Gt",
39345 argLen: 2,
39346 asm: wasm.AF64Gt,
39347 reg: regInfo{
39348 inputs: []inputInfo{
39349 {0, 281470681743360},
39350 {1, 281470681743360},
39351 },
39352 outputs: []outputInfo{
39353 {0, 65535},
39354 },
39355 },
39356 },
39357 {
39358 name: "F64Le",
39359 argLen: 2,
39360 asm: wasm.AF64Le,
39361 reg: regInfo{
39362 inputs: []inputInfo{
39363 {0, 281470681743360},
39364 {1, 281470681743360},
39365 },
39366 outputs: []outputInfo{
39367 {0, 65535},
39368 },
39369 },
39370 },
39371 {
39372 name: "F64Ge",
39373 argLen: 2,
39374 asm: wasm.AF64Ge,
39375 reg: regInfo{
39376 inputs: []inputInfo{
39377 {0, 281470681743360},
39378 {1, 281470681743360},
39379 },
39380 outputs: []outputInfo{
39381 {0, 65535},
39382 },
39383 },
39384 },
39385 {
39386 name: "I64Add",
39387 argLen: 2,
39388 asm: wasm.AI64Add,
39389 reg: regInfo{
39390 inputs: []inputInfo{
39391 {0, 281474976776191},
39392 {1, 281474976776191},
39393 },
39394 outputs: []outputInfo{
39395 {0, 65535},
39396 },
39397 },
39398 },
39399 {
39400 name: "I64AddConst",
39401 auxType: auxInt64,
39402 argLen: 1,
39403 asm: wasm.AI64Add,
39404 reg: regInfo{
39405 inputs: []inputInfo{
39406 {0, 281474976776191},
39407 },
39408 outputs: []outputInfo{
39409 {0, 65535},
39410 },
39411 },
39412 },
39413 {
39414 name: "I64Sub",
39415 argLen: 2,
39416 asm: wasm.AI64Sub,
39417 reg: regInfo{
39418 inputs: []inputInfo{
39419 {0, 281474976776191},
39420 {1, 281474976776191},
39421 },
39422 outputs: []outputInfo{
39423 {0, 65535},
39424 },
39425 },
39426 },
39427 {
39428 name: "I64Mul",
39429 argLen: 2,
39430 asm: wasm.AI64Mul,
39431 reg: regInfo{
39432 inputs: []inputInfo{
39433 {0, 281474976776191},
39434 {1, 281474976776191},
39435 },
39436 outputs: []outputInfo{
39437 {0, 65535},
39438 },
39439 },
39440 },
39441 {
39442 name: "I64DivS",
39443 argLen: 2,
39444 asm: wasm.AI64DivS,
39445 reg: regInfo{
39446 inputs: []inputInfo{
39447 {0, 281474976776191},
39448 {1, 281474976776191},
39449 },
39450 outputs: []outputInfo{
39451 {0, 65535},
39452 },
39453 },
39454 },
39455 {
39456 name: "I64DivU",
39457 argLen: 2,
39458 asm: wasm.AI64DivU,
39459 reg: regInfo{
39460 inputs: []inputInfo{
39461 {0, 281474976776191},
39462 {1, 281474976776191},
39463 },
39464 outputs: []outputInfo{
39465 {0, 65535},
39466 },
39467 },
39468 },
39469 {
39470 name: "I64RemS",
39471 argLen: 2,
39472 asm: wasm.AI64RemS,
39473 reg: regInfo{
39474 inputs: []inputInfo{
39475 {0, 281474976776191},
39476 {1, 281474976776191},
39477 },
39478 outputs: []outputInfo{
39479 {0, 65535},
39480 },
39481 },
39482 },
39483 {
39484 name: "I64RemU",
39485 argLen: 2,
39486 asm: wasm.AI64RemU,
39487 reg: regInfo{
39488 inputs: []inputInfo{
39489 {0, 281474976776191},
39490 {1, 281474976776191},
39491 },
39492 outputs: []outputInfo{
39493 {0, 65535},
39494 },
39495 },
39496 },
39497 {
39498 name: "I64And",
39499 argLen: 2,
39500 asm: wasm.AI64And,
39501 reg: regInfo{
39502 inputs: []inputInfo{
39503 {0, 281474976776191},
39504 {1, 281474976776191},
39505 },
39506 outputs: []outputInfo{
39507 {0, 65535},
39508 },
39509 },
39510 },
39511 {
39512 name: "I64Or",
39513 argLen: 2,
39514 asm: wasm.AI64Or,
39515 reg: regInfo{
39516 inputs: []inputInfo{
39517 {0, 281474976776191},
39518 {1, 281474976776191},
39519 },
39520 outputs: []outputInfo{
39521 {0, 65535},
39522 },
39523 },
39524 },
39525 {
39526 name: "I64Xor",
39527 argLen: 2,
39528 asm: wasm.AI64Xor,
39529 reg: regInfo{
39530 inputs: []inputInfo{
39531 {0, 281474976776191},
39532 {1, 281474976776191},
39533 },
39534 outputs: []outputInfo{
39535 {0, 65535},
39536 },
39537 },
39538 },
39539 {
39540 name: "I64Shl",
39541 argLen: 2,
39542 asm: wasm.AI64Shl,
39543 reg: regInfo{
39544 inputs: []inputInfo{
39545 {0, 281474976776191},
39546 {1, 281474976776191},
39547 },
39548 outputs: []outputInfo{
39549 {0, 65535},
39550 },
39551 },
39552 },
39553 {
39554 name: "I64ShrS",
39555 argLen: 2,
39556 asm: wasm.AI64ShrS,
39557 reg: regInfo{
39558 inputs: []inputInfo{
39559 {0, 281474976776191},
39560 {1, 281474976776191},
39561 },
39562 outputs: []outputInfo{
39563 {0, 65535},
39564 },
39565 },
39566 },
39567 {
39568 name: "I64ShrU",
39569 argLen: 2,
39570 asm: wasm.AI64ShrU,
39571 reg: regInfo{
39572 inputs: []inputInfo{
39573 {0, 281474976776191},
39574 {1, 281474976776191},
39575 },
39576 outputs: []outputInfo{
39577 {0, 65535},
39578 },
39579 },
39580 },
39581 {
39582 name: "F32Neg",
39583 argLen: 1,
39584 asm: wasm.AF32Neg,
39585 reg: regInfo{
39586 inputs: []inputInfo{
39587 {0, 4294901760},
39588 },
39589 outputs: []outputInfo{
39590 {0, 4294901760},
39591 },
39592 },
39593 },
39594 {
39595 name: "F32Add",
39596 argLen: 2,
39597 asm: wasm.AF32Add,
39598 reg: regInfo{
39599 inputs: []inputInfo{
39600 {0, 4294901760},
39601 {1, 4294901760},
39602 },
39603 outputs: []outputInfo{
39604 {0, 4294901760},
39605 },
39606 },
39607 },
39608 {
39609 name: "F32Sub",
39610 argLen: 2,
39611 asm: wasm.AF32Sub,
39612 reg: regInfo{
39613 inputs: []inputInfo{
39614 {0, 4294901760},
39615 {1, 4294901760},
39616 },
39617 outputs: []outputInfo{
39618 {0, 4294901760},
39619 },
39620 },
39621 },
39622 {
39623 name: "F32Mul",
39624 argLen: 2,
39625 asm: wasm.AF32Mul,
39626 reg: regInfo{
39627 inputs: []inputInfo{
39628 {0, 4294901760},
39629 {1, 4294901760},
39630 },
39631 outputs: []outputInfo{
39632 {0, 4294901760},
39633 },
39634 },
39635 },
39636 {
39637 name: "F32Div",
39638 argLen: 2,
39639 asm: wasm.AF32Div,
39640 reg: regInfo{
39641 inputs: []inputInfo{
39642 {0, 4294901760},
39643 {1, 4294901760},
39644 },
39645 outputs: []outputInfo{
39646 {0, 4294901760},
39647 },
39648 },
39649 },
39650 {
39651 name: "F64Neg",
39652 argLen: 1,
39653 asm: wasm.AF64Neg,
39654 reg: regInfo{
39655 inputs: []inputInfo{
39656 {0, 281470681743360},
39657 },
39658 outputs: []outputInfo{
39659 {0, 281470681743360},
39660 },
39661 },
39662 },
39663 {
39664 name: "F64Add",
39665 argLen: 2,
39666 asm: wasm.AF64Add,
39667 reg: regInfo{
39668 inputs: []inputInfo{
39669 {0, 281470681743360},
39670 {1, 281470681743360},
39671 },
39672 outputs: []outputInfo{
39673 {0, 281470681743360},
39674 },
39675 },
39676 },
39677 {
39678 name: "F64Sub",
39679 argLen: 2,
39680 asm: wasm.AF64Sub,
39681 reg: regInfo{
39682 inputs: []inputInfo{
39683 {0, 281470681743360},
39684 {1, 281470681743360},
39685 },
39686 outputs: []outputInfo{
39687 {0, 281470681743360},
39688 },
39689 },
39690 },
39691 {
39692 name: "F64Mul",
39693 argLen: 2,
39694 asm: wasm.AF64Mul,
39695 reg: regInfo{
39696 inputs: []inputInfo{
39697 {0, 281470681743360},
39698 {1, 281470681743360},
39699 },
39700 outputs: []outputInfo{
39701 {0, 281470681743360},
39702 },
39703 },
39704 },
39705 {
39706 name: "F64Div",
39707 argLen: 2,
39708 asm: wasm.AF64Div,
39709 reg: regInfo{
39710 inputs: []inputInfo{
39711 {0, 281470681743360},
39712 {1, 281470681743360},
39713 },
39714 outputs: []outputInfo{
39715 {0, 281470681743360},
39716 },
39717 },
39718 },
39719 {
39720 name: "I64TruncSatF64S",
39721 argLen: 1,
39722 asm: wasm.AI64TruncSatF64S,
39723 reg: regInfo{
39724 inputs: []inputInfo{
39725 {0, 281470681743360},
39726 },
39727 outputs: []outputInfo{
39728 {0, 65535},
39729 },
39730 },
39731 },
39732 {
39733 name: "I64TruncSatF64U",
39734 argLen: 1,
39735 asm: wasm.AI64TruncSatF64U,
39736 reg: regInfo{
39737 inputs: []inputInfo{
39738 {0, 281470681743360},
39739 },
39740 outputs: []outputInfo{
39741 {0, 65535},
39742 },
39743 },
39744 },
39745 {
39746 name: "I64TruncSatF32S",
39747 argLen: 1,
39748 asm: wasm.AI64TruncSatF32S,
39749 reg: regInfo{
39750 inputs: []inputInfo{
39751 {0, 4294901760},
39752 },
39753 outputs: []outputInfo{
39754 {0, 65535},
39755 },
39756 },
39757 },
39758 {
39759 name: "I64TruncSatF32U",
39760 argLen: 1,
39761 asm: wasm.AI64TruncSatF32U,
39762 reg: regInfo{
39763 inputs: []inputInfo{
39764 {0, 4294901760},
39765 },
39766 outputs: []outputInfo{
39767 {0, 65535},
39768 },
39769 },
39770 },
39771 {
39772 name: "F32ConvertI64S",
39773 argLen: 1,
39774 asm: wasm.AF32ConvertI64S,
39775 reg: regInfo{
39776 inputs: []inputInfo{
39777 {0, 65535},
39778 },
39779 outputs: []outputInfo{
39780 {0, 4294901760},
39781 },
39782 },
39783 },
39784 {
39785 name: "F32ConvertI64U",
39786 argLen: 1,
39787 asm: wasm.AF32ConvertI64U,
39788 reg: regInfo{
39789 inputs: []inputInfo{
39790 {0, 65535},
39791 },
39792 outputs: []outputInfo{
39793 {0, 4294901760},
39794 },
39795 },
39796 },
39797 {
39798 name: "F64ConvertI64S",
39799 argLen: 1,
39800 asm: wasm.AF64ConvertI64S,
39801 reg: regInfo{
39802 inputs: []inputInfo{
39803 {0, 65535},
39804 },
39805 outputs: []outputInfo{
39806 {0, 281470681743360},
39807 },
39808 },
39809 },
39810 {
39811 name: "F64ConvertI64U",
39812 argLen: 1,
39813 asm: wasm.AF64ConvertI64U,
39814 reg: regInfo{
39815 inputs: []inputInfo{
39816 {0, 65535},
39817 },
39818 outputs: []outputInfo{
39819 {0, 281470681743360},
39820 },
39821 },
39822 },
39823 {
39824 name: "F32DemoteF64",
39825 argLen: 1,
39826 asm: wasm.AF32DemoteF64,
39827 reg: regInfo{
39828 inputs: []inputInfo{
39829 {0, 281470681743360},
39830 },
39831 outputs: []outputInfo{
39832 {0, 4294901760},
39833 },
39834 },
39835 },
39836 {
39837 name: "F64PromoteF32",
39838 argLen: 1,
39839 asm: wasm.AF64PromoteF32,
39840 reg: regInfo{
39841 inputs: []inputInfo{
39842 {0, 4294901760},
39843 },
39844 outputs: []outputInfo{
39845 {0, 281470681743360},
39846 },
39847 },
39848 },
39849 {
39850 name: "I64Extend8S",
39851 argLen: 1,
39852 asm: wasm.AI64Extend8S,
39853 reg: regInfo{
39854 inputs: []inputInfo{
39855 {0, 281474976776191},
39856 },
39857 outputs: []outputInfo{
39858 {0, 65535},
39859 },
39860 },
39861 },
39862 {
39863 name: "I64Extend16S",
39864 argLen: 1,
39865 asm: wasm.AI64Extend16S,
39866 reg: regInfo{
39867 inputs: []inputInfo{
39868 {0, 281474976776191},
39869 },
39870 outputs: []outputInfo{
39871 {0, 65535},
39872 },
39873 },
39874 },
39875 {
39876 name: "I64Extend32S",
39877 argLen: 1,
39878 asm: wasm.AI64Extend32S,
39879 reg: regInfo{
39880 inputs: []inputInfo{
39881 {0, 281474976776191},
39882 },
39883 outputs: []outputInfo{
39884 {0, 65535},
39885 },
39886 },
39887 },
39888 {
39889 name: "F32Sqrt",
39890 argLen: 1,
39891 asm: wasm.AF32Sqrt,
39892 reg: regInfo{
39893 inputs: []inputInfo{
39894 {0, 4294901760},
39895 },
39896 outputs: []outputInfo{
39897 {0, 4294901760},
39898 },
39899 },
39900 },
39901 {
39902 name: "F32Trunc",
39903 argLen: 1,
39904 asm: wasm.AF32Trunc,
39905 reg: regInfo{
39906 inputs: []inputInfo{
39907 {0, 4294901760},
39908 },
39909 outputs: []outputInfo{
39910 {0, 4294901760},
39911 },
39912 },
39913 },
39914 {
39915 name: "F32Ceil",
39916 argLen: 1,
39917 asm: wasm.AF32Ceil,
39918 reg: regInfo{
39919 inputs: []inputInfo{
39920 {0, 4294901760},
39921 },
39922 outputs: []outputInfo{
39923 {0, 4294901760},
39924 },
39925 },
39926 },
39927 {
39928 name: "F32Floor",
39929 argLen: 1,
39930 asm: wasm.AF32Floor,
39931 reg: regInfo{
39932 inputs: []inputInfo{
39933 {0, 4294901760},
39934 },
39935 outputs: []outputInfo{
39936 {0, 4294901760},
39937 },
39938 },
39939 },
39940 {
39941 name: "F32Nearest",
39942 argLen: 1,
39943 asm: wasm.AF32Nearest,
39944 reg: regInfo{
39945 inputs: []inputInfo{
39946 {0, 4294901760},
39947 },
39948 outputs: []outputInfo{
39949 {0, 4294901760},
39950 },
39951 },
39952 },
39953 {
39954 name: "F32Abs",
39955 argLen: 1,
39956 asm: wasm.AF32Abs,
39957 reg: regInfo{
39958 inputs: []inputInfo{
39959 {0, 4294901760},
39960 },
39961 outputs: []outputInfo{
39962 {0, 4294901760},
39963 },
39964 },
39965 },
39966 {
39967 name: "F32Copysign",
39968 argLen: 2,
39969 asm: wasm.AF32Copysign,
39970 reg: regInfo{
39971 inputs: []inputInfo{
39972 {0, 4294901760},
39973 {1, 4294901760},
39974 },
39975 outputs: []outputInfo{
39976 {0, 4294901760},
39977 },
39978 },
39979 },
39980 {
39981 name: "F64Sqrt",
39982 argLen: 1,
39983 asm: wasm.AF64Sqrt,
39984 reg: regInfo{
39985 inputs: []inputInfo{
39986 {0, 281470681743360},
39987 },
39988 outputs: []outputInfo{
39989 {0, 281470681743360},
39990 },
39991 },
39992 },
39993 {
39994 name: "F64Trunc",
39995 argLen: 1,
39996 asm: wasm.AF64Trunc,
39997 reg: regInfo{
39998 inputs: []inputInfo{
39999 {0, 281470681743360},
40000 },
40001 outputs: []outputInfo{
40002 {0, 281470681743360},
40003 },
40004 },
40005 },
40006 {
40007 name: "F64Ceil",
40008 argLen: 1,
40009 asm: wasm.AF64Ceil,
40010 reg: regInfo{
40011 inputs: []inputInfo{
40012 {0, 281470681743360},
40013 },
40014 outputs: []outputInfo{
40015 {0, 281470681743360},
40016 },
40017 },
40018 },
40019 {
40020 name: "F64Floor",
40021 argLen: 1,
40022 asm: wasm.AF64Floor,
40023 reg: regInfo{
40024 inputs: []inputInfo{
40025 {0, 281470681743360},
40026 },
40027 outputs: []outputInfo{
40028 {0, 281470681743360},
40029 },
40030 },
40031 },
40032 {
40033 name: "F64Nearest",
40034 argLen: 1,
40035 asm: wasm.AF64Nearest,
40036 reg: regInfo{
40037 inputs: []inputInfo{
40038 {0, 281470681743360},
40039 },
40040 outputs: []outputInfo{
40041 {0, 281470681743360},
40042 },
40043 },
40044 },
40045 {
40046 name: "F64Abs",
40047 argLen: 1,
40048 asm: wasm.AF64Abs,
40049 reg: regInfo{
40050 inputs: []inputInfo{
40051 {0, 281470681743360},
40052 },
40053 outputs: []outputInfo{
40054 {0, 281470681743360},
40055 },
40056 },
40057 },
40058 {
40059 name: "F64Copysign",
40060 argLen: 2,
40061 asm: wasm.AF64Copysign,
40062 reg: regInfo{
40063 inputs: []inputInfo{
40064 {0, 281470681743360},
40065 {1, 281470681743360},
40066 },
40067 outputs: []outputInfo{
40068 {0, 281470681743360},
40069 },
40070 },
40071 },
40072 {
40073 name: "I64Ctz",
40074 argLen: 1,
40075 asm: wasm.AI64Ctz,
40076 reg: regInfo{
40077 inputs: []inputInfo{
40078 {0, 281474976776191},
40079 },
40080 outputs: []outputInfo{
40081 {0, 65535},
40082 },
40083 },
40084 },
40085 {
40086 name: "I64Clz",
40087 argLen: 1,
40088 asm: wasm.AI64Clz,
40089 reg: regInfo{
40090 inputs: []inputInfo{
40091 {0, 281474976776191},
40092 },
40093 outputs: []outputInfo{
40094 {0, 65535},
40095 },
40096 },
40097 },
40098 {
40099 name: "I32Rotl",
40100 argLen: 2,
40101 asm: wasm.AI32Rotl,
40102 reg: regInfo{
40103 inputs: []inputInfo{
40104 {0, 281474976776191},
40105 {1, 281474976776191},
40106 },
40107 outputs: []outputInfo{
40108 {0, 65535},
40109 },
40110 },
40111 },
40112 {
40113 name: "I64Rotl",
40114 argLen: 2,
40115 asm: wasm.AI64Rotl,
40116 reg: regInfo{
40117 inputs: []inputInfo{
40118 {0, 281474976776191},
40119 {1, 281474976776191},
40120 },
40121 outputs: []outputInfo{
40122 {0, 65535},
40123 },
40124 },
40125 },
40126 {
40127 name: "I64Popcnt",
40128 argLen: 1,
40129 asm: wasm.AI64Popcnt,
40130 reg: regInfo{
40131 inputs: []inputInfo{
40132 {0, 281474976776191},
40133 },
40134 outputs: []outputInfo{
40135 {0, 65535},
40136 },
40137 },
40138 },
40139
40140 {
40141 name: "Add8",
40142 argLen: 2,
40143 commutative: true,
40144 generic: true,
40145 },
40146 {
40147 name: "Add16",
40148 argLen: 2,
40149 commutative: true,
40150 generic: true,
40151 },
40152 {
40153 name: "Add32",
40154 argLen: 2,
40155 commutative: true,
40156 generic: true,
40157 },
40158 {
40159 name: "Add64",
40160 argLen: 2,
40161 commutative: true,
40162 generic: true,
40163 },
40164 {
40165 name: "AddPtr",
40166 argLen: 2,
40167 generic: true,
40168 },
40169 {
40170 name: "Add32F",
40171 argLen: 2,
40172 commutative: true,
40173 generic: true,
40174 },
40175 {
40176 name: "Add64F",
40177 argLen: 2,
40178 commutative: true,
40179 generic: true,
40180 },
40181 {
40182 name: "Sub8",
40183 argLen: 2,
40184 generic: true,
40185 },
40186 {
40187 name: "Sub16",
40188 argLen: 2,
40189 generic: true,
40190 },
40191 {
40192 name: "Sub32",
40193 argLen: 2,
40194 generic: true,
40195 },
40196 {
40197 name: "Sub64",
40198 argLen: 2,
40199 generic: true,
40200 },
40201 {
40202 name: "SubPtr",
40203 argLen: 2,
40204 generic: true,
40205 },
40206 {
40207 name: "Sub32F",
40208 argLen: 2,
40209 generic: true,
40210 },
40211 {
40212 name: "Sub64F",
40213 argLen: 2,
40214 generic: true,
40215 },
40216 {
40217 name: "Mul8",
40218 argLen: 2,
40219 commutative: true,
40220 generic: true,
40221 },
40222 {
40223 name: "Mul16",
40224 argLen: 2,
40225 commutative: true,
40226 generic: true,
40227 },
40228 {
40229 name: "Mul32",
40230 argLen: 2,
40231 commutative: true,
40232 generic: true,
40233 },
40234 {
40235 name: "Mul64",
40236 argLen: 2,
40237 commutative: true,
40238 generic: true,
40239 },
40240 {
40241 name: "Mul32F",
40242 argLen: 2,
40243 commutative: true,
40244 generic: true,
40245 },
40246 {
40247 name: "Mul64F",
40248 argLen: 2,
40249 commutative: true,
40250 generic: true,
40251 },
40252 {
40253 name: "Div32F",
40254 argLen: 2,
40255 generic: true,
40256 },
40257 {
40258 name: "Div64F",
40259 argLen: 2,
40260 generic: true,
40261 },
40262 {
40263 name: "Hmul32",
40264 argLen: 2,
40265 commutative: true,
40266 generic: true,
40267 },
40268 {
40269 name: "Hmul32u",
40270 argLen: 2,
40271 commutative: true,
40272 generic: true,
40273 },
40274 {
40275 name: "Hmul64",
40276 argLen: 2,
40277 commutative: true,
40278 generic: true,
40279 },
40280 {
40281 name: "Hmul64u",
40282 argLen: 2,
40283 commutative: true,
40284 generic: true,
40285 },
40286 {
40287 name: "Mul32uhilo",
40288 argLen: 2,
40289 commutative: true,
40290 generic: true,
40291 },
40292 {
40293 name: "Mul64uhilo",
40294 argLen: 2,
40295 commutative: true,
40296 generic: true,
40297 },
40298 {
40299 name: "Mul32uover",
40300 argLen: 2,
40301 commutative: true,
40302 generic: true,
40303 },
40304 {
40305 name: "Mul64uover",
40306 argLen: 2,
40307 commutative: true,
40308 generic: true,
40309 },
40310 {
40311 name: "Avg32u",
40312 argLen: 2,
40313 generic: true,
40314 },
40315 {
40316 name: "Avg64u",
40317 argLen: 2,
40318 generic: true,
40319 },
40320 {
40321 name: "Div8",
40322 argLen: 2,
40323 generic: true,
40324 },
40325 {
40326 name: "Div8u",
40327 argLen: 2,
40328 generic: true,
40329 },
40330 {
40331 name: "Div16",
40332 auxType: auxBool,
40333 argLen: 2,
40334 generic: true,
40335 },
40336 {
40337 name: "Div16u",
40338 argLen: 2,
40339 generic: true,
40340 },
40341 {
40342 name: "Div32",
40343 auxType: auxBool,
40344 argLen: 2,
40345 generic: true,
40346 },
40347 {
40348 name: "Div32u",
40349 argLen: 2,
40350 generic: true,
40351 },
40352 {
40353 name: "Div64",
40354 auxType: auxBool,
40355 argLen: 2,
40356 generic: true,
40357 },
40358 {
40359 name: "Div64u",
40360 argLen: 2,
40361 generic: true,
40362 },
40363 {
40364 name: "Div128u",
40365 argLen: 3,
40366 generic: true,
40367 },
40368 {
40369 name: "Mod8",
40370 argLen: 2,
40371 generic: true,
40372 },
40373 {
40374 name: "Mod8u",
40375 argLen: 2,
40376 generic: true,
40377 },
40378 {
40379 name: "Mod16",
40380 auxType: auxBool,
40381 argLen: 2,
40382 generic: true,
40383 },
40384 {
40385 name: "Mod16u",
40386 argLen: 2,
40387 generic: true,
40388 },
40389 {
40390 name: "Mod32",
40391 auxType: auxBool,
40392 argLen: 2,
40393 generic: true,
40394 },
40395 {
40396 name: "Mod32u",
40397 argLen: 2,
40398 generic: true,
40399 },
40400 {
40401 name: "Mod64",
40402 auxType: auxBool,
40403 argLen: 2,
40404 generic: true,
40405 },
40406 {
40407 name: "Mod64u",
40408 argLen: 2,
40409 generic: true,
40410 },
40411 {
40412 name: "And8",
40413 argLen: 2,
40414 commutative: true,
40415 generic: true,
40416 },
40417 {
40418 name: "And16",
40419 argLen: 2,
40420 commutative: true,
40421 generic: true,
40422 },
40423 {
40424 name: "And32",
40425 argLen: 2,
40426 commutative: true,
40427 generic: true,
40428 },
40429 {
40430 name: "And64",
40431 argLen: 2,
40432 commutative: true,
40433 generic: true,
40434 },
40435 {
40436 name: "Or8",
40437 argLen: 2,
40438 commutative: true,
40439 generic: true,
40440 },
40441 {
40442 name: "Or16",
40443 argLen: 2,
40444 commutative: true,
40445 generic: true,
40446 },
40447 {
40448 name: "Or32",
40449 argLen: 2,
40450 commutative: true,
40451 generic: true,
40452 },
40453 {
40454 name: "Or64",
40455 argLen: 2,
40456 commutative: true,
40457 generic: true,
40458 },
40459 {
40460 name: "Xor8",
40461 argLen: 2,
40462 commutative: true,
40463 generic: true,
40464 },
40465 {
40466 name: "Xor16",
40467 argLen: 2,
40468 commutative: true,
40469 generic: true,
40470 },
40471 {
40472 name: "Xor32",
40473 argLen: 2,
40474 commutative: true,
40475 generic: true,
40476 },
40477 {
40478 name: "Xor64",
40479 argLen: 2,
40480 commutative: true,
40481 generic: true,
40482 },
40483 {
40484 name: "Lsh8x8",
40485 auxType: auxBool,
40486 argLen: 2,
40487 generic: true,
40488 },
40489 {
40490 name: "Lsh8x16",
40491 auxType: auxBool,
40492 argLen: 2,
40493 generic: true,
40494 },
40495 {
40496 name: "Lsh8x32",
40497 auxType: auxBool,
40498 argLen: 2,
40499 generic: true,
40500 },
40501 {
40502 name: "Lsh8x64",
40503 auxType: auxBool,
40504 argLen: 2,
40505 generic: true,
40506 },
40507 {
40508 name: "Lsh16x8",
40509 auxType: auxBool,
40510 argLen: 2,
40511 generic: true,
40512 },
40513 {
40514 name: "Lsh16x16",
40515 auxType: auxBool,
40516 argLen: 2,
40517 generic: true,
40518 },
40519 {
40520 name: "Lsh16x32",
40521 auxType: auxBool,
40522 argLen: 2,
40523 generic: true,
40524 },
40525 {
40526 name: "Lsh16x64",
40527 auxType: auxBool,
40528 argLen: 2,
40529 generic: true,
40530 },
40531 {
40532 name: "Lsh32x8",
40533 auxType: auxBool,
40534 argLen: 2,
40535 generic: true,
40536 },
40537 {
40538 name: "Lsh32x16",
40539 auxType: auxBool,
40540 argLen: 2,
40541 generic: true,
40542 },
40543 {
40544 name: "Lsh32x32",
40545 auxType: auxBool,
40546 argLen: 2,
40547 generic: true,
40548 },
40549 {
40550 name: "Lsh32x64",
40551 auxType: auxBool,
40552 argLen: 2,
40553 generic: true,
40554 },
40555 {
40556 name: "Lsh64x8",
40557 auxType: auxBool,
40558 argLen: 2,
40559 generic: true,
40560 },
40561 {
40562 name: "Lsh64x16",
40563 auxType: auxBool,
40564 argLen: 2,
40565 generic: true,
40566 },
40567 {
40568 name: "Lsh64x32",
40569 auxType: auxBool,
40570 argLen: 2,
40571 generic: true,
40572 },
40573 {
40574 name: "Lsh64x64",
40575 auxType: auxBool,
40576 argLen: 2,
40577 generic: true,
40578 },
40579 {
40580 name: "Rsh8x8",
40581 auxType: auxBool,
40582 argLen: 2,
40583 generic: true,
40584 },
40585 {
40586 name: "Rsh8x16",
40587 auxType: auxBool,
40588 argLen: 2,
40589 generic: true,
40590 },
40591 {
40592 name: "Rsh8x32",
40593 auxType: auxBool,
40594 argLen: 2,
40595 generic: true,
40596 },
40597 {
40598 name: "Rsh8x64",
40599 auxType: auxBool,
40600 argLen: 2,
40601 generic: true,
40602 },
40603 {
40604 name: "Rsh16x8",
40605 auxType: auxBool,
40606 argLen: 2,
40607 generic: true,
40608 },
40609 {
40610 name: "Rsh16x16",
40611 auxType: auxBool,
40612 argLen: 2,
40613 generic: true,
40614 },
40615 {
40616 name: "Rsh16x32",
40617 auxType: auxBool,
40618 argLen: 2,
40619 generic: true,
40620 },
40621 {
40622 name: "Rsh16x64",
40623 auxType: auxBool,
40624 argLen: 2,
40625 generic: true,
40626 },
40627 {
40628 name: "Rsh32x8",
40629 auxType: auxBool,
40630 argLen: 2,
40631 generic: true,
40632 },
40633 {
40634 name: "Rsh32x16",
40635 auxType: auxBool,
40636 argLen: 2,
40637 generic: true,
40638 },
40639 {
40640 name: "Rsh32x32",
40641 auxType: auxBool,
40642 argLen: 2,
40643 generic: true,
40644 },
40645 {
40646 name: "Rsh32x64",
40647 auxType: auxBool,
40648 argLen: 2,
40649 generic: true,
40650 },
40651 {
40652 name: "Rsh64x8",
40653 auxType: auxBool,
40654 argLen: 2,
40655 generic: true,
40656 },
40657 {
40658 name: "Rsh64x16",
40659 auxType: auxBool,
40660 argLen: 2,
40661 generic: true,
40662 },
40663 {
40664 name: "Rsh64x32",
40665 auxType: auxBool,
40666 argLen: 2,
40667 generic: true,
40668 },
40669 {
40670 name: "Rsh64x64",
40671 auxType: auxBool,
40672 argLen: 2,
40673 generic: true,
40674 },
40675 {
40676 name: "Rsh8Ux8",
40677 auxType: auxBool,
40678 argLen: 2,
40679 generic: true,
40680 },
40681 {
40682 name: "Rsh8Ux16",
40683 auxType: auxBool,
40684 argLen: 2,
40685 generic: true,
40686 },
40687 {
40688 name: "Rsh8Ux32",
40689 auxType: auxBool,
40690 argLen: 2,
40691 generic: true,
40692 },
40693 {
40694 name: "Rsh8Ux64",
40695 auxType: auxBool,
40696 argLen: 2,
40697 generic: true,
40698 },
40699 {
40700 name: "Rsh16Ux8",
40701 auxType: auxBool,
40702 argLen: 2,
40703 generic: true,
40704 },
40705 {
40706 name: "Rsh16Ux16",
40707 auxType: auxBool,
40708 argLen: 2,
40709 generic: true,
40710 },
40711 {
40712 name: "Rsh16Ux32",
40713 auxType: auxBool,
40714 argLen: 2,
40715 generic: true,
40716 },
40717 {
40718 name: "Rsh16Ux64",
40719 auxType: auxBool,
40720 argLen: 2,
40721 generic: true,
40722 },
40723 {
40724 name: "Rsh32Ux8",
40725 auxType: auxBool,
40726 argLen: 2,
40727 generic: true,
40728 },
40729 {
40730 name: "Rsh32Ux16",
40731 auxType: auxBool,
40732 argLen: 2,
40733 generic: true,
40734 },
40735 {
40736 name: "Rsh32Ux32",
40737 auxType: auxBool,
40738 argLen: 2,
40739 generic: true,
40740 },
40741 {
40742 name: "Rsh32Ux64",
40743 auxType: auxBool,
40744 argLen: 2,
40745 generic: true,
40746 },
40747 {
40748 name: "Rsh64Ux8",
40749 auxType: auxBool,
40750 argLen: 2,
40751 generic: true,
40752 },
40753 {
40754 name: "Rsh64Ux16",
40755 auxType: auxBool,
40756 argLen: 2,
40757 generic: true,
40758 },
40759 {
40760 name: "Rsh64Ux32",
40761 auxType: auxBool,
40762 argLen: 2,
40763 generic: true,
40764 },
40765 {
40766 name: "Rsh64Ux64",
40767 auxType: auxBool,
40768 argLen: 2,
40769 generic: true,
40770 },
40771 {
40772 name: "Eq8",
40773 argLen: 2,
40774 commutative: true,
40775 generic: true,
40776 },
40777 {
40778 name: "Eq16",
40779 argLen: 2,
40780 commutative: true,
40781 generic: true,
40782 },
40783 {
40784 name: "Eq32",
40785 argLen: 2,
40786 commutative: true,
40787 generic: true,
40788 },
40789 {
40790 name: "Eq64",
40791 argLen: 2,
40792 commutative: true,
40793 generic: true,
40794 },
40795 {
40796 name: "EqPtr",
40797 argLen: 2,
40798 commutative: true,
40799 generic: true,
40800 },
40801 {
40802 name: "EqInter",
40803 argLen: 2,
40804 generic: true,
40805 },
40806 {
40807 name: "EqSlice",
40808 argLen: 2,
40809 generic: true,
40810 },
40811 {
40812 name: "Eq32F",
40813 argLen: 2,
40814 commutative: true,
40815 generic: true,
40816 },
40817 {
40818 name: "Eq64F",
40819 argLen: 2,
40820 commutative: true,
40821 generic: true,
40822 },
40823 {
40824 name: "Neq8",
40825 argLen: 2,
40826 commutative: true,
40827 generic: true,
40828 },
40829 {
40830 name: "Neq16",
40831 argLen: 2,
40832 commutative: true,
40833 generic: true,
40834 },
40835 {
40836 name: "Neq32",
40837 argLen: 2,
40838 commutative: true,
40839 generic: true,
40840 },
40841 {
40842 name: "Neq64",
40843 argLen: 2,
40844 commutative: true,
40845 generic: true,
40846 },
40847 {
40848 name: "NeqPtr",
40849 argLen: 2,
40850 commutative: true,
40851 generic: true,
40852 },
40853 {
40854 name: "NeqInter",
40855 argLen: 2,
40856 generic: true,
40857 },
40858 {
40859 name: "NeqSlice",
40860 argLen: 2,
40861 generic: true,
40862 },
40863 {
40864 name: "Neq32F",
40865 argLen: 2,
40866 commutative: true,
40867 generic: true,
40868 },
40869 {
40870 name: "Neq64F",
40871 argLen: 2,
40872 commutative: true,
40873 generic: true,
40874 },
40875 {
40876 name: "Less8",
40877 argLen: 2,
40878 generic: true,
40879 },
40880 {
40881 name: "Less8U",
40882 argLen: 2,
40883 generic: true,
40884 },
40885 {
40886 name: "Less16",
40887 argLen: 2,
40888 generic: true,
40889 },
40890 {
40891 name: "Less16U",
40892 argLen: 2,
40893 generic: true,
40894 },
40895 {
40896 name: "Less32",
40897 argLen: 2,
40898 generic: true,
40899 },
40900 {
40901 name: "Less32U",
40902 argLen: 2,
40903 generic: true,
40904 },
40905 {
40906 name: "Less64",
40907 argLen: 2,
40908 generic: true,
40909 },
40910 {
40911 name: "Less64U",
40912 argLen: 2,
40913 generic: true,
40914 },
40915 {
40916 name: "Less32F",
40917 argLen: 2,
40918 generic: true,
40919 },
40920 {
40921 name: "Less64F",
40922 argLen: 2,
40923 generic: true,
40924 },
40925 {
40926 name: "Leq8",
40927 argLen: 2,
40928 generic: true,
40929 },
40930 {
40931 name: "Leq8U",
40932 argLen: 2,
40933 generic: true,
40934 },
40935 {
40936 name: "Leq16",
40937 argLen: 2,
40938 generic: true,
40939 },
40940 {
40941 name: "Leq16U",
40942 argLen: 2,
40943 generic: true,
40944 },
40945 {
40946 name: "Leq32",
40947 argLen: 2,
40948 generic: true,
40949 },
40950 {
40951 name: "Leq32U",
40952 argLen: 2,
40953 generic: true,
40954 },
40955 {
40956 name: "Leq64",
40957 argLen: 2,
40958 generic: true,
40959 },
40960 {
40961 name: "Leq64U",
40962 argLen: 2,
40963 generic: true,
40964 },
40965 {
40966 name: "Leq32F",
40967 argLen: 2,
40968 generic: true,
40969 },
40970 {
40971 name: "Leq64F",
40972 argLen: 2,
40973 generic: true,
40974 },
40975 {
40976 name: "CondSelect",
40977 argLen: 3,
40978 generic: true,
40979 },
40980 {
40981 name: "AndB",
40982 argLen: 2,
40983 commutative: true,
40984 generic: true,
40985 },
40986 {
40987 name: "OrB",
40988 argLen: 2,
40989 commutative: true,
40990 generic: true,
40991 },
40992 {
40993 name: "EqB",
40994 argLen: 2,
40995 commutative: true,
40996 generic: true,
40997 },
40998 {
40999 name: "NeqB",
41000 argLen: 2,
41001 commutative: true,
41002 generic: true,
41003 },
41004 {
41005 name: "Not",
41006 argLen: 1,
41007 generic: true,
41008 },
41009 {
41010 name: "Neg8",
41011 argLen: 1,
41012 generic: true,
41013 },
41014 {
41015 name: "Neg16",
41016 argLen: 1,
41017 generic: true,
41018 },
41019 {
41020 name: "Neg32",
41021 argLen: 1,
41022 generic: true,
41023 },
41024 {
41025 name: "Neg64",
41026 argLen: 1,
41027 generic: true,
41028 },
41029 {
41030 name: "Neg32F",
41031 argLen: 1,
41032 generic: true,
41033 },
41034 {
41035 name: "Neg64F",
41036 argLen: 1,
41037 generic: true,
41038 },
41039 {
41040 name: "Com8",
41041 argLen: 1,
41042 generic: true,
41043 },
41044 {
41045 name: "Com16",
41046 argLen: 1,
41047 generic: true,
41048 },
41049 {
41050 name: "Com32",
41051 argLen: 1,
41052 generic: true,
41053 },
41054 {
41055 name: "Com64",
41056 argLen: 1,
41057 generic: true,
41058 },
41059 {
41060 name: "Ctz8",
41061 argLen: 1,
41062 generic: true,
41063 },
41064 {
41065 name: "Ctz16",
41066 argLen: 1,
41067 generic: true,
41068 },
41069 {
41070 name: "Ctz32",
41071 argLen: 1,
41072 generic: true,
41073 },
41074 {
41075 name: "Ctz64",
41076 argLen: 1,
41077 generic: true,
41078 },
41079 {
41080 name: "Ctz64On32",
41081 argLen: 2,
41082 generic: true,
41083 },
41084 {
41085 name: "Ctz8NonZero",
41086 argLen: 1,
41087 generic: true,
41088 },
41089 {
41090 name: "Ctz16NonZero",
41091 argLen: 1,
41092 generic: true,
41093 },
41094 {
41095 name: "Ctz32NonZero",
41096 argLen: 1,
41097 generic: true,
41098 },
41099 {
41100 name: "Ctz64NonZero",
41101 argLen: 1,
41102 generic: true,
41103 },
41104 {
41105 name: "BitLen8",
41106 argLen: 1,
41107 generic: true,
41108 },
41109 {
41110 name: "BitLen16",
41111 argLen: 1,
41112 generic: true,
41113 },
41114 {
41115 name: "BitLen32",
41116 argLen: 1,
41117 generic: true,
41118 },
41119 {
41120 name: "BitLen64",
41121 argLen: 1,
41122 generic: true,
41123 },
41124 {
41125 name: "Bswap16",
41126 argLen: 1,
41127 generic: true,
41128 },
41129 {
41130 name: "Bswap32",
41131 argLen: 1,
41132 generic: true,
41133 },
41134 {
41135 name: "Bswap64",
41136 argLen: 1,
41137 generic: true,
41138 },
41139 {
41140 name: "BitRev8",
41141 argLen: 1,
41142 generic: true,
41143 },
41144 {
41145 name: "BitRev16",
41146 argLen: 1,
41147 generic: true,
41148 },
41149 {
41150 name: "BitRev32",
41151 argLen: 1,
41152 generic: true,
41153 },
41154 {
41155 name: "BitRev64",
41156 argLen: 1,
41157 generic: true,
41158 },
41159 {
41160 name: "PopCount8",
41161 argLen: 1,
41162 generic: true,
41163 },
41164 {
41165 name: "PopCount16",
41166 argLen: 1,
41167 generic: true,
41168 },
41169 {
41170 name: "PopCount32",
41171 argLen: 1,
41172 generic: true,
41173 },
41174 {
41175 name: "PopCount64",
41176 argLen: 1,
41177 generic: true,
41178 },
41179 {
41180 name: "RotateLeft64",
41181 argLen: 2,
41182 generic: true,
41183 },
41184 {
41185 name: "RotateLeft32",
41186 argLen: 2,
41187 generic: true,
41188 },
41189 {
41190 name: "RotateLeft16",
41191 argLen: 2,
41192 generic: true,
41193 },
41194 {
41195 name: "RotateLeft8",
41196 argLen: 2,
41197 generic: true,
41198 },
41199 {
41200 name: "Sqrt",
41201 argLen: 1,
41202 generic: true,
41203 },
41204 {
41205 name: "Sqrt32",
41206 argLen: 1,
41207 generic: true,
41208 },
41209 {
41210 name: "Floor",
41211 argLen: 1,
41212 generic: true,
41213 },
41214 {
41215 name: "Ceil",
41216 argLen: 1,
41217 generic: true,
41218 },
41219 {
41220 name: "Trunc",
41221 argLen: 1,
41222 generic: true,
41223 },
41224 {
41225 name: "Round",
41226 argLen: 1,
41227 generic: true,
41228 },
41229 {
41230 name: "RoundToEven",
41231 argLen: 1,
41232 generic: true,
41233 },
41234 {
41235 name: "Abs",
41236 argLen: 1,
41237 generic: true,
41238 },
41239 {
41240 name: "Copysign",
41241 argLen: 2,
41242 generic: true,
41243 },
41244 {
41245 name: "Min64",
41246 argLen: 2,
41247 generic: true,
41248 },
41249 {
41250 name: "Max64",
41251 argLen: 2,
41252 generic: true,
41253 },
41254 {
41255 name: "Min64u",
41256 argLen: 2,
41257 generic: true,
41258 },
41259 {
41260 name: "Max64u",
41261 argLen: 2,
41262 generic: true,
41263 },
41264 {
41265 name: "Min64F",
41266 argLen: 2,
41267 generic: true,
41268 },
41269 {
41270 name: "Min32F",
41271 argLen: 2,
41272 generic: true,
41273 },
41274 {
41275 name: "Max64F",
41276 argLen: 2,
41277 generic: true,
41278 },
41279 {
41280 name: "Max32F",
41281 argLen: 2,
41282 generic: true,
41283 },
41284 {
41285 name: "FMA",
41286 argLen: 3,
41287 generic: true,
41288 },
41289 {
41290 name: "Phi",
41291 argLen: -1,
41292 zeroWidth: true,
41293 generic: true,
41294 },
41295 {
41296 name: "Copy",
41297 argLen: 1,
41298 generic: true,
41299 },
41300 {
41301 name: "Convert",
41302 argLen: 2,
41303 resultInArg0: true,
41304 zeroWidth: true,
41305 generic: true,
41306 },
41307 {
41308 name: "ConstBool",
41309 auxType: auxBool,
41310 argLen: 0,
41311 generic: true,
41312 },
41313 {
41314 name: "ConstString",
41315 auxType: auxString,
41316 argLen: 0,
41317 generic: true,
41318 },
41319 {
41320 name: "ConstNil",
41321 argLen: 0,
41322 generic: true,
41323 },
41324 {
41325 name: "Const8",
41326 auxType: auxInt8,
41327 argLen: 0,
41328 generic: true,
41329 },
41330 {
41331 name: "Const16",
41332 auxType: auxInt16,
41333 argLen: 0,
41334 generic: true,
41335 },
41336 {
41337 name: "Const32",
41338 auxType: auxInt32,
41339 argLen: 0,
41340 generic: true,
41341 },
41342 {
41343 name: "Const64",
41344 auxType: auxInt64,
41345 argLen: 0,
41346 generic: true,
41347 },
41348 {
41349 name: "Const32F",
41350 auxType: auxFloat32,
41351 argLen: 0,
41352 generic: true,
41353 },
41354 {
41355 name: "Const64F",
41356 auxType: auxFloat64,
41357 argLen: 0,
41358 generic: true,
41359 },
41360 {
41361 name: "ConstInterface",
41362 argLen: 0,
41363 generic: true,
41364 },
41365 {
41366 name: "ConstSlice",
41367 argLen: 0,
41368 generic: true,
41369 },
41370 {
41371 name: "InitMem",
41372 argLen: 0,
41373 zeroWidth: true,
41374 generic: true,
41375 },
41376 {
41377 name: "Arg",
41378 auxType: auxSymOff,
41379 argLen: 0,
41380 zeroWidth: true,
41381 symEffect: SymRead,
41382 generic: true,
41383 },
41384 {
41385 name: "ArgIntReg",
41386 auxType: auxNameOffsetInt8,
41387 argLen: 0,
41388 zeroWidth: true,
41389 generic: true,
41390 },
41391 {
41392 name: "ArgFloatReg",
41393 auxType: auxNameOffsetInt8,
41394 argLen: 0,
41395 zeroWidth: true,
41396 generic: true,
41397 },
41398 {
41399 name: "Addr",
41400 auxType: auxSym,
41401 argLen: 1,
41402 symEffect: SymAddr,
41403 generic: true,
41404 },
41405 {
41406 name: "LocalAddr",
41407 auxType: auxSym,
41408 argLen: 2,
41409 symEffect: SymAddr,
41410 generic: true,
41411 },
41412 {
41413 name: "SP",
41414 argLen: 0,
41415 zeroWidth: true,
41416 generic: true,
41417 },
41418 {
41419 name: "SB",
41420 argLen: 0,
41421 zeroWidth: true,
41422 generic: true,
41423 },
41424 {
41425 name: "SPanchored",
41426 argLen: 2,
41427 zeroWidth: true,
41428 generic: true,
41429 },
41430 {
41431 name: "Load",
41432 argLen: 2,
41433 generic: true,
41434 },
41435 {
41436 name: "Dereference",
41437 argLen: 2,
41438 generic: true,
41439 },
41440 {
41441 name: "Store",
41442 auxType: auxTyp,
41443 argLen: 3,
41444 generic: true,
41445 },
41446 {
41447 name: "Move",
41448 auxType: auxTypSize,
41449 argLen: 3,
41450 generic: true,
41451 },
41452 {
41453 name: "Zero",
41454 auxType: auxTypSize,
41455 argLen: 2,
41456 generic: true,
41457 },
41458 {
41459 name: "StoreWB",
41460 auxType: auxTyp,
41461 argLen: 3,
41462 generic: true,
41463 },
41464 {
41465 name: "MoveWB",
41466 auxType: auxTypSize,
41467 argLen: 3,
41468 generic: true,
41469 },
41470 {
41471 name: "ZeroWB",
41472 auxType: auxTypSize,
41473 argLen: 2,
41474 generic: true,
41475 },
41476 {
41477 name: "WBend",
41478 argLen: 1,
41479 generic: true,
41480 },
41481 {
41482 name: "WB",
41483 auxType: auxInt64,
41484 argLen: 1,
41485 generic: true,
41486 },
41487 {
41488 name: "HasCPUFeature",
41489 auxType: auxSym,
41490 argLen: 0,
41491 symEffect: SymNone,
41492 generic: true,
41493 },
41494 {
41495 name: "PanicBounds",
41496 auxType: auxInt64,
41497 argLen: 3,
41498 call: true,
41499 generic: true,
41500 },
41501 {
41502 name: "PanicExtend",
41503 auxType: auxInt64,
41504 argLen: 4,
41505 call: true,
41506 generic: true,
41507 },
41508 {
41509 name: "ClosureCall",
41510 auxType: auxCallOff,
41511 argLen: -1,
41512 call: true,
41513 generic: true,
41514 },
41515 {
41516 name: "StaticCall",
41517 auxType: auxCallOff,
41518 argLen: -1,
41519 call: true,
41520 generic: true,
41521 },
41522 {
41523 name: "InterCall",
41524 auxType: auxCallOff,
41525 argLen: -1,
41526 call: true,
41527 generic: true,
41528 },
41529 {
41530 name: "TailCall",
41531 auxType: auxCallOff,
41532 argLen: -1,
41533 call: true,
41534 generic: true,
41535 },
41536 {
41537 name: "ClosureLECall",
41538 auxType: auxCallOff,
41539 argLen: -1,
41540 call: true,
41541 generic: true,
41542 },
41543 {
41544 name: "StaticLECall",
41545 auxType: auxCallOff,
41546 argLen: -1,
41547 call: true,
41548 generic: true,
41549 },
41550 {
41551 name: "InterLECall",
41552 auxType: auxCallOff,
41553 argLen: -1,
41554 call: true,
41555 generic: true,
41556 },
41557 {
41558 name: "TailLECall",
41559 auxType: auxCallOff,
41560 argLen: -1,
41561 call: true,
41562 generic: true,
41563 },
41564 {
41565 name: "SignExt8to16",
41566 argLen: 1,
41567 generic: true,
41568 },
41569 {
41570 name: "SignExt8to32",
41571 argLen: 1,
41572 generic: true,
41573 },
41574 {
41575 name: "SignExt8to64",
41576 argLen: 1,
41577 generic: true,
41578 },
41579 {
41580 name: "SignExt16to32",
41581 argLen: 1,
41582 generic: true,
41583 },
41584 {
41585 name: "SignExt16to64",
41586 argLen: 1,
41587 generic: true,
41588 },
41589 {
41590 name: "SignExt32to64",
41591 argLen: 1,
41592 generic: true,
41593 },
41594 {
41595 name: "ZeroExt8to16",
41596 argLen: 1,
41597 generic: true,
41598 },
41599 {
41600 name: "ZeroExt8to32",
41601 argLen: 1,
41602 generic: true,
41603 },
41604 {
41605 name: "ZeroExt8to64",
41606 argLen: 1,
41607 generic: true,
41608 },
41609 {
41610 name: "ZeroExt16to32",
41611 argLen: 1,
41612 generic: true,
41613 },
41614 {
41615 name: "ZeroExt16to64",
41616 argLen: 1,
41617 generic: true,
41618 },
41619 {
41620 name: "ZeroExt32to64",
41621 argLen: 1,
41622 generic: true,
41623 },
41624 {
41625 name: "Trunc16to8",
41626 argLen: 1,
41627 generic: true,
41628 },
41629 {
41630 name: "Trunc32to8",
41631 argLen: 1,
41632 generic: true,
41633 },
41634 {
41635 name: "Trunc32to16",
41636 argLen: 1,
41637 generic: true,
41638 },
41639 {
41640 name: "Trunc64to8",
41641 argLen: 1,
41642 generic: true,
41643 },
41644 {
41645 name: "Trunc64to16",
41646 argLen: 1,
41647 generic: true,
41648 },
41649 {
41650 name: "Trunc64to32",
41651 argLen: 1,
41652 generic: true,
41653 },
41654 {
41655 name: "Cvt32to32F",
41656 argLen: 1,
41657 generic: true,
41658 },
41659 {
41660 name: "Cvt32to64F",
41661 argLen: 1,
41662 generic: true,
41663 },
41664 {
41665 name: "Cvt64to32F",
41666 argLen: 1,
41667 generic: true,
41668 },
41669 {
41670 name: "Cvt64to64F",
41671 argLen: 1,
41672 generic: true,
41673 },
41674 {
41675 name: "Cvt32Fto32",
41676 argLen: 1,
41677 generic: true,
41678 },
41679 {
41680 name: "Cvt32Fto64",
41681 argLen: 1,
41682 generic: true,
41683 },
41684 {
41685 name: "Cvt64Fto32",
41686 argLen: 1,
41687 generic: true,
41688 },
41689 {
41690 name: "Cvt64Fto64",
41691 argLen: 1,
41692 generic: true,
41693 },
41694 {
41695 name: "Cvt32Fto64F",
41696 argLen: 1,
41697 generic: true,
41698 },
41699 {
41700 name: "Cvt64Fto32F",
41701 argLen: 1,
41702 generic: true,
41703 },
41704 {
41705 name: "CvtBoolToUint8",
41706 argLen: 1,
41707 generic: true,
41708 },
41709 {
41710 name: "Round32F",
41711 argLen: 1,
41712 generic: true,
41713 },
41714 {
41715 name: "Round64F",
41716 argLen: 1,
41717 generic: true,
41718 },
41719 {
41720 name: "IsNonNil",
41721 argLen: 1,
41722 generic: true,
41723 },
41724 {
41725 name: "IsInBounds",
41726 argLen: 2,
41727 generic: true,
41728 },
41729 {
41730 name: "IsSliceInBounds",
41731 argLen: 2,
41732 generic: true,
41733 },
41734 {
41735 name: "NilCheck",
41736 argLen: 2,
41737 nilCheck: true,
41738 generic: true,
41739 },
41740 {
41741 name: "GetG",
41742 argLen: 1,
41743 zeroWidth: true,
41744 generic: true,
41745 },
41746 {
41747 name: "GetClosurePtr",
41748 argLen: 0,
41749 generic: true,
41750 },
41751 {
41752 name: "GetCallerPC",
41753 argLen: 0,
41754 generic: true,
41755 },
41756 {
41757 name: "GetCallerSP",
41758 argLen: 1,
41759 generic: true,
41760 },
41761 {
41762 name: "PtrIndex",
41763 argLen: 2,
41764 generic: true,
41765 },
41766 {
41767 name: "OffPtr",
41768 auxType: auxInt64,
41769 argLen: 1,
41770 generic: true,
41771 },
41772 {
41773 name: "SliceMake",
41774 argLen: 3,
41775 generic: true,
41776 },
41777 {
41778 name: "SlicePtr",
41779 argLen: 1,
41780 generic: true,
41781 },
41782 {
41783 name: "SliceLen",
41784 argLen: 1,
41785 generic: true,
41786 },
41787 {
41788 name: "SliceCap",
41789 argLen: 1,
41790 generic: true,
41791 },
41792 {
41793 name: "SlicePtrUnchecked",
41794 argLen: 1,
41795 generic: true,
41796 },
41797 {
41798 name: "ComplexMake",
41799 argLen: 2,
41800 generic: true,
41801 },
41802 {
41803 name: "ComplexReal",
41804 argLen: 1,
41805 generic: true,
41806 },
41807 {
41808 name: "ComplexImag",
41809 argLen: 1,
41810 generic: true,
41811 },
41812 {
41813 name: "StringMake",
41814 argLen: 2,
41815 generic: true,
41816 },
41817 {
41818 name: "StringPtr",
41819 argLen: 1,
41820 generic: true,
41821 },
41822 {
41823 name: "StringLen",
41824 argLen: 1,
41825 generic: true,
41826 },
41827 {
41828 name: "IMake",
41829 argLen: 2,
41830 generic: true,
41831 },
41832 {
41833 name: "ITab",
41834 argLen: 1,
41835 generic: true,
41836 },
41837 {
41838 name: "IData",
41839 argLen: 1,
41840 generic: true,
41841 },
41842 {
41843 name: "StructMake",
41844 argLen: -1,
41845 generic: true,
41846 },
41847 {
41848 name: "StructSelect",
41849 auxType: auxInt64,
41850 argLen: 1,
41851 generic: true,
41852 },
41853 {
41854 name: "ArrayMake0",
41855 argLen: 0,
41856 generic: true,
41857 },
41858 {
41859 name: "ArrayMake1",
41860 argLen: 1,
41861 generic: true,
41862 },
41863 {
41864 name: "ArraySelect",
41865 auxType: auxInt64,
41866 argLen: 1,
41867 generic: true,
41868 },
41869 {
41870 name: "StoreReg",
41871 argLen: 1,
41872 generic: true,
41873 },
41874 {
41875 name: "LoadReg",
41876 argLen: 1,
41877 generic: true,
41878 },
41879 {
41880 name: "FwdRef",
41881 auxType: auxSym,
41882 argLen: 0,
41883 symEffect: SymNone,
41884 generic: true,
41885 },
41886 {
41887 name: "Unknown",
41888 argLen: 0,
41889 generic: true,
41890 },
41891 {
41892 name: "VarDef",
41893 auxType: auxSym,
41894 argLen: 1,
41895 zeroWidth: true,
41896 symEffect: SymNone,
41897 generic: true,
41898 },
41899 {
41900 name: "VarLive",
41901 auxType: auxSym,
41902 argLen: 1,
41903 zeroWidth: true,
41904 symEffect: SymRead,
41905 generic: true,
41906 },
41907 {
41908 name: "KeepAlive",
41909 argLen: 2,
41910 zeroWidth: true,
41911 generic: true,
41912 },
41913 {
41914 name: "InlMark",
41915 auxType: auxInt32,
41916 argLen: 1,
41917 generic: true,
41918 },
41919 {
41920 name: "Int64Make",
41921 argLen: 2,
41922 generic: true,
41923 },
41924 {
41925 name: "Int64Hi",
41926 argLen: 1,
41927 generic: true,
41928 },
41929 {
41930 name: "Int64Lo",
41931 argLen: 1,
41932 generic: true,
41933 },
41934 {
41935 name: "Add32carry",
41936 argLen: 2,
41937 commutative: true,
41938 generic: true,
41939 },
41940 {
41941 name: "Add32withcarry",
41942 argLen: 3,
41943 commutative: true,
41944 generic: true,
41945 },
41946 {
41947 name: "Sub32carry",
41948 argLen: 2,
41949 generic: true,
41950 },
41951 {
41952 name: "Sub32withcarry",
41953 argLen: 3,
41954 generic: true,
41955 },
41956 {
41957 name: "Add64carry",
41958 argLen: 3,
41959 commutative: true,
41960 generic: true,
41961 },
41962 {
41963 name: "Sub64borrow",
41964 argLen: 3,
41965 generic: true,
41966 },
41967 {
41968 name: "Signmask",
41969 argLen: 1,
41970 generic: true,
41971 },
41972 {
41973 name: "Zeromask",
41974 argLen: 1,
41975 generic: true,
41976 },
41977 {
41978 name: "Slicemask",
41979 argLen: 1,
41980 generic: true,
41981 },
41982 {
41983 name: "SpectreIndex",
41984 argLen: 2,
41985 generic: true,
41986 },
41987 {
41988 name: "SpectreSliceIndex",
41989 argLen: 2,
41990 generic: true,
41991 },
41992 {
41993 name: "Cvt32Uto32F",
41994 argLen: 1,
41995 generic: true,
41996 },
41997 {
41998 name: "Cvt32Uto64F",
41999 argLen: 1,
42000 generic: true,
42001 },
42002 {
42003 name: "Cvt32Fto32U",
42004 argLen: 1,
42005 generic: true,
42006 },
42007 {
42008 name: "Cvt64Fto32U",
42009 argLen: 1,
42010 generic: true,
42011 },
42012 {
42013 name: "Cvt64Uto32F",
42014 argLen: 1,
42015 generic: true,
42016 },
42017 {
42018 name: "Cvt64Uto64F",
42019 argLen: 1,
42020 generic: true,
42021 },
42022 {
42023 name: "Cvt32Fto64U",
42024 argLen: 1,
42025 generic: true,
42026 },
42027 {
42028 name: "Cvt64Fto64U",
42029 argLen: 1,
42030 generic: true,
42031 },
42032 {
42033 name: "Select0",
42034 argLen: 1,
42035 zeroWidth: true,
42036 generic: true,
42037 },
42038 {
42039 name: "Select1",
42040 argLen: 1,
42041 zeroWidth: true,
42042 generic: true,
42043 },
42044 {
42045 name: "SelectN",
42046 auxType: auxInt64,
42047 argLen: 1,
42048 generic: true,
42049 },
42050 {
42051 name: "SelectNAddr",
42052 auxType: auxInt64,
42053 argLen: 1,
42054 generic: true,
42055 },
42056 {
42057 name: "MakeResult",
42058 argLen: -1,
42059 generic: true,
42060 },
42061 {
42062 name: "AtomicLoad8",
42063 argLen: 2,
42064 generic: true,
42065 },
42066 {
42067 name: "AtomicLoad32",
42068 argLen: 2,
42069 generic: true,
42070 },
42071 {
42072 name: "AtomicLoad64",
42073 argLen: 2,
42074 generic: true,
42075 },
42076 {
42077 name: "AtomicLoadPtr",
42078 argLen: 2,
42079 generic: true,
42080 },
42081 {
42082 name: "AtomicLoadAcq32",
42083 argLen: 2,
42084 generic: true,
42085 },
42086 {
42087 name: "AtomicLoadAcq64",
42088 argLen: 2,
42089 generic: true,
42090 },
42091 {
42092 name: "AtomicStore8",
42093 argLen: 3,
42094 hasSideEffects: true,
42095 generic: true,
42096 },
42097 {
42098 name: "AtomicStore32",
42099 argLen: 3,
42100 hasSideEffects: true,
42101 generic: true,
42102 },
42103 {
42104 name: "AtomicStore64",
42105 argLen: 3,
42106 hasSideEffects: true,
42107 generic: true,
42108 },
42109 {
42110 name: "AtomicStorePtrNoWB",
42111 argLen: 3,
42112 hasSideEffects: true,
42113 generic: true,
42114 },
42115 {
42116 name: "AtomicStoreRel32",
42117 argLen: 3,
42118 hasSideEffects: true,
42119 generic: true,
42120 },
42121 {
42122 name: "AtomicStoreRel64",
42123 argLen: 3,
42124 hasSideEffects: true,
42125 generic: true,
42126 },
42127 {
42128 name: "AtomicExchange8",
42129 argLen: 3,
42130 hasSideEffects: true,
42131 generic: true,
42132 },
42133 {
42134 name: "AtomicExchange32",
42135 argLen: 3,
42136 hasSideEffects: true,
42137 generic: true,
42138 },
42139 {
42140 name: "AtomicExchange64",
42141 argLen: 3,
42142 hasSideEffects: true,
42143 generic: true,
42144 },
42145 {
42146 name: "AtomicAdd32",
42147 argLen: 3,
42148 hasSideEffects: true,
42149 generic: true,
42150 },
42151 {
42152 name: "AtomicAdd64",
42153 argLen: 3,
42154 hasSideEffects: true,
42155 generic: true,
42156 },
42157 {
42158 name: "AtomicCompareAndSwap32",
42159 argLen: 4,
42160 hasSideEffects: true,
42161 generic: true,
42162 },
42163 {
42164 name: "AtomicCompareAndSwap64",
42165 argLen: 4,
42166 hasSideEffects: true,
42167 generic: true,
42168 },
42169 {
42170 name: "AtomicCompareAndSwapRel32",
42171 argLen: 4,
42172 hasSideEffects: true,
42173 generic: true,
42174 },
42175 {
42176 name: "AtomicAnd8",
42177 argLen: 3,
42178 hasSideEffects: true,
42179 generic: true,
42180 },
42181 {
42182 name: "AtomicOr8",
42183 argLen: 3,
42184 hasSideEffects: true,
42185 generic: true,
42186 },
42187 {
42188 name: "AtomicAnd32",
42189 argLen: 3,
42190 hasSideEffects: true,
42191 generic: true,
42192 },
42193 {
42194 name: "AtomicOr32",
42195 argLen: 3,
42196 hasSideEffects: true,
42197 generic: true,
42198 },
42199 {
42200 name: "AtomicAnd64value",
42201 argLen: 3,
42202 hasSideEffects: true,
42203 generic: true,
42204 },
42205 {
42206 name: "AtomicAnd32value",
42207 argLen: 3,
42208 hasSideEffects: true,
42209 generic: true,
42210 },
42211 {
42212 name: "AtomicAnd8value",
42213 argLen: 3,
42214 hasSideEffects: true,
42215 generic: true,
42216 },
42217 {
42218 name: "AtomicOr64value",
42219 argLen: 3,
42220 hasSideEffects: true,
42221 generic: true,
42222 },
42223 {
42224 name: "AtomicOr32value",
42225 argLen: 3,
42226 hasSideEffects: true,
42227 generic: true,
42228 },
42229 {
42230 name: "AtomicOr8value",
42231 argLen: 3,
42232 hasSideEffects: true,
42233 generic: true,
42234 },
42235 {
42236 name: "AtomicStore8Variant",
42237 argLen: 3,
42238 hasSideEffects: true,
42239 generic: true,
42240 },
42241 {
42242 name: "AtomicStore32Variant",
42243 argLen: 3,
42244 hasSideEffects: true,
42245 generic: true,
42246 },
42247 {
42248 name: "AtomicStore64Variant",
42249 argLen: 3,
42250 hasSideEffects: true,
42251 generic: true,
42252 },
42253 {
42254 name: "AtomicAdd32Variant",
42255 argLen: 3,
42256 hasSideEffects: true,
42257 generic: true,
42258 },
42259 {
42260 name: "AtomicAdd64Variant",
42261 argLen: 3,
42262 hasSideEffects: true,
42263 generic: true,
42264 },
42265 {
42266 name: "AtomicExchange8Variant",
42267 argLen: 3,
42268 hasSideEffects: true,
42269 generic: true,
42270 },
42271 {
42272 name: "AtomicExchange32Variant",
42273 argLen: 3,
42274 hasSideEffects: true,
42275 generic: true,
42276 },
42277 {
42278 name: "AtomicExchange64Variant",
42279 argLen: 3,
42280 hasSideEffects: true,
42281 generic: true,
42282 },
42283 {
42284 name: "AtomicCompareAndSwap32Variant",
42285 argLen: 4,
42286 hasSideEffects: true,
42287 generic: true,
42288 },
42289 {
42290 name: "AtomicCompareAndSwap64Variant",
42291 argLen: 4,
42292 hasSideEffects: true,
42293 generic: true,
42294 },
42295 {
42296 name: "AtomicAnd64valueVariant",
42297 argLen: 3,
42298 hasSideEffects: true,
42299 generic: true,
42300 },
42301 {
42302 name: "AtomicOr64valueVariant",
42303 argLen: 3,
42304 hasSideEffects: true,
42305 generic: true,
42306 },
42307 {
42308 name: "AtomicAnd32valueVariant",
42309 argLen: 3,
42310 hasSideEffects: true,
42311 generic: true,
42312 },
42313 {
42314 name: "AtomicOr32valueVariant",
42315 argLen: 3,
42316 hasSideEffects: true,
42317 generic: true,
42318 },
42319 {
42320 name: "AtomicAnd8valueVariant",
42321 argLen: 3,
42322 hasSideEffects: true,
42323 generic: true,
42324 },
42325 {
42326 name: "AtomicOr8valueVariant",
42327 argLen: 3,
42328 hasSideEffects: true,
42329 generic: true,
42330 },
42331 {
42332 name: "PubBarrier",
42333 argLen: 1,
42334 hasSideEffects: true,
42335 generic: true,
42336 },
42337 {
42338 name: "Clobber",
42339 auxType: auxSymOff,
42340 argLen: 0,
42341 symEffect: SymNone,
42342 generic: true,
42343 },
42344 {
42345 name: "ClobberReg",
42346 argLen: 0,
42347 generic: true,
42348 },
42349 {
42350 name: "PrefetchCache",
42351 argLen: 2,
42352 hasSideEffects: true,
42353 generic: true,
42354 },
42355 {
42356 name: "PrefetchCacheStreamed",
42357 argLen: 2,
42358 hasSideEffects: true,
42359 generic: true,
42360 },
42361 }
42362
42363 func (o Op) Asm() obj.As { return opcodeTable[o].asm }
42364 func (o Op) Scale() int16 { return int16(opcodeTable[o].scale) }
42365 func (o Op) String() string { return opcodeTable[o].name }
42366 func (o Op) SymEffect() SymEffect { return opcodeTable[o].symEffect }
42367 func (o Op) IsCall() bool { return opcodeTable[o].call }
42368 func (o Op) IsTailCall() bool { return opcodeTable[o].tailCall }
42369 func (o Op) HasSideEffects() bool { return opcodeTable[o].hasSideEffects }
42370 func (o Op) UnsafePoint() bool { return opcodeTable[o].unsafePoint }
42371 func (o Op) ResultInArg0() bool { return opcodeTable[o].resultInArg0 }
42372
42373 var registers386 = [...]Register{
42374 {0, x86.REG_AX, 0, "AX"},
42375 {1, x86.REG_CX, 1, "CX"},
42376 {2, x86.REG_DX, 2, "DX"},
42377 {3, x86.REG_BX, 3, "BX"},
42378 {4, x86.REGSP, -1, "SP"},
42379 {5, x86.REG_BP, 4, "BP"},
42380 {6, x86.REG_SI, 5, "SI"},
42381 {7, x86.REG_DI, 6, "DI"},
42382 {8, x86.REG_X0, -1, "X0"},
42383 {9, x86.REG_X1, -1, "X1"},
42384 {10, x86.REG_X2, -1, "X2"},
42385 {11, x86.REG_X3, -1, "X3"},
42386 {12, x86.REG_X4, -1, "X4"},
42387 {13, x86.REG_X5, -1, "X5"},
42388 {14, x86.REG_X6, -1, "X6"},
42389 {15, x86.REG_X7, -1, "X7"},
42390 {16, 0, -1, "SB"},
42391 }
42392 var paramIntReg386 = []int8(nil)
42393 var paramFloatReg386 = []int8(nil)
42394 var gpRegMask386 = regMask(239)
42395 var fpRegMask386 = regMask(65280)
42396 var specialRegMask386 = regMask(0)
42397 var framepointerReg386 = int8(5)
42398 var linkReg386 = int8(-1)
42399 var registersAMD64 = [...]Register{
42400 {0, x86.REG_AX, 0, "AX"},
42401 {1, x86.REG_CX, 1, "CX"},
42402 {2, x86.REG_DX, 2, "DX"},
42403 {3, x86.REG_BX, 3, "BX"},
42404 {4, x86.REGSP, -1, "SP"},
42405 {5, x86.REG_BP, 4, "BP"},
42406 {6, x86.REG_SI, 5, "SI"},
42407 {7, x86.REG_DI, 6, "DI"},
42408 {8, x86.REG_R8, 7, "R8"},
42409 {9, x86.REG_R9, 8, "R9"},
42410 {10, x86.REG_R10, 9, "R10"},
42411 {11, x86.REG_R11, 10, "R11"},
42412 {12, x86.REG_R12, 11, "R12"},
42413 {13, x86.REG_R13, 12, "R13"},
42414 {14, x86.REGG, -1, "g"},
42415 {15, x86.REG_R15, 13, "R15"},
42416 {16, x86.REG_X0, -1, "X0"},
42417 {17, x86.REG_X1, -1, "X1"},
42418 {18, x86.REG_X2, -1, "X2"},
42419 {19, x86.REG_X3, -1, "X3"},
42420 {20, x86.REG_X4, -1, "X4"},
42421 {21, x86.REG_X5, -1, "X5"},
42422 {22, x86.REG_X6, -1, "X6"},
42423 {23, x86.REG_X7, -1, "X7"},
42424 {24, x86.REG_X8, -1, "X8"},
42425 {25, x86.REG_X9, -1, "X9"},
42426 {26, x86.REG_X10, -1, "X10"},
42427 {27, x86.REG_X11, -1, "X11"},
42428 {28, x86.REG_X12, -1, "X12"},
42429 {29, x86.REG_X13, -1, "X13"},
42430 {30, x86.REG_X14, -1, "X14"},
42431 {31, x86.REG_X15, -1, "X15"},
42432 {32, 0, -1, "SB"},
42433 }
42434 var paramIntRegAMD64 = []int8{0, 3, 1, 7, 6, 8, 9, 10, 11}
42435 var paramFloatRegAMD64 = []int8{16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30}
42436 var gpRegMaskAMD64 = regMask(49135)
42437 var fpRegMaskAMD64 = regMask(2147418112)
42438 var specialRegMaskAMD64 = regMask(2147483648)
42439 var framepointerRegAMD64 = int8(5)
42440 var linkRegAMD64 = int8(-1)
42441 var registersARM = [...]Register{
42442 {0, arm.REG_R0, 0, "R0"},
42443 {1, arm.REG_R1, 1, "R1"},
42444 {2, arm.REG_R2, 2, "R2"},
42445 {3, arm.REG_R3, 3, "R3"},
42446 {4, arm.REG_R4, 4, "R4"},
42447 {5, arm.REG_R5, 5, "R5"},
42448 {6, arm.REG_R6, 6, "R6"},
42449 {7, arm.REG_R7, 7, "R7"},
42450 {8, arm.REG_R8, 8, "R8"},
42451 {9, arm.REG_R9, 9, "R9"},
42452 {10, arm.REGG, -1, "g"},
42453 {11, arm.REG_R11, -1, "R11"},
42454 {12, arm.REG_R12, 10, "R12"},
42455 {13, arm.REGSP, -1, "SP"},
42456 {14, arm.REG_R14, 11, "R14"},
42457 {15, arm.REG_R15, -1, "R15"},
42458 {16, arm.REG_F0, -1, "F0"},
42459 {17, arm.REG_F1, -1, "F1"},
42460 {18, arm.REG_F2, -1, "F2"},
42461 {19, arm.REG_F3, -1, "F3"},
42462 {20, arm.REG_F4, -1, "F4"},
42463 {21, arm.REG_F5, -1, "F5"},
42464 {22, arm.REG_F6, -1, "F6"},
42465 {23, arm.REG_F7, -1, "F7"},
42466 {24, arm.REG_F8, -1, "F8"},
42467 {25, arm.REG_F9, -1, "F9"},
42468 {26, arm.REG_F10, -1, "F10"},
42469 {27, arm.REG_F11, -1, "F11"},
42470 {28, arm.REG_F12, -1, "F12"},
42471 {29, arm.REG_F13, -1, "F13"},
42472 {30, arm.REG_F14, -1, "F14"},
42473 {31, arm.REG_F15, -1, "F15"},
42474 {32, 0, -1, "SB"},
42475 }
42476 var paramIntRegARM = []int8(nil)
42477 var paramFloatRegARM = []int8(nil)
42478 var gpRegMaskARM = regMask(21503)
42479 var fpRegMaskARM = regMask(4294901760)
42480 var specialRegMaskARM = regMask(0)
42481 var framepointerRegARM = int8(-1)
42482 var linkRegARM = int8(14)
42483 var registersARM64 = [...]Register{
42484 {0, arm64.REG_R0, 0, "R0"},
42485 {1, arm64.REG_R1, 1, "R1"},
42486 {2, arm64.REG_R2, 2, "R2"},
42487 {3, arm64.REG_R3, 3, "R3"},
42488 {4, arm64.REG_R4, 4, "R4"},
42489 {5, arm64.REG_R5, 5, "R5"},
42490 {6, arm64.REG_R6, 6, "R6"},
42491 {7, arm64.REG_R7, 7, "R7"},
42492 {8, arm64.REG_R8, 8, "R8"},
42493 {9, arm64.REG_R9, 9, "R9"},
42494 {10, arm64.REG_R10, 10, "R10"},
42495 {11, arm64.REG_R11, 11, "R11"},
42496 {12, arm64.REG_R12, 12, "R12"},
42497 {13, arm64.REG_R13, 13, "R13"},
42498 {14, arm64.REG_R14, 14, "R14"},
42499 {15, arm64.REG_R15, 15, "R15"},
42500 {16, arm64.REG_R16, 16, "R16"},
42501 {17, arm64.REG_R17, 17, "R17"},
42502 {18, arm64.REG_R18, -1, "R18"},
42503 {19, arm64.REG_R19, 18, "R19"},
42504 {20, arm64.REG_R20, 19, "R20"},
42505 {21, arm64.REG_R21, 20, "R21"},
42506 {22, arm64.REG_R22, 21, "R22"},
42507 {23, arm64.REG_R23, 22, "R23"},
42508 {24, arm64.REG_R24, 23, "R24"},
42509 {25, arm64.REG_R25, 24, "R25"},
42510 {26, arm64.REG_R26, 25, "R26"},
42511 {27, arm64.REGG, -1, "g"},
42512 {28, arm64.REG_R29, -1, "R29"},
42513 {29, arm64.REG_R30, 26, "R30"},
42514 {30, arm64.REGSP, -1, "SP"},
42515 {31, arm64.REG_F0, -1, "F0"},
42516 {32, arm64.REG_F1, -1, "F1"},
42517 {33, arm64.REG_F2, -1, "F2"},
42518 {34, arm64.REG_F3, -1, "F3"},
42519 {35, arm64.REG_F4, -1, "F4"},
42520 {36, arm64.REG_F5, -1, "F5"},
42521 {37, arm64.REG_F6, -1, "F6"},
42522 {38, arm64.REG_F7, -1, "F7"},
42523 {39, arm64.REG_F8, -1, "F8"},
42524 {40, arm64.REG_F9, -1, "F9"},
42525 {41, arm64.REG_F10, -1, "F10"},
42526 {42, arm64.REG_F11, -1, "F11"},
42527 {43, arm64.REG_F12, -1, "F12"},
42528 {44, arm64.REG_F13, -1, "F13"},
42529 {45, arm64.REG_F14, -1, "F14"},
42530 {46, arm64.REG_F15, -1, "F15"},
42531 {47, arm64.REG_F16, -1, "F16"},
42532 {48, arm64.REG_F17, -1, "F17"},
42533 {49, arm64.REG_F18, -1, "F18"},
42534 {50, arm64.REG_F19, -1, "F19"},
42535 {51, arm64.REG_F20, -1, "F20"},
42536 {52, arm64.REG_F21, -1, "F21"},
42537 {53, arm64.REG_F22, -1, "F22"},
42538 {54, arm64.REG_F23, -1, "F23"},
42539 {55, arm64.REG_F24, -1, "F24"},
42540 {56, arm64.REG_F25, -1, "F25"},
42541 {57, arm64.REG_F26, -1, "F26"},
42542 {58, arm64.REG_F27, -1, "F27"},
42543 {59, arm64.REG_F28, -1, "F28"},
42544 {60, arm64.REG_F29, -1, "F29"},
42545 {61, arm64.REG_F30, -1, "F30"},
42546 {62, arm64.REG_F31, -1, "F31"},
42547 {63, 0, -1, "SB"},
42548 }
42549 var paramIntRegARM64 = []int8{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}
42550 var paramFloatRegARM64 = []int8{31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46}
42551 var gpRegMaskARM64 = regMask(670826495)
42552 var fpRegMaskARM64 = regMask(9223372034707292160)
42553 var specialRegMaskARM64 = regMask(0)
42554 var framepointerRegARM64 = int8(-1)
42555 var linkRegARM64 = int8(29)
42556 var registersLOONG64 = [...]Register{
42557 {0, loong64.REG_R0, -1, "R0"},
42558 {1, loong64.REG_R1, -1, "R1"},
42559 {2, loong64.REGSP, -1, "SP"},
42560 {3, loong64.REG_R4, 0, "R4"},
42561 {4, loong64.REG_R5, 1, "R5"},
42562 {5, loong64.REG_R6, 2, "R6"},
42563 {6, loong64.REG_R7, 3, "R7"},
42564 {7, loong64.REG_R8, 4, "R8"},
42565 {8, loong64.REG_R9, 5, "R9"},
42566 {9, loong64.REG_R10, 6, "R10"},
42567 {10, loong64.REG_R11, 7, "R11"},
42568 {11, loong64.REG_R12, 8, "R12"},
42569 {12, loong64.REG_R13, 9, "R13"},
42570 {13, loong64.REG_R14, 10, "R14"},
42571 {14, loong64.REG_R15, 11, "R15"},
42572 {15, loong64.REG_R16, 12, "R16"},
42573 {16, loong64.REG_R17, 13, "R17"},
42574 {17, loong64.REG_R18, 14, "R18"},
42575 {18, loong64.REG_R19, 15, "R19"},
42576 {19, loong64.REG_R20, 16, "R20"},
42577 {20, loong64.REG_R21, 17, "R21"},
42578 {21, loong64.REGG, -1, "g"},
42579 {22, loong64.REG_R23, 18, "R23"},
42580 {23, loong64.REG_R24, 19, "R24"},
42581 {24, loong64.REG_R25, 20, "R25"},
42582 {25, loong64.REG_R26, 21, "R26"},
42583 {26, loong64.REG_R27, 22, "R27"},
42584 {27, loong64.REG_R28, 23, "R28"},
42585 {28, loong64.REG_R29, 24, "R29"},
42586 {29, loong64.REG_R31, 25, "R31"},
42587 {30, loong64.REG_F0, -1, "F0"},
42588 {31, loong64.REG_F1, -1, "F1"},
42589 {32, loong64.REG_F2, -1, "F2"},
42590 {33, loong64.REG_F3, -1, "F3"},
42591 {34, loong64.REG_F4, -1, "F4"},
42592 {35, loong64.REG_F5, -1, "F5"},
42593 {36, loong64.REG_F6, -1, "F6"},
42594 {37, loong64.REG_F7, -1, "F7"},
42595 {38, loong64.REG_F8, -1, "F8"},
42596 {39, loong64.REG_F9, -1, "F9"},
42597 {40, loong64.REG_F10, -1, "F10"},
42598 {41, loong64.REG_F11, -1, "F11"},
42599 {42, loong64.REG_F12, -1, "F12"},
42600 {43, loong64.REG_F13, -1, "F13"},
42601 {44, loong64.REG_F14, -1, "F14"},
42602 {45, loong64.REG_F15, -1, "F15"},
42603 {46, loong64.REG_F16, -1, "F16"},
42604 {47, loong64.REG_F17, -1, "F17"},
42605 {48, loong64.REG_F18, -1, "F18"},
42606 {49, loong64.REG_F19, -1, "F19"},
42607 {50, loong64.REG_F20, -1, "F20"},
42608 {51, loong64.REG_F21, -1, "F21"},
42609 {52, loong64.REG_F22, -1, "F22"},
42610 {53, loong64.REG_F23, -1, "F23"},
42611 {54, loong64.REG_F24, -1, "F24"},
42612 {55, loong64.REG_F25, -1, "F25"},
42613 {56, loong64.REG_F26, -1, "F26"},
42614 {57, loong64.REG_F27, -1, "F27"},
42615 {58, loong64.REG_F28, -1, "F28"},
42616 {59, loong64.REG_F29, -1, "F29"},
42617 {60, loong64.REG_F30, -1, "F30"},
42618 {61, loong64.REG_F31, -1, "F31"},
42619 {62, 0, -1, "SB"},
42620 }
42621 var paramIntRegLOONG64 = []int8{3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18}
42622 var paramFloatRegLOONG64 = []int8{30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45}
42623 var gpRegMaskLOONG64 = regMask(1071644664)
42624 var fpRegMaskLOONG64 = regMask(4611686017353646080)
42625 var specialRegMaskLOONG64 = regMask(0)
42626 var framepointerRegLOONG64 = int8(-1)
42627 var linkRegLOONG64 = int8(1)
42628 var registersMIPS = [...]Register{
42629 {0, mips.REG_R0, -1, "R0"},
42630 {1, mips.REG_R1, 0, "R1"},
42631 {2, mips.REG_R2, 1, "R2"},
42632 {3, mips.REG_R3, 2, "R3"},
42633 {4, mips.REG_R4, 3, "R4"},
42634 {5, mips.REG_R5, 4, "R5"},
42635 {6, mips.REG_R6, 5, "R6"},
42636 {7, mips.REG_R7, 6, "R7"},
42637 {8, mips.REG_R8, 7, "R8"},
42638 {9, mips.REG_R9, 8, "R9"},
42639 {10, mips.REG_R10, 9, "R10"},
42640 {11, mips.REG_R11, 10, "R11"},
42641 {12, mips.REG_R12, 11, "R12"},
42642 {13, mips.REG_R13, 12, "R13"},
42643 {14, mips.REG_R14, 13, "R14"},
42644 {15, mips.REG_R15, 14, "R15"},
42645 {16, mips.REG_R16, 15, "R16"},
42646 {17, mips.REG_R17, 16, "R17"},
42647 {18, mips.REG_R18, 17, "R18"},
42648 {19, mips.REG_R19, 18, "R19"},
42649 {20, mips.REG_R20, 19, "R20"},
42650 {21, mips.REG_R21, 20, "R21"},
42651 {22, mips.REG_R22, 21, "R22"},
42652 {23, mips.REG_R24, 22, "R24"},
42653 {24, mips.REG_R25, 23, "R25"},
42654 {25, mips.REG_R28, 24, "R28"},
42655 {26, mips.REGSP, -1, "SP"},
42656 {27, mips.REGG, -1, "g"},
42657 {28, mips.REG_R31, 25, "R31"},
42658 {29, mips.REG_F0, -1, "F0"},
42659 {30, mips.REG_F2, -1, "F2"},
42660 {31, mips.REG_F4, -1, "F4"},
42661 {32, mips.REG_F6, -1, "F6"},
42662 {33, mips.REG_F8, -1, "F8"},
42663 {34, mips.REG_F10, -1, "F10"},
42664 {35, mips.REG_F12, -1, "F12"},
42665 {36, mips.REG_F14, -1, "F14"},
42666 {37, mips.REG_F16, -1, "F16"},
42667 {38, mips.REG_F18, -1, "F18"},
42668 {39, mips.REG_F20, -1, "F20"},
42669 {40, mips.REG_F22, -1, "F22"},
42670 {41, mips.REG_F24, -1, "F24"},
42671 {42, mips.REG_F26, -1, "F26"},
42672 {43, mips.REG_F28, -1, "F28"},
42673 {44, mips.REG_F30, -1, "F30"},
42674 {45, mips.REG_HI, -1, "HI"},
42675 {46, mips.REG_LO, -1, "LO"},
42676 {47, 0, -1, "SB"},
42677 }
42678 var paramIntRegMIPS = []int8(nil)
42679 var paramFloatRegMIPS = []int8(nil)
42680 var gpRegMaskMIPS = regMask(335544318)
42681 var fpRegMaskMIPS = regMask(35183835217920)
42682 var specialRegMaskMIPS = regMask(105553116266496)
42683 var framepointerRegMIPS = int8(-1)
42684 var linkRegMIPS = int8(28)
42685 var registersMIPS64 = [...]Register{
42686 {0, mips.REG_R0, -1, "R0"},
42687 {1, mips.REG_R1, 0, "R1"},
42688 {2, mips.REG_R2, 1, "R2"},
42689 {3, mips.REG_R3, 2, "R3"},
42690 {4, mips.REG_R4, 3, "R4"},
42691 {5, mips.REG_R5, 4, "R5"},
42692 {6, mips.REG_R6, 5, "R6"},
42693 {7, mips.REG_R7, 6, "R7"},
42694 {8, mips.REG_R8, 7, "R8"},
42695 {9, mips.REG_R9, 8, "R9"},
42696 {10, mips.REG_R10, 9, "R10"},
42697 {11, mips.REG_R11, 10, "R11"},
42698 {12, mips.REG_R12, 11, "R12"},
42699 {13, mips.REG_R13, 12, "R13"},
42700 {14, mips.REG_R14, 13, "R14"},
42701 {15, mips.REG_R15, 14, "R15"},
42702 {16, mips.REG_R16, 15, "R16"},
42703 {17, mips.REG_R17, 16, "R17"},
42704 {18, mips.REG_R18, 17, "R18"},
42705 {19, mips.REG_R19, 18, "R19"},
42706 {20, mips.REG_R20, 19, "R20"},
42707 {21, mips.REG_R21, 20, "R21"},
42708 {22, mips.REG_R22, 21, "R22"},
42709 {23, mips.REG_R24, 22, "R24"},
42710 {24, mips.REG_R25, 23, "R25"},
42711 {25, mips.REGSP, -1, "SP"},
42712 {26, mips.REGG, -1, "g"},
42713 {27, mips.REG_R31, 24, "R31"},
42714 {28, mips.REG_F0, -1, "F0"},
42715 {29, mips.REG_F1, -1, "F1"},
42716 {30, mips.REG_F2, -1, "F2"},
42717 {31, mips.REG_F3, -1, "F3"},
42718 {32, mips.REG_F4, -1, "F4"},
42719 {33, mips.REG_F5, -1, "F5"},
42720 {34, mips.REG_F6, -1, "F6"},
42721 {35, mips.REG_F7, -1, "F7"},
42722 {36, mips.REG_F8, -1, "F8"},
42723 {37, mips.REG_F9, -1, "F9"},
42724 {38, mips.REG_F10, -1, "F10"},
42725 {39, mips.REG_F11, -1, "F11"},
42726 {40, mips.REG_F12, -1, "F12"},
42727 {41, mips.REG_F13, -1, "F13"},
42728 {42, mips.REG_F14, -1, "F14"},
42729 {43, mips.REG_F15, -1, "F15"},
42730 {44, mips.REG_F16, -1, "F16"},
42731 {45, mips.REG_F17, -1, "F17"},
42732 {46, mips.REG_F18, -1, "F18"},
42733 {47, mips.REG_F19, -1, "F19"},
42734 {48, mips.REG_F20, -1, "F20"},
42735 {49, mips.REG_F21, -1, "F21"},
42736 {50, mips.REG_F22, -1, "F22"},
42737 {51, mips.REG_F23, -1, "F23"},
42738 {52, mips.REG_F24, -1, "F24"},
42739 {53, mips.REG_F25, -1, "F25"},
42740 {54, mips.REG_F26, -1, "F26"},
42741 {55, mips.REG_F27, -1, "F27"},
42742 {56, mips.REG_F28, -1, "F28"},
42743 {57, mips.REG_F29, -1, "F29"},
42744 {58, mips.REG_F30, -1, "F30"},
42745 {59, mips.REG_F31, -1, "F31"},
42746 {60, mips.REG_HI, -1, "HI"},
42747 {61, mips.REG_LO, -1, "LO"},
42748 {62, 0, -1, "SB"},
42749 }
42750 var paramIntRegMIPS64 = []int8(nil)
42751 var paramFloatRegMIPS64 = []int8(nil)
42752 var gpRegMaskMIPS64 = regMask(167772158)
42753 var fpRegMaskMIPS64 = regMask(1152921504338411520)
42754 var specialRegMaskMIPS64 = regMask(3458764513820540928)
42755 var framepointerRegMIPS64 = int8(-1)
42756 var linkRegMIPS64 = int8(27)
42757 var registersPPC64 = [...]Register{
42758 {0, ppc64.REG_R0, -1, "R0"},
42759 {1, ppc64.REGSP, -1, "SP"},
42760 {2, 0, -1, "SB"},
42761 {3, ppc64.REG_R3, 0, "R3"},
42762 {4, ppc64.REG_R4, 1, "R4"},
42763 {5, ppc64.REG_R5, 2, "R5"},
42764 {6, ppc64.REG_R6, 3, "R6"},
42765 {7, ppc64.REG_R7, 4, "R7"},
42766 {8, ppc64.REG_R8, 5, "R8"},
42767 {9, ppc64.REG_R9, 6, "R9"},
42768 {10, ppc64.REG_R10, 7, "R10"},
42769 {11, ppc64.REG_R11, 8, "R11"},
42770 {12, ppc64.REG_R12, 9, "R12"},
42771 {13, ppc64.REG_R13, -1, "R13"},
42772 {14, ppc64.REG_R14, 10, "R14"},
42773 {15, ppc64.REG_R15, 11, "R15"},
42774 {16, ppc64.REG_R16, 12, "R16"},
42775 {17, ppc64.REG_R17, 13, "R17"},
42776 {18, ppc64.REG_R18, 14, "R18"},
42777 {19, ppc64.REG_R19, 15, "R19"},
42778 {20, ppc64.REG_R20, 16, "R20"},
42779 {21, ppc64.REG_R21, 17, "R21"},
42780 {22, ppc64.REG_R22, 18, "R22"},
42781 {23, ppc64.REG_R23, 19, "R23"},
42782 {24, ppc64.REG_R24, 20, "R24"},
42783 {25, ppc64.REG_R25, 21, "R25"},
42784 {26, ppc64.REG_R26, 22, "R26"},
42785 {27, ppc64.REG_R27, 23, "R27"},
42786 {28, ppc64.REG_R28, 24, "R28"},
42787 {29, ppc64.REG_R29, 25, "R29"},
42788 {30, ppc64.REGG, -1, "g"},
42789 {31, ppc64.REG_R31, -1, "R31"},
42790 {32, ppc64.REG_F0, -1, "F0"},
42791 {33, ppc64.REG_F1, -1, "F1"},
42792 {34, ppc64.REG_F2, -1, "F2"},
42793 {35, ppc64.REG_F3, -1, "F3"},
42794 {36, ppc64.REG_F4, -1, "F4"},
42795 {37, ppc64.REG_F5, -1, "F5"},
42796 {38, ppc64.REG_F6, -1, "F6"},
42797 {39, ppc64.REG_F7, -1, "F7"},
42798 {40, ppc64.REG_F8, -1, "F8"},
42799 {41, ppc64.REG_F9, -1, "F9"},
42800 {42, ppc64.REG_F10, -1, "F10"},
42801 {43, ppc64.REG_F11, -1, "F11"},
42802 {44, ppc64.REG_F12, -1, "F12"},
42803 {45, ppc64.REG_F13, -1, "F13"},
42804 {46, ppc64.REG_F14, -1, "F14"},
42805 {47, ppc64.REG_F15, -1, "F15"},
42806 {48, ppc64.REG_F16, -1, "F16"},
42807 {49, ppc64.REG_F17, -1, "F17"},
42808 {50, ppc64.REG_F18, -1, "F18"},
42809 {51, ppc64.REG_F19, -1, "F19"},
42810 {52, ppc64.REG_F20, -1, "F20"},
42811 {53, ppc64.REG_F21, -1, "F21"},
42812 {54, ppc64.REG_F22, -1, "F22"},
42813 {55, ppc64.REG_F23, -1, "F23"},
42814 {56, ppc64.REG_F24, -1, "F24"},
42815 {57, ppc64.REG_F25, -1, "F25"},
42816 {58, ppc64.REG_F26, -1, "F26"},
42817 {59, ppc64.REG_F27, -1, "F27"},
42818 {60, ppc64.REG_F28, -1, "F28"},
42819 {61, ppc64.REG_F29, -1, "F29"},
42820 {62, ppc64.REG_F30, -1, "F30"},
42821 {63, ppc64.REG_XER, -1, "XER"},
42822 }
42823 var paramIntRegPPC64 = []int8{3, 4, 5, 6, 7, 8, 9, 10, 14, 15, 16, 17}
42824 var paramFloatRegPPC64 = []int8{33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44}
42825 var gpRegMaskPPC64 = regMask(1073733624)
42826 var fpRegMaskPPC64 = regMask(9223372032559808512)
42827 var specialRegMaskPPC64 = regMask(9223372036854775808)
42828 var framepointerRegPPC64 = int8(-1)
42829 var linkRegPPC64 = int8(-1)
42830 var registersRISCV64 = [...]Register{
42831 {0, riscv.REG_X0, -1, "X0"},
42832 {1, riscv.REGSP, -1, "SP"},
42833 {2, riscv.REG_X3, -1, "X3"},
42834 {3, riscv.REG_X4, -1, "X4"},
42835 {4, riscv.REG_X5, 0, "X5"},
42836 {5, riscv.REG_X6, 1, "X6"},
42837 {6, riscv.REG_X7, 2, "X7"},
42838 {7, riscv.REG_X8, 3, "X8"},
42839 {8, riscv.REG_X9, 4, "X9"},
42840 {9, riscv.REG_X10, 5, "X10"},
42841 {10, riscv.REG_X11, 6, "X11"},
42842 {11, riscv.REG_X12, 7, "X12"},
42843 {12, riscv.REG_X13, 8, "X13"},
42844 {13, riscv.REG_X14, 9, "X14"},
42845 {14, riscv.REG_X15, 10, "X15"},
42846 {15, riscv.REG_X16, 11, "X16"},
42847 {16, riscv.REG_X17, 12, "X17"},
42848 {17, riscv.REG_X18, 13, "X18"},
42849 {18, riscv.REG_X19, 14, "X19"},
42850 {19, riscv.REG_X20, 15, "X20"},
42851 {20, riscv.REG_X21, 16, "X21"},
42852 {21, riscv.REG_X22, 17, "X22"},
42853 {22, riscv.REG_X23, 18, "X23"},
42854 {23, riscv.REG_X24, 19, "X24"},
42855 {24, riscv.REG_X25, 20, "X25"},
42856 {25, riscv.REG_X26, 21, "X26"},
42857 {26, riscv.REGG, -1, "g"},
42858 {27, riscv.REG_X28, 22, "X28"},
42859 {28, riscv.REG_X29, 23, "X29"},
42860 {29, riscv.REG_X30, 24, "X30"},
42861 {30, riscv.REG_X31, -1, "X31"},
42862 {31, riscv.REG_F0, -1, "F0"},
42863 {32, riscv.REG_F1, -1, "F1"},
42864 {33, riscv.REG_F2, -1, "F2"},
42865 {34, riscv.REG_F3, -1, "F3"},
42866 {35, riscv.REG_F4, -1, "F4"},
42867 {36, riscv.REG_F5, -1, "F5"},
42868 {37, riscv.REG_F6, -1, "F6"},
42869 {38, riscv.REG_F7, -1, "F7"},
42870 {39, riscv.REG_F8, -1, "F8"},
42871 {40, riscv.REG_F9, -1, "F9"},
42872 {41, riscv.REG_F10, -1, "F10"},
42873 {42, riscv.REG_F11, -1, "F11"},
42874 {43, riscv.REG_F12, -1, "F12"},
42875 {44, riscv.REG_F13, -1, "F13"},
42876 {45, riscv.REG_F14, -1, "F14"},
42877 {46, riscv.REG_F15, -1, "F15"},
42878 {47, riscv.REG_F16, -1, "F16"},
42879 {48, riscv.REG_F17, -1, "F17"},
42880 {49, riscv.REG_F18, -1, "F18"},
42881 {50, riscv.REG_F19, -1, "F19"},
42882 {51, riscv.REG_F20, -1, "F20"},
42883 {52, riscv.REG_F21, -1, "F21"},
42884 {53, riscv.REG_F22, -1, "F22"},
42885 {54, riscv.REG_F23, -1, "F23"},
42886 {55, riscv.REG_F24, -1, "F24"},
42887 {56, riscv.REG_F25, -1, "F25"},
42888 {57, riscv.REG_F26, -1, "F26"},
42889 {58, riscv.REG_F27, -1, "F27"},
42890 {59, riscv.REG_F28, -1, "F28"},
42891 {60, riscv.REG_F29, -1, "F29"},
42892 {61, riscv.REG_F30, -1, "F30"},
42893 {62, riscv.REG_F31, -1, "F31"},
42894 {63, 0, -1, "SB"},
42895 }
42896 var paramIntRegRISCV64 = []int8{9, 10, 11, 12, 13, 14, 15, 16, 7, 8, 17, 18, 19, 20, 21, 22}
42897 var paramFloatRegRISCV64 = []int8{41, 42, 43, 44, 45, 46, 47, 48, 39, 40, 49, 50, 51, 52, 53, 54}
42898 var gpRegMaskRISCV64 = regMask(1006632944)
42899 var fpRegMaskRISCV64 = regMask(9223372034707292160)
42900 var specialRegMaskRISCV64 = regMask(0)
42901 var framepointerRegRISCV64 = int8(-1)
42902 var linkRegRISCV64 = int8(0)
42903 var registersS390X = [...]Register{
42904 {0, s390x.REG_R0, 0, "R0"},
42905 {1, s390x.REG_R1, 1, "R1"},
42906 {2, s390x.REG_R2, 2, "R2"},
42907 {3, s390x.REG_R3, 3, "R3"},
42908 {4, s390x.REG_R4, 4, "R4"},
42909 {5, s390x.REG_R5, 5, "R5"},
42910 {6, s390x.REG_R6, 6, "R6"},
42911 {7, s390x.REG_R7, 7, "R7"},
42912 {8, s390x.REG_R8, 8, "R8"},
42913 {9, s390x.REG_R9, 9, "R9"},
42914 {10, s390x.REG_R10, -1, "R10"},
42915 {11, s390x.REG_R11, 10, "R11"},
42916 {12, s390x.REG_R12, 11, "R12"},
42917 {13, s390x.REGG, -1, "g"},
42918 {14, s390x.REG_R14, 12, "R14"},
42919 {15, s390x.REGSP, -1, "SP"},
42920 {16, s390x.REG_F0, -1, "F0"},
42921 {17, s390x.REG_F1, -1, "F1"},
42922 {18, s390x.REG_F2, -1, "F2"},
42923 {19, s390x.REG_F3, -1, "F3"},
42924 {20, s390x.REG_F4, -1, "F4"},
42925 {21, s390x.REG_F5, -1, "F5"},
42926 {22, s390x.REG_F6, -1, "F6"},
42927 {23, s390x.REG_F7, -1, "F7"},
42928 {24, s390x.REG_F8, -1, "F8"},
42929 {25, s390x.REG_F9, -1, "F9"},
42930 {26, s390x.REG_F10, -1, "F10"},
42931 {27, s390x.REG_F11, -1, "F11"},
42932 {28, s390x.REG_F12, -1, "F12"},
42933 {29, s390x.REG_F13, -1, "F13"},
42934 {30, s390x.REG_F14, -1, "F14"},
42935 {31, s390x.REG_F15, -1, "F15"},
42936 {32, 0, -1, "SB"},
42937 }
42938 var paramIntRegS390X = []int8(nil)
42939 var paramFloatRegS390X = []int8(nil)
42940 var gpRegMaskS390X = regMask(23551)
42941 var fpRegMaskS390X = regMask(4294901760)
42942 var specialRegMaskS390X = regMask(0)
42943 var framepointerRegS390X = int8(-1)
42944 var linkRegS390X = int8(14)
42945 var registersWasm = [...]Register{
42946 {0, wasm.REG_R0, 0, "R0"},
42947 {1, wasm.REG_R1, 1, "R1"},
42948 {2, wasm.REG_R2, 2, "R2"},
42949 {3, wasm.REG_R3, 3, "R3"},
42950 {4, wasm.REG_R4, 4, "R4"},
42951 {5, wasm.REG_R5, 5, "R5"},
42952 {6, wasm.REG_R6, 6, "R6"},
42953 {7, wasm.REG_R7, 7, "R7"},
42954 {8, wasm.REG_R8, 8, "R8"},
42955 {9, wasm.REG_R9, 9, "R9"},
42956 {10, wasm.REG_R10, 10, "R10"},
42957 {11, wasm.REG_R11, 11, "R11"},
42958 {12, wasm.REG_R12, 12, "R12"},
42959 {13, wasm.REG_R13, 13, "R13"},
42960 {14, wasm.REG_R14, 14, "R14"},
42961 {15, wasm.REG_R15, 15, "R15"},
42962 {16, wasm.REG_F0, -1, "F0"},
42963 {17, wasm.REG_F1, -1, "F1"},
42964 {18, wasm.REG_F2, -1, "F2"},
42965 {19, wasm.REG_F3, -1, "F3"},
42966 {20, wasm.REG_F4, -1, "F4"},
42967 {21, wasm.REG_F5, -1, "F5"},
42968 {22, wasm.REG_F6, -1, "F6"},
42969 {23, wasm.REG_F7, -1, "F7"},
42970 {24, wasm.REG_F8, -1, "F8"},
42971 {25, wasm.REG_F9, -1, "F9"},
42972 {26, wasm.REG_F10, -1, "F10"},
42973 {27, wasm.REG_F11, -1, "F11"},
42974 {28, wasm.REG_F12, -1, "F12"},
42975 {29, wasm.REG_F13, -1, "F13"},
42976 {30, wasm.REG_F14, -1, "F14"},
42977 {31, wasm.REG_F15, -1, "F15"},
42978 {32, wasm.REG_F16, -1, "F16"},
42979 {33, wasm.REG_F17, -1, "F17"},
42980 {34, wasm.REG_F18, -1, "F18"},
42981 {35, wasm.REG_F19, -1, "F19"},
42982 {36, wasm.REG_F20, -1, "F20"},
42983 {37, wasm.REG_F21, -1, "F21"},
42984 {38, wasm.REG_F22, -1, "F22"},
42985 {39, wasm.REG_F23, -1, "F23"},
42986 {40, wasm.REG_F24, -1, "F24"},
42987 {41, wasm.REG_F25, -1, "F25"},
42988 {42, wasm.REG_F26, -1, "F26"},
42989 {43, wasm.REG_F27, -1, "F27"},
42990 {44, wasm.REG_F28, -1, "F28"},
42991 {45, wasm.REG_F29, -1, "F29"},
42992 {46, wasm.REG_F30, -1, "F30"},
42993 {47, wasm.REG_F31, -1, "F31"},
42994 {48, wasm.REGSP, -1, "SP"},
42995 {49, wasm.REGG, -1, "g"},
42996 {50, 0, -1, "SB"},
42997 }
42998 var paramIntRegWasm = []int8(nil)
42999 var paramFloatRegWasm = []int8(nil)
43000 var gpRegMaskWasm = regMask(65535)
43001 var fpRegMaskWasm = regMask(281474976645120)
43002 var fp32RegMaskWasm = regMask(4294901760)
43003 var fp64RegMaskWasm = regMask(281470681743360)
43004 var specialRegMaskWasm = regMask(0)
43005 var framepointerRegWasm = int8(-1)
43006 var linkRegWasm = int8(-1)
43007
View as plain text